JP2010045325A - Semiconductor device, and method for manufacturing semiconductor device - Google Patents

Semiconductor device, and method for manufacturing semiconductor device Download PDF

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JP2010045325A
JP2010045325A JP2009068051A JP2009068051A JP2010045325A JP 2010045325 A JP2010045325 A JP 2010045325A JP 2009068051 A JP2009068051 A JP 2009068051A JP 2009068051 A JP2009068051 A JP 2009068051A JP 2010045325 A JP2010045325 A JP 2010045325A
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semiconductor device
range
protective film
surface temperature
electronic component
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Inventor
Shingo Ide
慎吾 井手
Yasunori Matsumura
保範 松村
Makoto Yamagata
誠 山縣
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Mitsui Mining and Smelting Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of bringing respective electronic components into prescribed temperatures or less, even in the semiconductor device mounted with the electronic components different in individual sizes and heat generation quantities, and capable of attaining a prescribed function, and to provide a method for manufacturing the semiconductor device. <P>SOLUTION: This semiconductor device includes: a polyimide substrate; a wiring pattern formed on a surface of the polyimide substrate; and the electronic components bonded to an inner lead of the wiring pattern, and is coated with an insulating protection film on a surface excepting a lead portion of the wiring pattern. The semiconductor device has, on a surface of the insulating protection film, a heat radiation means comprising a metal layer capable of reducing an observed surface temperature of each electronic component to an estimated surface temperature by regulating any of a thickness, an area and a kind of metal. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、基板上に実装された電子部品の生ずる熱を効率良く放熱することのできる半導体装置および半導体装置の製造方法に関する。   The present invention relates to a semiconductor device capable of efficiently dissipating heat generated by an electronic component mounted on a substrate, and a method for manufacturing the semiconductor device.

従来より、例えばポリイミド基板の表面に配線パターンを形成し、この配線パターンのインナーリード部分に電子部品が実装された半導体装置が広く用いられている。
このような半導体装置は、実装された電子部品が駆動によって発熱してしまうものであるが、この発熱による熱量は電子部品の表面、さらにこの電子部品に接続している配線パターンなどを介して放熱されるようになっている。
Conventionally, for example, a semiconductor device in which a wiring pattern is formed on the surface of a polyimide substrate and an electronic component is mounted on an inner lead portion of the wiring pattern has been widely used.
In such a semiconductor device, the mounted electronic component generates heat when driven, but the heat generated by the generated heat is dissipated through the surface of the electronic component and the wiring pattern connected to the electronic component. It has come to be.

しかしながら近年の電子部品は、高密度化・高集積化の一途をたどっており、これに伴って電子部品が駆動する際に生ずる熱量が大きくなり、高温状態が続くと半導体装置が所定の機能を果たせない場合が生ずることがあった。   However, electronic components in recent years have been steadily increasing in density and integration. As a result, the amount of heat generated when the electronic components are driven increases, and if the high temperature state continues, the semiconductor device performs a predetermined function. Sometimes it couldn't be done.

この問題を解決するため、特許文献1に記載の半導体装置100では、図9(a)および図9(b)に示したように、ポリイミド基板102の表面に形成された配線パターン104のインナーリード106部分とアウターリード108部分を除いた表面に、接着剤110を介して銅箔112からなる保護層114を形成し、この保護層114によってインナーリード106に接続された電子部品116の発する熱を効率的に放熱するようにしている。   In order to solve this problem, in the semiconductor device 100 described in Patent Document 1, as shown in FIGS. 9A and 9B, the inner leads of the wiring pattern 104 formed on the surface of the polyimide substrate 102 are used. A protective layer 114 made of copper foil 112 is formed on the surface excluding the portion 106 and the outer lead 108 portion via an adhesive 110, and the heat generated by the electronic component 116 connected to the inner lead 106 by the protective layer 114 is generated. It is designed to dissipate heat efficiently.

このような銅箔112からなる保護層114は熱伝導率が高く、電子部品116の発する熱を放熱するのに効果的であり、これにより電子部品116が所定の温度以上にはならず、確実に所定の機能を果たすことができるようになっている。   Such a protective layer 114 made of the copper foil 112 has high thermal conductivity and is effective in dissipating the heat generated by the electronic component 116, thereby ensuring that the electronic component 116 does not exceed a predetermined temperature. It is possible to fulfill a predetermined function.

特開2007−258197号公報JP 2007-258197 A

しかしながら特許文献1に開示された半導体装置100では、サイズや発熱量などが個々に異なる電子部品116に対し、どのように配線パターン104の表面に保護層114を設ければ良いか全く不明である。単に配線パターン104の表面に保護層114を設けたというだけでは、様々な電子部品116の全てを所定の温度以下にすることはできず、この問題を解決するための更なる研究がなされているのが現状である。   However, in the semiconductor device 100 disclosed in Patent Document 1, it is completely unknown how to provide the protective layer 114 on the surface of the wiring pattern 104 for the electronic components 116 having different sizes and heat generation amounts. . If the protective layer 114 is simply provided on the surface of the wiring pattern 104, all of the various electronic components 116 cannot be brought to a predetermined temperature or less, and further research has been conducted to solve this problem. is the current situation.

本発明はこのような現状に鑑み、個々にサイズや発熱量が異なる電子部品が実装された半導体装置であっても、それぞれを所定の温度以下にすることができ、所定の機能を果たすことのできる半導体装置および半導体装置の製造方法を提供することを目的とする。   In view of such a current situation, the present invention can reduce the temperature to a predetermined temperature or less and perform a predetermined function even in a semiconductor device in which electronic components having different sizes and heat generation amounts are mounted. An object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device.

本発明は、前述したような従来技術における課題および目的を達成するために発明されたものであって、
本発明の半導体装置は、
ポリイミド基板と、前記ポリイミド基板の表面に形成された配線パターンと、前記配線パターンのインナーリードに接合された電子部品と、を備えてなるとともに、前記配線パターンのリード部分を除く表面に絶縁保護膜が被覆されてなる半導体装置であって、
前記絶縁保護膜の表面に、
厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を有することを特徴とする。
The present invention was invented in order to achieve the problems and objects in the prior art as described above,
The semiconductor device of the present invention is
A polyimide substrate, a wiring pattern formed on the surface of the polyimide substrate, and an electronic component bonded to an inner lead of the wiring pattern, and an insulating protective film on the surface excluding the lead portion of the wiring pattern Is a semiconductor device coated with
On the surface of the insulating protective film,
It is characterized by having a heat dissipating means comprising a metal layer that can lower the measured surface temperature of the electronic component to the assumed surface temperature by adjusting any of the thickness, area, and type of metal.

また、本発明の半導体装置の製造方法は、
少なくとも、
ポリイミド基板の表面に配線パターンを形成し、前記配線パターンのインナーリードに電子部品を実装する工程と、
前記配線パターンのリード部分をのぞく表面に絶縁保護膜を被覆する工程と、
を有する半導体装置の製造方法であって、
前記絶縁保護膜の表面に、厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を形成する工程と、
を有することを特徴とする。
In addition, a method for manufacturing a semiconductor device of the present invention includes:
at least,
Forming a wiring pattern on the surface of the polyimide substrate, and mounting electronic components on the inner leads of the wiring pattern;
Coating an insulating protective film on the surface except the lead portion of the wiring pattern;
A method of manufacturing a semiconductor device having
A step of forming a heat radiation means comprising a metal layer on the surface of the insulating protective film, which can lower the measured surface temperature of the electronic component to an assumed surface temperature by adjusting any of the thickness, area, and type of metal. When,
It is characterized by having.

このように絶縁保護膜の表面に、厚さ,面積,および金属の種類のいずれかを調整した放熱手段を設ければ、電子部品を確実に所定の温度以下にすることができる。
しかも、個々にサイズや発熱量が異なる電子部品が実装された半導体装置であっても、放熱手段の厚さ,面積,および金属の種類のいずれかを調整することで、様々な電子部品の温度を所定の温度以下とすることができ、それぞれの半導体装置において所定の機能を果たすことができる。
As described above, by providing heat dissipation means that adjusts any of the thickness, area, and type of metal on the surface of the insulating protective film, the electronic component can be reliably brought to a predetermined temperature or lower.
Moreover, even in the case of a semiconductor device in which electronic components having different sizes and heat generation amounts are mounted, the temperature of various electronic components can be adjusted by adjusting any of the thickness, area, and type of metal of the heat dissipation means. Can be set to a predetermined temperature or lower, and each semiconductor device can perform a predetermined function.

また、本発明の半導体装置は、
ポリイミド基板と、前記ポリイミド基板の表面に形成された配線パターンと、前記配線パターンのインナーリードに接合された電子部品と、を備えてなるとともに、前記配線パターンのリード部分を除く表面に絶縁保護膜が被覆されてなる半導体装置であって、
前記ポリイミド基板の裏面に、
接着剤層を介して、厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を有することを特徴とする。
The semiconductor device of the present invention is
A polyimide substrate, a wiring pattern formed on the surface of the polyimide substrate, and an electronic component bonded to an inner lead of the wiring pattern, and an insulating protective film on the surface excluding the lead portion of the wiring pattern Is a semiconductor device coated with
On the back surface of the polyimide substrate,
It has heat dissipation means consisting of a metal layer that can lower the measured surface temperature of the electronic component to the assumed surface temperature by adjusting any of the thickness, area, and type of metal via the adhesive layer And

また、本発明の半導体装置の製造方法は、
少なくとも、
ポリイミド基板の表面に配線パターンを形成し、前記配線パターンのインナーリードに電子部品を実装する工程と、
前記配線パターンのリード部分をのぞく表面に絶縁保護膜を被覆する工程と、
を有する半導体装置の製造方法であって、
前記ポリイミド基板の裏面に、厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、接着剤層を介して形成する工程と、
を有することを特徴とする。
In addition, a method for manufacturing a semiconductor device of the present invention includes:
at least,
Forming a wiring pattern on the surface of the polyimide substrate, and mounting electronic components on the inner leads of the wiring pattern;
Coating an insulating protective film on the surface except the lead portion of the wiring pattern;
A method of manufacturing a semiconductor device having
On the back surface of the polyimide substrate, an adhesive layer is provided with a heat dissipating means composed of a metal layer that can lower the measured surface temperature of the electronic component to an assumed surface temperature by adjusting any of the thickness, area, and type of metal. Forming through
It is characterized by having.

このようにポリイミド基板の裏面に、厚さ,面積,および金属の種類のいずれかを調整した放熱手段を、接着剤層を介して設ければ、電子部品を確実に所定の温度以下にすることができる。   In this way, by providing heat dissipation means that adjusts any of the thickness, area, and type of metal on the back surface of the polyimide substrate via the adhesive layer, the electronic component can be reliably kept at a predetermined temperature or lower. Can do.

しかも、個々にサイズや発熱量が異なる電子部品が実装された半導体装置であっても、放熱手段の厚さ,面積,および金属の種類のいずれかを調整することで、様々な電子部品の温度を所定の温度以下とすることができ、それぞれの半導体装置において所定の機能を果たすことができる。   Moreover, even in the case of a semiconductor device in which electronic components having different sizes and heat generation amounts are mounted, the temperature of various electronic components can be adjusted by adjusting any of the thickness, area, and type of metal of the heat dissipation means. Can be set to a predetermined temperature or lower, and each semiconductor device can perform a predetermined function.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記放熱手段の金属層を形成する金属の熱伝導係数が、50〜450W/m・Kの範囲内にあることが好ましい。
このような範囲内の熱伝導係数を有する金属層であれば、電子部品の熱を効率良く放熱することができる。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
It is preferable that the thermal conductivity coefficient of the metal forming the metal layer of the heat radiating means is in the range of 50 to 450 W / m · K.
If it is a metal layer which has a heat conductivity coefficient in such a range, the heat | fever of an electronic component can be thermally radiated efficiently.

また、本発明の半導体装置あるいは半導体装置の製造方法は、
前記放熱手段の金属層が、銅層(例えば銅箔)またはアルミニウム層(例えばアルミニウム箔)から形成されていることが好ましい。
このように、上記範囲内の熱伝導係数を有する金属層が、銅層またはアルミニウム層であれば、特に熱伝導係数が高く取扱い性が容易であるため、好適である。
In addition, the semiconductor device of the present invention or the manufacturing method of the semiconductor device,
It is preferable that the metal layer of the heat dissipation means is formed of a copper layer (for example, a copper foil) or an aluminum layer (for example, an aluminum foil).
As described above, if the metal layer having a thermal conductivity coefficient within the above range is a copper layer or an aluminum layer, it is particularly preferable since the thermal conductivity coefficient is high and the handleability is easy.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記放熱手段の金属層の厚さが、5〜100μmの範囲内にあることが好ましい。
このような範囲内に金属層の厚さを設定すれば、フレキシブル性が損なわれることがなく、また電子部品の温度を所定の温度以下にすることが容易である。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
The thickness of the metal layer of the heat radiating means is preferably in the range of 5 to 100 μm.
If the thickness of the metal layer is set within such a range, flexibility is not impaired, and the temperature of the electronic component can be easily set to a predetermined temperature or lower.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記放熱手段の金属層の形成面積が、前記絶縁保護膜の総面積の1〜100%の範囲内にあることが好ましい。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
It is preferable that the formation area of the metal layer of the heat dissipation means is in the range of 1 to 100% of the total area of the insulating protective film.

このような範囲内で放熱手段を設ければ、電子部品の温度を所定の温度以下にすることが容易である。なお、金属層の面積が比較的小さい場合には、金属層の厚みを大きくすることで電子部品の温度を所定の温度以下にすることができ、逆に金属層の面積が比較的大きい場合には、金属層の厚みが小さいままで電子部品の温度を所定の温度以下にすることができる。   If the heat radiating means is provided within such a range, the temperature of the electronic component can be easily set to a predetermined temperature or lower. When the area of the metal layer is relatively small, the temperature of the electronic component can be reduced to a predetermined temperature or less by increasing the thickness of the metal layer. Conversely, when the area of the metal layer is relatively large Can keep the temperature of the electronic component below a predetermined temperature while keeping the thickness of the metal layer small.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記絶縁保護膜が、カバーレイまたはソルダーレジストであることを特徴とする。
このように絶縁保護膜がカバーレイまたはソルダーレジストであれば、配線パターンと放熱手段との間において確実に絶縁がなされるため、ショートしてしまうことなく、電子部品の温度を所定の温度以下にすることができる。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
The insulating protective film is a cover lay or a solder resist.
Thus, if the insulating protective film is a cover lay or a solder resist, insulation is surely made between the wiring pattern and the heat dissipation means, so that the temperature of the electronic component is kept below a predetermined temperature without causing a short circuit. can do.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記絶縁保護膜の厚さが、5〜100μmの範囲内にあることが好ましい。
このような範囲に絶縁保護膜の厚さを調整すれば、フレキシブル性を損なうことなく、電子部品の温度を所定の温度以下にすることができる。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
The insulating protective film preferably has a thickness in the range of 5 to 100 μm.
If the thickness of the insulating protective film is adjusted within such a range, the temperature of the electronic component can be set to a predetermined temperature or less without impairing flexibility.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記配線パターンが、銅もしくは銅合金から形成されていることが好ましい。
このように配線パターンが銅もしくは銅合金から形成されていれば、導電性が良好であり、半導体装置における所定の機能を確実に果たすことができる。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
The wiring pattern is preferably formed from copper or a copper alloy.
Thus, if the wiring pattern is formed from copper or a copper alloy, the electrical conductivity is good, and a predetermined function in the semiconductor device can be reliably achieved.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記配線パターンのインナーリードの線幅が、5〜40μmの範囲内にあることが好ましい。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
The line width of the inner lead of the wiring pattern is preferably in the range of 5 to 40 μm.

このような範囲にインナーリードの線幅を設定すれば、高密度化・高集積化の電子部品との導通を確実なものとするとともに短絡の心配がなく、半導体装置における所定の機能を確実に果たすことができる。   By setting the line width of the inner lead within such a range, it is possible to ensure conduction with high-density and highly-integrated electronic components, and there is no fear of a short circuit, and a predetermined function in the semiconductor device is ensured. Can fulfill.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記金属層において、前記絶縁保護膜と接触していない側の金属層表面の平均表面粗度(Rz)が、0.1〜5.0μmの範囲内にあることが好ましい。
このように金属層表面の平均表面粗度(Rz)の範囲を設定すれば、放熱性が良好であり電子部品の温度を所定の温度以下にすることが容易である。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
In the metal layer, it is preferable that the average surface roughness (Rz) of the surface of the metal layer not in contact with the insulating protective film is in the range of 0.1 to 5.0 μm.
Thus, if the range of the average surface roughness (Rz) of the metal layer surface is set, heat dissipation is good and the temperature of the electronic component can be easily set to a predetermined temperature or lower.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を前記絶縁保護膜の表面に設け、前記放熱手段を下記数式(1)により設定することが好ましい。
T=e1×W-(a1)×tMe-(b1)×tR(c1) ・・数式(1)(ただし数式(1)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tRは絶縁保護膜の厚さ(μm)を表し、e1は絶縁保護膜の表面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa1は0.12〜0.07の範囲内、b1は0.12〜0.07の範囲内、c1は0.011〜0.005の範囲内にある。)。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
It is preferable that a heat radiating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is provided on the surface of the insulating protective film, and the heat radiating means is set by the following formula (1).
T = e1 * W- (a1) * tMe- (b1) * tR (c1) .. Equation (1) (In Equation (1), T is the assumed surface temperature (° C) of the electronic component, and W is the heat conduction. The coefficient (W / m · K), tMe represents the thickness (μm) of the heat radiation means, tR represents the thickness (μm) of the insulation protective film, and e1 represents the value when the heat radiation means is provided on the surface of the insulation protective film. A coefficient obtained by multiple regression analysis, which is in the range of 50 to 250, a1 is in the range of 0.12 to 0.07, b1 is in the range of 0.12 to 0.07, and c1 is 0. Within the range of .011 to 0.005).

このように放熱手段を数式(1)により設定すれば、例えば同じ半導体装置で電子部品が発する熱の放熱量を現状よりも多くしたい場合に、放熱手段の厚さをどのように変化させれば良いか、または放熱手段の面積をどのようにしたら良いかなどを直ぐに知ることができ、設計変更などの場合に迅速な対応が可能である。   In this way, if the heat dissipation means is set according to the formula (1), for example, when it is desired to increase the heat dissipation amount of the heat generated by the electronic component in the same semiconductor device, how to change the thickness of the heat dissipation means It is possible to immediately know whether it is good or how to reduce the area of the heat radiating means, and it is possible to quickly respond to a design change or the like.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を前記絶縁保護膜の表面に部分的に設け、前記放熱手段を下記数式(2)により設定することが好ましい。
T=e2×W-(a2)×tMe-(b2)×tR(c2)×S-(d1) ・・数式(2)(ただし数式(2)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tRは絶縁保護膜の厚さ(μm)、Sは放熱手段の設置面積率(放熱手段の設置面積/絶縁保護膜の総面積)を表し、e2は絶縁保護膜の全面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa2は0.12〜0.07の範囲内、b2は0.12〜0.07の範囲内、c2は0.011〜0.005、さらにd1は0.11〜0.06の範囲内にある。)。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
It is preferable that a heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is partially provided on the surface of the insulating protective film, and the heat dissipating means is set by the following formula (2). .
T = e2 * W- (a2) * tMe- (b2) * tR (c2) * S- (d1) .. Formula (2) (In Formula (2), T is the assumed surface temperature of the electronic component (° C.) ), W is the thermal conductivity coefficient (W / m · K), tMe is the thickness of the heat dissipation means (μm), tR is the thickness of the insulating protective film (μm), and S is the installation area ratio of the heat dissipation means (of the heat dissipation means E2 is a coefficient obtained by multiple regression analysis when the heat radiation means is provided on the entire surface of the insulating protective film, and is in the range of 50 to 250, and a2 is in the range of 0.12 to 0.07, b2 is in the range of 0.12 to 0.07, c2 is in the range of 0.011 to 0.005, and d1 is in the range of 0.11 to 0.06. is there.).

このように放熱手段を数式(2)により設定すれば、例えば同じ半導体装置で電子部品が発する熱の放熱量を現状よりも多くしたい場合に、放熱手段の厚さをどのように変化させれば良いか、または放熱手段の面積をどのようにしたら良いかなどを直ぐに知ることができ、設計変更などの場合に迅速な対応が可能である。   In this way, if the heat dissipation means is set according to the formula (2), for example, when it is desired to increase the heat dissipation amount of the heat generated by the electronic component in the same semiconductor device, the thickness of the heat dissipation means can be changed. It is possible to immediately know whether it is good or how to reduce the area of the heat radiating means, and it is possible to quickly respond to a design change or the like.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記接着剤層を介して前記ポリイミド基板の裏面に設け、前記放熱手段を下記数式(3)により設定することが好ましい。
T=e3×W-(a3)×tMe-(b3)×tP(f1) ・・数式(3)(ただし数式(3)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tPはポリイミド基板と接着剤層の合計厚さ(μm)を表し、e3は絶縁保護膜の表面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa3は0.12〜0.07の範囲内、b3は0.12〜0.07の範囲内、f1は0.011〜0.005の範囲内にある。)。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
A heat dissipating means composed of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is provided on the back surface of the polyimide substrate via the adhesive layer, and the heat dissipating means is set by the following formula (3). It is preferable to do.
T = e3 * W- (a3) * tMe- (b3) * tP (f1) .. Equation (3) (In Equation (3), T is the assumed surface temperature (° C.) of the electronic component, and W is the heat conduction. Coefficient (W / m · K), tMe represents the thickness (μm) of the heat dissipation means, tP represents the total thickness (μm) of the polyimide substrate and the adhesive layer, and e3 is provided with the heat dissipation means on the surface of the insulating protective film. Is a coefficient obtained from the multiple regression analysis, and is in the range of 50 to 250, a3 is in the range of 0.12 to 0.07, and b3 is in the range of 0.12 to 0.07. , F1 is in the range of 0.011 to 0.005).

このように放熱手段を数式(3)により設定すれば、例えば同じ半導体装置で電子部品が発する熱の放熱量を現状よりも多くしたい場合に、放熱手段の厚さをどのように変化させれば良いか、または放熱手段の面積をどのようにしたら良いかなどを直ぐに知ることができ、設計変更などの場合に迅速な対応が可能である。   In this way, if the heat dissipation means is set according to the formula (3), for example, when it is desired to increase the heat dissipation amount of the heat generated by the electronic component in the same semiconductor device, the thickness of the heat dissipation means can be changed. It is possible to immediately know whether it is good or how to reduce the area of the heat radiating means, and it is possible to quickly respond to a design change or the like.

また、本発明の半導体装置あるいは半導体装置の製造方法においては、
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記接着剤層を介して前記ポリイミド基板の裏面に部分的に設け、前記放熱手段を下記数式(4)により設定することが好ましい。
T=e4×W-(a4)×tMe-(b4)×tP(f2)×S-(d2) ・・数式(4)(ただし数式(4)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tPはポリイミド基板と接着剤層の合計厚さ(μm)、Sは放熱手段の設置面積率(放熱手段の設置面積/ポリイミド基板の面積)を表し、e4は絶縁保護膜の全面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa4は0.12〜0.07の範囲内、b4は0.12〜0.07の範囲内、f2は0.011〜0.005、さらにd2は0.11〜0.06の範囲内にある。)。
In the semiconductor device or the method for manufacturing the semiconductor device of the present invention,
A heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is partially provided on the back surface of the polyimide substrate via the adhesive layer, and the heat dissipating means is expressed by the following formula (4). ) Is preferably set.
T = e4 * W- (a4) * tMe- (b4) * tP (f2) * S- (d2) .. Equation (4) (In Equation (4), T is the assumed surface temperature of the electronic component (° C.) ), W is the thermal conductivity coefficient (W / m · K), tMe is the thickness of the heat dissipation means (μm), tP is the total thickness (μm) of the polyimide substrate and the adhesive layer, and S is the area ratio of the heat dissipation means (Equipment area of heat radiation means / area of polyimide substrate) e4 is a coefficient obtained from multiple regression analysis when heat radiation means is provided on the entire surface of the insulating protective film, and is in the range of 50 to 250. Further, a4 is in the range of 0.12 to 0.07, b4 is in the range of 0.12 to 0.07, f2 is in the range of 0.011 to 0.005, and d2 is in the range of 0.11 to 0.06. In.)

このように放熱手段を数式(4)により設定すれば、例えば同じ半導体装置で電子部品が発する熱の放熱量を現状よりも多くしたい場合に、放熱手段の厚さをどのように変化させれば良いか、または放熱手段の面積をどのようにしたら良いかなどを直ぐに知ることができ、設計変更などの場合に迅速な対応が可能である。   In this way, if the heat dissipation means is set according to Equation (4), for example, if the heat dissipation amount of heat generated by the electronic component in the same semiconductor device is desired to be larger than the current state, how can the thickness of the heat dissipation means be changed? It is possible to immediately know whether it is good or how to reduce the area of the heat radiating means, and it is possible to quickly respond to a design change or the like.

本発明によれば、個々にサイズや発熱量が異なる電子部品が実装された半導体装置であっても、絶縁保護膜の表面またはポリイミド基板の裏面に、厚さ,面積,および金属の種類のいずれかを調整した放熱手段を設ければ、それぞれの電子部品を所定の温度以下にすることができ、所定の機能を果たすことのできる半導体装置および半導体装置の製造方法を提供することができる。   According to the present invention, even in a semiconductor device in which electronic components having different sizes and calorific values are individually mounted, any of the thickness, area, and metal type is provided on the surface of the insulating protective film or the back surface of the polyimide substrate. Providing the heat radiating means that adjusts the above can provide each of the electronic components at a predetermined temperature or lower, and provide a semiconductor device capable of performing a predetermined function and a method for manufacturing the semiconductor device.

図1は、本発明の実施例である半導体装置を説明するための説明図であって、図1(a)は正面図、図1(b)は図1(a)の厚み方向の断面図である。1A and 1B are explanatory views for explaining a semiconductor device according to an embodiment of the present invention. FIG. 1A is a front view, and FIG. 1B is a sectional view in the thickness direction of FIG. It is. 図2は、本発明の他の実施例である半導体装置を説明するための説明図であって、図2(a)は正面図、図2(b)は図2(a)の厚み方向の断面図である。2A and 2B are explanatory views for explaining a semiconductor device according to another embodiment of the present invention. FIG. 2A is a front view, and FIG. 2B is a thickness direction of FIG. It is sectional drawing. 図3は、本発明の他の実施例である半導体装置を説明するための説明図であって、図3(a)は正面図、図3(b)は図3(a)の厚み方向の断面図である。3A and 3B are explanatory views for explaining a semiconductor device according to another embodiment of the present invention. FIG. 3A is a front view, and FIG. 3B is a thickness direction of FIG. It is sectional drawing. 図4は、本発明の他の実施例である半導体装置を説明するための説明図であって、図4(a)は正面図、図4(b)は図4(a)の厚み方向の断面図である。4A and 4B are explanatory views for explaining a semiconductor device according to another embodiment of the present invention. FIG. 4A is a front view, and FIG. 4B is a thickness direction of FIG. It is sectional drawing. 図5は、本発明の実施例である半導体装置の製造方法を説明するための工程図であって、図5(a)はポリイミド基板に配線パターンを形成した状態を説明する工程図、図5(b)は配線パターン上に、放熱手段と絶縁保護膜の積層体を打ち抜いた状態を説明する工程図、図5(c)は配線パターン上に放熱手段と絶縁保護膜とを形成する状態を説明する工程図、図5(d)はインナーリード部分に電子部品を実装し、電子部品とインナーリード部分との間を封止樹脂で封止して半導体装置を完成させた状態を説明する工程図である。FIG. 5 is a process diagram for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 5A is a process diagram for explaining a state in which a wiring pattern is formed on a polyimide substrate. FIG. 5B is a process diagram for explaining a state in which the laminated body of the heat radiation means and the insulating protective film is punched on the wiring pattern, and FIG. 5C shows the state in which the heat radiation means and the insulating protective film are formed on the wiring pattern. FIG. 5D is a process diagram for explaining a state in which an electronic component is mounted on the inner lead portion, and the semiconductor device is completed by sealing between the electronic component and the inner lead portion with a sealing resin. FIG. 図6は、本発明の他の実施例である半導体装置の製造方法を説明するための工程図であって、図6(a)は配線パターン上に、放熱手段と絶縁保護膜の積層体の放熱手段にのみ切り込み線を入れ、切り込み線の入れられた放熱手段と絶縁保護膜の積層体を打ち抜いた状態を説明する工程図、図6(b)は配線パターン上に放熱手段と絶縁保護膜の積層体を形成した後、放熱手段の切り込み線外側の不要な部分を取り除いた状態を説明する工程図である。FIG. 6 is a process diagram for explaining a method of manufacturing a semiconductor device according to another embodiment of the present invention. FIG. 6 (a) shows a stacked structure of a heat radiation means and an insulating protective film on a wiring pattern. FIG. 6B is a process diagram for explaining a state in which a cut line is inserted only in the heat dissipation means and a laminated body of the heat dissipation means and the insulating protective film with the cut lines is punched out. FIG. 6B is a heat dissipation means and an insulating protective film on the wiring pattern. It is process drawing explaining the state which removed the unnecessary part outside the cut line of a thermal radiation means, after forming this laminated body. 図7は、本発明の他の実施例である半導体装置の製造方法を説明するための工程図であって、図7(a)は裏面の全面に接着剤層を介して放熱手段が形成されたポリイミド基板の表面に、配線パターンを形成した状態を説明する工程図、図7(b)は配線パターン上に、絶縁保護膜を打ち抜いた状態を説明する工程図、図7(c)は配線パターン上に絶縁保護膜を形成する状態を説明する工程図、図7(d)はインナーリード部分に電子部品を実装し、電子部品とインナーリードとの間を封止樹脂で封止して半導体装置を完成させた状態を説明する工程図である。FIG. 7 is a process diagram for explaining a method of manufacturing a semiconductor device according to another embodiment of the present invention. FIG. 7A shows a heat dissipation means formed on the entire back surface through an adhesive layer. 7B is a process diagram for explaining a state in which a wiring pattern is formed on the surface of the polyimide substrate, FIG. 7B is a process diagram for explaining a state in which an insulating protective film is punched on the wiring pattern, and FIG. FIG. 7D is a process diagram for explaining a state in which an insulating protective film is formed on the pattern. FIG. 7D shows a semiconductor in which an electronic component is mounted on the inner lead portion and the electronic component and the inner lead are sealed with a sealing resin. It is process drawing explaining the state which completed the apparatus. 図8は、本発明の他の実施例である半導体装置の製造方法を説明するための工程図であって、図8(a)は裏面の一部分に接着剤層を介して放熱手段が形成されたポリイミド基板の表面に、配線パターンを形成した状態を説明する工程図である。FIG. 8 is a process diagram for explaining a method of manufacturing a semiconductor device according to another embodiment of the present invention. FIG. 8A shows a heat dissipation means formed on a part of the back surface through an adhesive layer. It is process drawing explaining the state which formed the wiring pattern in the surface of the polyimide substrate. 図9は、従来の半導体装置を説明するための説明図であって、図9(a)は正面図、図9(b)は図9(a)の厚み方向の断面図である。9A and 9B are explanatory views for explaining a conventional semiconductor device, in which FIG. 9A is a front view and FIG. 9B is a cross-sectional view in the thickness direction of FIG. 9A.

以下、本発明の実施の形態(実施例)を図面に基づいてより詳細に説明する。
図1は、本発明の実施例である半導体装置を説明するための説明図であって、図1(a)は正面図、図1(b)は図1(a)の厚み方向の断面図である。
Hereinafter, embodiments (examples) of the present invention will be described in more detail with reference to the drawings.
1A and 1B are explanatory views for explaining a semiconductor device according to an embodiment of the present invention. FIG. 1A is a front view, and FIG. 1B is a sectional view in the thickness direction of FIG. It is.

本発明は、基板上に実装された電子部品の生ずる熱を効率良く放熱することのできる半導体装置および半導体装置の製造方法である。
なお、本発明の明細書中の語句について「電子部品の実測表面温度」とは、放熱手段が無い状態で半導体装置を起動した際における電子部品表面の最高到達温度のことを言うものである。
また「電子部品の想定表面温度」とは、放熱手段が形成された半導体装置を起動した際に想定される電子部品の表面温度のことである。
The present invention is a semiconductor device capable of efficiently dissipating heat generated by an electronic component mounted on a substrate, and a method for manufacturing the semiconductor device.
The term “measured surface temperature of the electronic component” in the specification of the present invention refers to the highest temperature reached on the surface of the electronic component when the semiconductor device is started up without any heat dissipation means.
The “assumed surface temperature of the electronic component” is a surface temperature of the electronic component that is assumed when the semiconductor device in which the heat dissipating unit is formed is started.

<半導体装置10>
図1に示したように、本発明の半導体装置10は、ポリイミド基板12と、このポリイミド基板12の表面に形成された配線パターン14と、配線パターン14のインナーリード16に接合された半導体チップ等の電子部品20とを備えてなり、この電子部品20とインナーリード16部分との間は封止樹脂32で封止され、さらに配線パターン14のインナーリード16およびアウターリード18を除く表面に絶縁保護膜22が被覆されてなるものである。
<Semiconductor device 10>
As shown in FIG. 1, the semiconductor device 10 of the present invention includes a polyimide substrate 12, a wiring pattern 14 formed on the surface of the polyimide substrate 12, and a semiconductor chip bonded to the inner leads 16 of the wiring pattern 14. The electronic component 20 and the inner lead 16 portion are sealed with a sealing resin 32, and the surface of the wiring pattern 14 excluding the inner lead 16 and the outer lead 18 is insulated and protected. The film 22 is covered.

そしてこの絶縁保護膜22の表面には、金属層からなる放熱手段24が形成されており、本半導体装置10では、この放熱手段24が特に特徴的である。
この放熱手段24は、厚さ,面積,および金属の種類のいずれかが調整されたものであり、これにより個々に異なる電子部品20の実測表面温度を、いずれも想定表面温度に下げることができるようになっている。
A heat radiating means 24 made of a metal layer is formed on the surface of the insulating protective film 22. In the semiconductor device 10, the heat radiating means 24 is particularly characteristic.
The heat radiating means 24 is adjusted in any one of thickness, area, and metal type, so that the measured surface temperature of each electronic component 20 can be lowered to the assumed surface temperature. It is like that.

なお、金属層からなる放熱手段24の厚さおよび面積については、特定の範囲内に調整することが好ましい。具体的な放熱手段24の厚さは、5〜100μmの範囲内であることが好ましく、面積については、絶縁保護膜22の総面積の1〜100%の範囲内であることが好ましく、5〜98%の範囲内であることがさらに好ましい。この範囲が1%未満では絶縁保護膜22への貼り付けが困難となる。ここでの絶縁保護膜22とは、カバーレイまたはソルダーレジストのことである。   In addition, it is preferable to adjust within the specific range about the thickness and area of the thermal radiation means 24 which consist of metal layers. The specific thickness of the heat dissipating means 24 is preferably in the range of 5 to 100 μm, and the area is preferably in the range of 1 to 100% of the total area of the insulating protective film 22. More preferably, it is within the range of 98%. If this range is less than 1%, it is difficult to attach to the insulating protective film 22. The insulating protective film 22 here is a cover lay or a solder resist.

なお、図1に示した半導体装置10では、絶縁保護膜22と放熱手段24とが同面積であるかのような図であるが、実際の放熱手段24は、上記したような範囲内での面積を有するものである。   In the semiconductor device 10 shown in FIG. 1, the insulating protective film 22 and the heat radiating means 24 are as if they have the same area, but the actual heat radiating means 24 is within the above range. It has an area.

また、放熱手段24の金属層を形成する金属は、熱伝導係数が50〜450W/m・Kの範囲内のものであることが好ましく、具体的には電解銅箔や圧延銅箔のような銅層またはアルミニウム箔のようなアルミニウム層であることが好ましい。この場合には絶縁保護膜22と接触していない側の金属層表面の平均表面粗度(Rz)が、0.1〜5.0μmの範囲内である金属層、特に電解銅箔を用いることが好ましい。   Moreover, it is preferable that the metal which forms the metal layer of the thermal radiation means 24 is a thing with a heat conductivity coefficient in the range of 50-450 W / m * K, specifically, like an electrolytic copper foil or a rolled copper foil. An aluminum layer such as a copper layer or an aluminum foil is preferred. In this case, use a metal layer, particularly an electrolytic copper foil, whose average surface roughness (Rz) on the surface of the metal layer not in contact with the insulating protective film 22 is in the range of 0.1 to 5.0 μm. Is preferred.

さらに、上記した半導体装置10における絶縁保護膜22の厚さは、5〜50μmの範囲内であることが好ましく、絶縁保護膜22の材質としては特に限定されるものではないが、例えばポリイミド、ウレタン樹脂、エポキシ樹脂などの熱硬化性樹脂からなる絶縁保護膜22を用いることが好ましい。   Furthermore, the thickness of the insulating protective film 22 in the semiconductor device 10 described above is preferably in the range of 5 to 50 μm, and the material of the insulating protective film 22 is not particularly limited. It is preferable to use an insulating protective film 22 made of a thermosetting resin such as a resin or an epoxy resin.

また、配線パターン14については、銅もしくは銅合金から形成されていることが好ましく、この配線パターン14のインナーリード16の線幅については、5〜40μmの範囲内であることが好ましい。   The wiring pattern 14 is preferably formed of copper or a copper alloy, and the line width of the inner lead 16 of the wiring pattern 14 is preferably in the range of 5 to 40 μm.

さらに、封止樹脂32の材質としては特に限定されるものではないが、例えばエポキシ樹脂などからなる封止樹脂32を用いることが好ましい。
ところで、上記したように放熱手段24の厚さや面積は、半導体装置10の大きさや搭載される電子部品20から発せられる熱量、または放熱手段24の材質、求められる半導体装置10のスペックなどによって、前述した数値範囲の中で変動するものである。
Furthermore, the material of the sealing resin 32 is not particularly limited, but it is preferable to use a sealing resin 32 made of, for example, an epoxy resin.
By the way, as described above, the thickness and area of the heat dissipation means 24 depend on the size of the semiconductor device 10, the amount of heat generated from the mounted electronic component 20, the material of the heat dissipation means 24, the required specifications of the semiconductor device 10, and the like. It fluctuates within the specified numerical range.

このため、この変動する数値の相関性を式として予め用意することで、例えば同じ半導体装置10で、電子部品20が発する熱の放熱量を現状よりも多くしたい場合、放熱手段24の厚さをどのように変化させれば良いか、または放熱手段24の面積をどのようにしたら良いかなどを直ぐに知ることができ、設計変更などの場合に迅速な対応が可能である。   Therefore, by preparing the correlation of the fluctuating numerical values as an equation in advance, for example, in the same semiconductor device 10, when it is desired to increase the heat dissipation amount of the heat generated by the electronic component 20, the thickness of the heat dissipation means 24 can be increased. It is possible to immediately know how to change the area or the area of the heat dissipating means 24, and it is possible to quickly respond to a design change or the like.

ここで、
T =電子部品の想定表面温度(℃)
W =熱伝導係数(W/m・K)
tMe=放熱手段の厚さ(μm)
tR =絶縁保護膜の厚さ(μm)
とし、放熱手段24の形成面積を絶縁保護膜22の総面積と略同じ面積とした場合における相関性の式は、次式の通りである。
here,
T = Assumed surface temperature of electronic parts (° C)
W = Thermal conductivity coefficient (W / m · K)
tMe = thickness of heat dissipation means (μm)
tR = thickness of insulating protective film (μm)
In the case where the formation area of the heat dissipating means 24 is substantially the same as the total area of the insulating protective film 22, the equation of correlation is as follows.

T=e1×W-(a1)×tMe-(b1)×tR(c1) ・・数式(1)
上記数式(1)において、e1は50〜250の範囲内にあることが好ましく、100〜200の範囲内にあることがより好ましく、さらに140〜180の範囲内にあることが特に好ましい。またa1は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにb1は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにc1は、0.011〜0.005の範囲内にあることが好ましく、0.010〜0.006の範囲内にあることがより好ましく、さらに0.009〜0.007の範囲内にあることが特に好ましい。
T = e1 * W- (a1) * tMe- (b1) * tR (c1) .. Formula (1)
In the above mathematical formula (1), e1 is preferably in the range of 50 to 250, more preferably in the range of 100 to 200, and even more preferably in the range of 140 to 180. A1 is preferably within the range of 0.12 to 0.07, more preferably within the range of 0.11 to 0.08, and further within the range of 0.10 to 0.09. Is particularly preferred. Further, b1 is preferably within the range of 0.12 to 0.07, more preferably within the range of 0.11 to 0.08, and further within the range of 0.10 to 0.09. Is particularly preferred. Furthermore, c1 is preferably in the range of 0.011 to 0.005, more preferably in the range of 0.010 to 0.006, and further in the range of 0.009 to 0.007. It is particularly preferred.

なお、上記したe1の値については、多変量解析の一つである重回帰分析より得られた数値である。
特に数式(1)のe1,a1,b1,c1を、次に示す数式(1−1)のような数値範囲にすれば、それぞれの素材の種類に関わりなく、高い精度で所望の電子部品20の想定表面温度を算定できる。
In addition, about the value of above-mentioned e1, it is a numerical value obtained from the multiple regression analysis which is one of the multivariate analyses.
In particular, if e1, a1, b1, and c1 in Expression (1) are set to a numerical value range as shown in Expression (1-1) below, the desired electronic component 20 can be obtained with high accuracy regardless of the type of each material. The estimated surface temperature can be calculated.

T=(140〜180)×W-(0.10〜0.09)×tMe-(0.10〜0.09)×tR(0.009〜0.007)
・・数式(1−1)
仮に放熱手段24の金属層の材質として銅箔(銅の熱伝導係数(W)=381)を使用し、絶縁保護膜22の厚さ(tR)を例えば40μmにし、放熱手段24の厚さ(tMe)を約16μmとし、これらの数値を数式(1−1)に代入して式を解くと、電子部品の想定表面温度(T)はおよそ60℃〜85℃の範囲と算出され、数式(1−1)が適正な数値範囲であることが説明される。
T = (140 to 180) × W − (0.10 to 0.09) × tMe − (0.10 to 0.09) × tR (0.009 to 0.007)
..Formula (1-1)
Temporarily, copper foil (copper thermal conductivity coefficient (W) = 381) is used as the material of the metal layer of the heat dissipation means 24, the thickness (tR) of the insulating protective film 22 is set to 40 μm, for example, and the thickness of the heat dissipation means 24 ( When tMe) is set to about 16 μm and these numerical values are substituted into Equation (1-1) to solve the equation, the assumed surface temperature (T) of the electronic component is calculated to be in the range of about 60 ° C. to 85 ° C. It is explained that 1-1) is a proper numerical range.

特にe1=160.06,a1=0.0995,b1=0.0979,c1=0.0085と設定し、熱伝導係数(W),放熱手段の厚み(tMe),絶縁保護膜の厚み(tR)を上記したのと同じ数値として数式(1)を解けば、想定表面温度Tは69.7℃となる。   In particular, e1 = 160.06, a1 = 0.0995, b1 = 0.0979, and c1 = 0.0085, and the thermal conductivity coefficient (W), the thickness of the heat radiation means (tMe), the thickness of the insulating protective film (tR ) Is the same numerical value as described above and Equation (1) is solved, the assumed surface temperature T is 69.7 ° C.

実際にこの条件で半導体装置10を製造して実装された電子部品20の表面温度を測定するとほぼ72.5℃であり、数式(1)に上記数値を代入して得られた想定表面温度(T)と、実測された表面温度の値が近似していることが分かる。   When the surface temperature of the electronic component 20 that is actually manufactured by mounting the semiconductor device 10 under this condition is measured, it is about 72.5 ° C., and the estimated surface temperature obtained by substituting the above numerical value into the equation (1) ( It can be seen that T) is close to the measured surface temperature value.

さらに、図2に示したように放熱手段24の形成面積が絶縁保護膜22の総面積に対して小さく、これに対する放熱手段24の面積の割合が決められている場合には、次式を用いることができる。   Furthermore, as shown in FIG. 2, when the formation area of the heat radiating means 24 is smaller than the total area of the insulating protective film 22, and the ratio of the area of the heat radiating means 24 to this is determined, the following equation is used: be able to.

T=e2×W-(a2)×tMe-(b2)×tR(c2)×S-(d1) ・・数式(2)
なお数式(2)において、S=放熱手段の設置面積率(放熱手段の設置面積/絶縁保護膜の総面積)であること以外のT,W,tMe,tRは数式(1)と同義である。
T = e2 * W- (a2) * tMe- (b2) * tR (c2) * S- (d1) .. Formula (2)
In Equation (2), T, W, tMe, and tR are synonymous with Equation (1) except that S = the installation area ratio of the heat dissipation means (the installation area of the heat dissipation means / the total area of the insulating protective film). .

上記数式(2)において、e2は50〜250の範囲内にあることが好ましく、100〜200の範囲内にあることがより好ましく、さらに140〜180の範囲内にあることが特に好ましい。またa2は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにb2は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにc2は0.011〜0.005の範囲内にあることが好ましく、0.010〜0.006範囲内にあることがより好ましく、さらに0.009〜0.007の範囲内にすることが特に好ましく、さらにd1は0.11〜0.06の範囲内にあることが好ましく、0.10〜0.07範囲内にあることがより好ましく、さらに0.09〜0.08の範囲内にすることが特に好ましい。   In the above formula (2), e2 is preferably in the range of 50 to 250, more preferably in the range of 100 to 200, and even more preferably in the range of 140 to 180. A2 is preferably in the range of 0.12 to 0.07, more preferably in the range of 0.11 to 0.08, and further in the range of 0.10 to 0.09. Is particularly preferred. Furthermore, b2 is preferably in the range of 0.12 to 0.07, more preferably in the range of 0.11 to 0.08, and further in the range of 0.10 to 0.09. Is particularly preferred. Furthermore, c2 is preferably in the range of 0.011 to 0.005, more preferably in the range of 0.010 to 0.006, and further in the range of 0.009 to 0.007. Particularly preferably, d1 is preferably in the range of 0.11 to 0.06, more preferably in the range of 0.10 to 0.07, and further in the range of 0.09 to 0.08. It is particularly preferable to do this.

なお、上記したe2の値については、数式(1)のe1と同様に多変量解析の一つである重回帰分析より得られた数値である。
特に数式(2)を、次に示す数式(2−1)にすることにより、それぞれの素材の種類に関わりなく、高い精度で所望の電子部品の想定表面温度を算定できる。
In addition, about the value of above-mentioned e2, it is a numerical value obtained by multiple regression analysis which is one of multivariate analysis similarly to e1 of Numerical formula (1).
In particular, when Formula (2) is changed to Formula (2-1) shown below, the estimated surface temperature of a desired electronic component can be calculated with high accuracy regardless of the type of each material.

T=(140〜180)×W-(0.10〜0.09)×tMe-(0.10〜0.09)×tR(0.009〜0.007)×S-(0.09〜0.08) ・・数式(2−1)
仮に放熱手段24の金属層の材質として銅箔(銅の熱伝導係数(W)=381)を使用し、絶縁保護膜22の厚さ(tR)を例えば40μmにし、放熱手段24の設置面積率(S)を0.7とし、放熱手段24の厚さ(tMe)を約18μmとし、これらの数値を数式(2−1)に代入して式を解くと、電子部品の想定表面温度(T)はおよそ60℃〜85℃の範囲と算出され、数式(2−1)が適正な数値範囲であることが説明される。
T = (140-180) * W- (0.10-0.09) * tMe- (0.10-0.09) * tR (0.009-0.007) * S- (0.09-0.08) .. Formula (2-1)
Temporarily, copper foil (copper thermal conductivity coefficient (W) = 381) is used as the material of the metal layer of the heat dissipation means 24, the thickness (tR) of the insulating protective film 22 is set to 40 μm, for example, and the installation area ratio of the heat dissipation means 24 When (S) is 0.7, the thickness (tMe) of the heat dissipating means 24 is about 18 μm, and these numerical values are substituted into the equation (2-1) to solve the equation, the assumed surface temperature of the electronic component (T ) Is calculated as a range of approximately 60 ° C. to 85 ° C., and it is explained that the mathematical formula (2-1) is an appropriate numerical range.

特にe2=157.52,a2=0.0995,b2=0.0979,c2=0.0085,d1=0.0851と設定し、熱伝導係数(W),放熱手段の厚み(tMe),絶縁保護膜の厚み(tR),放熱手段の設置面積率(S)を上記したのと同じ数値として数式(2)を解けば、想定表面温度Tは69.9℃となる。   In particular, e2 = 157.52, a2 = 0.0995, b2 = 0.0979, c2 = 0.0085, d1 = 0.0851 are set, the thermal conductivity coefficient (W), the thickness of the heat radiation means (tMe), the insulation If formula (2) is solved with the thickness (tR) of the protective film and the installation area ratio (S) of the heat dissipating means as described above, the assumed surface temperature T is 69.9 ° C.

実際にこの条件で半導体装置10を製造して実装された電子部品20の表面温度を測定するとほぼ73.4℃であり、数式(2)に上記数値を代入して得られた想定表面温度(T)と、実測された表面温度の値が近似していることが分かる。   When the surface temperature of the electronic component 20 actually manufactured by mounting the semiconductor device 10 under this condition is measured, it is about 73.4 ° C., and the assumed surface temperature ( It can be seen that T) is close to the measured surface temperature value.

このように、図1および図2を用いて説明した本発明の実施例によれば、放熱に関与する絶縁保護膜22およびこの絶縁保護膜22の表面に配置される放熱手段24の種類、厚さ、面積を予め設定することにより、電子部品20の発熱量に関わらず、電子部品20の表面の実測表面温度を一定の温度(想定表面温度)にすることができる。   As described above, according to the embodiment of the present invention described with reference to FIGS. 1 and 2, the insulating protective film 22 involved in heat dissipation and the type and thickness of the heat dissipating means 24 disposed on the surface of the insulating protective film 22. By setting the area in advance, the measured surface temperature of the surface of the electronic component 20 can be made constant (assumed surface temperature) regardless of the amount of heat generated by the electronic component 20.

次いで、本発明の他の実施例について用いて説明する。
図3および図4に示した本発明の他の実施例は、放熱手段24を、接着剤層34を介してポリイミド基板12の裏面に設けていること以外は、基本的に図1および図2を用いて説明した上記の実施例と同様である。
Next, another embodiment of the present invention will be described.
3 and 4 is basically the same as that shown in FIGS. 1 and 2 except that the heat dissipating means 24 is provided on the back surface of the polyimide substrate 12 with the adhesive layer 34 interposed therebetween. It is the same as that of the said Example demonstrated using FIG.

図3および図4に示した半導体装置10では、ポリイミド基板12の裏面に、厚さ,面積,および金属の種類のいずれかが調整された放熱手段24が接着剤層34を介して設けられており、この放熱手段24により電子部品20を所定の温度以下にすることができるようになっている。   In the semiconductor device 10 shown in FIG. 3 and FIG. 4, a heat radiating means 24 in which any one of thickness, area and metal type is adjusted is provided on the back surface of the polyimide substrate 12 via an adhesive layer 34. The heat radiation means 24 can bring the electronic component 20 to a predetermined temperature or lower.

なお、図3に示した半導体装置10では、ポリイミド基板12の裏面に接着剤層34を介して設けられた放熱手段24は、ポリイミド基板12の裏面の全面に設けられているが、図4に示したようにポリイミド基板12の裏面に部分的に設けても良いものである。   In the semiconductor device 10 shown in FIG. 3, the heat radiation means 24 provided on the back surface of the polyimide substrate 12 via the adhesive layer 34 is provided on the entire back surface of the polyimide substrate 12. As shown, it may be partially provided on the back surface of the polyimide substrate 12.

ここで図3に示したように、放熱手段24を、接着剤層34を介してポリイミド基板12の裏面の全面に設けた場合には、次式を用いることができる。
T=e3×W-(a3)×tMe-(b3)×tP(f1) ・・数式(3)
なお数式(3)において、tP=ポリイミド基板12と接着剤層34の合計厚さ(μm)であること以外のT,W,tMeは数式(1)と同義である。
Here, as shown in FIG. 3, when the heat radiating means 24 is provided on the entire back surface of the polyimide substrate 12 via the adhesive layer 34, the following equation can be used.
T = e3 * W- (a3) * tMe- (b3) * tP (f1) .. Formula (3)
In Equation (3), T, W, and tMe other than tP = total thickness (μm) of the polyimide substrate 12 and the adhesive layer 34 are synonymous with Equation (1).

上記数式(3)において、e3は50〜250の範囲内にあることが好ましく、100〜200の範囲内にあることがより好ましく、さらに140〜180の範囲内にあることが特に好ましい。またa3は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにb3は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにf1は0.011〜0.005の範囲内にあることが好ましく、0.010〜0.006範囲内にあることがより好ましく、さらに0.009〜0.007の範囲内にすることが特に好ましい。   In the above formula (3), e3 is preferably in the range of 50 to 250, more preferably in the range of 100 to 200, and even more preferably in the range of 140 to 180. A3 is preferably in the range of 0.12 to 0.07, more preferably in the range of 0.11 to 0.08, and further in the range of 0.10 to 0.09. Is particularly preferred. Further, b3 is preferably within a range of 0.12 to 0.07, more preferably within a range of 0.11 to 0.08, and further within a range of 0.10 to 0.09. Is particularly preferred. Further, f1 is preferably within the range of 0.011 to 0.005, more preferably within the range of 0.010 to 0.006, and further within the range of 0.009 to 0.007. Particularly preferred.

なお、上記したe3の値については、数式(1)のe1と同様に多変量解析の一つである重回帰分析より得られた数値である。
特に数式(3)を、次に示す数式(3−1)にすることにより、それぞれの素材の種類に関わりなく、高い精度で所望の電子部品の想定表面温度を算定できる。
In addition, about the value of above-mentioned e3, it is a numerical value obtained by the multiple regression analysis which is one of the multivariate analysis similarly to e1 of Numerical formula (1).
In particular, when the formula (3) is changed to the following formula (3-1), the assumed surface temperature of a desired electronic component can be calculated with high accuracy regardless of the type of each material.

T=(140〜180)×W-(0.10〜0.09)×tMe-(0.10〜0.09)×tP(0.009〜0.007) ・・数式(3−1)
仮に放熱手段24の金属層の材質として銅箔(銅の熱伝導係数(W)=381)を使用し、ポリイミド基板12と接着剤層34の合計厚さ(tP)を例えば70μmとし、放熱手段24の厚さ(tMe)を約18μmとし、これらの数値を数式(3−1)に代入して式を解くと、電子部品の想定表面温度(T)はおよそ60℃〜85℃の範囲と算出され、数式(3−1)が適正な数値範囲であることが説明される。
T = (140-180) * W- (0.10-0.09) * tMe- (0.10-0.09) * tP (0.009-0.007) .. Formula (3-1)
Assuming that a copper foil (copper thermal conductivity coefficient (W) = 381) is used as the material of the metal layer of the heat dissipation means 24, the total thickness (tP) of the polyimide substrate 12 and the adhesive layer 34 is, for example, 70 μm. When the thickness (tMe) of 24 is set to about 18 μm and these numerical values are substituted into the equation (3-1) to solve the equation, the assumed surface temperature (T) of the electronic component is in the range of about 60 ° C. to 85 ° C. It is calculated and it is explained that numerical formula (3-1) is an appropriate numerical range.

特にe3=157.4,a3=0.0995,b3=0.0898,f1=0.0085と設定し、熱伝導係数(W),放熱手段の厚み(tMe),ポリイミド基板と接着剤層の合計の厚み(tP)を上記したのと同じ数値として数式(3)を解けば、想定表面温度Tは69.7℃となる。   In particular, e3 = 157.4, a3 = 0.0995, b3 = 0.0898, f1 = 0.0085, thermal conductivity coefficient (W), heat dissipation means thickness (tMe), polyimide substrate and adhesive layer Assuming that the total thickness (tP) is the same numerical value as described above and solving Equation (3), the assumed surface temperature T is 69.7 ° C.

実際にこの条件で半導体装置10を製造して実装された電子部品20の表面温度を測定するとほぼ73.1℃であり、数式(3)に上記数値を代入して得られた想定表面温度(T)と、実測された表面温度の値が近似していることが分かる。   When the surface temperature of the electronic component 20 actually manufactured by mounting the semiconductor device 10 under this condition is measured, it is about 73.1 ° C., and the assumed surface temperature ( It can be seen that T) is close to the measured surface temperature value.

さらに、図4に示したように放熱手段24の形成面積が絶縁保護膜22の総面積に対して小さく、これに対する放熱手段24の面積の割合が決められている場合には、次式を用いることができる。   Furthermore, as shown in FIG. 4, when the formation area of the heat dissipation means 24 is small with respect to the total area of the insulating protective film 22, and the ratio of the area of the heat dissipation means 24 to this is determined, the following equation is used: be able to.

T=e4×W-(a4)×tMe-(b4)×tP(f2)×S-(d2) ・・数式(4)
なお数式(4)において、S=放熱手段の設置面積率(放熱手段の設置面積/ポリイミド基板の面積)であること以外のT,W,tMe,tPは数式(3)と同義である。
T = e4 * W- (a4) * tMe- (b4) * tP (f2) * S- (d2) .. Formula (4)
In Equation (4), T, W, tMe, and tP are synonymous with Equation (3) except that S = the installation area ratio of the heat dissipation means (the installation area of the heat dissipation means / the area of the polyimide substrate).

上記数式(4)において、e4は50〜250の範囲内にあることが好ましく、100〜200の範囲内にあることがより好ましく、さらに140〜180の範囲内にあることが特に好ましい。またa4は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにb4は0.12〜0.07の範囲内にあることが好ましく、0.11〜0.08の範囲内にあることがより好ましく、さらに0.10〜0.09の範囲内にあることが特に好ましい。さらにf2は0.011〜0.005の範囲内にあることが好ましく、0.010〜0.006範囲内にあることがより好ましく、さらに0.009〜0.007の範囲内にすることが特に好ましく、さらにd2は0.11〜0.06の範囲内にあることが好ましく、0.10〜0.07範囲内にあることがより好ましく、さらに0.09〜0.08の範囲内にすることが特に好ましい。   In the above formula (4), e4 is preferably in the range of 50 to 250, more preferably in the range of 100 to 200, and even more preferably in the range of 140 to 180. A4 is preferably in the range of 0.12 to 0.07, more preferably in the range of 0.11 to 0.08, and further in the range of 0.10 to 0.09. Is particularly preferred. Further, b4 is preferably in the range of 0.12 to 0.07, more preferably in the range of 0.11 to 0.08, and further in the range of 0.10 to 0.09. Is particularly preferred. Further, f2 is preferably within a range of 0.011 to 0.005, more preferably within a range of 0.010 to 0.006, and further within a range of 0.009 to 0.007. Particularly preferably, d2 is preferably in the range of 0.11 to 0.06, more preferably in the range of 0.10 to 0.07, and further in the range of 0.09 to 0.08. It is particularly preferable to do this.

なお、上記したe4の値については、数式(1)のe1と同様に多変量解析の一つである重回帰分析より得られた数値である。
特に数式(4)を、次に示す数式(4−1)にすることにより、それぞれの素材の種類に関わりなく、高い精度で所望の電子部品の想定表面温度を算定できる。
In addition, about the value of above-mentioned e4, it is a numerical value obtained by the multiple regression analysis which is one of multivariate analysis similarly to e1 of Numerical formula (1).
In particular, when the formula (4) is changed to the following formula (4-1), the assumed surface temperature of a desired electronic component can be calculated with high accuracy regardless of the type of each material.

T=(140〜180)×W-(0.10〜0.09)×tMe-(0.10〜0.09)×tP(0.009〜0.007)×S-(0.09〜0.08) ・・数式(4−1)
仮に放熱手段24の金属層の材質として銅箔(銅の熱伝導係数(W)=381)を使用し、ポリイミド基板12と接着剤層34の合計厚さ(tP)を例えば70μmにし、放熱手段24の設置面積率(S)を0.7とし、放熱手段24の厚さ(tMe)を約20μmとし、これらの数値を数式(4−1)に代入して式を解くと、電子部品の想定表面温度(T)はおよそ60℃〜85℃の範囲と算出され、数式(4−1)が適正な数値範囲であることが説明される。
T = (140-180) * W- (0.10-0.09) * tMe- (0.10-0.09) * tP (0.009-0.007) * S- (0.09-0.08) .. Formula (4-1)
Temporarily, a copper foil (copper thermal conductivity coefficient (W) = 381) is used as the material of the metal layer of the heat dissipation means 24, and the total thickness (tP) of the polyimide substrate 12 and the adhesive layer 34 is set to 70 μm, for example. When the installation area ratio (S) of 24 is 0.7, the thickness (tMe) of the heat radiating means 24 is about 20 μm, and these numerical values are substituted into the equation (4-1), the equation is solved. The assumed surface temperature (T) is calculated as a range of about 60 ° C. to 85 ° C., and it is explained that the mathematical formula (4-1) is an appropriate numerical range.

特にe4=154.90,a4=0.0995,b4=0.0898,f2=0.0085,d2=0.0851と設定し、熱伝導係数(W),放熱手段の厚み(tMe),ポリイミド基板と接着剤層の合計の厚み(tP),放熱手段の設置面積率(S)を上記したのと同じ数値として数式(4)を解けば、想定表面温度Tは70.0℃となる。   In particular, e4 = 154.90, a4 = 0.0995, b4 = 0.0898, f2 = 0.0085, d2 = 0.0851 are set, the thermal conductivity coefficient (W), the thickness of the heat dissipation means (tMe), polyimide If formula (4) is solved with the total thickness (tP) of the substrate and the adhesive layer and the installation area ratio (S) of the heat dissipating means as described above, the assumed surface temperature T becomes 70.0 ° C.

実際にこの条件で半導体装置10を製造して実装された電子部品20の表面温度を測定するとほぼ73.5℃であり、数式(4)に上記数値を代入して得られた想定表面温度(T)と、実測された表面温度の値が近似していることが分かる。   When the surface temperature of the electronic component 20 actually manufactured by mounting the semiconductor device 10 under this condition is measured, it is about 73.5 ° C., and the estimated surface temperature (4) obtained by substituting the above numerical values (4) It can be seen that T) is close to the measured surface temperature value.

このように、図3および図4を用いて説明した本発明の他の実施例によれば、放熱に関与する絶縁保護膜22およびポリイミド基板12の裏面に配置される放熱手段24の種類、厚さ、面積を予め設定することにより、電子部品20の発熱量に関わらず、電子部品20の表面の実測表面温度を一定の温度(想定表面温度)にすることができる。   As described above, according to another embodiment of the present invention described with reference to FIGS. 3 and 4, the insulating protective film 22 involved in heat dissipation and the type and thickness of the heat radiation means 24 disposed on the back surface of the polyimide substrate 12 are used. By setting the area in advance, the measured surface temperature of the surface of the electronic component 20 can be made constant (assumed surface temperature) regardless of the amount of heat generated by the electronic component 20.

本発明は、実際に試作して電子部品を実装し、この電子部品を駆動させてその表面温度を測定する以外に半導体装置の放熱性を把握できなかった従来技術に比し、特定の式に電子部品20の材質などによって決まるいくつかの値を代入することにより、半導体装置10が駆動した際の電子部品20の表面温度を高い精度で算定することができる。   The present invention has a specific formula as compared with the prior art in which the heat dissipation of the semiconductor device could not be grasped other than by actually making a prototype and mounting an electronic component, and driving the electronic component and measuring its surface temperature. By substituting several values determined by the material of the electronic component 20 and the like, the surface temperature of the electronic component 20 when the semiconductor device 10 is driven can be calculated with high accuracy.

従って、本発明の半導体装置10では、上記したように厚さ,面積,および金属の種類のいずれかを調整した放熱手段24を用いることで、それぞれに異なる電子部品20をいずれも所定の温度以下にすることができ、所定の機能を果たすことができるようになっている。   Therefore, in the semiconductor device 10 according to the present invention, the heat dissipation means 24 in which any one of the thickness, the area, and the metal type is adjusted as described above, so that each of the electronic components 20 that are different from each other has a predetermined temperature or less. And can perform a predetermined function.

<半導体装置10の製造方法>
上記したような図1または図2に示した絶縁保護膜22の表面に放熱手段24を有する半導体装置10は、例えば以下のようにして製造される。
<Method for Manufacturing Semiconductor Device 10>
The semiconductor device 10 having the heat radiation means 24 on the surface of the insulating protective film 22 shown in FIG. 1 or FIG. 2 as described above is manufactured, for example, as follows.

まず、図5(a)に示したように、ポリイミド基板12上に配線パターン14を形成する。
次いで図5(b)に示したように、絶縁保護膜22と放熱手段24とが積層された積層体28をポリイミド基板12の上面に配設し、この積層体28をパンチングなどの方法で所定の形状に打ち抜く。
First, as shown in FIG. 5A, the wiring pattern 14 is formed on the polyimide substrate 12.
Next, as shown in FIG. 5B, a laminated body 28 in which the insulating protective film 22 and the heat radiation means 24 are laminated is disposed on the upper surface of the polyimide substrate 12, and this laminated body 28 is predetermined by a method such as punching. Punched into a shape.

そして、図5(c)に示したように、上記工程により打ち抜かれた絶縁保護膜22と放熱手段24との積層体28を配線パターン14の所定の箇所に配設する。
最後に図5(d)に示したように、ICチップ等の電子部品20を通常の方法により配線パターン14のインナーリード16部分に実装し、電子部品20とインナーリード16部分との間を封止樹脂32で封止することにより半導体装置10が形成される。
Then, as shown in FIG. 5C, a laminated body 28 of the insulating protective film 22 and the heat radiating means 24 punched out by the above process is disposed at a predetermined position of the wiring pattern 14.
Finally, as shown in FIG. 5D, the electronic component 20 such as an IC chip is mounted on the inner lead 16 portion of the wiring pattern 14 by a normal method, and the space between the electronic component 20 and the inner lead 16 portion is sealed. The semiconductor device 10 is formed by sealing with the stop resin 32.

なお、放熱手段24の面積を絶縁保護膜22の総面積よりも小さく設定する場合には、図5(b)の工程の替わりに、図6(a)に示したように積層体28の放熱手段24に切り込み線26を設け、これを打ち抜き加工し、さらに図6(b)に示したように配線パターン14上に絶縁保護膜22と放熱手段24の積層体28を配設した後、放熱手段24の不要な部分30を取り除くようにすればよい。   When the area of the heat dissipation means 24 is set smaller than the total area of the insulating protective film 22, the heat dissipation of the laminate 28 is performed as shown in FIG. 6A instead of the process of FIG. A cutting line 26 is provided in the means 24, punched out, and a laminated body 28 of the insulating protective film 22 and the heat radiating means 24 is disposed on the wiring pattern 14 as shown in FIG. What is necessary is just to remove the unnecessary part 30 of the means 24.

次いで、図3または図4に示したポリイミド基板12の裏面に放熱手段24を有する半導体装置10の製造方法について説明する。
図3および図4に示した半導体装置10の製造方法では、図7(a)に示したように、まずポリイミド基板12の裏面の全面に予め接着剤層34を介して放熱手段24が形成された積層体を準備し、このポリイミド基板12の表面上に配線パターン14を形成する。
Next, a method for manufacturing the semiconductor device 10 having the heat radiation means 24 on the back surface of the polyimide substrate 12 shown in FIG. 3 or FIG. 4 will be described.
In the method for manufacturing the semiconductor device 10 shown in FIGS. 3 and 4, as shown in FIG. 7A, the heat radiation means 24 is first formed on the entire back surface of the polyimide substrate 12 via the adhesive layer 34 in advance. A laminated body is prepared, and a wiring pattern 14 is formed on the surface of the polyimide substrate 12.

次いで図7(b)に示したように、絶縁保護膜22をポリイミド基板12の上面に配設し、この絶縁保護膜22をパンチングなどの方法で所定の形状に打ち抜く。
そして、図7(c)に示したように、上記工程により打ち抜かれた絶縁保護膜22を配線パターン14の所定の箇所に配設する。あるいは、スクリーン印刷法でソルダーレジスト液を塗布して、乾燥・キュアしても良い。
Next, as shown in FIG. 7B, the insulating protective film 22 is disposed on the upper surface of the polyimide substrate 12, and the insulating protective film 22 is punched into a predetermined shape by a method such as punching.
Then, as shown in FIG. 7C, the insulating protective film 22 punched out by the above process is disposed at a predetermined location of the wiring pattern 14. Alternatively, a solder resist solution may be applied by screen printing and dried and cured.

最後に図7(d)に示したように、ICチップ等の電子部品20を通常の方法により配線パターン14のインナーリード16部分に実装し、電子部品20とインナーリード16部分との間を封止樹脂32で封止することにより半導体装置10が形成される。   Finally, as shown in FIG. 7D, the electronic component 20 such as an IC chip is mounted on the inner lead 16 portion of the wiring pattern 14 by a normal method, and the space between the electronic component 20 and the inner lead 16 portion is sealed. The semiconductor device 10 is formed by sealing with the stop resin 32.

なお、放熱手段24の面積を絶縁保護膜22の総面積よりも小さく設定する場合には、図7(a)の工程の替わりに、図8(a)に示したようにポリイミド基板12の裏面に、部分的に接着剤層34を介して放熱手段24が形成された積層体を準備しておき、このポリイミド基板12の表面に配線パターン14を形成すればよい。   When the area of the heat radiation means 24 is set smaller than the total area of the insulating protective film 22, the back surface of the polyimide substrate 12 is used as shown in FIG. 8A instead of the process of FIG. In addition, a laminate in which the heat radiation means 24 is partially formed through the adhesive layer 34 is prepared, and the wiring pattern 14 may be formed on the surface of the polyimide substrate 12.

以上、本発明の好ましい形態について説明したが、本発明は上記の形態に限定されるものではない。例えば、絶縁保護膜の表面とポリイミド基板の裏面との両面に、金属層から成る放熱手段を形成することもできる。また、上記した製造方法以外の方法でも本願発明の半導体装置は製造可能であり、要は厚さ,面積,および金属の種類のいずれかを調整した放熱手段を用いること以外については、本発明の目的を逸脱しない範囲での種々の変更が可能なものである。   As mentioned above, although the preferable form of this invention was demonstrated, this invention is not limited to said form. For example, heat dissipation means made of a metal layer can be formed on both surfaces of the insulating protective film and the back surface of the polyimide substrate. Also, the semiconductor device of the present invention can be manufactured by a method other than the above-described manufacturing method. In short, except for using a heat radiating means in which any of the thickness, area, and type of metal is used, the semiconductor device of the present invention is used. Various modifications can be made without departing from the object.

次に本発明の半導体装置の実施例を示して本発明をさらに詳細に説明するが、本発明はこれらによって限定されるものではない。   Next, the present invention will be described in more detail with reference to examples of the semiconductor device of the present invention. However, the present invention is not limited thereto.

[実施例1]
厚さ40μmのポリイミドフィルムに厚さ8μmの銅箔を積層し、この銅箔の表面にフォトレジスト層を塗設した。このフォトレジスト層を乾燥させた後、所定の形状のパターンが形成されたマスクをフォトレジスト層の上に配置して、露光・現像してフォトレジストからなるパターンを形成した。このフォトレジストからなるパターンをマスキング材として、銅箔を通常の方法でエッチングして配線パターンを形成した。
[Example 1]
A copper film having a thickness of 8 μm was laminated on a polyimide film having a thickness of 40 μm, and a photoresist layer was coated on the surface of the copper foil. After drying the photoresist layer, a mask on which a pattern having a predetermined shape was formed was placed on the photoresist layer, and exposed and developed to form a photoresist pattern. Using this photoresist pattern as a masking material, the copper foil was etched by a conventional method to form a wiring pattern.

この配線パターンのインナーリードには、500mWの消費電力を有する電子部品が実装される。この電子部品に通電した場合、断熱状態でその表面温度を測定すると98.7℃になるが、この電子部品の最適駆動温度は70℃であるので、この電子部品の想定表面温度Tを70℃に設定した。   An electronic component having a power consumption of 500 mW is mounted on the inner lead of this wiring pattern. When this electronic component is energized, its surface temperature measured in an adiabatic state is 98.7 ° C., but since the optimum driving temperature of this electronic component is 70 ° C., the assumed surface temperature T of this electronic component is 70 ° C. Set to.

下記数式(1)にe1=160.06,a1=0.0995,b1=0.0979,c1=0.0085を代入し、想定表面温度(T)=70.0℃,銅の熱伝導係数(W)=381,絶縁保護膜であるカバーレイの厚み(tR)=40μmを代入して放熱手段の厚み(tMe)を算定した。   Substituting e1 = 160.06, a1 = 0.0995, b1 = 0.0979, c1 = 0.0085 into the following formula (1), the assumed surface temperature (T) = 70.0 ° C., the thermal conductivity coefficient of copper (W) = 381, The thickness (tR) of the heat radiation means was calculated by substituting the thickness (tR) = 40 μm of the cover lay which is an insulating protective film.

T=e1×W-(a1)×tMe-(b1)×tR(c1) ・・数式(1)
数式(1)に上記した数値を代入して計算した結果、銅箔から成る放熱手段の厚さ(tMe)は15.3μmであるとの結果を得た。
T = e1 * W- (a1) * tMe- (b1) * tR (c1) .. Formula (1)
As a result of calculating by substituting the above numerical values into the formula (1), the result was that the thickness (tMe) of the heat radiation means made of copper foil was 15.3 μm.

このため、形成された配線パターンの表面に錫メッキ層を形成し、次いでインナーリードおよびアウターリードを露出するように、カバーレイの表面に厚さ16μmの電解銅箔からなる放熱手段が積層されたカバーレイを貼着した。この電解銅箔のカバーレイと接触していない側の表面の平均表面粗度(Rz)は0.9μmであった。   For this reason, a tin plating layer was formed on the surface of the formed wiring pattern, and then a heat dissipation means made of an electrolytic copper foil having a thickness of 16 μm was laminated on the surface of the cover lay so as to expose the inner leads and the outer leads. A coverlay was applied. The average surface roughness (Rz) of the surface of the electrolytic copper foil not in contact with the coverlay was 0.9 μm.

こうして放熱手段付きのカバーレイを配線パターン上に貼着した後、電子部品を実装して封止樹脂で封止し、この電子部品に500mWの電力を通電して電子部品の表面温度(実測表面温度)を測定したところ、電子部品の実測表面温度は69.7℃であり、上記数式(1)に代入した想定表面温度(T)とよく一致した。   After the coverlay with the heat radiation means is attached on the wiring pattern in this way, the electronic component is mounted and sealed with a sealing resin. The electronic component is energized with a power of 500 mW, and the surface temperature of the electronic component (measured surface) As a result, the measured surface temperature of the electronic component was 69.7 ° C., which was in good agreement with the assumed surface temperature (T) assigned to the above formula (1).

[実施例2]
用いる数式を以下の数式(2)とし、e2の値を157.52,d1の値を0.0851とし、放熱手段24の設置面積率(S)(放熱手段の設置面積/絶縁保護膜の総面積)を0.9とし、a2,b2,c2の値を実施例1のa1,b1,c1の値と同じにしたこと以外は実施例1と同じ方法および同じ数値を用いて半導体装置を製造した。
[Example 2]
The formula used is the following formula (2), the value of e2 is 157.52, the value of d1 is 0.0851, and the installation area ratio (S) of the heat dissipation means 24 (the installation area of the heat dissipation means / the total of the insulating protective film) (Area) is set to 0.9, and the semiconductor device is manufactured by using the same method and the same numerical values as in Example 1 except that the values of a2, b2, and c2 are the same as the values of a1, b1, and c1 in Example 1. did.

T=e2×W-(a2)×tMe-(b2)×tR(c2)×S-(d1) ・・数式(2)
なお、数式(2)に上記した数値を代入すると銅箔から成る放熱手段の厚さ(tMe)は14.2μmであることが算出される。
T = e2 * W- (a2) * tMe- (b2) * tR (c2) * S- (d1) .. Formula (2)
When the numerical value described above is substituted into Equation (2), the thickness (tMe) of the heat radiating means made of copper foil is calculated to be 14.2 μm.

実施例2により製造された半導体装置の電子部品の表面温度(実測表面温度)を測定したところ、電子部品の実測表面温度は73.4℃であり、上記数式(2)に代入した想定表面温度(T)とよく一致した。   When the surface temperature (measured surface temperature) of the electronic component of the semiconductor device manufactured according to Example 2 was measured, the measured surface temperature of the electronic component was 73.4 ° C., and the assumed surface temperature substituted into the above equation (2). It was in good agreement with (T).

[実施例3]
用いる数式を以下の数式(3)とし、e3の値を157.4とし、絶縁保護膜22であるカバーレイの厚み(tR)の替わりにポリイミドフィルムと接着剤層の合計厚み(tP)を用い、このポリイミドフィルムと接着剤層の合計厚み(tP)の値を70μm(ポリイミドフィルムの厚み40μm+接着剤層の厚み30μm)とし、a3,b3,f1の値を実施例1のa1,b1,c1の値と同じにしたこと以外は実施例1と同じ方法および同じ数値を用いて半導体装置を製造した。
[Example 3]
The mathematical formula used is the following mathematical formula (3), the value of e3 is 157.4, and the total thickness (tP) of the polyimide film and the adhesive layer is used instead of the thickness (tR) of the cover lay which is the insulating protective film 22. The total thickness (tP) of the polyimide film and the adhesive layer is 70 μm (polyimide film thickness 40 μm + adhesive layer thickness 30 μm), and the values of a3, b3, and f1 are a1, b1, and c1 of Example 1. A semiconductor device was manufactured by using the same method and the same numerical values as in Example 1 except that the value was the same as that of Example 1.

T=e3×W-(a3)×tMe-(b3)×tP(f1) ・・数式(3)
なお、数式(3)に上記した数値を代入すると銅箔から成る放熱手段の厚さ(tMe)は13.5μmであることが算出される。
T = e3 * W- (a3) * tMe- (b3) * tP (f1) .. Formula (3)
When the numerical value described above is substituted into Equation (3), the thickness (tMe) of the heat radiating means made of copper foil is calculated to be 13.5 μm.

実施例3により製造された半導体装置の電子部品の表面温度(実測表面温度)を測定したところ、電子部品の実測表面温度は73.4℃であり、上記数式(3)に代入した想定表面温度(T)とよく一致した。   When the surface temperature (measured surface temperature) of the electronic component of the semiconductor device manufactured according to Example 3 was measured, the measured surface temperature of the electronic component was 73.4 ° C., and the assumed surface temperature substituted into the above equation (3). It was in good agreement with (T).

[実施例4]
用いる数式を以下の数式(4)とし、e4の値を154.90,d2の値を0.0851とし、放熱手段24の設置面積率(S)(放熱手段の設置面積/ポリイミド基板の面積)を0.9とし、a4,b4,f2の値を実施例1のa1,b1,c1の値と同じにしたこと以外は実施例3と同じ方法および同じ数値を用いて半導体装置を製造した。
[Example 4]
The mathematical formula used is the following mathematical formula (4), the value of e4 is 154.90, the value of d2 is 0.0851, and the installation area ratio (S) of the heat dissipation means 24 (the installation area of the heat dissipation means / the area of the polyimide substrate) Was set to 0.9, and the semiconductor device was manufactured using the same method and the same numerical values as in Example 3 except that the values of a4, b4, and f2 were the same as the values of a1, b1, and c1 in Example 1.

T=e4×W-(a4)×tMe-(b4)×tP(f2)×S-(d2) ・・数式(4)
なお、数式(4)に上記した数値を代入すると銅箔から成る放熱手段の厚さ(tMe)は12.6μmであることが算出される。
T = e4 * W- (a4) * tMe- (b4) * tP (f2) * S- (d2) .. Formula (4)
When the above numerical value is substituted into Equation (4), the thickness (tMe) of the heat radiating means made of copper foil is calculated to be 12.6 μm.

実施例4により製造された半導体装置の電子部品の表面温度(実測表面温度)を測定したところ、電子部品の実測表面温度は72.9℃であり、上記数式(4)に代入した想定表面温度(T)とよく一致した。   When the surface temperature (measured surface temperature) of the electronic component of the semiconductor device manufactured according to Example 4 was measured, the measured surface temperature of the electronic component was 72.9 ° C., and the assumed surface temperature substituted into the above equation (4). It was in good agreement with (T).

10・・・半導体装置
12・・・ポリイミド基板
14・・・配線パターン
16・・・インナーリード
18・・・アウターリード
20・・・電子部品
22・・・絶縁保護膜
24・・・放熱手段
26・・・切り込み線
28・・・積層体
30・・・不要な部分
32・・・封止樹脂
34・・・接着剤層
100・・・半導体装置
102・・・ポリイミド基板
104・・・配線パターン
106・・・インナーリード
108・・・アウターリード
110・・・接着剤
112・・・銅箔
114・・・保護層
116・・・電子部品
DESCRIPTION OF SYMBOLS 10 ... Semiconductor device 12 ... Polyimide board 14 ... Wiring pattern 16 ... Inner lead 18 ... Outer lead 20 ... Electronic component 22 ... Insulation protective film 24 ... Heat radiation means 26 ... cut line 28 ... laminated body 30 ... unnecessary portion 32 ... sealing resin 34 ... adhesive layer 100 ... semiconductor device 102 ... polyimide substrate 104 ... wiring pattern 106 ... inner lead 108 ... outer lead 110 ... adhesive 112 ... copper foil 114 ... protective layer 116 ... electronic component

Claims (26)

ポリイミド基板と、前記ポリイミド基板の表面に形成された配線パターンと、前記配線パターンのインナーリードに接合された電子部品と、を備えてなるとともに、前記配線パターンのリード部分を除く表面に絶縁保護膜が被覆されてなる半導体装置であって、
前記絶縁保護膜の表面に、
厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を有することを特徴とする半導体装置。
A polyimide substrate, a wiring pattern formed on the surface of the polyimide substrate, and an electronic component bonded to an inner lead of the wiring pattern, and an insulating protective film on the surface excluding the lead portion of the wiring pattern Is a semiconductor device coated with
On the surface of the insulating protective film,
A semiconductor device comprising a heat radiation means made of a metal layer capable of lowering an actual surface temperature of an electronic component to an assumed surface temperature by adjusting any of a thickness, an area, and a metal type.
ポリイミド基板と、前記ポリイミド基板の表面に形成された配線パターンと、前記配線パターンのインナーリードに接合された電子部品と、を備えてなるとともに、前記配線パターンのリード部分を除く表面に絶縁保護膜が被覆されてなる半導体装置であって、
前記ポリイミド基板の裏面に、
接着剤層を介して、厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を有することを特徴とする半導体装置。
A polyimide substrate, a wiring pattern formed on the surface of the polyimide substrate, and an electronic component bonded to an inner lead of the wiring pattern, and an insulating protective film on the surface excluding the lead portion of the wiring pattern Is a semiconductor device coated with
On the back surface of the polyimide substrate,
It has heat dissipation means consisting of a metal layer that can lower the measured surface temperature of the electronic component to the assumed surface temperature by adjusting any of the thickness, area, and type of metal via the adhesive layer A semiconductor device.
前記放熱手段の金属層を形成する金属の熱伝導係数が、50〜450W/m・Kの範囲内にあることを特徴とする請求項1または2に記載の半導体装置。   3. The semiconductor device according to claim 1, wherein the metal forming the metal layer of the heat radiating means has a thermal conductivity coefficient in a range of 50 to 450 W / m · K. 前記放熱手段の金属層が、銅層またはアルミニウム層から形成されていることを特徴とする請求項1から3のいずれかに記載の半導体装置。   4. The semiconductor device according to claim 1, wherein the metal layer of the heat dissipation means is formed of a copper layer or an aluminum layer. 前記放熱手段の金属層の厚さが、5〜100μmの範囲内にあることを特徴とする請求項1から4のいずれかに記載の半導体装置。   5. The semiconductor device according to claim 1, wherein a thickness of the metal layer of the heat radiating means is in a range of 5 to 100 μm. 前記放熱手段の金属層の形成面積が、前記絶縁保護膜の総面積の1〜100%の範囲内にあることを特徴とする請求項1から5のいずれかに記載の半導体装置。   6. The semiconductor device according to claim 1, wherein a formation area of the metal layer of the heat radiating means is in a range of 1 to 100% of a total area of the insulating protective film. 前記絶縁保護膜が、カバーレイまたはソルダーレジストであることを特徴とする請求項1から6のいずれかに記載の半導体装置。   The semiconductor device according to claim 1, wherein the insulating protective film is a cover lay or a solder resist. 前記絶縁保護膜の厚さが、5〜100μmの範囲内にあることを特徴とする請求項1から7のいずれかに記載の半導体装置。   8. The semiconductor device according to claim 1, wherein a thickness of the insulating protective film is in a range of 5 to 100 [mu] m. 前記金属層において、前記絶縁保護膜と接触していない側の金属層表面の平均表面粗度(Rz)が、0.1〜5.0μmの範囲内にあることを特徴とする請求項1から8のいずれかに記載の半導体装置。   The average surface roughness (Rz) of the surface of the metal layer not in contact with the insulating protective film in the metal layer is in the range of 0.1 to 5.0 μm. The semiconductor device according to any one of 8. 前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記絶縁保護膜の表面に設けてなる半導体装置において、前記放熱手段を下記数式(1)により設定することを特徴とする請求項1に記載の半導体装置;
T=e1×W-(a1)×tMe-(b1)×tR(c1) ・・数式(1)(ただし数式(1)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tRは絶縁保護膜の厚さ(μm)を表し、e1は絶縁保護膜の表面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa1は0.12〜0.07の範囲内、b1は0.12〜0.07の範囲内、c1は0.011〜0.005の範囲内にある。)。
In a semiconductor device in which a heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is provided on the surface of the insulating protective film, the heat dissipating means is set by the following formula (1). The semiconductor device according to claim 1, wherein:
T = e1 * W- (a1) * tMe- (b1) * tR (c1) .. Equation (1) (In Equation (1), T is the assumed surface temperature (° C) of the electronic component, and W is the heat conduction. The coefficient (W / m · K), tMe represents the thickness (μm) of the heat radiation means, tR represents the thickness (μm) of the insulation protective film, and e1 represents the value when the heat radiation means is provided on the surface of the insulation protective film. A coefficient obtained by multiple regression analysis, which is in the range of 50 to 250, a1 is in the range of 0.12 to 0.07, b1 is in the range of 0.12 to 0.07, and c1 is 0. Within the range of .011 to 0.005).
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記絶縁保護膜の表面に部分的に設けてなる半導体装置において、前記放熱手段を下記数式(2)により設定することを特徴とする請求項1または6に記載の半導体装置;
T=e2×W-(a2)×tMe-(b2)×tR(c2)×S-(d1) ・・数式(2)(ただし数式(2)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tRは絶縁保護膜の厚さ(μm)、Sは放熱手段の設置面積率(放熱手段の設置面積/絶縁保護膜の総面積)を表し、e2は絶縁保護膜の全面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa2は0.12〜0.07の範囲内、b2は0.12〜0.07の範囲内、c2は0.011〜0.005、さらにd1は0.11〜0.06の範囲内にある。)。
In a semiconductor device in which heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is partially provided on the surface of the insulating protective film, the heat dissipating means is expressed by the following formula (2). The semiconductor device according to claim 1, wherein the semiconductor device is set by:
T = e2 * W- (a2) * tMe- (b2) * tR (c2) * S- (d1) .. Formula (2) (In Formula (2), T is the assumed surface temperature of the electronic component (° C.) ), W is the thermal conductivity coefficient (W / m · K), tMe is the thickness of the heat dissipation means (μm), tR is the thickness of the insulating protective film (μm), and S is the installation area ratio of the heat dissipation means (of the heat dissipation means E2 is a coefficient obtained by multiple regression analysis when the heat radiation means is provided on the entire surface of the insulating protective film, and is in the range of 50 to 250, and a2 is in the range of 0.12 to 0.07, b2 is in the range of 0.12 to 0.07, c2 is in the range of 0.011 to 0.005, and d1 is in the range of 0.11 to 0.06. is there.).
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記接着剤層を介してポリイミド基板の裏面に設けてなる半導体装置において、前記放熱手段を下記数式(3)により設定することを特徴とする請求項2に記載の半導体装置;
T=e3×W-(a3)×tMe-(b3)×tP(f1) ・・数式(3)(ただし数式(3)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tPはポリイミド基板と接着剤層の合計厚さ(μm)を表し、e3は絶縁保護膜の表面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa3は0.12〜0.07の範囲内、b3は0.12〜0.07の範囲内、f1は0.011〜0.005の範囲内にある。)。
In a semiconductor device in which a heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is provided on the back surface of the polyimide substrate via the adhesive layer, the heat dissipating means is expressed by the following formula ( The semiconductor device according to claim 2, which is set according to 3);
T = e3 * W- (a3) * tMe- (b3) * tP (f1) .. Equation (3) (In Equation (3), T is the assumed surface temperature (° C) of the electronic component, and W is the heat conduction. Coefficient (W / m · K), tMe represents the thickness (μm) of the heat dissipation means, tP represents the total thickness (μm) of the polyimide substrate and the adhesive layer, and e3 is provided with the heat dissipation means on the surface of the insulating protective film. Is a coefficient obtained from the multiple regression analysis, and is in the range of 50 to 250, a3 is in the range of 0.12 to 0.07, and b3 is in the range of 0.12 to 0.07. , F1 is in the range of 0.011 to 0.005).
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記接着剤層を介してポリイミド基板の裏面に部分的に設けてなる半導体装置において、前記放熱手段を下記数式(4)により設定することを特徴とする請求項2または6に記載の半導体装置;
T=e4×W-(a4)×tMe-(b4)×tP(f2)×S-(d2) ・・数式(4)(ただし数式(4)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tPはポリイミド基板と接着剤層の合計厚さ(μm)、Sは放熱手段の設置面積率(放熱手段の設置面積/ポリイミド基板の面積)を表し、e4は絶縁保護膜の全面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa4は0.12〜0.07の範囲内、b4は0.12〜0.07の範囲内、f2は0.011〜0.005、さらにd2は0.11〜0.06の範囲内にある。)。
In a semiconductor device in which heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is partially provided on the back surface of the polyimide substrate via the adhesive layer, the heat dissipating means is The semiconductor device according to claim 2, wherein the semiconductor device is set by the following mathematical formula (4):
T = e4 * W- (a4) * tMe- (b4) * tP (f2) * S- (d2) .. Equation (4) (In Equation (4), T is the assumed surface temperature of the electronic component (° C.) ), W is the thermal conductivity coefficient (W / m · K), tMe is the thickness of the heat dissipation means (μm), tP is the total thickness (μm) of the polyimide substrate and the adhesive layer, and S is the area ratio of the heat dissipation means (Equipment area of heat radiation means / area of polyimide substrate) e4 is a coefficient obtained from multiple regression analysis when heat radiation means is provided on the entire surface of the insulating protective film, and is in the range of 50 to 250. Further, a4 is in the range of 0.12 to 0.07, b4 is in the range of 0.12 to 0.07, f2 is in the range of 0.011 to 0.005, and d2 is in the range of 0.11 to 0.06. In.)
少なくとも、
ポリイミド基板の表面に配線パターンを形成し、前記配線パターンのインナーリードに電子部品を実装する工程と、
前記配線パターンのリード部分をのぞく表面に絶縁保護膜を被覆する工程と、
を有する半導体装置の製造方法であって、
前記絶縁保護膜の表面に、厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を形成する工程と、
を有することを特徴とする半導体装置の製造方法。
at least,
Forming a wiring pattern on the surface of the polyimide substrate, and mounting electronic components on the inner leads of the wiring pattern;
Coating an insulating protective film on the surface except the lead portion of the wiring pattern;
A method of manufacturing a semiconductor device having
A step of forming a heat radiation means comprising a metal layer on the surface of the insulating protective film, which can lower the measured surface temperature of the electronic component to an assumed surface temperature by adjusting any of the thickness, area, and type of metal. When,
A method for manufacturing a semiconductor device, comprising:
少なくとも、
ポリイミド基板の表面に配線パターンを形成し、前記配線パターンのインナーリードに電子部品を実装する工程と、
前記配線パターンのリード部分をのぞく表面に絶縁保護膜を被覆する工程と、
を有する半導体装置の製造方法であって、
前記ポリイミド基板の裏面に、厚さ,面積,および金属の種類のいずれかを調整することで電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、接着剤層を介して形成する工程と、
を有することを特徴とする半導体装置の製造方法。
at least,
Forming a wiring pattern on the surface of the polyimide substrate, and mounting electronic components on the inner leads of the wiring pattern;
Coating an insulating protective film on the surface except the lead portion of the wiring pattern;
A method of manufacturing a semiconductor device having
On the back surface of the polyimide substrate, an adhesive layer is provided with a heat dissipating means composed of a metal layer that can lower the measured surface temperature of the electronic component to an assumed surface temperature by adjusting any of the thickness, area, and type of metal. Forming through
A method for manufacturing a semiconductor device, comprising:
前記放熱手段の金属層を形成する金属の熱伝導係数が、50〜450W/m・Kの範囲内にあることを特徴とする請求項14または15に記載の半導体装置の製造方法。   16. The method of manufacturing a semiconductor device according to claim 14, wherein the metal forming the metal layer of the heat radiating means has a thermal conductivity coefficient in the range of 50 to 450 W / m · K. 前記放熱手段の金属層が、銅層またはアルミニウム層から形成されていることを特徴とする請求項14から16のいずれかに記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 14, wherein the metal layer of the heat radiating means is formed of a copper layer or an aluminum layer. 前記放熱手段の金属層の厚さが、5〜100μmの範囲内にあることを特徴とする請求項14から17のいずれかに記載の半導体装置の製造方法。   18. The method of manufacturing a semiconductor device according to claim 14, wherein a thickness of the metal layer of the heat radiating means is in a range of 5 to 100 μm. 前記放熱手段の金属層の形成面積が、前記絶縁保護膜の総面積の1〜100%の範囲内にあることを特徴とする請求項14から18のいずれかに記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 14, wherein a formation area of the metal layer of the heat radiating means is in a range of 1 to 100% of a total area of the insulating protective film. 前記絶縁保護膜が、カバーレイまたはソルダーレジストであることを特徴とする請求項14から19のいずれかに記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 14, wherein the insulating protective film is a cover lay or a solder resist. 前記絶縁保護膜の厚さが、5〜100μmの範囲内にあることを特徴とする請求項14から20のいずれかに記載の半導体装置の製造方法。   21. The method of manufacturing a semiconductor device according to claim 14, wherein a thickness of the insulating protective film is in a range of 5 to 100 [mu] m. 前記金属層において、前記絶縁保護膜と接触していない側の金属層表面の平均表面粗度(Rz)が、0.1〜5.0μmの範囲内にあることを特徴とする請求項14から21のいずれかに記載の半導体装置の製造方法。   The average surface roughness (Rz) of the surface of the metal layer that is not in contact with the insulating protective film in the metal layer is in the range of 0.1 to 5.0 μm. 22. A method for manufacturing a semiconductor device according to any one of 21. 前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記絶縁保護膜の表面に設けてなる半導体装置の製造方法において、前記放熱手段を下記数式(1)により設定することを特徴とする請求項14に記載の半導体装置の製造方法;
T=e1×W-(a1)×tMe-(b1)×tR(c1) ・・数式(1)(ただし数式(1)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tRは絶縁保護膜の厚さ(μm)を表し、e1は絶縁保護膜の表面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa1は0.12〜0.07の範囲内、b1は0.12〜0.07の範囲内、c1は0.011〜0.005の範囲内にある。)。
In a method for manufacturing a semiconductor device, in which a heat radiating means made of a metal layer capable of lowering an actual surface temperature of the electronic component to an assumed surface temperature is provided on the surface of the insulating protective film, the heat radiating means is expressed by the following formula (1). The method of manufacturing a semiconductor device according to claim 14, wherein:
T = e1 * W- (a1) * tMe- (b1) * tR (c1) .. Equation (1) (In Equation (1), T is the assumed surface temperature (° C) of the electronic component, and W is the heat conduction. The coefficient (W / m · K), tMe represents the thickness (μm) of the heat radiation means, tR represents the thickness (μm) of the insulation protective film, and e1 represents the value when the heat radiation means is provided on the surface of the insulation protective film. A coefficient obtained by multiple regression analysis, which is in the range of 50 to 250, a1 is in the range of 0.12 to 0.07, b1 is in the range of 0.12 to 0.07, and c1 is 0. Within the range of .011 to 0.005).
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記絶縁保護膜の表面に部分的に設けてなる半導体装置の製造方法において、前記放熱手段を下記数式(2)により設定することを特徴とする請求項14または19に記載の半導体装置の製造方法;
T=e2×W-(a2)×tMe-(b2)×tR(c2)×S-(d1) ・・数式(2)(ただし数式(2)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tRは絶縁保護膜の厚さ(μm)、Sは放熱手段の設置面積率(放熱手段の設置面積/絶縁保護膜の総面積)を表し、e2は絶縁保護膜の全面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa2は0.12〜0.07の範囲内、b2は0.12〜0.07の範囲内、c2は0.011〜0.005、さらにd1は0.11〜0.06の範囲内にある。)。
In a method of manufacturing a semiconductor device, in which a heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is partially provided on the surface of the insulating protective film, the heat dissipating means is expressed by the following formula: 20. The method of manufacturing a semiconductor device according to claim 14, wherein the semiconductor device manufacturing method is set according to (2);
T = e2 * W- (a2) * tMe- (b2) * tR (c2) * S- (d1) .. Formula (2) (In Formula (2), T is the assumed surface temperature of the electronic component (° C.) ), W is the thermal conductivity coefficient (W / m · K), tMe is the thickness of the heat dissipation means (μm), tR is the thickness of the insulating protective film (μm), and S is the installation area ratio of the heat dissipation means (of the heat dissipation means E2 is a coefficient obtained by multiple regression analysis when the heat radiation means is provided on the entire surface of the insulating protective film, and is in the range of 50 to 250, and a2 is in the range of 0.12 to 0.07, b2 is in the range of 0.12 to 0.07, c2 is in the range of 0.011 to 0.005, and d1 is in the range of 0.11 to 0.06. is there.).
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記接着剤層を介してポリイミド基板の裏面に設けてなる半導体装置の製造方法において、前記放熱手段を下記数式(3)により設定することを特徴とする請求項15に記載の半導体装置の製造方法;
T=e3×W-(a3)×tMe-(b3)×tP(f1) ・・数式(3)(ただし数式(3)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tPはポリイミド基板と接着剤層の合計厚さ(μm)を表し、e3は絶縁保護膜の表面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa3は0.12〜0.07の範囲内、b3は0.12〜0.07の範囲内、f1は0.011〜0.005の範囲内にある。)。
In the method of manufacturing a semiconductor device, in which a heat dissipation means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is provided on the back surface of the polyimide substrate via the adhesive layer, the heat dissipation means is The semiconductor device manufacturing method according to claim 15, wherein the semiconductor device manufacturing method is set by the following mathematical formula (3):
T = e3 * W- (a3) * tMe- (b3) * tP (f1) .. Equation (3) (In Equation (3), T is the assumed surface temperature (° C) of the electronic component, and W is the heat conduction. Coefficient (W / m · K), tMe represents the thickness (μm) of the heat dissipation means, tP represents the total thickness (μm) of the polyimide substrate and the adhesive layer, and e3 is provided with the heat dissipation means on the surface of the insulating protective film. Is a coefficient obtained from the multiple regression analysis, and is in the range of 50 to 250, a3 is in the range of 0.12 to 0.07, and b3 is in the range of 0.12 to 0.07. , F1 is in the range of 0.011 to 0.005).
前記電子部品の実測表面温度を想定表面温度に下げることのできる金属層からなる放熱手段を、前記絶縁保護膜の表面の部分的に設けてなる半導体装置の製造方法において、前記放熱手段を下記数式(4)により設定することを特徴とする請求項15または19に記載の半導体装置の製造方法;
T=e4×W-(a4)×tMe-(b4)×tP(f2)×S-(d2) ・・数式(4)(ただし数式(4)において、Tは電子部品の想定表面温度(℃)、Wは熱伝導係数(W/m・K)、tMeは放熱手段の厚さ(μm)、tPはポリイミド基板と接着剤層の合計厚さ(μm)、Sは放熱手段の設置面積率(放熱手段の設置面積/ポリイミド基板の面積)を表し、e4は絶縁保護膜の全面に放熱手段が設けられたときの重回帰分析より得られた係数であって50〜250の範囲内にあり、さらにa4は0.12〜0.07の範囲内、b4は0.12〜0.07の範囲内、f2は0.011〜0.005、さらにd2は0.11〜0.06の範囲内にある。)。
In a method of manufacturing a semiconductor device, in which a heat dissipating means made of a metal layer capable of lowering the measured surface temperature of the electronic component to an assumed surface temperature is partially provided on the surface of the insulating protective film, the heat dissipating means is expressed by the following formula: 20. The method of manufacturing a semiconductor device according to claim 15, wherein the semiconductor device manufacturing method is set according to (4);
T = e4 * W- (a4) * tMe- (b4) * tP (f2) * S- (d2) .. Equation (4) (In Equation (4), T is the assumed surface temperature of the electronic component (° C.) ), W is the thermal conductivity coefficient (W / m · K), tMe is the thickness of the heat dissipation means (μm), tP is the total thickness (μm) of the polyimide substrate and the adhesive layer, and S is the area ratio of the heat dissipation means (Equipment area of heat radiation means / area of polyimide substrate) e4 is a coefficient obtained from multiple regression analysis when heat radiation means is provided on the entire surface of the insulating protective film, and is in the range of 50 to 250. Further, a4 is in the range of 0.12 to 0.07, b4 is in the range of 0.12 to 0.07, f2 is in the range of 0.011 to 0.005, and d2 is in the range of 0.11 to 0.06. In.)
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