JP2010028092A - Nanowire solar cell and producing method of the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solar cell for obtaining electrical power enough for actual use with an apparatus formed by providing an array of the nanowire semiconductors and also provide a producing method of the solar cell. <P>SOLUTION: The nanowire solar cells 1 and 11 are respectively provided with a semiconductor substrate 2 and a plurality of nanowire semiconductors 4 and 5 forming the pn-junction. The semiconductor substrate 2 and the nanowire semiconductors 4 and 5 are respectively formed of a single-crystal material. A gap between the semiconductors 4 and 5 is filled with a transparent insulating material 6. Along the front surface of the semiconductors 4 and 5, a passivation layer 10 is provided. In the producing method of the nanowire solar cell, a part of the front surface of the semiconductor substrate 2 is covered with an amorphous film 3 and the nanowire semiconductors 4 and 5 are formed on the front surface of the exposed semiconductor substrate 2 with epitaxial growth of crystals formed of the identical material. After embedding of the semiconductors 4 and 5 into the transparent insulating material 6, a gap between the semiconductors 4 and 5 is filled with the transparent insulating material 6 by removing a part of the transparent insulating material 6 to expose the front end parts of the semiconductors 4 and 5. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a nanowire solar cell including a nanowire-like semiconductor and a manufacturing method thereof.

  Generally, a solar cell having a planar pn junction surface parallel to the substrate surface is known. In recent years, a solar cell including a fine linear semiconductor having a nano-order diameter called a nanowire, a nanorod, or the like (hereinafter, referred to as a nanowire solar cell) is known compared to the conventional solar cell. ing.

  In the nanowire solar cell, a technique for improving photoelectric conversion efficiency by providing irregularities on the pn junction surface has been proposed. According to the nanowire solar cell in which irregularities are provided on the pn junction surface, since the area of the pn junction surface is larger than the light receiving area, an effect of reducing carriers lost due to recombination is obtained, and the photoelectric conversion efficiency is improved. It is supposed to improve.

  For example, after growing a p-type Si semiconductor into a nanowire using gold fine particles as a catalyst, an i-type Si semiconductor layer and an n-type Si semiconductor layer were formed on the p-type Si semiconductor along the shape. Nanowire solar cells have been proposed (see, for example, Non-Patent Documents 1 and 2).

  The nanowire solar cell described in Non-Patent Documents 1 and 2 includes a core-shell structure in which a p-type Si semiconductor nanowire is used as a core, and an i-type Si semiconductor layer and an n-type Si semiconductor layer are stacked thereon. And has a pn junction surface larger than the light receiving area. However, since the nanowire solar cell is formed with only one nanowire, there is a problem that a device for obtaining practical power cannot be manufactured.

  In addition, since the nanowire solar cell uses a catalyst such as gold for the growth of the nanowire, a catalytic metal element may be incorporated into the nanowire as an impurity during the growth. The incorporated catalytic metal element forms a deep level in the nanowire as the semiconductor and promotes non-luminous recombination, thereby deteriorating the photoelectric conversion efficiency of the nanowire solar cell.

  Furthermore, since the nanowire solar cell cannot raise the temperature until it can be epitaxially grown when forming the i-type Si semiconductor layer and the n-type Si semiconductor layer as the shell, the i-type Si semiconductor layer and the n-type Si semiconductor There is a problem that the layer is polycrystallized. The problem is due to the catalyst metal being completely taken into the nanowire of the p-type Si semiconductor layer as the core when heated to the temperature for epitaxial growth. As a result of growing at the low temperature, the i-type Si semiconductor layer and the n-type Si semiconductor layer as the shell have a structure including a crystal grain boundary, and many dangling bonds existing in the crystal grain boundary are recombination of excitons. Therefore, sufficient photoelectric conversion efficiency cannot be obtained.

  Further, there has been proposed a nanowire solar cell in which a p-type Si semiconductor is grown in a nanowire shape and then an n-type Si semiconductor layer is formed on the p-type Si semiconductor along the shape (for example, Patent Document 1). reference). In the solar cell, a porous template layer made of nanoporous aluminum oxide is provided on a glass substrate covered with a degenerate doped polycrystalline silicon film, and the p-type Si semiconductor is grown from the porous template layer.

  The nanowire solar cell described in Patent Document 1 includes a core-shell structure in which a p-type Si semiconductor nanowire is used as a core and an n-type Si semiconductor layer as a shell is stacked thereon, and a pn junction larger than the light receiving area. It has a surface. However, since the nanowire solar cell uses the pores of the template layer to form the nanowire of the p-type Si semiconductor and then forms the lower contact, the lower contact is limited to a metal or a transparent electrode. A crystalline semiconductor material cannot be used.

  Further, the nanowire of the p-type Si semiconductor is formed by a VLS method using a metal catalyst, and the metal catalyst remains at both ends of the nanowire, so that the semiconductor cannot be joined to form a lower contact. . In this case, a nanowire that does not leave a catalytic metal can be formed by removing the metal catalyst by etching after VLS growth or by forming a nanowire by an electrochemical deposition method. However, in the nanowire solar cell, a lower contact made of a planar single crystal semiconductor cannot be formed by subsequent epitaxial growth.

  Furthermore, in the nanowire solar cell, it is described that the porous template layer is located on the substrate and the substrate provides a lower contact, but the necessity for epitaxial growth is not described. The VLS method has a problem that a metal material remains at the substrate / nanowire interface. Also, according to the electrochemical deposition method or the like, no metal material remains at the substrate / nanowire interface, but there is no guarantee that the substrate and nanowires continue as crystals while maintaining the orientation.

Further, a Ta ₂ N layer is provided on a metal foil substrate made of stainless steel, a p-type Si semiconductor nanowire is formed on the Ta ₂ N layer, and an n-type is formed on the p-type Si semiconductor along the shape thereof. A nanowire solar cell in which a Si semiconductor layer is formed has been proposed (see, for example, Non-Patent Document 3). The p-type Si semiconductor nanowire is formed on the Ta ₂ N layer by a VLS method using a metal catalyst. However, the VLS method has a problem that the metal catalyst remains at both ends of the nanowire as described above.

Furthermore, none of the above-described solar cells can obtain practical power. For example, in the case of the solar cell described in Non-Patent Document 3, Voc is 0.13 V, Isc is 3 mA / cm ² , and FF is 0. .28, η is only 0.06%.

JP 2008-53730 A

B.Tian, X.Zheng, TJKempa, Y.Fang, N.Yu, G.Yu, J.Huang and CMLieber, "CoaXial Silicon nanowaires as solar cells and nanoelectronic power sources", Nature 449, 885-890 ( 2007) G.Zheng, W.Lu, S.Jin and C.M.Lieber, "Synthesis and Fabrication of High-Performance n-Type Silicon Nanowire Transistors", Adv.Mater. 16, 1890-1893 (2004) L.Tsakalakos, J.Balch, J.Fronheiser, B.A.KoreVaar, O.Sulima and J.Rand, "Silicon nanowire solar cells", APPLIED PHYSICS LETTERS 91, 233117 (2007)

  The present invention provides a solar cell capable of solving such inconvenience, forming a device in which a large number of nanowire semiconductors are arranged in an array, and obtaining practical power, and a method for manufacturing the solar cell. With the goal.

  In order to achieve such an object, the present invention provides a nanowire solar cell comprising a semiconductor substrate and a plurality of nanowire-like semiconductors grown on the semiconductor substrate and constituting a pn junction, the semiconductor substrate and the nanowire The semiconductor is made of a single single crystal.

  In the nanowire solar cell of the present invention, since the semiconductor substrate and the nanowire-like semiconductor are made of a single single crystal, contamination by catalyst metal, defects such as crystal grain boundaries inside the nanowire-like semiconductor, the semiconductor Defects at the interface between the substrate and the nanowire semiconductor can be eliminated. Therefore, according to the nanowire solar cell of the present invention, the electrical resistance per unit area can be reduced, the photoelectric conversion efficiency can be improved, and practical power can be obtained.

  Moreover, it is preferable that the nanowire solar cell of this invention is equipped with the transparent insulating material with which the gap | interval of the said some nanowire-like semiconductor was filled.

  According to the nanowire solar cell of the present invention having the above configuration, by providing the transparent insulating material, the area of the contact interface between the nanowire semiconductor and the electrode connected to the nanowire semiconductor is reduced. Therefore, the number of defects on the current path caused by the photovoltaic power can be reduced. As a result, the recombination site resulting from the interface defect can be easily saturated, and the photoelectric conversion efficiency can be improved.

  A semiconductor material may bend a band structure in the vicinity of the surface due to the surface structure or surface level. In this case, electrons are attracted to the surface side of the nanowire-like semiconductor, and there is a high possibility that excitons are lost due to surface recombination.

  Therefore, the nanowire solar cell of the present invention preferably further includes a passivation layer for preventing recombination along the surface of the nanowire-like semiconductor. By providing the passivation layer, the nanowire solar cell of the present invention can prevent surface recombination by forming a hetero bond.

  The nanowire solar cell of the present invention comprises a step of coating a part of the surface of a semiconductor substrate with an amorphous film, and the surface of the semiconductor substrate exposed from the amorphous film is made of the same material as the semiconductor substrate. And a method of forming a plurality of nanowire-shaped semiconductors by epitaxially growing crystals.

  In the manufacturing method, a portion where the semiconductor substrate is exposed can be freely controlled by using a lithographic or nanoimprint technique on the amorphous film. Further, by appropriately selecting the growth direction of the nanowire-like semiconductor and the orientation of the substrate, a nanowire-like semiconductor that is completely perpendicular to the semiconductor substrate can be obtained without errors in cutting out the semiconductor substrate. Furthermore, in the manufacturing method, the nanowire-like semiconductor can be grown epitaxially in the lateral direction by changing the growth conditions for epitaxial growth in the middle.

  Therefore, according to the manufacturing method, a device in which a large number of nanowire-like semiconductors are arranged in a high-density array can be configured, and the light absorption efficiency can be improved.

  In the manufacturing method, after the plurality of nanowire-like semiconductors are embedded in a transparent insulating material, a part of the transparent insulating material is removed to expose the tips of the plurality of nanowire-like semiconductors. Preferably, the method comprises a step of filling the gap between the plurality of nanowire-like semiconductors with the transparent insulating material. According to the manufacturing method, the transparent insulating material can be easily filled in the gaps between the plurality of nanowire-like semiconductors by the step.

BRIEF DESCRIPTION OF THE DRAWINGS Explanatory sectional drawing which shows the 1st form of the nanowire solar cell of this invention. Explanatory sectional drawing which shows the modification of the 1st form of the nanowire solar cell of this invention. Explanatory sectional drawing which shows the 2nd form of the nanowire solar cell of this invention. Explanatory sectional drawing which shows the modification of the 2nd form of the nanowire solar cell of this invention.

  Next, embodiments of the present invention will be described in more detail with reference to the accompanying drawings.

First, a nanowire solar cell 1 according to a first embodiment of the present invention will be described with reference to FIG. The nanowire solar cell 1 includes an amorphous SiO ₂ coating 3 formed on the InP (111) A substrate 2 and a formation formed on the InP (111) A substrate 2 exposed from the amorphous SiO ₂ coating 3. The nanowire-shaped p-type InP semiconductor 4 is provided. The nanowire-shaped p-type InP semiconductor 4 includes an n-type InP semiconductor 5 along its surface shape, and an i-type InP semiconductor (not shown) is provided between the p-type InP semiconductor 4 and the n-type InP semiconductor 5. Yes. Here, the nanowire solar cell 1 has a core-shell structure in which the p-type InP semiconductor 4 is a core and the i-type InP semiconductor and the n-type InP semiconductor 5 are shells.

  The nanowire solar cell 1 includes a plurality of nanowire-shaped p-type InP semiconductors 4, a transparent insulating material 6 filled in a gap between the i-type InP semiconductor and the n-type InP semiconductor 5, and the transparent insulating material 6 is provided on the transparent insulating material 6. A transparent electrode 7 is provided. Examples of the transparent insulating material 6 include those made of BCB resin (bis-benzocyclobutene, manufactured by Dow Chemical Company). Moreover, as the transparent electrode 7, what consists of indium tin oxide (ITO) etc. can be mentioned, for example.

Furthermore, the nanowire solar cell 1 includes a collecting electrode 8 formed on the transparent electrode 7 and a back electrode 9 provided on the surface opposite to the amorphous SiO ₂ coating 3 of the InP (111) A substrate 2. I have. As the collector electrode 8, for example, an electrode obtained by sequentially depositing Ag and Ni can be used. Moreover, as the back electrode 9, the thing formed by vapor-depositing AuZn alloy can be mentioned, for example.

  Further, as shown in FIG. 2, the nanowire solar cell 1 may include a passivation layer 10 on the surfaces of the nanowire-shaped p-type InP semiconductor 4, the i-type InP semiconductor, and the n-type InP semiconductor 5.

  Next, a nanowire solar cell 11 according to a second embodiment of the present invention will be described with reference to FIG. The nanowire solar cell 11 is the nanowire solar cell shown in FIG. 1 except that the n-type InP semiconductor 5 is connected to the nanowire-shaped p-type InP semiconductor 4 in the length direction to form a pn junction. The battery 1 has exactly the same configuration. An i-type InP semiconductor (not shown) is provided between the p-type InP semiconductor 4 and the n-type InP semiconductor 5.

  In addition, as shown in FIG. 4, the nanowire solar cell 11 may include a passivation layer 10 on the surfaces of the nanowire-shaped p-type InP semiconductor 4, the i-type InP semiconductor, and the n-type InP semiconductor 5.

  Next, the manufacturing method of the nanowire solar cell 1 shown in FIG. 1 is demonstrated.

First, the InP (111) A substrate 2 which is a p-type semiconductor substrate is cleaned, and an amorphous SiO ₂ coating 3 is formed on the surface of the InP (111) A substrate 2 using an RF sputtering apparatus equipped with a SiO ₂ target. The film is formed to a thickness of about 30 nm.

Next, a positive resist is applied on the amorphous SiO ₂ film 3, the InP (111) A substrate 2 is set in an EB drawing apparatus, and a pattern is drawn on the positive resist. In the pattern, for example, circular holes having a diameter of 100 nm are arranged in a triangular lattice pattern at a pitch of 400 nm.

After the drawing, the resist is developed, and the InP (111) A substrate 2 is immersed in a BHF solution diluted 50 times, and the SiO ₂ in the circular holes is removed by etching. Then, after the etching, the resist is removed.

Next, the InP (111) A substrate 2 on which the amorphous SiO ₂ film 3 is formed is set in a MOVPE apparatus, and the chamber is evacuated and then replaced with H ₂ gas, so that the total pressure is stabilized at 0.1 atm. Adjust the flow rate and exhaust speed so that.

Next, the substrate temperature becomes 660 ° C. while flowing a mixed gas (total pressure: 0.1 atm, TBP partial pressure: 1.1 × 10 ⁻⁴ atm) of TBP (tertialybutylphospline) and carrier gas (H ₂ ). The temperature rises to Then, after the substrate temperature reaches 660 ° C., the flowing gas is switched to a mixed gas of TMI (trimetylindium), DEZ (dietylzinc), and TBP, the mixed gas is introduced into the reaction chamber, and the p-type InP semiconductor 4 is nanowired. Epitaxially grown in a shape. The total pressure remains at 0.1 atm so that the TMI partial pressure is 5 × 10 ⁻⁶ atm, the DEZ partial pressure is 1 × 10 ⁻⁶ atm, and the TBP partial pressure is 5 × 10 ⁻⁵ atm. Adjust the flow rate of organometallic gas. After 10 minutes, the flow gas is switched to a mixed gas of TBP and carrier gas (total pressure: 0.1 atm, TBP partial pressure: 1.1 × 10 ⁻⁴ atm), and the epitaxial growth of the p-type InP semiconductor 4 is completed.

Next, the substrate temperature is lowered from 660 ° C. to 600 ° C. while the mixed gas of TBP and carrier gas is circulated. After the substrate temperature reaches 600 ° C., the flow gas is switched to a mixed gas of TMI, TBP, SiH ₄ and carrier gas, the mixed gas is introduced into the reaction chamber for 10 minutes, and the surface of the p-type InP semiconductor 4 is An n-type InP semiconductor 5 is epitaxially grown. The total pressure remains at 0.1 atm so that the TMI partial pressure is 5 × 10 ⁻⁶ atm, the SiH ₄ partial pressure is 1 × 10 ⁻⁶ atm, and the TBP partial pressure is 5 × 10 ⁻⁴ atm. Adjust the flow rate of each organometallic gas. After 10 minutes, the flow gas is switched to a mixed gas of TBP and carrier gas (total pressure: 0.1 atm, TBP partial pressure: 1.1 × 10 ⁻⁴ atm), and the epitaxial growth of the n-type InP semiconductor 5 is completed.

After the epitaxial growth of the p-type InP semiconductor 4 and the n-type InP semiconductor 5, the mixed gas of TBP and carrier gas (total pressure: 0.1 atm, TBP partial pressure: 1.1 × 10 ⁻⁴ atm) is circulated. Then, the InP (111) A substrate 2 is taken out.

  By doing so, a nanowire-like semiconductor having a core-shell structure with the p-type InP semiconductor 4 as a core and the n-type InP semiconductor 5 as a shell is obtained. Note that when the p-type InP semiconductor 4 and the n-type InP semiconductor 5 are epitaxially grown, they may be hexagonal columns instead of columnar shapes. In this case, the diameter of the nanowire-shaped semiconductor is a diameter of an inscribed circle with respect to a hexagonal cross section.

  Next, a BCB resin (Dow Chemical Co., Ltd.) is formed on the p-type InP semiconductor 4 and n-type InP semiconductor 5 side of the InP (111) A substrate 2 obtained by epitaxially growing the p-type InP semiconductor 4 and the n-type InP semiconductor 5 in a nanowire shape. Are applied by spin coating. Next, an annealing process is performed in an inert gas atmosphere to maintain the temperature at 250 ° C. for 1 hour to cure the BCB resin, and the transparent insulating material 6 made of the cured BCB resin is formed.

Next, the excessively applied BCB resin is etched by RIE using a mixed gas of CF ₄ and O ₂ to expose the tip of the nanowire-like semiconductor by 150 nm. Next, a transparent electrode 7 made of ITO is formed on the transparent insulating material 6 using an RF sputtering apparatus equipped with an ITO target. The transparent electrode 7 is connected to the nanowire-like semiconductor.

Next, an AuZn alloy is vapor-deposited on the surface of the InP (111) A substrate 2 opposite to the amorphous SiO ₂ coating 3, and an annealing treatment is performed at a temperature of 350 ° C. for 5 minutes to form the back electrode 9. To do. And Ag and Ni are vapor-deposited in order on a part of surface of the transparent electrode 7 which consists of ITO, and the nanowire solar cell 1 is obtained by forming the collector electrode 8. FIG.

  Next, in the nanowire solar cell 1, when a nanowire-like semiconductor having a core-shell structure having the p-type InP semiconductor 4 as a core and the n-type InP semiconductor 5 as a shell has a height of 1000 nm and a diameter of 209 nm, the performance is as follows. evaluated. The evaluation of performance was performed by irradiating the nanowire solar cell 1 with pseudo-sunlight corresponding to AM1.5 and obtaining an IV curve thereof. The performance of the nanowire solar cell 1 is shown in Table 1.

表１から、本実施形態のナノワイヤ太陽電池１によれば、実用的な電力を得ることができることが明らかである。

From Table 1, it is clear that according to the nanowire solar cell 1 of this embodiment, practical electric power can be obtained.

1,11 ... nanowire solar cell, 2 ... InP (111) A substrate, 3 ... an amorphous SiO ₂ film, 4 ... p-type InP semiconductor, 5 ... n-type InP semiconductor, 6 ... transparent insulating material, 10 ... passivation layer.

Claims (5)

  A nanowire solar cell comprising a semiconductor substrate and a plurality of nanowire-like semiconductors grown on the semiconductor substrate and constituting a pn junction, wherein the semiconductor substrate and the nanowire-like semiconductor are made of a single single crystal The nanowire solar cell characterized by the above-mentioned.   The nanowire solar cell according to claim 1, further comprising a transparent insulating material filled in a gap between the plurality of nanowire-like semiconductors.   The nanowire solar cell according to claim 1, further comprising a passivation layer that prevents recombination along a surface of the nanowire-like semiconductor. Coating a part of the surface of the semiconductor substrate with an amorphous film;
And a step of epitaxially growing a crystal made of the same material as the semiconductor substrate on the surface of the semiconductor substrate exposed from the amorphous film to form a plurality of nanowire-shaped semiconductors. Manufacturing method.   After embedding the plurality of nanowire-like semiconductors in a transparent insulating material, by removing a part of the transparent insulating material and exposing the tips of the plurality of nanowire-like semiconductors, the plurality of nanowire-like semiconductors The method for producing a nanowire solar cell according to claim 4, further comprising a step of filling the gap between the semiconductors with the transparent insulating material.

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