JP2009534800A - Balanced reciprocal connector - Google Patents

Balanced reciprocal connector Download PDF

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JP2009534800A
JP2009534800A JP2009506877A JP2009506877A JP2009534800A JP 2009534800 A JP2009534800 A JP 2009534800A JP 2009506877 A JP2009506877 A JP 2009506877A JP 2009506877 A JP2009506877 A JP 2009506877A JP 2009534800 A JP2009534800 A JP 2009534800A
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pair
conductor
terminal
conductors
elements
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JP5074483B2 (en
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シーブ、ビラク
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ベルデン シーディーティー(カナダ)インコーポレイテッド
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R4/00Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
    • H01R4/24Connections using contact members penetrating or cutting insulation or cable strands
    • H01R4/2416Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type
    • H01R4/242Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type the contact members being plates having a single slot
    • H01R4/2425Flat plates, e.g. multi-layered flat plates
    • H01R4/2429Flat plates, e.g. multi-layered flat plates mounted in an insulating base
    • H01R4/2433Flat plates, e.g. multi-layered flat plates mounted in an insulating base one part of the base being movable to push the cable into the slot
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/646Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
    • H01R13/6461Means for preventing cross-talk

Abstract

第1および第2の同様の接続要素を含む平衡相互コネクタを開示する。各接続要素は細長い中心部と、実質的に向かい合う方向の1対の平行なIDC開口とを備え、IDCは細長い中心部の向かい合う端に実質的に直角に取り付けられ、各接続要素は異なる平行な平面内にある。第1および第2の接続要素は、細長い中心部が互いに向かい合い、第1の接続要素のIDCが第2の接続要素のIDCに向かい合わないように配置される。或る実施の形態では、隣接する接続要素対の接続要素は互いに直角である。  Disclosed is a balanced interconnect that includes first and second similar connecting elements. Each connecting element comprises an elongate center and a pair of parallel IDC openings in a substantially opposite direction, the IDC being mounted substantially perpendicular to the opposite ends of the elongate center, each connecting element being a different parallel In the plane. The first and second connection elements are arranged such that the elongated center faces each other and the IDC of the first connection element does not face the IDC of the second connection element. In an embodiment, the connection elements of adjacent connection element pairs are perpendicular to each other.

Description

本発明は平衡相互コネクタに関するものである。特に、本発明はツイストペアの導体を含むケーブルを相互接続するのに用いられる相互コネクタに関するものである。   The present invention relates to balanced interconnectors. In particular, the present invention relates to an interconnector used to interconnect cables containing twisted pair conductors.

データ伝送ネットワークでは、電気通信室で電気通信ケーブルの端を相互接続するのに一般に交差接続コネクタ(BIX、110、210など)を用いて、ネットワークの保全を容易にしている。例えば従来技術は、第1のケーブルの導体と第2のケーブルの導体とを相互接続するために端同士を接続した1対のIDC(Insulation Displacement Contact)コネクタで構成する一連の絶縁された平形直線導体を含む交差コネクタを開示している。   In data transmission networks, cross-connect connectors (BIX, 110, 210, etc.) are typically used to interconnect the ends of telecommunications cables in a telecommunications room to facilitate network maintenance. For example, in the prior art, a series of insulated flat straight lines comprising a pair of IDC (Insulation Displacement Contact) connectors connected end to end to interconnect the conductors of the first cable and the second cable. A cross connector including a conductor is disclosed.

この技術で周知のように、信号を伝送する全ての導体はアンテナとして働き、搬送する信号をその周辺に放射する。他の受信導体はこの放射信号を漏話として受ける。漏話はこの受信導体が搬送する信号に一般に悪い影響を与えるので、受ける漏話の強さが或る所定の最小値を超える場合は対処しなければならない。受ける漏話の強さは、送信導体と受信導体との間の容量結合(これは、導体の形状や導体間の距離などの多くの機械的要因により影響を受ける)だけでなく、導体が搬送する信号の周波数や、導体の遮蔽などに依存する。信号周波数が高くなるに従って容量結合の値が非常に小さくても大きな漏話を生じて、信号伝送に悪影響を与えることがある。   As is well known in the art, all conductors that transmit signals act as antennas and radiate the signals they carry around them. Other receiving conductors receive this radiated signal as crosstalk. Crosstalk generally has a negative effect on the signal carried by this receiving conductor, and must be addressed if the strength of the received crosstalk exceeds some predetermined minimum. The strength of the crosstalk received is not only the capacitive coupling between the transmitting and receiving conductors (which is affected by many mechanical factors such as the shape of the conductors and the distance between the conductors), but also the conductors carry Depends on signal frequency and conductor shielding. As the signal frequency is increased, even if the value of capacitive coupling is very small, a large crosstalk may occur, which may adversely affect signal transmission.

高周波信号の伝送用に設計されたシステム(ANSI/EIA568に準拠するユビキタス4ツイストペア・ケーブルなど)は、ケーブル内およびケーブル間の導体間の容量結合を最小にするために種々の機構を用いる。かかるシステムが持つ1つの問題は、結合(したがって、漏話)はケーブル内では減少するが、ケーブル内の導体は必然的に例えば装置または交差コネクタで終了しなければならないことである。かかる終点ではシステム内に不規則性が生じて、結合(したがって、漏話)が増加する。カテゴリ6および拡大カテゴリ6標準および10GBase−T伝送プロトコルが導入されたことにより、近端漏話(NEXT)、遠端漏話(FEXT)、およびエイリアン(Alien)漏話を含む全ての種類の内外の漏話の許容レベルが低くなった。その結果、従来技術のコネクタおよび相互コネクタは一般に漏話の許容レベルを満たすことができなくなった。   Systems designed for the transmission of high frequency signals (such as ubiquitous 4 twisted pair cables according to ANSI / EIA568) use various mechanisms to minimize capacitive coupling between conductors within and between cables. One problem with such a system is that the coupling (and thus crosstalk) is reduced in the cable, but the conductors in the cable must necessarily be terminated, for example, with a device or a cross connector. Such endpoints cause irregularities in the system and increase coupling (and thus crosstalk). With the introduction of Category 6 and Extended Category 6 standards and the 10 GBase-T transmission protocol, all types of internal and external crosstalk, including near-end crosstalk (NEXT), far-end crosstalk (FEXT), and Alien crosstalk are included. The acceptable level is low. As a result, prior art connectors and interconnectors generally cannot meet acceptable levels of crosstalk.

更に、ツイストペアの導体などの長いケーブル要素では導体対を適当によりあわせまた間隔をあけることにより漏話特性を良くすることはできるが、全体的に見ると、不規則性が起こるたびにケーブルに追加の漏話が生じる。かかる不規則性は主としてコネクタまたは相互コネクタで起こって一般に隣接する導体対の間に強い漏話を生成し、この漏話により高周波帯域幅が劣化して導体のデータ伝送量が制限される。伝送周波数が高くなるに従って、局所レベルでたとえ小さくとも不規則性が加わるたびに全体の不規則性が増加して、ケーブルの伝送性能に大きな影響を与えることがある。特に、ツイストペアの導体の端を解いてIDC型の接続内に挿入するとき、ツイストペアの間に容量結合が導入される。   In addition, long cable elements such as twisted-pair conductors can improve crosstalk characteristics by properly aligning and spacing the conductor pairs, but overall, every time irregularities occur, additional cables are added. Crosstalk occurs. Such irregularities mainly occur at connectors or interconnectors and generally generate strong crosstalk between adjacent pairs of conductors, which degrades the high frequency bandwidth and limits the amount of data transmitted on the conductors. As the transmission frequency increases, the overall irregularity increases each time a small irregularity is added at the local level, which can greatly affect the transmission performance of the cable. In particular, when the ends of the twisted pair conductors are unwound and inserted into an IDC type connection, capacitive coupling is introduced between the twisted pairs.

上記などの欠点に対処するため、2対の導体を終了させるためのコネクタを提供する。このコネクタは第1および第2の細長い端子対を含み、各端子対はそれぞれ1つの導体対を終了させ、各第1の端子対は第1の平面に実質的に平行でかつ第1の平面から実質的に等距離に配置され、各第2の端子対は第1の平面に直角な第2の平面に実質的に平行でかつ第2の平面から実質的に等距離に配置され、第1の平面は、各第1および第2の端子対に実質的に平行な交差線に沿って第2の平面と実質的に直角に交差する。横から見ると、第1の端子対の第1の端子と第2の端子対の第1の端子との間の第1の距離は第1の端子対の第1の端子と第2の端子対の第2の端子との間の第2の距離より小さく、また第1の端子対の第2の端子と第2の端子対の第1の端子との間の第3の距離は第1の端子対の第2の端子と第2の端子対の第2の端子との間の第4の距離より小さい。   To address the shortcomings as described above, a connector is provided for terminating two pairs of conductors. The connector includes first and second elongated terminal pairs, each terminal pair terminating one conductor pair, each first terminal pair being substantially parallel to the first plane and the first plane. Each second terminal pair is disposed substantially parallel to a second plane perpendicular to the first plane and substantially equidistant from the second plane; and One plane intersects the second plane at a substantially right angle along an intersection line that is substantially parallel to each first and second terminal pair. Viewed from the side, the first distance between the first terminal of the first terminal pair and the first terminal of the second terminal pair is the first terminal and the second terminal of the first terminal pair. The third distance between the second terminal of the first terminal pair and the second terminal of the second terminal pair is less than the second distance between the second terminal of the pair and the first distance of the second terminal pair is the first distance. Less than the fourth distance between the second terminal of the second terminal pair and the second terminal of the second terminal pair.

また、第1の組の2対の導体と第2の組の2対の導体とを相互接続するための相互コネクタを提供する。この相互コネクタは、第1の外表面と第2の外表面とを含む非導電ハウジングと、少なくとも2対の同様の導電要素とを含み、各対の各要素はその向かい合う第1および第2の端に細長い端子を含み、この端子は一般に平行でかつ非共線的であり、第1の端の端子は第1の組の導体の各1つを受け、第2の端の端子は第2の組の導体の各1つを受ける。前記対の第1の対の要素は第1の平面の両側にあって互いに向かい合って逆鏡像として配置され、前記対の第2の対の要素は第2の平面の両側にあって互いに向かい合って逆鏡像として配置され、第1の平面は細長い端子に平行な第1の交差線に沿って第2の平面と直角に交差する。第1の要素の端の各端子の少なくとも一部は第1の表面上に露出し、第2の要素の端の各端子の少なくとも一部は第2の表面上に露出する。   An interconnect is also provided for interconnecting the first set of two pairs of conductors and the second set of two pairs of conductors. The interconnector includes a non-conductive housing that includes a first outer surface and a second outer surface, and at least two pairs of similar conductive elements, each element of each pair having first and second opposing elements. The terminal includes an elongated terminal, the terminal being generally parallel and non-collinear, the first end terminal receiving each one of the first set of conductors, and the second end terminal being a second terminal. Each one of a set of conductors is received. The first pair of elements of the pair is disposed on opposite sides of the first plane and facing each other as a mirror image, and the second pair of elements of the pair is disposed on both sides of the second plane and facing each other. Arranged as an inverted mirror image, the first plane intersects the second plane at right angles along a first intersection line parallel to the elongated terminals. At least a portion of each terminal at the end of the first element is exposed on the first surface, and at least a portion of each terminal at the end of the second element is exposed on the second surface.

更に、4本のツイストペアの導体を含む第1のケーブルと4本のツイストペアの導体を含む第2のケーブルとを相互接続するための相互コネクタを提供する。この相互コネクタは第1の外表面と第2の外表面とを含む非導電ハウジングと、第1、第2、第3、第4の対の同様の導電接続要素とを含み、要素対の所定の1つの各要素はその向かい合う第1および第2の端に細長い端子を備え、これらの端子は実質的に並行でかつ非共線的であり、それぞれ1本の導体を受け、所定の対の各要素は異なる平面内にあり、所定の対の第1の要素はこの所定の対の第2の要素と向かい合って逆鏡像として配置される。第1の対の第1の要素と第2の対の第1の要素とは第1の平面内にあり、第1の対の第2の要素と第2の対の第2の要素とは第2の平面内にあり、第3の対の第1の要素と第4の対の第1の要素とは第3の平面内にあり、第3の対の第2の要素と第4の対の第2の要素とは第4の平面内にあり、また第1の端の各端子の少なくとも一部は第1の外表面上に露出し、第2の端の各端子の少なくとも一部は第2の外表面上に露出する。   In addition, an interconnect is provided for interconnecting a first cable that includes four twisted pair conductors and a second cable that includes four twisted pair conductors. The interconnector includes a non-conductive housing that includes a first outer surface and a second outer surface, and first, second, third, and fourth pairs of similar conductive connecting elements, the predetermined number of element pairs Each of the elements comprises an elongated terminal at its opposite first and second ends, the terminals being substantially parallel and non-collinear, each receiving a single conductor and receiving a predetermined pair of Each element is in a different plane, and the predetermined pair of first elements is disposed as an inverted mirror image opposite the predetermined pair of second elements. The first pair of first elements and the second pair of first elements are in a first plane, and the first pair of second elements and the second pair of second elements are In the second plane, the third pair of first elements and the fourth pair of first elements are in the third plane, and the third pair of second elements and the fourth pair The second element of the pair is in a fourth plane, and at least a portion of each terminal at the first end is exposed on the first outer surface, and at least a portion of each terminal at the second end Are exposed on the second outer surface.

更に、第1の組の2対の導体と第2の組の2対の導体との間の相互接続を提供する。この相互接続は、第1および第2の対の同様の細長い接続要素であって、各第1の要素対の第1の端は第1の組の導体対の第1の対の各1つに接続し、各第1の要素対の第2の端は第2の組の導体対の第1の対の各1つに接続し、各第2の要素対の第1の端は第1の組の導体対の第2の対の各1つに接続し、各第2の要素対の第2の端は第2の組の導体対の第2の対の各1つに接続する接続要素と、第1の対の第1の要素と第2の対の第1の要素との間に接続する第1のコンデンサと、第1の対の第1の要素と第2の対の第2の要素との間に接続する第2のコンデンサと、第1の対の第2の要素と第2の対の第1の要素との間に接続する第3のコンデンサと、第1の対の第2の要素と第2の対の第2の要素との間に接続する第4のコンデンサとを備え、各コンデンサは実質的に等しい容量値を有する。   In addition, an interconnection between the first set of two pairs of conductors and the second set of two pairs of conductors is provided. The interconnect is a first and second pair of similar elongate connecting elements, wherein the first end of each first element pair is each one of the first pair of conductor pairs of the first set. The second end of each first element pair is connected to each one of the first pair of the second set of conductor pairs, and the first end of each second element pair is the first A connection that connects to each one of the second pair of pairs of conductor pairs, and the second end of each second element pair connects to each one of the second pair of conductor pairs of the second set An element, a first capacitor connected between the first element of the first pair and the second element of the second pair, the first element of the first pair and the second element of the second pair. A second capacitor connected between the two elements, a third capacitor connected between the second element of the first pair and the first element of the second pair, and the first pair A fourth capacitor connected between the second element of the second and the second element of the second pair Comprising a respective capacitor has a substantially equal capacitance value.

また、第1の導体対の第1および第2の導体と第2の導体対の第1および第2の導体とをそれぞれ相互接続し、第3の導体対の第1および第2の導体と第4の第2の導体対の第1および第2の導体とをそれぞれ相互接続する方法を提供し、第1の導体対の第2の導体は第1の寄生静電容量により第3の導体対の第1の導体に結合し、第2の導体対の第1の導体は第2の寄生静電容量により第4の導体対の第2の導体に結合し、第1および第2の寄生静電容量は実質的に同じである。この方法は第1および第2の相互接続要素を提供し、寄生静電容量と実質的に同じ容量値を有する第1のコンデンサを提供し、第1および第2の要素を第1のコンデンサに結合し、第1の導体対の第1の導体と第2の導体対の第1の導体との間に第1の要素を相互接続しまた第3の導体対の第1の導体と第4の導体対の第1の導体との間に第2の要素を相互接続し、第3および第4の相互接続要素を提供し、寄生静電容量と実質的に同じ容量値を有する第2のコンデンサを提供し、第3および第4の要素を第2のコンデンサに結合し、第1の導体対の第2の導体と第2の導体対の第2の導体との間に第3の要素を相互接続しまた第3の導体対の第2の導体と第4の導体対の第2の導体との間に第4の要素を相互接続する。   Also, the first and second conductors of the first conductor pair and the first and second conductors of the second conductor pair are interconnected, respectively, and the first and second conductors of the third conductor pair A method is provided for interconnecting first and second conductors of a fourth second conductor pair, respectively, wherein the second conductor of the first conductor pair is a third conductor due to a first parasitic capacitance. Coupled to the first conductor of the pair, the first conductor of the second pair of conductors coupled to the second conductor of the fourth conductor pair by a second parasitic capacitance, and the first and second parasitics The capacitance is substantially the same. The method provides first and second interconnect elements, provides a first capacitor having a capacitance value substantially the same as the parasitic capacitance, and the first and second elements to the first capacitor. Coupled, interconnecting the first element between the first conductor of the first conductor pair and the first conductor of the second conductor pair, and the first conductor and fourth of the third conductor pair; Interconnecting a second element between the first conductor of the first conductor pair and providing third and fourth interconnect elements having a capacitance value substantially the same as the parasitic capacitance Providing a capacitor, coupling the third and fourth elements to the second capacitor, the third element between the second conductor of the first conductor pair and the second conductor of the second conductor pair; And a fourth element between the second conductor of the third conductor pair and the second conductor of the fourth conductor pair.

更に、第1の導体対の第1および第2の導体と第2の導体対の第1および第2の導体とを相互接続しまた第3のツイストペアの導体の第1および第2の導体と第4のツイストペアの導体の第1および第2の導体とを相互接続し、第1の導体対の第2の導体は第1の寄生静電容量により第3の導体対の第1の導体に結合され、第2の導体対の第1の導体は第2の寄生静電容量により第4の導体対の第2の導体に結合され、第1および第2の寄生静電容量は実質的に同じである相互コネクタを開示する。相互コネクタは、第1および第2のチップ要素であって、第1のチップ要素は第1の導体対の第1の導体と第2の導体対の第1の導体との間に相互接続され、第2のチップ要素は第3の導体対の第1の導体と第4の導体対の第1の導体との間に相互接続されるチップ要素と、第1および第2のリング要素であって、第1のリング要素は第1の導体対の第2の導体と第2の導体対の第2の導体との間に相互接続され、第2のリング要素は第3の導体対の第2の導体と第4の導体対の第2の導体との間に相互接続されるリング要素と、それぞれ第1および第2のチップ要素と第1および第2のリング要素との間の第1および第2のコンデンサとを備える。各コンデンサは第1および第2の寄生静電容量に実質的に等しい。   And interconnecting the first and second conductors of the first conductor pair and the first and second conductors of the second conductor pair and the first and second conductors of the third twisted pair conductor; Interconnecting the first and second conductors of the conductors of the fourth twisted pair, the second conductors of the first conductor pair to the first conductors of the third conductor pair by a first parasitic capacitance; Coupled, the first conductor of the second conductor pair is coupled to the second conductor of the fourth conductor pair by a second parasitic capacitance, wherein the first and second parasitic capacitances are substantially An interconnect that is the same is disclosed. The interconnector is a first and second chip element, the first chip element interconnected between the first conductor of the first conductor pair and the first conductor of the second conductor pair. The second tip element is a tip element interconnected between the first conductor of the third conductor pair and the first conductor of the fourth conductor pair, and the first and second ring elements. The first ring element is interconnected between the second conductor of the first conductor pair and the second conductor of the second conductor pair, and the second ring element is the second conductor of the third conductor pair. A ring element interconnected between the two conductors and the second conductor of the fourth conductor pair, and a first between the first and second tip elements and the first and second ring elements, respectively. And a second capacitor. Each capacitor is substantially equal to the first and second parasitic capacitances.

また、第1の複数のケーブルと第2の複数のケーブルとを相互接続し、各ケーブルは少なくとも2対の導体を含む、相互接続パネルを提供する。このパネルは一列に配置された複数の相互コネクタを含み、各相互コネクタは第1の複数のケーブルの各ケーブルと第2の複数のケーブルの各ケーブルとを接続する。各相互コネクタは、第1の外表面および第2の外表面を含む非導電ハウジングと、少なくとも2対の同様の導電要素とを含み、各対の各要素はその向かい合う第1および第2の端に細長い端子を備え、この端子は一般に平行でかつ非共線的であり、第1の端の端子は第1の複数のケーブルの各1つのケーブルの各1つの導体を受け、第2の端の端子は第2の複数のケーブルの各1つのケーブルの各1つの導体を受ける。第1の対の要素は第1の平面の両側に互いに向かい合って逆鏡像として配置され、第2の対の要素は第2の平面の両側に互いに向かい合って逆鏡像として配置され、また第1の平面は細長い端子に平行な第1の交差線に沿って第2の平面と直角に交差する。第1の要素の端の各端子の少なくとも一部は第1の表面上に露出し、第2の要素の端の各端子の少なくとも一部は第2の表面上に露出する。   An interconnect panel is also provided that interconnects the first plurality of cables and the second plurality of cables, each cable including at least two pairs of conductors. The panel includes a plurality of interconnectors arranged in a row, each interconnector connecting each cable of the first plurality of cables and each cable of the second plurality of cables. Each interconnector includes a non-conductive housing that includes a first outer surface and a second outer surface, and at least two pairs of similar conductive elements, each element of each pair having first and second opposite ends thereof. An elongated terminal, the terminal being generally parallel and non-collinear, wherein the first end terminal receives each one conductor of each one cable of the first plurality of cables and the second end Each terminal receives one conductor of each one of the second plurality of cables. The first pair of elements are arranged as opposite mirror images on opposite sides of the first plane, the second pair of elements are arranged opposite each other on opposite sides of the second plane, and the first pair The plane intersects the second plane at right angles along a first intersection line parallel to the elongated terminals. At least a portion of each terminal at the end of the first element is exposed on the first surface, and at least a portion of each terminal at the end of the second element is exposed on the second surface.

以下に図1および図2を参照して、参照番号10で一般に示す平衡相互コネクタについて以下に説明する。相互コネクタ10は絶縁ハウジング12を含み、ハウジング12は16などの第1の組のタレットをその中に成形した第1の外面14と、20などの第2の組のタレットをその中に成形した第2の外面18とを含む。図の第1の外表面14と第2の外表面18とは比較的平らでかつ向かい合っているが、或る実施の形態ではこれらの表面は互いに或る角度をなしてよく、または高さは等しくなく、16,20などのタレットは異なる相対的な高さを有してよいことに注意していただきたい。   In the following, referring to FIG. 1 and FIG. 2, a balanced interconnection connector generally indicated by reference numeral 10 will be described. The interconnector 10 includes an insulating housing 12, which has a first outer surface 14 molded therein, such as 16, a first set of turrets, and a second set of turrets, such as 20, formed therein. Second outer surface 18. Although the illustrated first outer surface 14 and second outer surface 18 are relatively flat and facing each other, in some embodiments these surfaces may be at an angle to each other, or the height may be Note that turrets such as 16, 20 may have different relative heights.

次に図1および図2に加えて図3および図4を参照すると、16などの第1の組のタレットの1つから20などの第2の組のタレットの対応する1つに伸びる22などの一連の接続要素がハウジング12内に埋め込まれている。ここで、ハウジング12は一般に第1および第2の相互接続部分24,26で作られているので、22などの接続要素をハウジング12内に簡単に組み込むことができる。各接続要素22は1対の向かい合う端子28,30を含み、図に示すように細長くて、各端子は平行な非共線軸に沿って配置される。この図では端子28,30は、28,30などの端子に対して或る角度を保つ細長い接続部32により相互接続される二又の絶縁変位コネクタ(IDC)である。この図では、端子28,30と細長い接続部32との間の角度は直角である。   3 and 4 in addition to FIGS. 1 and 2, 22 extends from one of the first set of turrets such as 16 to a corresponding one of the second set of turrets such as 20, etc. A series of connecting elements are embedded in the housing 12. Here, since the housing 12 is generally made of the first and second interconnect portions 24, 26, connection elements such as 22 can be easily incorporated into the housing 12. Each connecting element 22 includes a pair of opposing terminals 28, 30, which are elongated as shown, with each terminal being disposed along a parallel non-collinear axis. In this figure, terminals 28 and 30 are bifurcated insulation displacement connectors (IDCs) that are interconnected by an elongated connection 32 that maintains an angle with respect to terminals 28 and 30. In this figure, the angle between the terminals 28 and 30 and the elongated connection portion 32 is a right angle.

この技術で周知のように、28,30などの各IDCは34などの1対の向かい合う絶縁変位刃を備える。各接続要素22はニッケルめっきの鋼などの平らな導電材料から例えば打ち抜いて作る。しかし或る実施の形態では、接続要素22は多くの方法で形成してよく、例えば、プリント回路板(PCB)などの上にエッチされたトレースとして形成してよい。   As is well known in the art, each IDC, such as 28, 30, is provided with a pair of opposing insulating displacement blades, such as 34. Each connecting element 22 is made, for example, by stamping from a flat conductive material such as nickel-plated steel. However, in some embodiments, the connection element 22 may be formed in a number of ways, for example as an etched trace on a printed circuit board (PCB) or the like.

更に図1から図4を参照すると、16などの第1の組のタレットと20などの第2の組のタレットとは2つの平行の行のタレットにそれぞれ配置され、ケーブル端38を受けるためのケーブル端受け領域36をその間に定義する。40などの絶縁導体(一般にツイストペアの導体にする)はケーブル端38を出て、16または20などの各タレット内に成形された導体受けスロット38内に挿入される。この技術で周知のように、特殊な「パンチ・ダウン」ツール(二又のIDCの間に40などの導体を同時に押し込むツール)(図示せず)を用いて40などの絶縁導体を42などの各スロット内に挿入することにより、絶縁導体34の導電中心44と24,26などのIDCとを相互接続させた後、導体40の端を切る(一般にそのタレットの外縁と同じ高さに)。   Still referring to FIGS. 1-4, a first set of turrets, such as 16, and a second set of turrets, such as 20, are each disposed in two parallel rows of turrets for receiving cable ends 38. A cable end receiving region 36 is defined therebetween. Insulated conductors such as 40 (typically twisted pair conductors) exit the cable end 38 and are inserted into conductor receiving slots 38 molded into each turret such as 16 or 20. As is well known in the art, a special “punch down” tool (a tool that simultaneously pushes a conductor such as 40 between the bifurcated IDCs) (not shown) can be used to remove an insulated conductor such as 40 such as By inserting into each slot, the conductive center 44 of the insulated conductor 34 and the IDC such as 24, 26 are interconnected and then the end of the conductor 40 is cut (generally at the same height as the outer edge of the turret).

この技術で周知のように、40などの絶縁導体は一般にカラー・コード化されたツイストペアの導体で形成し、これをチップおよびリングと呼ぶことが多い。ツイストペア配線では、各対の非反転ワイヤの方をリングと呼んで単一色を有する外部絶縁にすることが多く、また反転ワイヤの方をチップと呼んでカラー・ストライプを含む白い外部絶縁にすることが多い。   As is well known in the art, insulated conductors such as 40 are generally formed of color-coded twisted pair conductors, often referred to as tips and rings. In twisted-pair wiring, each pair of non-inverted wires is often referred to as a ring to provide a single color external insulation, and the inverted wire is referred to as a chip to provide a white external insulation with color stripes. There are many.

注意すべきであるが、上の例示の実施の形態の第1の組のタレット16および20などの第2の組のタレットはそれぞれ2つの平行の行のタレットに配置されたものとして図示したが、或る実施の形態では、第1の組のタレット16および20などの第2の組のタレットは単一の行に配置してよく、または他のタレットと共に、図5に示すような直線に並んだ交差コネクタを形成してもよい。また、IDC以外のシステムを用いて40などの絶縁導体と22などの各接続要素とを相互接続してよい。
次に図2および図4を参照すると、或る実施の形態では、その中に成形されて36などのケーブル端受け領域内にきっちりはめ込まれる48などの複数の導体ガイド・チャネルを含む46などのワイヤ・リード・ガイドを、ケーブル端38と、16または20などの各タレット内に成形された導体受けスロット42との間に挿入してよい。
It should be noted that while the second set of turrets, such as the first set of turrets 16 and 20 in the exemplary embodiment above, are each illustrated as being disposed in two parallel rows of turrets. In some embodiments, a second set of turrets, such as the first set of turrets 16 and 20, may be arranged in a single row, or along with other turrets in a straight line as shown in FIG. Side-by-side cross connectors may be formed. Further, an insulating conductor such as 40 and each connection element such as 22 may be interconnected using a system other than the IDC.
Referring now to FIGS. 2 and 4, in some embodiments, such as 46 including a plurality of conductor guide channels such as 48 that are molded therein and fit tightly within a cable receiving area such as 36. A wire lead guide may be inserted between the cable end 38 and a conductor receiving slot 42 molded into each turret, such as 16 or 20.

次に図2および図6を参照すると、上に述べたように、16などの第1の組のタレットと20などの第2の組のタレットとをそれぞれ配置して2つの平行の行のタレットにする。その結果、それぞれが2対の相互コネクタを含むケーブル端受け領域36の各側に22などの4つの接続要素を図のように配置する。図では、ケーブル端受け領域36の第1の側に、それぞれが44などの各導体を終了させる4個の接続要素22,22,22,22がある(図では、相互コネクタをツイストペアの導体の終端導体4,8,5,7として示す)。 Referring now to FIGS. 2 and 6, as described above, a first set of turrets, such as 16, and a second set of turrets, such as 20, are arranged in two parallel rows of turrets, respectively. To. As a result, four connecting elements such as 22 are arranged as shown on each side of the cable end receiving region 36, each including two pairs of interconnectors. In the figure, the first side of the cable end receiving region 36, in each of four connecting elements 22 4 to terminate the respective conductors, such as 44, 22 8, 22 5, 22 7 is (figure the interconnector (Shown as terminal conductors 4, 8, 5, 7 of twisted pair conductors)

次に図7を参照すると、各相互コネクタ対の「チップ」接続要素22,22は第1の平面「I」内にあり、「リング」接続要素22,22は第2の平面「II」内にある。同様に、「チップ」接続要素22,22はそれぞれ第3の平面「III」内にあり、「リング」接続要素22,22は第1の平面に平行だが第1の平面から離れている第4の平面「IV」内にある。全ての平面は互いに平行で互いから離れている。注意すべきであるが、上のように22などの或る接続要素をチップ要素と呼びまた他の接続要素をリング要素と呼ぶが、当業者が理解するように、チップおよびリング対のチップ要素を用いてリングまたはチップの導体対を終了させ、チップおよびリング対のリング要素を用いて他方を終了させてよい。 Referring now to FIG. 7, "chip" connecting elements 22 4, 22 8 of the cross-connector pair is in the first plane "I", "ring" connecting elements 22 5, 22 7 the second plane Within “II”. Similarly, “chip” connecting elements 22 1 , 22 3 are each in a third plane “III”, and “ring” connecting elements 22 2 , 22 6 are parallel to the first plane but away from the first plane. In the fourth plane “IV”. All planes are parallel to each other and away from each other. It should be noted that as described above, certain connecting elements such as 22 are referred to as tip elements and other connecting elements are referred to as ring elements, but as those skilled in the art will appreciate, the tip elements of the tip and ring pairs May be used to terminate the ring or tip conductor pair and the ring element of the tip and ring pair to terminate the other.

図7に加えて元の図6を参照すると、第1の接続要素対22,22の細長い接続部32,32の方向は第2の接続要素対22,22の細長い接続部32,32の方向とは逆であって、所定のツイストペアを終了させるチップおよびリング接続要素は逆鏡像として互いに向かい合って配置される。 If in addition to FIG. 7 references the original 6, the direction of the first connecting element pair 22 4, 22 8 elongate connecting portion 32 4 of 32 8 elongate connecting the second connecting element pair 22 5, 22 7 the part 32 5, 32 7 the direction of an opposite, tip and ring connection element to terminate the predetermined twisted pair are arranged opposite one another as a reverse mirror image.

更に図6および図7を参照すると、22などの接続要素は直接互いに相互接続されないが、22などの隣接する接続要素が互いに相対的に近い場合は、ケーブル38の端を解いて40などの導体を28,30などのそれぞれのIDC内に挿入すると、40などの導体の間に寄生結合(容量要素子CP1およびCP2で示す)が生じ、近いもの(図に4−7で示す導体と5−8で示す導体)ほどその影響は大きい。この技術で周知のように、特に高周波ではかかる結合は、たとえ小さくても、伝送信号に大きな悪影響を与えることがある。 Still referring to FIGS. 6 and 7, connecting elements such as 22 are not directly interconnected with each other, but if adjacent connecting elements such as 22 are relatively close to each other, the end of cable 38 is unwound and a conductor such as 40 is connected. Is inserted into each IDC such as 28, 30, and the like, parasitic coupling (indicated by capacitive elements C P1 and C P2 ) occurs between conductors such as 40, and close ones (with conductors indicated by 4-7 in the figure). The influence of the conductor (5-8) is greater. As is well known in the art, such coupling, particularly at high frequencies, can have a significant adverse effect on the transmitted signal, even if small.

詳しく述べると、図に示す例では、7−8で示す導体対を通る差動信号は4−5で示す導体対に差動信号を生成する。またはその逆が起こる。この影響は、相互コネクタを図に示すように配置して同じ平面内にある22などの接続要素の間に固有の結合(第1および第2の容量要素CI1およびCI2で示す)を生成することにより打ち消される。実際に、第1の容量要素CI1を参照すると、例えば、接続要素22の外縁50は第1の容量要素CI1の第1の電極を形成し、接続要素22の外縁52は第1の容量要素CI1の第2の電極を形成し、2つの電極50と52の間の空気は第1の容量要素CI1の誘電体材料を形成する。 More specifically, in the example shown in the figure, a differential signal passing through a conductor pair indicated by 7-8 generates a differential signal on a conductor pair indicated by 4-5. Or vice versa. This effect creates a unique coupling (indicated by the first and second capacitive elements C I1 and C I2 ) between connecting elements such as 22 in the same plane by arranging the interconnectors as shown. To cancel. Indeed, referring to the first capacitor element C I1, for example, connecting elements 22 4 of the outer edge 50 forms a first electrode of the first capacitor element C I1, the outer edge 52 of the connecting element 22 8 first The second electrode of the capacitive element C I1 is formed, and the air between the two electrodes 50 and 52 forms the dielectric material of the first capacitive element C I1 .

固有静電容量CI1およびCI2は、さもなければ導体対40および40により導体対40および40内に誘導される(またはその逆)はずの差動モード信号を実質的に打ち消す。
この効果を図9の容量ネットワークで示す。この図では、導体40および40の差動信号の両成分は各導体40および40に結合するので、差動信号を実質的に打ち消す。このようにして、ツイストペアの導体40を解いてその端を二又のIDC28,30内に挿入するために22などの接続要素(図9に加えて図6に示す)により終了する導体40,40,40,40内に導入される漏話を、固有コンデンサにより打ち消す。
Intrinsic capacitances C I1 and C I2 substantially cancel differential mode signals that would otherwise be induced in conductor pairs 40 4 and 40 5 by conductor pairs 40 7 and 40 8 (or vice versa). .
This effect is illustrated by the capacity network of FIG. In this figure, both components of the differential signal conductors 40 7 and 40 8 so bonded to each of the conductors 40 4 and 40 5, substantially canceling out the differential signal. Thus, conductors 40 4 , terminated by connecting elements such as 22 (shown in FIG. 6 in addition to FIG. 9) to unwind the twisted-pair conductor 40 and insert its ends into the bifurcated IDCs 28, 30. Crosstalk introduced into 40 5 , 40 7 , and 40 8 is canceled by the inherent capacitor.

次に図10を参照すると、本発明の別の例示の実施の形態では、交差コネクタ10は第1および第2の相互接続部分54,56で作られたハウジング12を含む。第1の相互接続部分54は、第1の相互接続部分54の外表面60の隅に図のように配置された58などの一連のタレットを更に含む。同様に、第2の相互接続部分56も、第2の相互接続部分54の外表面64の隅に図のように配列された62などの一連のタレットを含む。22などの実質的に平らな接続要素は対として配置され、22などの隣接する接続要素の平らな側は互いに直角である。他の点では、この別の例示の実施の形態は上に詳細に説明した第1の例示の実施の形態と同じである。   Referring now to FIG. 10, in another exemplary embodiment of the present invention, the cross connector 10 includes a housing 12 made of first and second interconnect portions 54,56. The first interconnect portion 54 further includes a series of turrets such as 58 disposed as shown in the corners of the outer surface 60 of the first interconnect portion 54. Similarly, the second interconnect portion 56 includes a series of turrets such as 62 arranged as shown in the corners of the outer surface 64 of the second interconnect portion 54. Substantially flat connecting elements such as 22 are arranged in pairs, and the flat sides of adjacent connecting elements such as 22 are perpendicular to each other. In other respects, this other exemplary embodiment is the same as the first exemplary embodiment described in detail above.

次に図11を参照すると、実質的に平らな接続要素22の第1の対「A」は平面「I」の両側に平行に配置される。また、実質的に平らな接続要素22の第2の対「B」は、平面「I」と直角に交差する平面「II」の両側に平行に配置される。好ましくは、平面「II」は接続要素22の第1の対Aの中心と一致する線に沿って平面「I」と交差する。しかし或る実施の形態では、交差の線は中心以外の別の点で一致してよい。この構成は22などの4つの全ての接続要素対で繰り返される。すなわち、各22などの各接続要素対は22などの隣接する接続要素対に対して直角の位置にある。その結果、各接続要素対は22などの隣接する接続要素対の平面と交差する平面の両側にあり、この平面はまた22などの他の隣接する接続要素対の平面と交差する。   Referring now to FIG. 11, a first pair “A” of substantially flat connecting elements 22 is disposed parallel to both sides of plane “I”. Also, the second pair “B” of substantially flat connecting elements 22 are arranged parallel to both sides of the plane “II” that intersects the plane “I” at right angles. Preferably, plane “II” intersects plane “I” along a line that coincides with the center of the first pair A of connecting elements 22. However, in some embodiments, the line of intersection may coincide at another point other than the center. This configuration is repeated for all four connecting element pairs, such as 22. That is, each connection element pair, such as 22, is at a right angle to an adjacent connection element pair, such as 22. As a result, each connection element pair is on either side of a plane that intersects the plane of an adjacent connection element pair, such as 22, which also intersects the plane of another adjacent connection element pair, such as 22.

次に図12aを参照して、ツイストペアの導体40を解いて二又のIDC28,30の34などの刃の間に挿入すると、40などの導体の間に容量要素CP4−7、CP4−8、CP5−7、CP5−8で示す寄生結合を生成する(この場合も、図では22などの接続要素を、ツイストペアの導体40の導体40,40,40,40を終了させるものとして示す)。図12aに加えて図12bを参照して、寄生静電容量CP4−7、CP4−8、CP5−7、CP5−8を構成することにより、得られるネットワークは本質的に差動モード漏話になる差動モードおよびコモンモード漏話になる差動モードを打ち消す。 Referring now to FIG. 12a, when inserted between the blades such as 34 of IDC28,30 bifurcated by solving the twisted pairs of conductors 40, capacitance elements C P4-7 between conductors such as 40, C P4- 8 , C P5-7 , and C P5-8 are generated (in this case, connection elements such as 22 are connected to the conductors 40 4 , 40 5 , 40 7 , and 40 8 of the twisted-pair conductor 40. Shown as ending). Referring to Figure 12b, in addition to FIG. 12a, the parasitic capacitance C P4-7, C P4-8, C P5-7 , by configuring the C P5-8, resulting network is essentially a differential Cancels differential mode that results in mode crosstalk and differential mode that results in common mode crosstalk.

すでに当業者に明らかなように、導体40および40を進む差動信号は導体40および40の信号と等しくて逆なので実質的に互いを打ち消す。実際に、導体40を進む差動信号の正の位相はCP4−7およびCP4−8により導体40および40上に結合される。同様に、導体40を進む差動信号の負の位相はCP5−7およびCP5−8により導体40および40上に結合される。各寄生静電容量は実質的に等しく、また22などの接続要素の長さは伝送される信号の波長よりはるかに短い(例えば、650MHzの信号の波長は約0.46メートルである)ので位相のずれは非常に小さく、寄生静電容量により導体40および40上に漏話として結合される差動信号は実質的に互いに打ち消し合う。 As will be apparent to those skilled in the art, the differential signals traveling on conductors 40 4 and 40 5 are substantially equal to and opposite to the signals on conductors 40 7 and 40 8 and thus substantially cancel each other. Indeed, the positive phase differential signal traveling the conductor 40 4 is coupled onto the conductor 40 7 and 40 8 by C P4-7 and C P4-8. Similarly, negative phase differential signal traveling conductor 40 5 is coupled on the conductor 40 7 and 40 8 by C P5-7 and C P5-8. Each parasitic capacitance is substantially equal and the length of the connecting element such as 22 is much shorter than the wavelength of the transmitted signal (eg, the wavelength of a 650 MHz signal is about 0.46 meters). deviation is very small, the differential signal coupled as crosstalk on the conductor 40 7 and 40 8 by the parasitic capacitances cancel substantially each other.

次に図12cを参照すると、22などの接続要素の互いに対する幾何学的位置が与えられると、22などの接続要素で終了する全ての導体対について上記の寄生結合が繰り返される。その結果、4対の22などの接続要素を介して相互接続される全ての導体対について釣り合いがとれる。注意すべきであるが、22などの接続要素と相互接続するときの導体40の方向に関わらずこの釣り合いがとれる。すなわち、例えば、上に述べたように一般にチップと呼ばれる4という導体と上に述べたように一般にその対のリングと呼ばれる5という導体は、互いに交換しても(すなわち、22などの他の接続要素で終了しても)釣り合いに影響を与えない。これは全ての導体対(すなわち、図に示す対1−2,3−6,4−5,7−8)に等しく当てはまる。   Referring now to FIG. 12c, given the geometric position of connecting elements such as 22 relative to each other, the above parasitic coupling is repeated for all conductor pairs ending with connecting elements such as 22. As a result, all pairs of conductors interconnected via four pairs of connecting elements such as 22 are balanced. It should be noted that this balance is achieved regardless of the orientation of the conductor 40 when interconnected with a connecting element such as 22. Thus, for example, a conductor of 4 commonly referred to as a chip as described above and a conductor of 5 commonly referred to as a pair of rings as described above may be interchanged (ie, other connections such as 22). Does not affect the balance (even if it ends with an element). This applies equally to all conductor pairs (ie pairs 1-2, 3-6, 4-5, 7-8 shown in the figure).

次に図13aを参照すると、22などの接続要素の位置関係も22などの接続要素の間の固有容量結合(容量要素CI4−7,CI4−8,CI5−7,CI5−8で示す)を生じる。図13aに加えて図13bを参照すると、22などの隣接する接続要素の中心の間の距離Dが或る導体対を終了させる相互コネクタの間の距離Dより実質的に大きい(図では、距離Dは約10倍大きい)場合は、これらの固有静電容量は実質的に等しく、その結果、差動モード漏話になる差動モードおよびコモンモード漏話になる差動モードを本質的に打ち消す容量ネットワークを形成する。注意すべきであるが、固有静電容量により形成される容量ネットワークは図12aから図12cを参照して上に述べた寄生静電容量のものと本質的に同じであり、寄生静電容量に関する上の説明は固有静電容量にも適用することができる。この場合も、異なる対の22などの接続要素の間の幾何学的相互関係が与えられると、22などの隣接する接続要素対の間の方向に依存して、固有静電容量の同様のネットワークが形成される。 Referring now to FIG. 13a, the positional relationship of the connecting elements such as 22 is also the specific capacitive coupling between the connecting elements such as 22 (capacitance elements C I4-7 , C I4-8 , C I5-7 , C I5-8 As shown in FIG. Referring to FIG. 13b in addition to FIG. 13a, the distance D c between the centers of adjacent connecting elements such as 22 is substantially greater than the distance D S between interconnectors that terminate a conductor pair (in the figure, The distance D is approximately 10 times greater), these intrinsic capacitances are substantially equal, which essentially cancels the differential mode resulting in differential mode crosstalk and the differential mode resulting in common mode crosstalk. Form a capacity network. It should be noted that the capacitance network formed by the intrinsic capacitance is essentially the same as that described above with reference to FIGS. 12a to 12c, and is related to the parasitic capacitance. The above explanation can also be applied to the intrinsic capacitance. Again, given a geometric interrelation between different pairs of connecting elements such as 22, depending on the direction between adjacent connecting element pairs such as 22, a similar network of specific capacitances. Is formed.

次に図14aを参照すると、図の交差コネクタ10はモジュール式であって、パッチ・ベイ・パネル(patch bay panel)などの支持フレーム66内に機械加工またはその他の方法で形成されたソケット内に、一般に10などの1個以上の同様の交差コネクタを共に取り付ける。ここで、10などの交差コネクタを支持フレーム上に取り付けたとき、一組のタレットが支持フレーム66の各側に露出する。   Referring now to FIG. 14a, the illustrated cross connector 10 is modular and within a socket machined or otherwise formed in a support frame 66, such as a patch bay panel. Generally, one or more similar cross connectors, such as 10, are attached together. Here, when a cross connector, such as 10, is mounted on the support frame, a set of turrets are exposed on each side of the support frame 66.

次に図14aに加えて図14bを参照すると、10などの隣接する交差コネクタの22などの接続要素対の間の距離Sが10などの交差コネクタ内の22などの接続要素対の間の距離Sと少なくとも同じになるように10などの隣接する交差コネクタの間の空間を選択すると、漏話の打消し効果が得られるように22などの隣接する接続要素対の間の相対的配置を10などの隣接する交差コネクタの間で保持することができる。
当業者が理解するように、本発明は、例えば、遮蔽カバー(導電材料で作って導体/ケーブルを囲む遮蔽材料と相互接続したもの)(図示せず)を交差コネクタ10上に設けた遮蔽付き導体およびケーブルと共に用いることもできる。
Referring now to FIG. 14b in addition to FIG. 14a, such as 10 between the pairs of connecting elements such as 22 of the adjacent cross connectors distance S A is between pairs of connecting elements such as 22 in the cross connector such as 10 the distance S I and by selecting the space between the cross connector adjacent such 10 to be at least the same, the relative arrangement between the adjacent pairs of connecting elements such as 22 canceling the effect of crosstalk can be obtained Can be held between adjacent cross connectors, such as ten.
As will be appreciated by those skilled in the art, the present invention includes, for example, a shielded cover (made of a conductive material and interconnected with a shield material surrounding the conductor / cable) (not shown) on the cross connector 10. It can also be used with conductors and cables.

本発明について例示的な実施の形態により説明したが、本発明の精神および性質から逸れない限り、この実施の形態を自由に変えてよい。   While the invention has been described in terms of exemplary embodiments, it is to be understood that the embodiments can be varied freely without departing from the spirit and nature of the invention.

本発明の或る例示の実施の形態に係る平衡相互コネクタの側面図である。1 is a side view of a balanced interconnect according to an exemplary embodiment of the present invention. FIG. 本発明の或る例示の実施の形態に係る平衡相互コネクタの右上から見た斜視図である。1 is a perspective view from the top right of a balanced interconnect according to an exemplary embodiment of the present invention. FIG. 図2の線3−3に沿う平衡相互コネクタの断面図である。FIG. 3 is a cross-sectional view of the balanced interconnector taken along line 3-3 of FIG. 本発明の或る例示の実施の形態に係る平衡相互コネクタの組立分解図である。1 is an exploded view of a balanced interconnect according to an exemplary embodiment of the present invention. FIG. 本発明の別の例示の実施の形態に係る平衡相互コネクタの部分的に分解された右正面斜視図である。FIG. 6 is a partially exploded right front perspective view of a balanced interconnect according to another exemplary embodiment of the present invention. 本発明の或る例示の実施の形態に係る2対の接続要素の右下から見た斜視図である。FIG. 3 is a perspective view from the lower right of two pairs of connecting elements according to an exemplary embodiment of the present invention. 本発明の或る例示の実施の形態に係る4対の接続要素の平面図である。FIG. 3 is a plan view of four pairs of connecting elements according to an exemplary embodiment of the present invention. 本発明の或る例示の実施の形態に係る1対の隣接する接続要素の側平面図である。1 is a side plan view of a pair of adjacent connecting elements according to an exemplary embodiment of the present invention. FIG. 本発明の或る例示の実施の形態に係る結合効果の略図である。2 is a schematic representation of a coupling effect according to an exemplary embodiment of the present invention. 本発明の別の例示の実施の形態に係る平衡相互コネクタの組立分解図である。FIG. 6 is an exploded view of a balanced interconnect according to another exemplary embodiment of the present invention. 本発明の別の例示の実施の形態に係る2対の接続要素の平面図である。FIG. 6 is a plan view of two pairs of connecting elements according to another exemplary embodiment of the present invention. 本発明の別の例示の実施の形態に係る2対の相互コネクタの左上から見た斜視図である。It is the perspective view seen from the upper left of two pairs of interconnection connectors concerning another exemplary embodiment of the present invention. 図12aの接続要素から生じる寄生静電容量の略図である。12b is a schematic illustration of parasitic capacitance resulting from the connection element of FIG. 12a. 本発明の別の例示の実施の形態に係る相互コネクタ内の全ての接続要素の間に生じる寄生静電容量の略図である。4 is a schematic illustration of parasitic capacitance that occurs between all connecting elements in an interconnector according to another exemplary embodiment of the present invention. 固有静電容量の詳細を示す図12aの2対の相互コネクタの平面図である。12b is a plan view of the two pairs of interconnectors of FIG. 12a showing details of the intrinsic capacitance. FIG. 図13aの固有静電容量の略図である。13b is a schematic diagram of the intrinsic capacitance of FIG. 13a. 本発明の別の例示の実施の形態に係る複数の平衡相互コネクタおよび支持フレームの上から見た斜視図である。FIG. 6 is a top perspective view of a plurality of balanced interconnectors and a support frame according to another exemplary embodiment of the present invention. 本発明の別の例示の実施の形態に係る隣接する相互コネクタの接続要素の相対的位置の詳細を示す平面図である。FIG. 6 is a plan view showing details of relative positions of connecting elements of adjacent interconnectors according to another exemplary embodiment of the present invention.

Claims (47)

2対の導体を終端処理するためのコネクタであって、
第1および第2の細長い端子対を備え、各前記端子対はそれぞれ1つの導体対を終了させ、各前記第1の端子対は第1の平面に実質的に平行でかつ第1の平面から実質的に等距離に配置され、各前記第2の端子対は前記第1の平面に直角な第2の平面に実質的に平行でかつ第2の平面から実質的に等距離に配置され、前記第1の平面は、各前記第1および第2の端子対に実質的に平行な交差線に沿って前記第2の平面と実質的に直角に交差し、
横から見ると、前記第1の端子対の第1の端子と前記第2の端子対の第1の端子との間の第1の距離は前記第1の端子対の前記第1の端子と前記第2の端子対の第2の端子との間の第2の距離より小さく、また前記第1の端子対の第2の端子と前記第2の端子対の前記第1の端子との間の第3の距離は前記第1の端子対の前記第2の端子と前記第2の端子対の前記第2の端子との間の第4の距離より小さい、
コネクタ。
A connector for terminating two pairs of conductors,
First and second elongate terminal pairs, each terminal pair terminating one conductor pair, each first terminal pair being substantially parallel to the first plane and from the first plane; Disposed substantially equidistantly, each second terminal pair being disposed substantially parallel to and substantially equidistant from a second plane perpendicular to the first plane; The first plane intersects the second plane substantially perpendicularly along an intersection line substantially parallel to each of the first and second terminal pairs;
When viewed from the side, the first distance between the first terminal of the first terminal pair and the first terminal of the second terminal pair is the first distance of the first terminal pair with the first terminal of the first terminal pair. Less than a second distance between the second terminal of the second terminal pair and between the second terminal of the first terminal pair and the first terminal of the second terminal pair. A third distance is less than a fourth distance between the second terminal of the first terminal pair and the second terminal of the second terminal pair,
connector.
前記端子は実質的に平らなIDCであり、各前記第1のIDC対は前記第1の平面に実質的に平行でかつ前記第1の平面から等距離にあり、各前記第2のIDC対は前記第2の平面に実質的に平行でかつ前記第2の平面から等距離にある、請求項1記載のコネクタ。   The terminals are substantially flat IDCs, and each first IDC pair is substantially parallel to the first plane and equidistant from the first plane, and each second IDC pair The connector of claim 1, wherein is substantially parallel to the second plane and equidistant from the second plane. 前記第1の平面は前記第2の端子対に平行であって前記第2の端子対から等距離にある交差線に沿って前記第2の平面と交差する、請求項1記載のコネクタ。   The connector according to claim 1, wherein the first plane is parallel to the second terminal pair and intersects the second plane along an intersection line equidistant from the second terminal pair. 各前記第1の端子対の間の距離は各前記第2の端子対の間の距離と実質的に同じである、請求項1記載のコネクタ。   The connector according to claim 1, wherein a distance between each first terminal pair is substantially the same as a distance between each second terminal pair. 前記第1の距離は前記第4の距離と実質的に同じである、請求項1記載のコネクタ。   The connector of claim 1, wherein the first distance is substantially the same as the fourth distance. 第1の組の2対の導体と第2の組の2対の導体とを相互接続するための相互コネクタであって、
第1の外表面と第2の外表面とを含む非導電ハウジングと、
少なくとも2対の同様の導電要素であって、各前記対の各要素はその向かい合う第1および第2の端に細長い端子を含み、前記端子は一般に平行でかつ非共線的であり、前記第1の端の前記端子は第1の組の導体の各1つを受け、前記第2の端の前記端子は第2の組の導体の各1つを受け、
前記対の第1の対の前記要素は第1の平面の両側にあって互いに向かい合って逆鏡像として配置され、前記対の第2の対の前記要素は第2の平面の両側にあって互いに向かい合って逆鏡像として配置され、また前記第1の平面は前記細長い端子に平行な第1の交差線に沿って前記第2の平面と直角に交差し、
前記第1の要素の端の各前記端子の少なくとも一部は前記第1の表面上露出し、前記第2の要素の端の各前記端子の少なくとも一部は前記第2の表面上に露出する、
相互コネクタ
An interconnector for interconnecting a first set of two pairs of conductors and a second set of two pairs of conductors;
A non-conductive housing including a first outer surface and a second outer surface;
At least two pairs of similar conductive elements, each element of each pair including elongated terminals at opposite first and second ends thereof, said terminals being generally parallel and non-collinear; The terminal at one end receives each one of the first set of conductors, the terminal at the second end receives each one of the second set of conductors;
The elements of the first pair of the pair are arranged as opposite mirror images on opposite sides of the first plane and opposite each other, and the elements of the second pair of pairs are arranged on opposite sides of the second plane. Oppositely disposed as a reverse mirror image, and the first plane intersects the second plane at right angles along a first intersection line parallel to the elongated terminals;
At least a portion of each terminal at the end of the first element is exposed on the first surface, and at least a portion of each terminal at the end of the second element is exposed on the second surface. ,
Mutual connector
前記第2の外表面は前記第1の外表面から前記ハウジングの向かい合う側にあり、また前記第1の表面と前記第2の表面は実質的に平行である、請求項6記載の相互コネクタ。   The interconnector of claim 6, wherein the second outer surface is on the opposite side of the housing from the first outer surface, and the first surface and the second surface are substantially parallel. 前記第1の要素対の中心の離れた距離Dは前記第1の対の中心と前記第2の平面との離れた距離Dの約20%より小さい、請求項6記載の相互コネクタ。 The distance away D s of the first pair of elements centered about 20% less than the mutual connector according to claim 6, wherein the distance away D c between the second plane and the center of the first pair. 前記距離Dは前記距離Dの約10%より小さい、請求項8記載の相互コネクタ。 It said distance D s is less than about 10% of the distance D c, interconnector of Claim 8. 前記端子はIDCである、請求項6記載の相互コネクタ。   The interconnector according to claim 6, wherein the terminal is an IDC. 各前記要素は前記端子の間に細長い接続部を含み、前記接続部は前記端子に実質的に直角に配置される、請求項6記載の相互コネクタ。   The interconnector of claim 6, wherein each element includes an elongated connection between the terminals, the connection being disposed substantially perpendicular to the terminals. 前記第1の交差線は実質的に前記第2のコネクタ対の中心にある、請求項6記載の相互コネクタ。   The interconnector of claim 6, wherein the first intersection line is substantially in the center of the second connector pair. 前記対の第3の対の前記要素は第3の平面の両側にあって互いに逆鏡像として向かい合って配置され、前記対の第4の対の前記要素は第4の平面の両側にあって互いに逆鏡像として向かい合って配置され、前記第2の平面は前記細長い端子に平行でかつ前記第3のコネクタ対の実質的に中心にある第2の交差線に沿って前記第3の平面と直角に交差し、前記第3の平面は前記細長い端子に平行でかつ前記第4のコネクタ対の実質的に中心にある第3の交差線に沿って前記第4の平面と直角に交差し、また前記第4の平面は前記細長い端子に平行でかつ前記第1の対の実質的に中心にある或る交差線に沿って前記第1の平面と直角に交差する、請求項12記載の相互コネクタ。   The elements of the third pair of the pair are arranged on opposite sides of the third plane and opposite each other as mirror images, and the elements of the fourth pair of pairs are arranged on both sides of the fourth plane and Opposed as an inverted mirror image, the second plane is parallel to the elongated terminals and perpendicular to the third plane along a second intersection line substantially at the center of the third connector pair. Intersect, the third plane intersects the fourth plane at right angles along a third intersection line parallel to the elongated terminals and substantially at the center of the fourth connector pair, and The interconnector of claim 12, wherein a fourth plane intersects the first plane at a right angle along a crossing line that is parallel to the elongated terminal and substantially at the center of the first pair. 前記導体対はツイストペアの導体である、請求項6記載の相互コネクタ。   The interconnector according to claim 6, wherein the conductor pair is a twisted pair conductor. 第1の組の2対の導体は第1のケーブル・ジャケット内に入れられ、また第2の組の2対の導体は第2のケーブル・ジャケット内に入れられる、請求項6記載の相互コネクタ。   The interconnect of claim 6, wherein the first set of two pairs of conductors are placed in a first cable jacket, and the second set of two pairs of conductors are placed in a second cable jacket. . 4本のツイストペアの導体を含む第1のケーブルと4本のツイストペアの導体を含む第2のケーブルとを相互接続するための相互コネクタであって、
第1の外表面と第2の外表面とを含む非導電ハウジングと、
第1、第2、第3、第4の対の同様の導電接続要素であって、前記要素対の所定の1つの各要素はその向かい合う第1および第2の端に細長い端子を備え、前記端子は実質的に並行でかつ非共線的であり、それぞれ1本の導体を受け、前記所定の対の各要素は異なる平面内にあり、前記所定の対の第1の要素は前記所定の対の第2の要素と向かい合って逆鏡像として配置される導電接続要素と、
を備え、
前記第1の対の第1の要素と前記第2の対の第1の要素とは第1の平面内にあり、前記第1の対の第2の要素と前記第2の対の第2の要素とは第2の平面内にあり、前記第3の対の第1の要素と前記第4の対の第1の要素とは第3の平面内にあり、前記第3の対の第2の要素と前記第4の対の第2の要素とは第4の平面内にあり、また前記第1の端の各前記端子の少なくとも一部は前記第1の外表面上に露出し、前記第2の端の各前記端子の少なくとも一部は前記第2の外表面上に露出する、
相互コネクタ。
An interconnector for interconnecting a first cable that includes four twisted pair conductors and a second cable that includes four twisted pair conductors,
A non-conductive housing including a first outer surface and a second outer surface;
A first, second, third, fourth pair of similar conductive connection elements, each predetermined one element of said pair of elements comprising an elongated terminal at its opposite first and second ends, The terminals are substantially parallel and non-collinear, each receive one conductor, each element of the predetermined pair is in a different plane, and the first element of the predetermined pair is the predetermined element A conductive connecting element arranged as a reverse mirror image facing the second element of the pair;
With
The first element of the first pair and the first element of the second pair are in a first plane, the second element of the first pair and the second element of the second pair. Are in a second plane, the third pair of first elements and the fourth pair of first elements are in a third plane, and the third pair of first elements Two elements and the second pair of second elements are in a fourth plane, and at least a portion of each terminal of the first end is exposed on the first outer surface; At least a portion of each of the terminals at the second end is exposed on the second outer surface;
Interconnect connector.
前記第2の外表面は前記第1の外表面から前記ハウジングの向かい合う側にあり、また前記第1の表面と前記第2の表面は実質的に平行である、請求項16記載の相互コネクタ。   17. The interconnector of claim 16, wherein the second outer surface is on the opposite side of the housing from the first outer surface, and the first surface and the second surface are substantially parallel. 前記第1の外表面と前記第2の外表面は実質的に平らである、請求項16記載の相互コネクタ。   The interconnector of claim 16, wherein the first outer surface and the second outer surface are substantially flat. 前記端子はIDCである、請求項16記載の相互コネクタ。   The interconnector of claim 16, wherein the terminal is an IDC. 各前記接続要素は前記端子の間に細長い接続部を含み、前記接続部は前記端子に実質的に直角に配置される、請求項16記載の相互コネクタ。   17. The interconnector of claim 16, wherein each connection element includes an elongated connection between the terminals, the connection being disposed substantially perpendicular to the terminals. 第1の組の2対の導体と第2の組の2対の導体との間の相互接続であって、
第1および第2の対の同様の細長い接続要素であって、各前記第1の要素対の第1の端は第1の組の導体対の第1の対の各1つに接続し、各前記第1の要素対の第2の端は第2の組の導体対の第1の対の各1つに接続し、各前記第2の要素対の第1の端は第1の組の導体対の第2の対の各1つに接続し、各前記第2の要素対の第2の端は第2の組の導体対の第2の対の各1つに接続する接続要素と、
前記第1の対の第1の要素と前記第2の対の第1の要素との間に接続する第1のコンデンサと、前記第1の対の第1の要素と前記第2の対の第2の要素との間に接続する第2のコンデンサと、前記第1の対の第2の要素と前記第2の対の第1の要素との間に接続する第3のコンデンサと、前記第1の対の第2の要素と前記第2の対の第2の要素との間に接続する第4のコンデンサと、
を備え、
各コンデンサは実質的に等しい容量値を有する、
相互接続。
An interconnection between a first set of two pairs of conductors and a second set of two pairs of conductors;
First and second pairs of similar elongate connecting elements, wherein the first end of each first element pair connects to each one of the first pair of first pair of conductor pairs; The second end of each first element pair is connected to each one of the first pair of second pairs of conductor pairs, and the first end of each second element pair is the first set. A connecting element connected to each one of the second pair of conductor pairs, wherein the second end of each second element pair is connected to each one of the second pair of second pairs of conductor pairs When,
A first capacitor connected between the first element of the first pair and the second element of the second pair; the first element of the first pair and the second element of the second pair; A second capacitor connected between a second element; a third capacitor connected between the first element of the second pair and the first element of the second pair; A fourth capacitor connected between the second element of the first pair and the second element of the second pair;
With
Each capacitor has a substantially equal capacitance value,
Interconnect.
各前記要素は第1の端の方にある第1の端子と第2の端の方にある第2の端子とを備え、また第1の組の導体の各導体は前記第1の端子の各1つで終了し、第2の組の導体の各導体は前記第2の端子の各1つで終了する、請求項21記載の相互接続。   Each of the elements comprises a first terminal toward the first end and a second terminal toward the second end, and each conductor of the first set of conductors is a first terminal of the first terminal. The interconnect of claim 21, terminating at each one and each conductor of the second set of conductors terminating at each one of the second terminals. 第1の組の2対の導体と第2の組の2対の導体の各対はツイストペアの導体であり、また各前記端子はIDCを備える、請求項22記載の相互接続。   23. The interconnect of claim 22, wherein each pair of first pair of two conductors and second pair of two pairs of conductors is a twisted pair of conductors, and each said terminal comprises an IDC. 各前記端子は細長く、また各前記端子は平行な非共線軸に沿って配置される、請求項22記載の相互接続。   23. The interconnect of claim 22, wherein each said terminal is elongated and each said terminal is disposed along parallel non-collinear axes. 各前記要素は前記端子の間に細長い接続部を含み、前記接続部は前記端子に実質的に直角に配置される、請求項24記載の相互接続。   25. The interconnect of claim 24, wherein each element includes an elongated connection between the terminals, the connection being disposed substantially perpendicular to the terminals. 各対の導体対はリングおよびチップを含み、各対の要素対はチップ要素およびリング要素を含み、各前記チップ要素は前記第1の組の導体の各チップと前記第2の組の導体の各チップとを相互接続し、各前記リング要素は前記第1の組の導体の各リングと前記第2の組の導体の各リングとを相互接続し、また各前記チップ要素は第1の平面内にあり、各前記リング要素は第1の平面から離れた第2の平面内にある、請求項24記載の相互接続。   Each pair of conductor pairs includes a ring and a tip, each pair of element pairs includes a tip element and a ring element, and each of the tip elements includes each tip of the first set of conductors and the second set of conductors. Interconnecting each chip, each said ring element interconnects each ring of said first set of conductors and each ring of said second set of conductors, and each said chip element is in a first plane 25. The interconnect of claim 24, wherein each ring element is in a second plane that is away from the first plane. 要素対ごとに、前記チップ要素は前記リング要素に向かい合って逆鏡像として配置される、請求項26記載の相互接続。   27. The interconnect of claim 26, wherein for each element pair, the tip element is disposed as a reverse mirror image facing the ring element. 各対の導体対はリングおよびチップを含み、各対の要素対はチップ要素およびリング要素を含み、各前記チップ要素は前記第1の組の導体の各チップと前記第2の組の導体の各チップとを相互接続し、各前記リング要素は前記第1の組の導体の各リングと前記第2の組の導体の各リングとを相互接続する、請求項21記載の相互接続。   Each pair of conductor pairs includes a ring and a tip, each pair of element pairs includes a tip element and a ring element, and each of the tip elements includes each tip of the first set of conductors and the second set of conductors. 24. The interconnect of claim 21, wherein each chip is interconnected and each ring element interconnects each ring of the first set of conductors and each ring of the second set of conductors. 前記第1の容量結合は前記第1の要素対の前記リング要素と前記第2の要素対の前記チップ要素との間にあり、前記第2の容量結合は前記第2の要素対の前記リング要素と前記第1の要素対の前記チップ要素との間にあり、前記第3の容量結合は前記第1の要素対の前記チップ要素と前記第2の要素対の前記チップ要素との間にあり、前記第4の容量結合は前記第1の要素対の前記リング要素と前記第2の要素対の前記リング要素との間にある、請求項28記載の相互接続。   The first capacitive coupling is between the ring element of the first element pair and the tip element of the second element pair, and the second capacitive coupling is the ring of the second element pair. An element and the chip element of the first element pair, and the third capacitive coupling is between the chip element of the first element pair and the chip element of the second element pair. 29. The interconnect of claim 28, wherein the fourth capacitive coupling is between the ring element of the first element pair and the ring element of the second element pair. 第1の導体対の第1および第2の導体と第2の導体対の第1および第2の導体とをそれぞれ相互接続しまた第3の導体対の第1および第2の導体と第4の第2の導体対の第1および第2の導体とをそれぞれ相互接続する方法であって、第1の導体対の第2の導体は第1の寄生静電容量により第3の導体対の第1の導体に結合しまた第2の導体対の第1の導体は第2の寄生静電容量により第4の導体対の第2の導体に結合し、第1および第2の寄生静電容量は実質的に同じであり、前記方法は、
第1および第2の相互接続要素を提供し、
寄生静電容量と実質的に同じ容量値を有する第1のコンデンサを形成し、
前記第1および第2の要素を前記第1のコンデンサに結合し、
第1の導体対の第1の導体と第2の導体対の第1の導体との間に前記第1の要素を相互接続しまた第3の導体対の第1の導体と第4の導体対の第1の導体との間に前記第2の要素を相互接続し、
第3および第4の相互接続要素を提供し、
寄生静電容量と実質的に同じ容量値を有する第2のコンデンサを形成し、
第3および第4の要素を前記第2のコンデンサに結合し、
第1の導体対の第2の導体と第2の導体対の第2の導体との間に前記第3の要素を相互接続しまた第3の導体対の第2の導体と第4の導体対の第2の導体との間に前記第4の要素を相互接続する、
ことを含む、導体を相互接続する方法。
Interconnecting the first and second conductors of the first conductor pair and the first and second conductors of the second conductor pair, respectively, and the first and second conductors and fourth of the third conductor pair Each of the first and second conductors of the second conductor pair, wherein the second conductor of the first conductor pair is coupled to the third conductor pair by a first parasitic capacitance. The first conductor of the second conductor pair coupled to the first conductor is coupled to the second conductor of the fourth conductor pair by a second parasitic capacitance, and the first and second parasitic electrostatic capacitances are coupled. The capacity is substantially the same, and the method
Providing first and second interconnect elements;
Forming a first capacitor having a capacitance value substantially the same as the parasitic capacitance;
Coupling the first and second elements to the first capacitor;
Interconnecting the first element between a first conductor of a first conductor pair and a first conductor of a second conductor pair, and a first conductor and a fourth conductor of a third conductor pair Interconnecting the second element between a pair of first conductors;
Providing third and fourth interconnection elements;
Forming a second capacitor having a capacitance value substantially the same as the parasitic capacitance;
Coupling third and fourth elements to the second capacitor;
Interconnecting the third element between the second conductor of the first conductor pair and the second conductor of the second conductor pair, and the second and fourth conductors of the third conductor pair Interconnecting the fourth element between a pair of second conductors;
A method of interconnecting conductors.
前記第1および第2の要素はチップ要素であり、前記第3および第4の要素はリング要素である、請求項30記載の導体を相互接続する方法。   31. The method of interconnecting conductors of claim 30, wherein the first and second elements are tip elements and the third and fourth elements are ring elements. 前記第1のコンデンサを提供する作用は、前記第1の要素の外縁が前記第1のコンデンサの第1の電極として作用し、前記第2の要素の外縁が前記第1のコンデンサの第2の電極として作用し、前記第1の要素の外縁と前記第2の要素の外縁との間の空気が前記第1のコンデンサの誘電体として作用するように、前記第1および第2の要素を互いに配置することを含む、請求項30記載の導体を相互接続する方法。   The act of providing the first capacitor is such that the outer edge of the first element acts as the first electrode of the first capacitor and the outer edge of the second element is the second of the first capacitor. Acting as an electrode, the first and second elements are connected to each other such that the air between the outer edge of the first element and the outer edge of the second element acts as a dielectric of the first capacitor. The method of interconnecting conductors of claim 30 comprising arranging. 前記第2のコンデンサを提供する作用は、前記第3の要素の外縁が前記第2のコンデンサの第1の電極として作用し、前記第4の要素の外縁が前記第2のコンデンサの第2の電極として作用し、前記第3の要素の外縁と前記第4の要素の外縁との間の空気が前記第2のコンデンサの誘電体として作用するように、前記第3および第4の要素を互いに配置することを含む、請求項30記載の導体を相互接続する方法。   The act of providing the second capacitor is such that the outer edge of the third element acts as the first electrode of the second capacitor, and the outer edge of the fourth element is the second of the second capacitor. Acting as an electrode, the third and fourth elements are connected to each other such that air between the outer edge of the third element and the outer edge of the fourth element acts as a dielectric of the second capacitor. The method of interconnecting conductors of claim 30 comprising arranging. 前記導体対はツイストペアの導体である、請求項30記載の導体を相互接続する方法。   31. The method of interconnecting conductors of claim 30, wherein the conductor pair is a twisted pair conductor. 各第1の導体はチップ導体であり、各第2の導体はリング導体である、請求項30記載の導体を相互接続する方法。   31. The method of interconnecting conductors of claim 30, wherein each first conductor is a tip conductor and each second conductor is a ring conductor. 第1の導体対の第1および第2の導体と第2の導体対の第1および第2の導体とを相互接続しまた第3のツイストペアの導体の第1および第2の導体と第4のツイストペアの導体の第1および第2の導体とを相互接続し、第1の導体対の第2の導体は第1の寄生静電容量により第3の導体対の第1の導体に結合され、第2の導体対の第1の導体は第2の寄生静電容量により第4の導体対の第2の導体に結合され、第1および第2の寄生静電容量は実質的に同じである相互コネクタであって、
第1および第2のチップ要素であって、前記第1のチップ要素は第1の導体対の第1の導体と第2の導体対の第1の導体との間に相互接続されまた前記第2のチップ要素は第3の導体対の第1の導体と第4の導体対の第1の導体との間に相互接続される、チップ要素と、
第1および第2のリング要素であって、前記第1のリング要素は第1の導体対の第2の導体と第2の導体対の第2の導体との間に相互接続されまた前記第2のリング要素は第3の導体対の第2の導体と第4の導体対の第2の導体との間に相互接続される、リング要素と、
それぞれ前記第1および第2のチップ要素と前記第1および第2のリング要素との間の第1および第2のコンデンサと、
を備え、
各前記コンデンサは第1および第2の寄生静電容量に実質的に等しい、
相互コネクタ。
Interconnecting the first and second conductors of the first conductor pair and the first and second conductors of the second conductor pair and the first and second conductors and fourth of the conductors of the third twisted pair Interconnecting the first and second conductors of the twisted pair of conductors, wherein the second conductor of the first conductor pair is coupled to the first conductor of the third conductor pair by a first parasitic capacitance. The first conductor of the second conductor pair is coupled to the second conductor of the fourth conductor pair by a second parasitic capacitance, the first and second parasitic capacitances being substantially the same. A mutual connector,
First and second chip elements, wherein the first chip element is interconnected between a first conductor of a first conductor pair and a first conductor of a second conductor pair, and the first chip element Two chip elements interconnected between a first conductor of a third conductor pair and a first conductor of a fourth conductor pair;
First and second ring elements, wherein the first ring element is interconnected between a second conductor of a first conductor pair and a second conductor of a second conductor pair and the first ring element Two ring elements interconnected between a second conductor of a third conductor pair and a second conductor of a fourth conductor pair;
First and second capacitors between the first and second tip elements and the first and second ring elements, respectively;
With
Each said capacitor is substantially equal to the first and second parasitic capacitances;
Interconnect connector.
各前記要素は第1の端の方にある第1の端子と第2の端の方にある第2の端子とを備え、また第1の組の導体の各導体は前記第1の端子の各1つで終了し、第2の組の導体の各導体は前記第2の端子の各1つで終了する、請求項36記載の相互コネクタ。   Each of the elements comprises a first terminal toward the first end and a second terminal toward the second end, and each conductor of the first set of conductors is a first terminal of the first terminal. 37. The interconnector of claim 36, wherein each interconnect terminates at a respective one and each conductor of a second set of conductors terminates at a respective one of said second terminals. 第1の組の2対の導体と第2の組の2対の導体の各対はツイストペアの導体であり、また各前記端子はIDCを備える、請求項37記載の相互コネクタ。   38. The interconnect of claim 37, wherein each pair of a first set of two pairs of conductors and a second set of two pairs of conductors is a twisted pair of conductors, and each said terminal comprises an IDC. 各前記端子は細長く、また各前記端子は平行な非共線軸に沿って配置される、請求項37記載の相互コネクタ。   38. The interconnector of claim 37, wherein each said terminal is elongated and each said terminal is disposed along a parallel non-collinear axis. 各前記要素は前記端子の間に細長い接続部を含み、前記接続部は前記端子に実質的に直角に配置される、請求項39記載の相互コネクタ。   40. The interconnector of claim 39, wherein each element includes an elongated connection between the terminals, the connection being disposed substantially perpendicular to the terminals. 各前記要素は前記端子の間に細長い接続部を含み、前記接続部は前記端子に実質的に直角に配置され、第2の前記チップ要素に面する第1の前記チップ要素の前記接続部の実質的に平らな端と前記第1のチップ要素に面する前記第2のチップ要素の前記接続部の実質的に平らな端とは互いに向かい合って平行に配置され、また第2の前記リング要素に面する第1の前記リング要素の前記接続部の実質的に平らな端と前記第1のリング要素に面する前記第2のリング要素の前記接続部の実質的に平らな端とは互いに向かい合って平行に配置される、請求項46記載の相互コネクタ。   Each of the elements includes an elongated connection between the terminals, the connection being disposed substantially perpendicular to the terminal and of the connection of the first chip element facing the second chip element. A substantially flat end and a substantially flat end of the connecting portion of the second tip element facing the first tip element are arranged opposite and parallel to each other, and the second ring element A substantially flat end of the connection portion of the first ring element facing the first ring element and a substantially flat end of the connection portion of the second ring element facing the first ring element The interconnector of claim 46, wherein the interconnectors are disposed opposite and in parallel. 要素対ごとに、前記チップ要素は前記リング要素に向かい合って逆鏡像として配置される、請求項36記載の相互コネクタ。   37. The interconnector of claim 36, wherein for each element pair, the tip element is disposed as a reverse mirror image facing the ring element. 前記第1の容量結合は前記第1の要素対の前記リング要素と前記第2の要素対の前記チップ要素との間にあり、前記第2の容量結合は前記第2の要素対の前記リング要素と前記第1の要素対の前記チップ要素との間にあり、前記第3の容量結合は前記第1の要素対の前記チップ要素と前記第2の要素対の前記チップ要素との間にあり、前記第4の容量結合は前記第1の要素対の前記リング要素と前記第2の要素対の前記リング要素との間にある、請求項36記載の相互接続。   The first capacitive coupling is between the ring element of the first element pair and the tip element of the second element pair, and the second capacitive coupling is the ring of the second element pair. An element and the chip element of the first element pair, and the third capacitive coupling is between the chip element of the first element pair and the chip element of the second element pair. 37. The interconnection of claim 36, wherein the fourth capacitive coupling is between the ring element of the first element pair and the ring element of the second element pair. 前記第1のチップ要素の外縁は前記第1のコンデンサの第1の電極を形成し、前記第2のチップ要素の外縁は前記第1のコンデンサの第2の電極を形成し、前記第1のチップ要素の外縁と前記第2のチップ要素の外縁との間の空気は前記第1のコンデンサの誘電体を形成する、請求項36記載の相互接続。   The outer edge of the first chip element forms a first electrode of the first capacitor, the outer edge of the second chip element forms a second electrode of the first capacitor, 37. The interconnection of claim 36, wherein air between an outer edge of the chip element and an outer edge of the second chip element forms a dielectric of the first capacitor. 前記第1のリング要素の外縁は前記第2のコンデンサの第1の電極を形成し、前記第2のリング要素の外縁は前記第2のコンデンサの第2の電極を形成し、前記第1のリング要素の外縁と前記第2のリング要素の外縁との間の空気は前記第2のコンデンサの誘電体を形成する、請求項36記載の相互接続。   The outer edge of the first ring element forms a first electrode of the second capacitor, the outer edge of the second ring element forms a second electrode of the second capacitor, and the first capacitor 37. The interconnection of claim 36, wherein air between an outer edge of a ring element and an outer edge of the second ring element forms a dielectric of the second capacitor. 各第1の導体はチップでありまた各第2の導体はリングである、請求項37記載の相互接続。   38. The interconnect of claim 37, wherein each first conductor is a tip and each second conductor is a ring. それぞれが少なくとも2対の導体を含む第1の複数のケーブルと第2の複数のケーブルとを相互接続するための相互接続パネルであって、
一列に配置された複数の相互コネクタを含み、前記各相互コネクタは第1の複数のケーブルの各ケーブルと第2の複数のケーブルの各ケーブルとを接続し、前記各相互コネクタは、
第1の外表面および第2の外表面を含む非導電ハウジングと、
少なくとも2対の同様の導電要素であって、前記各対の各要素はその向かい合う第1および第2の端に細長い端子を備え、前記端子は一般に平行でかつ非共線的であり、前記第1の端の前記端子は第1の複数のケーブルの各1つのケーブルの各1つの導体を受け、前記第2の端の前記端子は第2の複数のケーブルの各1つのケーブルの各1つの導体を受ける導電要素、
を備え、
第1の前記対の前記要素は第1の平面の両側に互いに向かい合って逆鏡像として配置され、第2の前記対の前記要素は第2の平面の両側に互いに向かい合って逆鏡像として配置され、また前記第1の平面は前記細長い端子に平行な第1の交差線に沿って前記第2の平面と直角に交差し、
前記第1の要素の端の各前記端子の少なくとも一部は前記第1の表面上に露出し、前記第2の要素の端の各前記端子の少なくとも一部は前記第2の表面上に露出する、
相互接続パネル。
An interconnect panel for interconnecting a first plurality of cables and a second plurality of cables, each including at least two pairs of conductors,
A plurality of interconnectors arranged in a row, wherein each interconnector connects each cable of a first plurality of cables and each cable of a second plurality of cables;
A non-conductive housing including a first outer surface and a second outer surface;
At least two pairs of similar conductive elements, each element of each pair comprising elongated terminals at opposite first and second ends, said terminals being generally parallel and non-collinear, said first The terminal at one end receives a conductor of each one of the cables of the first plurality of cables, and the terminal at the second end of each one of the cables of the second plurality of cables A conductive element that receives the conductor,
With
The elements of the first pair are arranged as opposite mirror images on opposite sides of the first plane, and the elements of the second pair are arranged opposite each other on opposite sides of the second plane; The first plane intersects the second plane at a right angle along a first intersecting line parallel to the elongated terminal;
At least a portion of each terminal at the end of the first element is exposed on the first surface, and at least a portion of each terminal at the end of the second element is exposed on the second surface. To
Interconnect panel.
JP2009506877A 2006-04-25 2007-04-25 Balanced reciprocal connector Expired - Fee Related JP5074483B2 (en)

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