CA2544929A1 - Balanced interconnector - Google Patents
Balanced interconnector Download PDFInfo
- Publication number
- CA2544929A1 CA2544929A1 CA002544929A CA2544929A CA2544929A1 CA 2544929 A1 CA2544929 A1 CA 2544929A1 CA 002544929 A CA002544929 A CA 002544929A CA 2544929 A CA2544929 A CA 2544929A CA 2544929 A1 CA2544929 A1 CA 2544929A1
- Authority
- CA
- Canada
- Prior art keywords
- interconnectors
- interconnector
- conductors
- idcs
- turrets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R4/00—Electrically-conductive connections between two or more conductive members in direct contact, i.e. touching one another; Means for effecting or maintaining such contact; Electrically-conductive connections having two or more spaced connecting locations for conductors and using contact members penetrating insulation
- H01R4/24—Connections using contact members penetrating or cutting insulation or cable strands
- H01R4/2416—Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type
- H01R4/242—Connections using contact members penetrating or cutting insulation or cable strands the contact members having insulation-cutting edges, e.g. of tuning fork type the contact members being plates having a single slot
- H01R4/2425—Flat plates, e.g. multi-layered flat plates
- H01R4/2429—Flat plates, e.g. multi-layered flat plates mounted in an insulating base
- H01R4/2433—Flat plates, e.g. multi-layered flat plates mounted in an insulating base one part of the base being movable to push the cable into the slot
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
- H01R13/6461—Means for preventing cross-talk
- H01R13/6464—Means for preventing cross-talk by adding capacitive elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R9/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, e.g. terminal strips or terminal blocks; Terminals or binding posts mounted upon a base or in a case; Bases therefor
- H01R9/22—Bases, e.g. strip, block, panel
- H01R9/24—Terminal blocks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/646—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00 specially adapted for high-frequency, e.g. structures providing an impedance match or phase match
- H01R13/6461—Means for preventing cross-talk
- H01R13/6467—Means for preventing cross-talk by cross-over of signal conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/66—Structural association with built-in electrical component
- H01R13/6608—Structural association with built-in electrical component with built-in single component
- H01R13/6625—Structural association with built-in electrical component with built-in single component with capacitive component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R9/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, e.g. terminal strips or terminal blocks; Terminals or binding posts mounted upon a base or in a case; Bases therefor
- H01R9/22—Bases, e.g. strip, block, panel
- H01R9/24—Terminal blocks
- H01R9/2425—Structural association with built-in components
Landscapes
- Details Of Connecting Devices For Male And Female Coupling (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
There is disclosed a balanced interconnector comprising first and second like interconnectors, each of the interconnectors comprising an elongate centre section and a pair of parallel IDCs opening in substantially opposite directions, the IDCs attached substantially at right angles to and at opposite ends of the elongate centre sections, each of the interconnectors lying in different parallel plains. The first and second interconnectors are arranged such that the elongate centre sections are opposite one another and the IDCs of the first interconnector are not opposite the IDCs of the second interconnector.
Description
TITLE OF THE INVENTION
BALANCED INTERCONNECTOR
BACKGROUND
In data transmission networks, cross-connect connectors (such as BIX, 110, 210, etc.) are commonly used in telecommunication rooms to interconnect the ends of telecommunications cables, thereby facilitating network maintenance.
For example, the prior art reveals cross connectors comprised of a series of isolated flat straight conductors each comprised of a pair of reversed Insulation Displacement Contact (IDC) connectors connected end to end for interconnecting a conductor of a first cable with the conductors of a second cable. Even though these straight connections were known to produce an amount of crosstalk due to capacitive coupling between pairs, the produced crosstalk was at levels below those provided for in the standards and as such had no adverse effect on data transmitted via the cross connector.
With the introduction of Category 6 and Augmented Category 6 standards and the lOGBase-T transmission protocol, the allowable levels for all kinds of internal and external crosstalk, including Near End Crosstalk (NEXT), Far End Crosstalk (FEXT) and Alien Crosstalk, have been lowered. As a result, the prior art connectors are generally no longer able to meet the allowable levels for cross talk.
Additionally, although long cable elements such as the twisted pairs of conductors achieve good crosstalk characteristics through appropriate twisting and spacing of the pairs of conductors, when viewed as a whole, the cable is subject to additional crosstalk at every irregularity. Such irregularities occur primarily at connectors or interconnectors and typically lead to an aggressive generation of crosstalk between neighbouring pairs of conductors which in turn degrades the high frequency bandwidth and limits data
BALANCED INTERCONNECTOR
BACKGROUND
In data transmission networks, cross-connect connectors (such as BIX, 110, 210, etc.) are commonly used in telecommunication rooms to interconnect the ends of telecommunications cables, thereby facilitating network maintenance.
For example, the prior art reveals cross connectors comprised of a series of isolated flat straight conductors each comprised of a pair of reversed Insulation Displacement Contact (IDC) connectors connected end to end for interconnecting a conductor of a first cable with the conductors of a second cable. Even though these straight connections were known to produce an amount of crosstalk due to capacitive coupling between pairs, the produced crosstalk was at levels below those provided for in the standards and as such had no adverse effect on data transmitted via the cross connector.
With the introduction of Category 6 and Augmented Category 6 standards and the lOGBase-T transmission protocol, the allowable levels for all kinds of internal and external crosstalk, including Near End Crosstalk (NEXT), Far End Crosstalk (FEXT) and Alien Crosstalk, have been lowered. As a result, the prior art connectors are generally no longer able to meet the allowable levels for cross talk.
Additionally, although long cable elements such as the twisted pairs of conductors achieve good crosstalk characteristics through appropriate twisting and spacing of the pairs of conductors, when viewed as a whole, the cable is subject to additional crosstalk at every irregularity. Such irregularities occur primarily at connectors or interconnectors and typically lead to an aggressive generation of crosstalk between neighbouring pairs of conductors which in turn degrades the high frequency bandwidth and limits data
-2-throughput over the conductors. As the transmission frequencies continue to increase, each additional irregularity at local level, although small, adds to a collective irregularity which may have a considerable impact on the transmission performance of the cable. In particular, unravelling the ends of the twisted pairs of conductors in order to introduce them into an IDC type connections introduces capacitive coupling between the twisted pairs.
SUMMARY OF THE INVENTION
In order to address the above and other drawbacks there is disclosed a balanced interconnector comprising first and second like interconnectors, each of the interconnectors comprising an elongate centre section and a pair of parallel IDCs opening in substantially opposite directions, the IDCs attached substantially at an angle to and at opposite ends of the elongate centre sections, each of the interconnectors lying in different parallel plains.
The first and second interconnectors are arranged such that the elongate centre sections are opposite one another and the IDCs of the first interconnector are not opposite the IDCs of the second interconnector.
BRIEF DESCRIPTION OF THE FIGURES
Figure 1 is a right raised perspective view of a balanced interconnector in accordance with an illustrative embodiment of the present invention;
Figure 2 is a sectional view of a balanced interconnector taken along line 2-2 in Figure 1;
Figure 3 is an exploded view of a balanced interconnector in accordance with an illustrative embodiment of the present invention;
Figure 4 is a partially disassembled right front perspective view of a balanced interconnector in accordance with an alternative illustrative embodiment of the
SUMMARY OF THE INVENTION
In order to address the above and other drawbacks there is disclosed a balanced interconnector comprising first and second like interconnectors, each of the interconnectors comprising an elongate centre section and a pair of parallel IDCs opening in substantially opposite directions, the IDCs attached substantially at an angle to and at opposite ends of the elongate centre sections, each of the interconnectors lying in different parallel plains.
The first and second interconnectors are arranged such that the elongate centre sections are opposite one another and the IDCs of the first interconnector are not opposite the IDCs of the second interconnector.
BRIEF DESCRIPTION OF THE FIGURES
Figure 1 is a right raised perspective view of a balanced interconnector in accordance with an illustrative embodiment of the present invention;
Figure 2 is a sectional view of a balanced interconnector taken along line 2-2 in Figure 1;
Figure 3 is an exploded view of a balanced interconnector in accordance with an illustrative embodiment of the present invention;
Figure 4 is a partially disassembled right front perspective view of a balanced interconnector in accordance with an alternative illustrative embodiment of the
-3-present invention;
Figure 5 is right lowered perspective view of two pairs of interconnectors in accordance with an illustrative embodiment of the present invention;
Figure 6 is a schematic diagram of the coupling effect in accordance with an illustrative embodiment of the present invention;
Figure 7 is an exploded view of a balanced interconnector in accordance with an alternative illustrative embodiment of the present invention;
Figure 8 is a left raised perspective view of two pairs of interconnectors in accordance with an alternative illustrative embodiment of the present invention;
Figure 9 is a top plan view of the two pairs of interconnectors of Figure 7;
and Figure 10 is a raised perspective view of a plurality of balanced interconnectors and support frame in accordance with an illustrative embodiment of the present invention.
DETAILED DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS
Referring now to Figure 1, a balanced interconnector, generally referred to using the reference numeral 10 will now be described. The cross connector 10 comprises an insulating housing 12 into which a first set of turrets as in and a second set of turrets as in 16 are moulded.
Referring now to Figures 2 and 3 in addition to Figure 1, a series of interconnectors as in 18 which extend from one of the first set of turrets as in 14 to a corresponding one of the second set of turrets as in 16 are imbedded in the housing 12. In this regard, the housing 12 is typically manufactured in
Figure 5 is right lowered perspective view of two pairs of interconnectors in accordance with an illustrative embodiment of the present invention;
Figure 6 is a schematic diagram of the coupling effect in accordance with an illustrative embodiment of the present invention;
Figure 7 is an exploded view of a balanced interconnector in accordance with an alternative illustrative embodiment of the present invention;
Figure 8 is a left raised perspective view of two pairs of interconnectors in accordance with an alternative illustrative embodiment of the present invention;
Figure 9 is a top plan view of the two pairs of interconnectors of Figure 7;
and Figure 10 is a raised perspective view of a plurality of balanced interconnectors and support frame in accordance with an illustrative embodiment of the present invention.
DETAILED DESCRIPTION OF THE ILLUSTRATIVE EMBODIMENTS
Referring now to Figure 1, a balanced interconnector, generally referred to using the reference numeral 10 will now be described. The cross connector 10 comprises an insulating housing 12 into which a first set of turrets as in and a second set of turrets as in 16 are moulded.
Referring now to Figures 2 and 3 in addition to Figure 1, a series of interconnectors as in 18 which extend from one of the first set of turrets as in 14 to a corresponding one of the second set of turrets as in 16 are imbedded in the housing 12. In this regard, the housing 12 is typically manufactured in
-4-first and second interconnecting parts 20, 22 thereby providing a simple means for assembling the interconnectors as in 18 within the housing 12.
Each interconnector 18 is comprised of a pair of opposed elongate bifurcated Insulation Displacement Connectors (IDC) 24, 26 interconnected by an elongate connecting portion 28 at an angle to the fDCs as in 24, 26.
Illustratively, this angle between the IDCs 24, 26 and the elongate connecting portion 28 is shown as being perpendicular, but angles other than perpendicular may also be used in particular embodiments. As known in the art, the IDCs as in 24, 26 are each comprised of a pair of opposed insulation displacing blades as in 30. The interconnector 18 is illustratively stamped from a flat conducting material such as nickel plated steel, although in a particular embodiment the interconnector 18 could be formed in a number of ways, for example as an etched trace on a Printed Circuit Board (PCB) or the like.
Still referring to Figures 1, 2 and 3, the first set of turrets as in 14 and the second set of turrets as in 16 are each arranged in two parallel rows of turrets defining a cable end receiving region 32 there between for receiving a cable end 34. The insulated conductors as in 36 (typically arranged in twisted pairs of conductors) exit the cable end 34 and are received by conductor receiving slots 38 moulded in each of the turrets as in 14 or 16. As known in the art, the insulated conductors as in 36 are inserted into their respective slots as in using a special "punch down" tool (not shown) which simultaneously forces the conductor as in 36 between the bifurcated IDC, thereby interconnecting the conductive centre 40 of the insulated conductor 30 with the IDC as in 20, 22, while cutting the end of the conductor 36 (typically flush with the outer edge of the turret in question).
Referring to Figure 4, note that although the first set of turrets 14 and the second set of turrets as in 16 in the above illustrative embodiment are each shown as being arranged in two (2) parallel rows of turrets, in a particular embodiment the first set of turrets 14 and the second set of turrets as in 16 could be arranged in a single row, alternatively also together with others, to
Each interconnector 18 is comprised of a pair of opposed elongate bifurcated Insulation Displacement Connectors (IDC) 24, 26 interconnected by an elongate connecting portion 28 at an angle to the fDCs as in 24, 26.
Illustratively, this angle between the IDCs 24, 26 and the elongate connecting portion 28 is shown as being perpendicular, but angles other than perpendicular may also be used in particular embodiments. As known in the art, the IDCs as in 24, 26 are each comprised of a pair of opposed insulation displacing blades as in 30. The interconnector 18 is illustratively stamped from a flat conducting material such as nickel plated steel, although in a particular embodiment the interconnector 18 could be formed in a number of ways, for example as an etched trace on a Printed Circuit Board (PCB) or the like.
Still referring to Figures 1, 2 and 3, the first set of turrets as in 14 and the second set of turrets as in 16 are each arranged in two parallel rows of turrets defining a cable end receiving region 32 there between for receiving a cable end 34. The insulated conductors as in 36 (typically arranged in twisted pairs of conductors) exit the cable end 34 and are received by conductor receiving slots 38 moulded in each of the turrets as in 14 or 16. As known in the art, the insulated conductors as in 36 are inserted into their respective slots as in using a special "punch down" tool (not shown) which simultaneously forces the conductor as in 36 between the bifurcated IDC, thereby interconnecting the conductive centre 40 of the insulated conductor 30 with the IDC as in 20, 22, while cutting the end of the conductor 36 (typically flush with the outer edge of the turret in question).
Referring to Figure 4, note that although the first set of turrets 14 and the second set of turrets as in 16 in the above illustrative embodiment are each shown as being arranged in two (2) parallel rows of turrets, in a particular embodiment the first set of turrets 14 and the second set of turrets as in 16 could be arranged in a single row, alternatively also together with others, to
-5-form the inline cross connector as illustrated in Figure 4. Additionally, systems other than IDCs could be used for interconnecting the insulated conductors as in 36 with their respective interconnectors as in 18.
Referring now to Figures 1 and 3, in a particular embodiment a wire lead guide as in 42, comprised of a plurality of conductor guiding channels as in moulded therein and adapted to fit snugly into the cable end receiving regions as in 32, can be interposed between the cable end 34 and the conductor receiving slots 38 moulded in each of the turrets as in 14 or 16.
Referring now to Figure 4 in addition to Figure 1, as discussed above the first set of turrets as in 14 and the second set of turrets as in 16 are each arranged in two parallel rows of turrets. As a result, four (4) interconnectors as in 18 are illustratively arranged on either side of the cable end receiving region 32 and divided into two (2) pairs of interconnectors 184, 188 and 185, 187 each terminating a respective conductor as in 36 (illustratively the interconnectors are indicated as terminating conductors 4, 8, 5 and 7 of the twisted pairs of conductors). The first pair of interconnectors 184, 188 lies in a first plain and the second pair of interconnectors 185, 187 lies in a second plain parallel to the first plain. Additionally, the direction of the elongate connecting portions 244, 248 of the interconnectors of the first pair of interconnectors 184, 188 is opposite to that of the elongate connecting portion 245, 247 of the second pair of interconnectors 185, 187.
Still Referring to Figure 4, although the interconnectors as in 18 are not electrically interconnected with one another, unravelling the ends of the conductors as in 32 in order to insert them into their IDC connectors as in 20, 22 gives rise to a parasitic coupling (illustrated by capacitive elements CP1 and CP2) between the conductors, with the effect being the greatest for those which are closest (illustratively conductors marked 4-7 and conductors marked 5-8). As known in the art, especially at high frequencies such coupling can have a large detrimental effect on a transmitted signal. In particular, in the
Referring now to Figures 1 and 3, in a particular embodiment a wire lead guide as in 42, comprised of a plurality of conductor guiding channels as in moulded therein and adapted to fit snugly into the cable end receiving regions as in 32, can be interposed between the cable end 34 and the conductor receiving slots 38 moulded in each of the turrets as in 14 or 16.
Referring now to Figure 4 in addition to Figure 1, as discussed above the first set of turrets as in 14 and the second set of turrets as in 16 are each arranged in two parallel rows of turrets. As a result, four (4) interconnectors as in 18 are illustratively arranged on either side of the cable end receiving region 32 and divided into two (2) pairs of interconnectors 184, 188 and 185, 187 each terminating a respective conductor as in 36 (illustratively the interconnectors are indicated as terminating conductors 4, 8, 5 and 7 of the twisted pairs of conductors). The first pair of interconnectors 184, 188 lies in a first plain and the second pair of interconnectors 185, 187 lies in a second plain parallel to the first plain. Additionally, the direction of the elongate connecting portions 244, 248 of the interconnectors of the first pair of interconnectors 184, 188 is opposite to that of the elongate connecting portion 245, 247 of the second pair of interconnectors 185, 187.
Still Referring to Figure 4, although the interconnectors as in 18 are not electrically interconnected with one another, unravelling the ends of the conductors as in 32 in order to insert them into their IDC connectors as in 20, 22 gives rise to a parasitic coupling (illustrated by capacitive elements CP1 and CP2) between the conductors, with the effect being the greatest for those which are closest (illustratively conductors marked 4-7 and conductors marked 5-8). As known in the art, especially at high frequencies such coupling can have a large detrimental effect on a transmitted signal. In particular, in the
-6-illustrated case differential signals travelling on the pair of conductors marked
7-8 give rise to differential signals on the pair of conductors marked 4-5 and vice versa. This effect is counteracted by the positioning of the interconnectors in the manner shown which gives rise to an inherent coupling (illustrated by the capacitive elements Cil and C12) between interconnectors as in 18 lying in the same plain. The inherent capacitances C,, and C12 effectively cancel the differential mode signals that would otherwise be induced in the pair of conductors marked 4-5 by the pair of conductors marked 7-8 and vice versa.
This effect is illustrated in the capacitive network as shown in Figure 5, where both components of the differential signal on the conductors marked 7-8 is coupled into each of the conductors marked 4-5, thereby effectively cancelling out the differential signal. In this manner, the inherent capacitors cancel crosstalk introduced into the conductors (not shown) terminated by the interconnectors by the necessary unravelling of the twisted pairs of conductors in order to insert their ends into the bifurcated interconnectors.
Referring now to Figure 6, in an alternative illustrative embodiment of the present invention, the cross connector 10 is comprised of a housing 12 manufactured in first and second interconnecting parts 20, 22. The first interconnecting part 20 further comprises a series of turrets as in 46 illustratively arranged at the corners of the outer surface 48 of the first interconnecting part 20. Similarly, the second interconnecting part 22 also comprises a series of turrets as in 50 illustratively arranged at the corners of the outer surface 52 of the second interconnecting part 22. The substantially flat interconnectors as in 18 are arranged in pairs such that adjacent interconnectors as in 18 have their flat sides at right angles to one another.
In other aspects, the alternative illustrative embodiment is similar to the first illustrative embodiment as described in detail hereinabove.
Referring now to Figure 7, as discussed above, the unravelling the twisted pairs such that they may be inserted between the blades as in 30 of the bifurcated Insulation Displacement Connectors (IDC) 24, 26 gives rise to a parasitic coupling between the conductors as in 36 which will introduce cross talk, illustrated by capacitive elements CP4_7, Cpa_$, Cp5_7 and Cp5_$ (again, illustratively the interconnectors as in 18 are indicated as terminating conductors 4, 8, 5 and 7 of the twisted pairs of conductors).
Referring now to Figure 8, an inherent capacitive coupling, illustrated by capacitive elements C14_7, C14_8, C15_7 and C15_8, is set up between the interconnectors as in 32. Provided distance Dc between the centres of adjacent interconnectors as in 18 is much greater than the distance DS
separating interconnectors terminating a particular pair of conductors (illustratively the distance D is about 10 times greater), these inherent capacitances are substantially equal and as a result form a capacitive network which combats crosstalk which would otherwise effect signals transmitted on the conductors due to the parasitic coupling.
Referring now to Figure 9, the cross connector 10 is illustratively modular and adapted for mounting, typically along with one or more like cross connectors as in 10, in a receptacle machined or otherwise formed in supporting frame 54, such as a patch bay panel or the like. In this regard, once the cross connectors as in 10 are mounted on the supporting frame, one set of turrets is exposed on each side of the supporting frame 54.
Although the present invention has been described hereinabove by way of an illustrative embodiment thereof, this embodiment can be modified at will without departing from the spirit and nature of the subject invention.
This effect is illustrated in the capacitive network as shown in Figure 5, where both components of the differential signal on the conductors marked 7-8 is coupled into each of the conductors marked 4-5, thereby effectively cancelling out the differential signal. In this manner, the inherent capacitors cancel crosstalk introduced into the conductors (not shown) terminated by the interconnectors by the necessary unravelling of the twisted pairs of conductors in order to insert their ends into the bifurcated interconnectors.
Referring now to Figure 6, in an alternative illustrative embodiment of the present invention, the cross connector 10 is comprised of a housing 12 manufactured in first and second interconnecting parts 20, 22. The first interconnecting part 20 further comprises a series of turrets as in 46 illustratively arranged at the corners of the outer surface 48 of the first interconnecting part 20. Similarly, the second interconnecting part 22 also comprises a series of turrets as in 50 illustratively arranged at the corners of the outer surface 52 of the second interconnecting part 22. The substantially flat interconnectors as in 18 are arranged in pairs such that adjacent interconnectors as in 18 have their flat sides at right angles to one another.
In other aspects, the alternative illustrative embodiment is similar to the first illustrative embodiment as described in detail hereinabove.
Referring now to Figure 7, as discussed above, the unravelling the twisted pairs such that they may be inserted between the blades as in 30 of the bifurcated Insulation Displacement Connectors (IDC) 24, 26 gives rise to a parasitic coupling between the conductors as in 36 which will introduce cross talk, illustrated by capacitive elements CP4_7, Cpa_$, Cp5_7 and Cp5_$ (again, illustratively the interconnectors as in 18 are indicated as terminating conductors 4, 8, 5 and 7 of the twisted pairs of conductors).
Referring now to Figure 8, an inherent capacitive coupling, illustrated by capacitive elements C14_7, C14_8, C15_7 and C15_8, is set up between the interconnectors as in 32. Provided distance Dc between the centres of adjacent interconnectors as in 18 is much greater than the distance DS
separating interconnectors terminating a particular pair of conductors (illustratively the distance D is about 10 times greater), these inherent capacitances are substantially equal and as a result form a capacitive network which combats crosstalk which would otherwise effect signals transmitted on the conductors due to the parasitic coupling.
Referring now to Figure 9, the cross connector 10 is illustratively modular and adapted for mounting, typically along with one or more like cross connectors as in 10, in a receptacle machined or otherwise formed in supporting frame 54, such as a patch bay panel or the like. In this regard, once the cross connectors as in 10 are mounted on the supporting frame, one set of turrets is exposed on each side of the supporting frame 54.
Although the present invention has been described hereinabove by way of an illustrative embodiment thereof, this embodiment can be modified at will without departing from the spirit and nature of the subject invention.
Claims
1. A balanced interconnector comprising:
first and second like interconnectors, each of said interconnectors comprising an elongate centre section and a pair of parallel IDCs opening in substantially opposite directions, said IDCs attached at an angle to and at opposite ends of said elongate centre sections, each of said interconnectors lying in different parallel plains;
wherein said first and second interconnectors are arranged such that said elongate centre sections are substantially opposite to one another and said IDCs of said first interconnector are not opposite said IDCs of said second interconnector.
first and second like interconnectors, each of said interconnectors comprising an elongate centre section and a pair of parallel IDCs opening in substantially opposite directions, said IDCs attached at an angle to and at opposite ends of said elongate centre sections, each of said interconnectors lying in different parallel plains;
wherein said first and second interconnectors are arranged such that said elongate centre sections are substantially opposite to one another and said IDCs of said first interconnector are not opposite said IDCs of said second interconnector.
Priority Applications (10)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002544929A CA2544929A1 (en) | 2006-04-25 | 2006-04-25 | Balanced interconnector |
| JP2009506877A JP5074483B2 (en) | 2006-04-25 | 2007-04-25 | Balanced reciprocal connector |
| US11/740,154 US7422467B2 (en) | 2004-11-17 | 2007-04-25 | Balanced interconnector |
| AU2007242021A AU2007242021A1 (en) | 2006-04-25 | 2007-04-25 | Balanced interconnector |
| MX2008013604A MX2008013604A (en) | 2006-04-25 | 2007-04-25 | Balanced interconnector. |
| EP07719620A EP2020059A4 (en) | 2006-04-25 | 2007-04-25 | Balanced interconnector |
| CA2648772A CA2648772C (en) | 2006-04-25 | 2007-04-25 | Balanced interconnector |
| PCT/CA2007/000694 WO2007121581A1 (en) | 2006-04-25 | 2007-04-25 | Balanced interconnector |
| US12/187,671 US7568938B2 (en) | 2004-11-17 | 2008-08-07 | Balanced interconnector |
| US12/500,083 US7614901B1 (en) | 2004-11-17 | 2009-07-09 | Balanced interconnector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002544929A CA2544929A1 (en) | 2006-04-25 | 2006-04-25 | Balanced interconnector |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2544929A1 true CA2544929A1 (en) | 2007-10-25 |
Family
ID=38621094
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA002544929A Abandoned CA2544929A1 (en) | 2004-11-17 | 2006-04-25 | Balanced interconnector |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA2544929A1 (en) |
-
2006
- 2006-04-25 CA CA002544929A patent/CA2544929A1/en not_active Abandoned
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FZDE | Discontinued |