JP2009519555A - Logical address file storage - Google Patents

Abstract

  Files that are mapped to logical address ranges by the host are logically fragmented before being sent to the memory system. The logically fragmented parts are then reassembled when stored in a block of the memory system. Prior to data transmission, the host provides the memory system with information about the file-to-logical mapping of the data. The memory selects a data storage position based on the file to which the data belongs.

Description

  This application relates to the operation of a reprogrammable non-volatile memory system such as a semiconductor flash memory, and more specifically to the management of data in such a memory. All patents, patent applications, articles, other publications, documents and matters referenced herein are hereby incorporated by reference in their entirety for all purposes.

  In early generation commercial flash memory systems, a rectangular array of memory cells was divided into a number of cell groups each storing a standard amount of disk drive sector data, ie 512 bytes. More usually, an additional amount, such as 16 bytes, to store an error correction code (ECC) and possibly other user data and / or other overhead data related to the memory cell group storing it. Data will be added to each group. The memory cells in each such group are the minimum number of memory cells that can be erased together. That is, the erase unit is effectively one data sector and the number of memory cells that store overhead data when overhead data is included. US Pat. Nos. 5,602,987 (Patent Document 1) and 6,426,893 (Patent Document 2) describe examples of this type of memory system. As a feature of flash memory, memory cells must be erased before data can be reprogrammed into them.

  Flash memory systems are often provided in the form of memory cards or flash drives that are detachably connected to various hosts, such as personal computers and cameras, but can also be embedded in such host systems. is there. When a host writes data to memory, it typically assigns a unique logical address to a sector, cluster, or other data unit within the contiguous virtual address space of the memory system. The host, like a disk operating system (DOS), writes data to and reads data from addresses in the logical address space of the memory system. The controller in the memory system translates the logical address received from the host into a physical address where the data in the memory array is actually stored, and grasps the history of the address translation. The data storage capacity of the memory system corresponds at least to the amount of data addressed over the entire logical address space set for the memory system.

  In subsequent generation flash memory systems, the size of the erase unit has been expanded to a memory cell block that can sufficiently store data of a plurality of sectors. Even if the host system, which is the connection destination of the memory system, programs and reads data in a small minimum unit such as a sector, a large number of sectors are stored in one erase unit of the flash memory. As the host updates or replaces data in logical sectors, several data sectors in the block are often used up. Since the entire block must be erased before it can be overwritten, the new or updated data is usually stored in a separate block that has been previously erased and has room for the data. The In this process, the used data remains in the original block and takes up valuable space in the memory. However, this block cannot be erased if valid data remains in it.

  Therefore, in order to effectively use the memory storage capacity, it is common to arrange or collect the data of the effective partial block by copying it to the erased block, and in this way, the block corresponding to the data copy source Can be deleted and the entire storage capacity can be reused. It is also desirable to copy the data in order to group the data sectors in the block in the order of their logical addresses, which increases the speed at which the data is read and the read data is transferred to the host. If such data copying is performed too frequently, the operating performance of the memory system may be degraded. This particularly affects the operation of the memory system when the storage capacity of the memory is not very different from the amount of data addressed by the host through the system's logical address space, that is often the case. In this case, the data needs to be organized or retrieved before the host programming command is executed. This will prolong the programming time.

  In order to increase the number of bits of data that can be stored in a given semiconductor area, the block size has increased through the generational changes in memory systems. Blocks that store more than 256 data sectors are becoming common. In addition, two, four, or more blocks of different arrays or subarrays are often logically linked together as metablocks to increase the degree of parallelism in programming and reading data. Such a large-capacity operation unit involves the problem of operating the memory system efficiently.

The conventional interface between a typical host and a memory system uses a logical addressing scheme for data sectors stored by the memory. However, host files are often logically fragmented when mapped to a logical address space and as a result are widely distributed within the memory array. In this case, the blocks in the memory array contain a large number of file parts, and valid data and used data are often mixed there, making management of the memory array more difficult. In order to reclaim the space occupied by used data, it is sometimes necessary to copy a large amount of valid data.
US Pat. No. 5,602,987 US Pat. No. 6,426,893 US patent application Ser. No. 10 / 915,039 US Pat. No. 5,570,315 US Pat. No. 5,774,397 US Pat. No. 6,046,935 US Pat. No. 6,373,746 US Pat. No. 6,456,528 US Pat. No. 6,522,580 US Pat. No. 6,771,536 US Pat. No. 6,781,877 US Published Patent Application No. 2003/0147278 US Published Patent Application No. 2003/0109093 US Pat. No. 6,763,424 US patent application Ser. No. 10 / 749,831 US patent application Ser. No. 10 / 750,155 US patent application Ser. No. 10 / 917,888 US patent application Ser. No. 10 / 917,867 US patent application Ser. No. 10 / 917,889 US patent application Ser. No. 10 / 917,725 US patent application Ser. No. 10 / 749,189 US patent application Ser. No. 10 / 841,118 US patent application Ser. No. 11 / 016,271 US patent application Ser. No. 10 / 897,049 US Patent Application No. 11 / 022,369 US Patent Application No. 11 / 060,174 US Patent Application No. 11 / 060,248 US patent application Ser. No. 11 / 060,249 Provisional US Patent Application No. 60 / 705,388 US patent application Ser. No. 11 / 196,869 US Patent Application No. 11 / 259,423

  A memory system according to an embodiment of the present invention receives data from a host using a logical address scheme. The host first maps the host file to the logical address space. The host then provides a signal to the memory system indicating which file is assigned a particular host data sector. Thereafter, the memory system that has received the host data sector determines the storage location of the host data sector based on the allocation information received in advance. Specifically, the memory system stores the same host file sector in the same metablock of the memory array. Thus, a file may occupy multiple metablocks. In addition, the host signals that the end of the host file has been transmitted, and in response to this, the memory system can perform an operation for closing the file and increasing the storage efficiency of the file.

  Since the notification method in which the host notifies the allocation of the data sector to the memory system uses the directory sector and the FAT sector, the signal of this notification method is compatible with the conventional logical interface. Specifically, the beginning of a new file is identified by a directory sector that points to the first cluster of the file. The sectors of that cluster are then transmitted and stored in the new metablock. A cluster that is logically contiguous to the previous received cluster can be assumed to be of the same file as the previous cluster. When the host sends a new cluster that is not in the same file as the previous cluster, it will indicate the change. If the new cluster is for a new host file (the sector of this file has never been sent, so there is no free metablock for the file), the host will change the directory sector to indicate the beginning of the new file. Send. If the new cluster is for an open file (the sector of this file has been sent so far and is stored in one or more metablocks for the file), the host Send a FAT sector containing a FAT entry and a pointer to the new cluster. In addition to transmitting a signal that conveys file allocation information, the host can transmit a FAT sector that indicates the end of the file. Such a FAT sector contains an entry for the last cluster of the file and indicates the end of the file. Unlike conventional schemes that store FAT and directory information in non-volatile memory, this scheme transmits allocation information before transmitting the host data it refers to. Most conventional systems do not use allocation information transmitted from the host as FAT sectors and directory sectors in the memory system.

  The memory system can use the file allocation information provided by the host to keep the data associated with a particular host file. Although the host file may be logically fragmented when mapped to a logical address range by the host, the memory system can store the data of the file in a dedicated block based on the information regarding this mapping. In this case, the new block is released when the host indicates the beginning of the new file. Thereafter, the data indicated as that block is stored in the same metablock. If necessary, free further metablocks for the file. Eventually the host will indicate the end of the file, or the memory system will close the file for some other reason. At this point, if there is a metablock that is only partially filled with host file data, the remaining data can be merged with similar remaining data in other files in a common block. Since most of the files are in a dedicated metablock, if the host subsequently deletes the file (directed by a directory sector, or otherwise), the space occupied by the file can be saved with only a small copy of valid data. It can be recovered easily. In addition, the host can inform the memory system that power will soon be stopped by a notification method, so the memory system can prepare for a power outage (eg, store data in volatile memory in non-volatile memory) To do). In addition, since the host can notify the memory system that power is maintained, the memory system can perform a housekeeping operation such as a reproduction operation.

Overview of Flash Memory A typical flash memory system and typical operation with a host device will be described with reference to FIGS. Various aspects of the invention can be implemented in such a system. The host system 1 in FIG. 1 stores data in the flash memory 2 and extracts data from the flash memory 2. The flash memory can be embedded in the host, but the memory 2 is shown in the form of a more general card, which is detachable through mating parts 3 and 4 of mechanical and electrical connectors. Connected to the host. For example, various flash memory cards such as compact flash (CF), multimedia card (MMC), secure digital (SD), mini SD, memory stick, smart media, and trans flash card are currently available on the market. Although each of these cards has a unique mechanical and / or electrical interface according to their respective standardized specifications, the flash memory system built into each is very similar. All of these cards are available from SanDisk Corporation, the assignee of the present application. SanDisk Corporation also provides a series of flash drives under its Cruiser trademark, which are connected to the host by plugging into the host's universal serial bus (USB) port. A small handheld memory system with a USB plug to connect to. Each of these memory cards and flash drives incorporates a controller that controls the operation of the built-in flash memory in cooperation with the host.

  There are many host systems that use such memory cards and flash drives. This includes personal computers (PCs), portable computers such as laptops, mobile phones, personal digital assistants (PDAs), digital still image cameras, digital video cameras, and portable audio players. Hosts usually have an integrated socket for one or more types of memory cards or flash drives, but some require an adapter to plug in a memory card.

  As long as the memory 2 is considered, the host system 1 of FIG. 1 can be regarded as having two main parts consisting of a combination of a circuit and software. They are an application unit 5 and a driver unit 6 linked to the memory 2. For example, in the case of a personal computer, the application unit 5 may include a processor that executes word processing, graphics, control, and other general application software. In the case of a camera, mobile phone, or other host system that performs a single set of functions, the application unit 5 may be software that operates the camera for taking and storing pictures, and making and receiving calls. Software for operating a mobile phone to perform the operation.

  The memory system 2 of FIG. 1 includes a flash memory 7 and a circuit 8, all of which are linked to a host that is a connection destination of a card in order to exchange data and to control the memory 7. The controller 8 typically translates between the logical address of the data used by the host 1 and the physical address of the memory 7 during data programming and reading.

  Referring to FIG. 2, a circuit of a typical flash memory system that can be used as the nonvolatile memory 2 of FIG. 1 is described. The system controller is typically implemented on a single integrated circuit chip 11 connected in parallel with one or more integrated circuit memory chips along the system bus 13, and only one such memory chip 15 is shown in FIG. Has been. The particular bus 13 shown in the figure includes a separate set of conductors 17 that carry data, a set 19 for memory addresses, and a set 21 for control and status signals. Alternatively, one set of conductors can be shared in time division among these three functions. Further, a ring bus described in US Patent Application No. 10 / 915,039 (Patent Document 3) entitled “Ring Bus Structure and Its Use in Flash Memory Systems” filed on August 9, 2004, and the like. A different system bus configuration can be used.

  A typical controller chip 11 has its own internal bus 23 that interfaces with the system bus 13 through an interface circuit 25. The main functions normally connected to this bus include a processor 27 (microprocessor or microcontroller), a read only memory (ROM) 29 that contains code for initializing ("booting") the system, and mainly Random access memory (RAM) 31 used to buffer data transferred between the memory and the host, and an error correction code (ECC) for data going back and forth between the memory and the host through the controller And a circuit 33 for inspecting. The controller bus 23 communicates with the host system through a circuit 35, which is accomplished through the card's external contacts 37 which form part of the connector 4 in the case of the system of FIG. The clock 39 is connected to each of the other components of the controller 11 and is used by each of the other components.

  Memory chip 15 and other memory chips connected to system bus 13 typically contain a memory cell array organized into a plurality of subarrays or planes, and two such planes 41 and 43 are shown for simplicity. However, more such, for example, 4 or 8 such planes could be used instead. Alternatively, the memory cell array of the chip 15 may not be divided into planes. However, if divided, each plane has its own column control circuits 45 and 47 that can operate independently of each other. The circuits 45 and 47 receive the addresses of the respective memory cell arrays from the address section 19 of the system bus 13 and decode them to address one or more specific bit lines of the respective bit lines 49 and 51. To do. The word line 53 is addressed through the row control circuit 55 according to the address received by the address bus 19. Source voltage control circuits 57 and 59 are also connected to the respective planes, as are p-well voltage control circuits 61 and 63. If memory chip 15 has only one memory cell array and more than one such chip is present in the system, the array of each chip should be operated in the same way as a plane or sub-array within a multi-plane chip as described above. Can do.

  Data enters and exits the planes 41 and 43 through the respective data input / output circuits 65 and 67 connected to the data section 17 of the system bus 13. Circuits 65 and 67 are for programming data into and reading data from the memory cells of each plane through lines 69 and 71 that connect to the plane through respective column control circuits 45 and 47.

  The controller 11 controls the operation of the memory chip 15 for programming, reading, erasing data, and responding to various housekeeping operations. Each memory chip also has such a function. In order to carry out the above, some control circuit for executing a command from the controller 11 is accommodated. The interface circuit 73 is connected to the control / status unit 21 of the system bus 13. Commands from the controller are provided to state machine 75, which provides specific control of other circuits to execute these commands. Control lines 77-81 connect the state machine 75 to the other circuits shown in FIG. The state information from the state machine 75 is transmitted along the line 83 to the interface 73 for transmission to the controller 11 along the bus unit 21.

  Currently, the NAND architecture of memory cell arrays 41 and 43 is preferred, but other architectures such as NOR can be used instead. An example of a NAND flash memory and its operation as part of a memory system are described in U.S. Pat. Nos. 5,570,315, 5,774,397, and 6,046. No. 935 (Patent Literature 6), No. 6,373,746 (Patent Literature 7), No. 6,456,528 (Patent Literature 8), No. 6,522,580 (Patent Literature 9), No. 6, No. 771,536 (Patent Document 10) and 6,781,877 (Patent Document 11) and US Published Patent Application No. 2003/0147278 (Patent Document 12).

  An example of a NAND array is shown in the circuit diagram of FIG. 3 corresponding to a part of the memory cell array 41 of the memory system of FIG. A number of global bit lines are provided, but only four such lines 91-94 are shown in FIG. 2 for simplicity of illustration. Several memory cell strings 97 to 104 connected in series are connected between one of these bit lines and the reference potential. The memory cell string 99 is used as a representative, and a plurality of charge storage memory cells 107 to 110 are connected in series to the select transistors 111 and 112 at both ends of the string. When one string of select transistors is energized, the string is connected between its bit line and a reference potential. Then, one memory cell in the string is programmed or read at a time.

  The word lines 115-118 of FIG. 3 extend individually across the charge storage elements of one memory cell in each of a number of memory cell strings, and gates 119 and 120 indicate the state of the select transistor at each end of the string. Control. Memory cell strings sharing a common word and control gate lines 115-120 form a block 123 of memory cells that are erased together. This block of cells contains the minimum number of cells that can be physically erased at one time. One row of memory cells along one word line of word lines 115 to 118 is programmed at a time. Normally, the rows of the NAND array are programmed in a defined order, starting with the row along the word line 118 closest to the end of the string connected to a common potential such as ground. The memory cell row along word line 117 is then programmed and proceeds similarly throughout block 123. Finally, the row along word line 115 is programmed.

  The second block 125 is similar and its memory cell string connects to the same global bit line as the string of the first block 123, but has a different set of words and control gate lines. The word and control gate lines are driven to an appropriate operating voltage by the row control circuit 55. If more than one plane or sub-array is present in the system, such as planes 1 and 2 in FIG. 2, a common word line extending between them is used in one memory architecture. Alternatively, there may be more than two planes or subarrays sharing a common word line. In another memory architecture, individual planes or sub-array word lines are driven separately.

  Operating the memory system to store more than two detectable charge levels in each charge storage element or region, as described in some of the previously referenced NAND patents and published patent applications. In this way, data of 2 bits or more is stored in each. The charge storage element of the memory cell is generally a conductive floating gate, but may be a non-conductive dielectric charge trapping material described in US Published Patent Application No. 2003/0109093.

  FIG. 4 conceptually illustrates the organization of the flash memory cell array 7 (FIG. 1) used as an example in the further description below. There may be four planes or subarrays 131-134 of memory cells on one integrated memory cell chip, two chips (two of the planes on each chip), or four separate chips. The specific arrangement is not important for the following discussion. Of course, there can be other numbers of planes in the system, such as 1, 2, 8, 16 or more. The planes are individually divided into memory cell blocks indicated by rectangles in FIG. 4, such as blocks 137, 138, 139, and 140 located in planes 131 to 134, respectively. Each plane can have dozens or hundreds of blocks. As described above, a block of memory cells is an erasing unit, that is, the minimum number of memory cells that can be physically erased together. However, in order to increase parallelism, the block is operated in units of larger metablocks. One block from each plane is logically linked together to form a metablock. A state in which one metablock 141 is formed by four blocks 137 to 140 is shown. Normally, all cells in one metablock are erased together. As seen in the second metablock 143 consisting of blocks 145-148, the blocks used to form the metablock need not be constrained to the same relative position within each plane. It is usually preferable to extend metablocks across all planes, but for high system performance, dynamically metablocks consisting of one, two, or three blocks in different planes The ability to form can be used to operate the memory system. This makes it possible to make the metablock size closer to the amount of data that can be stored in one programming operation.

  The individual blocks are further divided into pages of memory cells for operational purposes as shown in FIG. For example, each memory cell of the blocks 131 to 134 is divided into eight pages P0 to P7. Alternatively, there can be 16, 32, or more pages of memory cells in each block. A page is a unit in which data is programmed and read in a block, and contains a minimum amount of data programmed at one time. In the NAND architecture of FIG. 3, a page is formed from memory cells along a word line in a block. However, such pages in more than one block can be logically linked to metapages to increase the operational parallelism of the memory system. FIG. 5 shows a metapage 151 formed from one physical page in each of the four blocks 131 to 134. The metapage 151 includes, for example, a page P2 in each of the four blocks, but the metapage page does not necessarily occupy the same relative position in each block. It is desirable to program and read the maximum amount of data across all four planes in parallel, but for high system performance, either one, two, or three pages of separate blocks in different planes Alternatively, the memory system can be operated to form a metapage from everything. As a result, the programming and reading operations can be adapted to the amount of data that can be easily handled in parallel, and the chance that the portion where the data is not programmed remains in the metapage is reduced.

  A metapage formed from physical pages of a plurality of planes shown in FIG. 5 accommodates memory cells along word line rows of the plurality of planes. Rather than programming all the cells in a word line row at the same time, it is more common to program them alternately in two or more staggered groups, where each group contains 1 (in a single block) Stores page data or one metapage data (across multiple blocks). By programming alternating memory cells at once, there is no need to provide a single peripheral circuit for each bit line, including data registers and sense amplifiers, rather they are time shared by adjacent bit lines. . As a result, the amount of substrate space required for the peripheral circuit can be saved, and the mounting density along the row of memory cells can be increased. Otherwise, it is desirable to program all cells along a row simultaneously in order to derive maximum parallelism from a given memory system.

  Referring to FIG. 3, for the most convenient simultaneous programming of data into alternating memory cells along a row, two rows of select transistors (not shown) are shown in the figure along at least one end of the NAND string. Instead of one line. In this case, the select transistors in one row connect the staggered strings in the block to the respective bit lines in response to one control signal, and the select transistors in the other row intervene in response to another control signal. Connect alternate strings to each bit line. Accordingly, two pages of data are written in each row of memory cells.

  The data amount of each logical page is usually an integer number of data of one sector or more, and each sector conventionally stores 512 bytes of data. FIG. 6 shows a logical data page composed of two sectors 153 and 155 of one page or metapage data. Each sector typically has a portion 157 of 512 bytes of user or system data stored and an additional number of bytes 159 for overhead data relating to either the data in the portion 157 or the physical page or block storing it. To accommodate. The number of bytes of overhead data is normally 16 bytes, for a total of 528 bytes for each of sectors 153 and 155. The overhead portion 159 includes the ECC calculated from the data portion 157 during programming, its logical address, the experience count of the number of times the block has been erased and reprogrammed, one or more control flags, the operating voltage level, and / or the like. In addition, ECC calculated from such overhead data 159 can be accommodated. Alternatively, overhead data 159 or a portion thereof can be stored on another page in another block.

  As the memory parallelism increases, the data storage capacity of the metablock increases and, as a result, the size of the data page and metapage also increases. Thus, a data page may contain data of more than 3 sectors. There are two sectors in one data page, and two data pages for each metapage, so there are four sectors in one metapage. Therefore, each metapage stores 2,048 bytes of data. This is a high degree of parallelism and can be further increased as the number of memory cells in a row increases. For this reason, in order to increase the amount of data in the page and metapage, the width of the flash memory is expanding. Many of the examples described in this application use metablocks and metapages as the units for erasure and programming, respectively, but most of the techniques described also apply when blocks and pages are units for erasure and programming. Equally true. Similarly, techniques applied to memory systems that use blocks and pages can generally be applied to metablocks and metapages.

  The previously identified physically small reprogrammable non-volatile memory cards and flash drives are commercially available, with data storage capacity of 512 megabytes (MB), 1 gigabyte (GB), 2 GB, 4 GB or more. FIG. 7 shows the most common interface between a host and such a mass memory system. The host processes data files generated or used by application software or firmware programs executed by the host. A word processor data file is an example, and a computer aided design (CAD) software drawing file corresponds to this, and is mainly found in general computer hosts such as PCs and laptop computers. A document in the pdf format is such a file. The still picture digital video camera generates a data file for each photo, and the data file is stored in a memory card. A cellular phone uses data from a file on a built-in memory card such as a telephone directory. The PDA stores and uses several types of files such as address files and calendar files. In such applications, the memory card may contain software that operates the host.

  Memory systems, particularly those embedded in removable cards, can communicate with various hosts through standard interfaces. The interface used by the host to communicate with the memory system may vary from host to host. There are two types of interfaces: those using a logical addressing system having a common logical address space, and those using a file-oriented addressing system.

Logical Addressing FIG. 7 shows a general logical interface between a host and a memory system. The contiguous logical address space 161 is large enough to provide an address for all data stored in the memory system. The host address space is usually divided into data cluster units. In a given host system, each cluster can be designed to accommodate several sectors of data, typically around 4 to 64 sectors. A standard sector contains 512 bytes of data and some overhead data.

  In the example of FIG. 7, three data files 1, 2, and 3 are shown as created. An application program running on the host system creates each file as an ordered set of data and identifies it by a unique name or other reference. File 1 is assigned by the host a fully usable logical address space that has not yet been allocated to other files. File 1 is shown with a series of available logical address ranges assigned. Besides this, address ranges are usually allocated for specific purposes, such as specific ranges for the host operating software, and they are still available when the host assigns logical addresses to the data. Even if not, it is avoided when storing data.

  The host similarly assigns two different adjacent address ranges in the logical address space 161 as shown in FIG. 7 when file 2 is created later by the host. Adjacent logical addresses need not be assigned to files, but may be fragments of addresses that are between address ranges already assigned to other files. This example further shows that another file 3 created by the host is allocated another portion of the host address space that has not yet been allocated to files 1 and 2 and other data. In this example, file 1, file 2, and file 3 are all assigned to a part of a common logical address space (logical address space 161).

  The host keeps track of the memory logical address space by maintaining file allocation tables (FAT) and directories, and the logical addresses that the host assigns to various host files are maintained. Directories and FATs are usually stored in non-volatile memory in addition to host memory and are frequently updated by the host when new files are stored, other files are deleted, files are modified, etc. The Reveals that the host can release the logical address assigned to the deleted file, for example by updating the directory and FAT table when the host file is deleted, and use those logical addresses for another data file To do. In some cases, only the directory is updated when the file is deleted, and the FAT entry of the used data cluster persists. A logical address used in FAT is sometimes referred to as a logical block address (LBA), and an interface that uses such logical addressing across a logical address space commonly used for data in different files is sometimes referred to as an LBA interface. .

  The host does not care about the physical location that the memory system controller chooses to store the file. A typical host recognizes only its logical address space and the logical addresses it has assigned to its various files. On the other hand, the memory system recognizes only the portion of the logical address space where data is written, through a typical host / card interface, not the logical address allocated to a particular host file, and not even the number of host files. . The memory system controller converts a logical address provided from the host for storing and retrieving data into a unique physical address in the flash memory cell array in which the host data is stored. Block 163 represents these logical-to-physical address translation work tables maintained by the memory system controller.

  The memory system controller is programmed to store data files in blocks and metablocks of the memory array 165 while maintaining high system performance. In this illustration, four planes or subarrays are used. The data is preferably programmed and read across the entire metablock formed from the blocks in each plane with the maximum degree of parallelism allowed by the system. Normally, at least one metablock 167 is allocated as a reserved block for storing operating firmware and data used by the memory controller. Another metablock 169 or multiple metablocks can be allocated for storage of host operating software, host FAT table, and the like. Most of the physical storage space remains for storing data files. However, the memory controller normally does not recognize how the received data is allocated by the host in the various file objects. Normally, all the memory controller recognizes through interaction with the host is that the data written by the host to a specific logical address is stored at the corresponding physical address, which is the logical-physical address of the controller Maintained by table 163.

  In a typical memory system, an extra storage capacity for several blocks is prepared separately from the need to store the amount of data in the address space 161. One or more of these extra blocks can be prepared as redundant blocks to be substituted when other blocks fail during the lifetime of the memory. The logical grouping of blocks contained in individual metablocks typically changes for various reasons, such as substituting redundant blocks for defective blocks that were originally assigned to metablocks. An erased block pool typically maintains one or more additional blocks, such as metablock 171. When the host writes data to the memory system, the controller translates the logical address assigned by the host into a physical address in a metablock in the erased block pool. Next, other metablocks not used for data storage in the logical address space 161 are erased and designated as erased pool blocks for use in subsequent data write operations.

  Data stored at a specific host logical address is frequently overwritten with new data when the original stored data is used up. In response, the memory system controller writes new data to the erased block and modifies the logical-physical address table for those logical addresses to reveal the new physical block that stores the data at the logical address. The blocks containing the original data at those logical addresses are then erased and made available for storing new data. Typically, if the erased block of the erase block pool does not have enough storage capacity when writing begins, this erasure often must occur before the most recent data write operation is completed. This can compromise the data programming speed of the system. A memory controller typically knows that data at a given logical address is obsolete only when the host writes new data to that same logical address. Thus, many blocks of memory may store such invalid data for some time.

  The sizes of blocks and metablocks for efficiently using the area of the integrated circuit memory chip are increasing. As a result, the amount of data stored in most of the individual data writing is less than the storage capacity of the metablock, and in many cases, not even the storage capacity of the block. Since the memory system controller typically directs new data to the metablock of the erased pool, some parts of the metablock are not filled. If the new data is an update of data stored in another metablock, the remaining valid data metapage in the other metablock with a logical address adjacent to the logical address of the new data metapage is also desirable. Are copied to the new metablock in logical address order. Old metablocks may hold other valid data metapages. As a result, some metapage data of the individual metablock will eventually be used or invalidated, replaced with new data having the same logical address, and written to another metablock.

  In order to maintain sufficient physical memory space for data storage throughout the logical address space 161, such data is periodically compressed or organized (garbage collection). It is also desirable to keep the data sectors in the metablock in the same order as the logical addresses as much as possible because this allows more efficient reading of data at successive logical addresses. Thus, data compression and garbage collection are usually performed for this additional purpose. US Pat. No. 6,763,424 describes several aspects of memory management and metablock usage when receiving partial block data updates.

  Data compression typically reads all valid data metapages from a metablock, writes them to a new metablock, and ignores metapages that contain invalid data in the process. Also, metapages containing valid data are preferably arranged in a physical address order that matches the logical address order of the data stored therein. Since metapages containing invalid data are not copied to the new metablock, the number of metapages in the new metablock is less than the number of metapages in the old metablock. The old block is then erased and can be used to store new data. The additional metapage capacity obtained by this arrangement can be used to store other data.

  During garbage collection, a metapage of valid data that is adjacent or nearly adjacent to a logical address is retrieved from two or more metablocks and rewritten to another metablock, usually an erased block pool metablock. Once all valid data metapages have been copied from the original two or more metablocks, they can be deleted for future use.

  Data organization and garbage collection are time consuming and affect the performance of the memory system, especially if data organization or garbage collection must be done before executing a command from the host. Memory system controllers typically schedule such operations in the background as much as possible, but because of the need to perform these operations, the controller hosts a busy status indicator until such operations are complete. Must be provided to. As an example of postponing the execution of a host command, if there are not enough erased metablocks in the erased block pool to store all of the data that the host is trying to write to memory, then one or more of the data is organized or garbage collected first Valid data metablocks need to be cleaned up, and then those metablocks can be erased. In the past, attention has been paid to managing memory controls to minimize such confusion. Such a technique is disclosed in US Patent Application No. 10 / 749,831, “Management of Non-Volatile Memory Systems Having Large Erase Blocks” filed on Dec. 30, 2003 (Patent Document 15), Dec. 2003. US Patent Application No. 10 / 750,155 (Patent Document 16) entitled “Non-Volatile Memory and Method with Block Management System” filed on 30th, “Non-Volatile Memory” filed on 13th August 2004 and Method with Memory Planes Alignment ", U.S. Patent Application No. 10 / 917,888 (Patent Document 17), U.S. Patent Application No. 10 / 917,867, filed Aug. 13, 2004 (Patent Document 18), US patent application Ser. No. 10 / 917,889 entitled “Non-Volatile Memory and Method with Phased Program Failure Handling” filed on August 13, 2004; Many of these are described in US Patent Application No. 10 / 917,725 (Patent Document 20) entitled “Non-Volatile Memory and Method with Control Data Management” filed on August 13, 2004.

  One challenge in efficiently controlling the operation of a memory array with very large erase blocks is to match the number of data sectors stored during a given write operation to the capacity of the block of memory. , To match that boundary. In one approach, the metablocks used to store new data from the host are appropriately configured with less than the maximum number of blocks so that a certain amount of data that does not fill the entire metablock needs to be stored. The use of adaptive metablocks is described in US patent application Ser. No. 10 / 749,189 entitled “Adaptive Metablocks” filed Dec. 30, 2003. The alignment of boundaries between data blocks and physical boundaries between metablocks is described in US patent application Ser. No. 10 / 841,118 filed May 7, 2004, and December 16, 2004. Is described in U.S. Patent Application No. 11 / 016,271 (Patent Document 23) entitled “Data Run Programming”.

  In addition, the memory controller can use the data of the FAT table stored in the nonvolatile memory by the host to operate the memory system more efficiently. For example, it is useful for knowing that data has been identified as being used by the host by releasing the logical address. By knowing in advance that the host normally knows from writing new data to its logical address, the memory controller can schedule the erasure of blocks containing such invalid data. This is described in US patent application Ser. No. 10 / 897,049 entitled “Method and Apparatus for Maintaining Data on Non-Volatile Memory Systems” filed on July 21, 2004. Another approach is to monitor the host pattern where the host writes new data to the memory to determine whether a given write operation is a single file or, if there are multiple files, the boundary between files. Estimate where it is. US patent application Ser. No. 11 / 022,369 entitled “FAT Analysis for Optimized Sequential Cluster Management” filed on Dec. 23, 2004 describes the use of this type of technique.

  In order to operate the memory system efficiently, it is desirable that the controller know as much as possible about the logical addresses assigned to the data of individual files by the host. However, as described above, if the host / memory interface includes the logical address space 161 (FIG. 7), it is difficult for the memory controller to know much about the host data file structure.

An alternative interface between the host-memory system for file-oriented addressing mass data storage eliminates the use of logical address space. Alternatively, the host logically addresses each file with a unique file ID (or other unique reference) and an offset address of a data unit (such as bytes) within the file. This file address is provided directly to the memory system controller, which keeps a unique table for the location where each host file's data is physically stored. This new interface can be implemented in the same memory system as described above with respect to FIGS. The main difference from that described in FIGS. 2-6 is that the memory system communicates with the host system.

  FIG. 8 shows the file-oriented interface, which should be compared with the logical address interface of FIG. The identification of each of the files 1, 2, and 3 and the offset of the data in the file of FIG. 8 is passed directly to the memory controller. This logical address information is then translated by the memory controller function 173 into physical addresses of metablocks and metapages in the memory 165.

  Since the memory system knows the location of the data making up each file, these data can be erased immediately after the host deletes the file. This is usually not the case with typical logical address interfaces. Furthermore, by identifying host data by file objects instead of using logical addresses, the memory system controller can store data in a manner that reduces the need for frequent data organization and recovery. Therefore, the frequency of data copy operations and the amount of data copied are greatly reduced, thereby improving the data programming and reading performance of the memory system.

  An example of a file-oriented interface is one that uses direct data file storage. US patent application Ser. No. 11 / 060,174, filed on Feb. 16, 2005, solely by Alan W. Sinclair, or by Peter J. Smith in conjunction with him. No. 11 / 060,248 (Patent Document 27) and 11 / 060,249 (Patent Document 28) and a temporary file called “Direct Data File Storage in Flash Memories” filed by Alan W. Sinclair and Barry Wright. US Patent Application No. 60 / 705,388 (patent document 29) (hereinafter collectively referred to as "direct data file storage application") describes a direct data file storage memory system.

  The direct data file interface of these direct data file storage applications shown in FIG. 8 is simpler than the previously described logical address space interface shown in FIG. 7, and direct data file storage is used to increase the performance of the memory system. Is preferred for many applications. However, at present, the host system is mainly configured to operate with a logical address space interface, so a memory system with a direct data file interface is not suitable for most hosts. Accordingly, it is desirable to provide a memory system that can operate with either interface.

Logical - virtual file mapping was filed on August 3, 2005, "Interfacing systems operating through a logical address space and on a direct data file basis " that the US patent application Ser. No. 11 / 196,869 (Patent Document 30), A system is described that allows a memory system to interface with a host using either a logical address type interface or a file based interface. FIG. 9 shows such a system. In this example, the host operation of FIG. 7 is combined with the file-oriented memory operation of FIG. 8, and an address conversion 172 is added to the memory system. Address translation 172 maps groups of logical addresses that span memory space 161 to individual logical files aj that span modified address space 161 '. Preferably the entire logical address space 161 is divided into these logical files, thus the number of logical files depends on the logical address space and the size of the individual logical files. Each logical file contains data of a group of consecutive logical addresses that span the space 161. The amount of data in each logical file is preferably the same, and the amount is equal to the data storage capacity of one metablock in memory 165. While unequal sizes of logical files and / or sizes different from the storage capacity of blocks of memory or metablocks are certainly possible, they are not preferred.

  The data in each file aj is represented by a logical offset address within the file. The file identifier and data offset of the logical file are converted to physical addresses in the memory 165 at 173. Logical files aj are stored directly in memory 165 by the same process and protocol described in the direct data file storage application. The process is the same as the process of storing the data files 1 to 3 in FIG. 9 in the memory 165, but the amount of data in each logical file is known. If they are equal, the process is simpler. FIG. 9 shows how each of logical files aj is mapped to one of the different metablocks in memory 165. It is also desirable for file-oriented data storage to interact with the host in the same or equivalent manner as the current logical address memory system that is the host's original counterpart. By mapping individual logical files to corresponding individual memory metablocks, substantially the same performance and timing characteristics are achieved with a direct data file interface memory system as when using a logical address space interface.

  A data file interface can also be added directly to the data file based backend storage system of FIG. 9 designed to work with a host through a conventional logical address space interface. Both the host data file from the file interface and the logical file converted by the logical interface are translated into memory metablock addresses. The data is then stored at those memory addresses by directly executing the data file protocol. This protocol incorporates the direct data file storage technique of the aforementioned direct data file storage application.

Logical Address File Storage As previously mentioned, there is an advantage in maintaining data as files stored in adjacent memory array areas and managed in a file-oriented manner in a memory system. However, many hosts provide data to the memory system in the form of data sectors with logical addresses. In such a system, the host file may be logically fragmented, resulting in one host file occupying multiple logical address ranges and intervening logical address ranges occupied by other data. By mapping the logical address space to the virtual file in a predetermined way, the logically addressed data can be processed by the file-oriented back end, but the virtual file only retains the logically fragmented pattern of the logical address space. A metablock containing one virtual file will contain data from multiple host files. For memory systems, it receives logically addressed data from the host and stores it in a way that puts data from one host file into one or more blocks that do not contain many or other file data. It is desirable to do. In this way, some of the advantages of file-oriented storage can be realized even if the host sends data in the form of sectors with logical addresses in a common logical address space for all files.

  In one embodiment, the host sends information about the data sector to the memory system prior to sending the data sector. This information can be useful when the memory system stores the sector along with other sectors of the same file. Thus, sectors of the same file can be grouped into specific blocks that store only that file (although some blocks store data from multiple files). The information transmitted by the host may take the form of a FAT sector and a directory sector that provide allocation information for the sector to be transmitted. This is the reverse of the normal order in which the host sends the allocation information in the form of FAT sectors and directory sectors after sending the data sectors. In addition, the memory system of the conventional system usually does not modify the operation based on the contents of the FAT sector and the directory sector.

  One object of the logical address type file storage system is to receive logically fragmented data from the host and store the file in a physical arrangement in which the degree of fragmentation is lower than the logical arrangement. Thus, files that are mapped to two or more non-adjacent locations in the logical address space (there are other logical addresses between the two locations) are stored adjacent in the physical memory array. Storing files so that they are physically adjacent means that all the data of one file can fit in one block, or if the file data exceeds the capacity of one block, the data of that file This means that one or more blocks are exclusively occupied, and there is only one block that accommodates data of the file and data other than the file. The block for storing the data of the file may not be in a specific arrangement. Thus, “adjacent” in this context does not mean that the blocks containing the files are clustered, but refers to the arrangement of data within individual blocks.

  FIG. 10 illustrates a logical address type file storage scheme according to an embodiment of the present invention. File 1, file 2, and file 3 are sent by the host for storage in memory array 180. File-to-logical address conversion 160 is performed by the host in the same manner as shown in FIG. 7 so that files 1, 2, and 3 are mapped to a common logical address space 161. This mapping may cause the file to be logically fragmented as seen in data file 2, which occupies two parts of logical address space 161, and the two parts are occupied by data in file 2. Not separated by a middle part. The data file 3 is similarly divided into two parts. Depending on the memory system, the file may be further fragmented and the file may occupy many separate logical address space portions. The file-logical address conversion information 182 is generated when the data files 1, 2, and 3 are mapped to the logical address space by the file-logical address conversion 160. The file-logical address conversion information 182 is transferred to the memory. However, unlike many conventional systems, the file-to-logical conversion information 182 in this case is sent to memory prior to the data it refers to. Thus, information reflecting the mapping of file 2 to two different logical address ranges in logical address space 161 is transmitted to memory before data sectors in those logical address ranges are transmitted. The logical-physical address translation 184 can be performed by using the file-logical address conversion information 182 in determining the physical location where the individual sectors are stored.

  FIG. 10 shows metablocks 167 allocated as reserved blocks, metablocks 169 allocated for storage of the host operating system, host FAT table, etc., and metablocks maintained in the erased block pool as before. 171. FIG. 10 shows a file 1 stored in one metablock, a file 2 in another metablock, and a file 3 occupying two metablocks other than those described above. File 2 is mapped to two separate parts of logical address space 161, but as a result of logical-physical address translation 184, the two parts of file 2 are stored together. Similarly, file 3 is logically fragmented into two parts and occupies two parts of logical address space 161 that are separated from one another. Further data other than the file 3 is mapped to the intervening portion of the logical address space. However, the logically separated portion of file 3 is stored together in two metablocks that do not contain data from other files. The placement of this metablock file, which contains only one file's data, will result in the entire metablock being used up when the file is used up, usually requiring a copy of the valid data during garbage collection. It is advantageous because it disappears. A file does not necessarily fill an integer number of metablocks, and maintaining the unused portion of a metablock reduces memory capacity, so it may not be efficient for all metablocks to store only one file of data. unknown. However, even when several metablocks contain data of a plurality of files, the degree of file fragmentation in the memory array can be suppressed as compared with the conventional system.

  FIG. 11 shows an example of a file A that is mapped to the logical address space 161 and logically fragmented into four parts by this mapping. The file-logical address conversion information 182 regarding this mapping is transmitted to the memory before the data is transmitted to the memory. Thus, the logical address to which each part of the file A is mapped is identified as the file A by the file-logical address information 182. When the data of the file A is transmitted to the memory, the storage position of the data of the file A transmitted to the memory is determined by the identification as the file A. FIG. 11 shows logical-physical translation 184 performed in memory. Each part of file A mapped to a separate part of logical address space 161 is mapped to an adjacent part of physical memory array 180. In this example, metablock 4 is filled with data from file A, and metablock 7 is partially filled with data from file A. Since the data of the metablock 7 can be merged with data of another file later, the memory array space is not wasted. However, the metablock 4 continues to store exclusively the data of file A. When file A is closed, the memory can organize the data in metablock 7 with similar data in other files. The direct data file application that efficiently merges the remaining file data from a plurality of files into one common block describes how to organize such partial metablocks.

Notification Methods Various notification methods are possible for sending file-logical address conversion information from the host to the memory. In one example, the format of the notification method used is the same as that generally used when storing control information in the memory. In this method, since FAT and directory information are updated in the nonvolatile memory using the FAT sector and the directory sector, the information can be used for recovery later. FIG. 12 shows how file allocation information is stored. Files A and B are stored in memory. The directory contains both file A and file B entries. The directory item contains various information about the file, such as the address of the first cluster of the file. In the case of file A, the directory item tells that cluster 2 is the first cluster, so the first FAT item of file A is the cluster 2 item. For file B, the directory entry tells that the first cluster is cluster 0. The cluster entry in the FAT points to the next cluster in the file. Thus, once the location of the first FAT entry for a file is obtained from the directory, the subsequent FAT entry is indicated by the FAT entry for the previous cluster assigned to that file. A FAT item can be viewed as “connected” because one FAT item indicates the position of the next FAT item in a particular file. In the case of file A, the first cluster indicated by the directory is cluster 2. The item of cluster 2 tells that the next cluster of file A is cluster 3. The item of cluster 3 indicates that the next cluster of file A is cluster 4. The item of cluster 4 conveys the end of file (EoF). Therefore, the last cluster assigned to file A is cluster 4. In the case of file B, the first cluster indicated by the directory is cluster 0. The item of cluster 0 tells that the next cluster of file B is cluster 1. The item of cluster 1 tells that the next cluster of file B is cluster 5. The item of cluster 5 tells that the next cluster of file B is cluster 6, and the item of cluster 6 tells the end of the file. Therefore, the last cluster of file B is cluster 6. Normally, FAT and directory information is maintained by the host and periodically stored in non-volatile memory by sending FAT sectors and directory sectors.

  Previous schemes used directory and FAT structures to store file-logical address information. However, unlike the previous scheme, the scheme according to an embodiment of the present invention transmits file-logical address information before transmitting data to the memory. In a typical prior system, the FAT and directory sectors were only transmitted after the data they referred to was transmitted and stored in memory. The reason for delaying the transmission of the FAT sector and the directory sector is to prevent erroneous information from being recorded in the non-volatile memory when a power failure occurs before data is written. The scheme in one embodiment avoids this problem by simply writing a portion of the file's FAT before the file it refers to is stored. In this way, in the event of a power failure, it can be seen from the incomplete FAT that the file writing has not been completed and that the file data may not be usable.

  In an exemplary notification scheme, a FAT sector and a directory sector are transmitted by the host to notify the memory of data sector file assignments transmitted by the host. Normally, it is not necessary to transmit file allocation information for each cluster of host data to be transmitted. The memory normally assumes that when the host sends clusters of consecutive sectors, those clusters belong to the same file. Thus, when sending a file as a stream of continuous clusters, the host need only identify the file before sending the first cluster and send an end-of-file indicator after the last sector. FIG. 13 shows an example in which the host transmits the file A of FIG. 12 to the memory. First, a directory sector 301 is transmitted that indicates that the first cluster of file A is cluster 2. Next, the sector of cluster 2 is transmitted, which is at the beginning of the new host file and is therefore stored in the new block 302 of the memory array by the memory. Thereafter, the sectors of clusters 3 and 4 are sequentially received and stored in the same block as the sectors of cluster 2. After receiving the cluster 4, the host sends a FAT sector 303 containing the end of file item for cluster 4 telling it that this is the last cluster of file A. Since the entire file A has already been stored at this time, a set of FAT information of the file A can be transmitted. The memory can close file A at this point, and can perform playback operations if necessary. This is an example in which a file is transmitted in a logically continuous manner without writing other files.

  FIG. 14 shows an example in which the host transmits the file B of FIG. First, a directory sector 410 is transmitted that indicates that the first cluster of file B is cluster 0. Next, the sectors of cluster 0 are transmitted, but since these are the first sectors of the new file, they are stored in the new block 412. Cluster 1 sectors are then received, but since they are a continuation of cluster 0 sectors, they are also assumed to be file B and are therefore stored in block 412. A FAT sector 414 containing the FAT entry for cluster 1 is then received and the pointer to this entry tells that the next cluster in file B is cluster 5. At this point, cluster 5 has not yet been transmitted by the host, so there may not be an entry for cluster 5 in FAT sector 414. The FAT sector 414 notifies the memory controller that the next data of the file B after the cluster 1 is in the sector of the cluster 5 even if the logical address jumps from the cluster 1 to the cluster 5. The cluster 5 sector is then received and stored in block 412 along with the cluster 1 sector. Cluster 6 is then received, but since this is a continuation of cluster 5, it is also stored in block 412. Thereafter, the FAT sector 416 including the file end item of the cluster 6 is received. Here, the file B can be closed, and if necessary, the reproduction operation can be performed in the block containing the file B. The memory may assume that the host continues to write the next cluster of the same file when there is a jump in the logical address. In such a memory system, no specific notification is required when the host continues to write data from the same file with a jump in logical address. There is a jump in the logical address between the sector of cluster 1 and the sector of cluster 5, but the host transmits file B over the period dedicated to the transmission of file B (that is, within this period other FIG. 14 can be regarded as an example of file writing that is not logically continuous and does not involve writing of another file.

  FIG. 15A shows two files C and D mapped by the host to part of the logical address space. In this case, the two files C and D are not only fragmented in the logical address space but also transmitted in a temporarily fragmented state. Since the clusters of files C and D are sent by the host in a logical order, cluster 10 is sent first, then cluster 11 and then cluster 12 and so on. In this case, the clusters are sent in a logically sequential order, but with some change from one file to another. The memory receives notification of changes between files from the host.

  FIG. 15B shows how the host notifies the memory that it will start writing another file. First, a directory sector 520 is transmitted that indicates that the first cluster of file C is cluster 10. The sectors of cluster 10 are then transmitted by the host and are stored in a new block 522 in the memory array because they are the first sector of the new file. The host then sends another directory sector 524 telling that the first cluster of file D is cluster 11. Thereafter, the cluster 11 is transmitted and stored in another new block 526. Cluster 12 is then received and stored in block 526 with cluster 11. The memory system assumes that the cluster 12 belongs to the same file as the cluster 11 because the cluster 12 is a continuation of the cluster 11 and has not received another instruction from the host. The FAT sector containing the cluster 10 entry is then transmitted by the host. This item of the cluster 10 includes a pointer to the next cluster of the file (file C) of the cluster 10. In this case, the next cluster of the file C indicated by the pointer is the cluster 13. Then, upon receipt of cluster 13, the memory system knows that cluster 13 was assigned to file C, even though this is logically a continuation of the last received cluster (cluster 12). Therefore, the sector of cluster 13 is stored in block 522 together with the sector of cluster 10.

The table below summarizes the notification scheme for identifying the file data allocation in the example described above.

  In addition to the signals described above that convey the file to which the cluster is assigned, the host can send an indication that the cluster is the last cluster of a particular file via the FAT sector containing the end-of-file entry for that cluster. . As a result, the file can be closed, and the memory system can perform a reproduction operation to be described later in a block that accommodates the file.

In one example of memory operation , when a file is closed by the host, the metablock containing the file data is marked for playback operation. The technique used to reclaim the memory space in a memory system using the technique of the present invention is similar to that described in the direct data file storage application. Specifically, there may be one or more metablocks filled with the file's data when the file is closed, but there is usually only one metablock partially filled with the file's data. There is one. In order to efficiently store these remaining file data, the host can copy the remaining file data of one file to a metablock containing the remaining file data of another file. The remaining file data to be moved and its destination are selected in a manner that keeps the amount of unused memory space low. Therefore, if the file is closed while leaving the remaining file data that occupies 30% of the metablock, the memory system will replace the metablock with the remaining file data occupying 70% (or almost 70%) of the metablock. look for. Metablocks that contain the data portions of multiple files can be considered common blocks. Although the present technique can be combined with the direct data file storage technique, embodiments of the present invention typically use logical addresses rather than file identifiers used in direct data file storage for data management within the memory array. .

  The memory system according to one embodiment of the present invention, in another example, stores files in one or more dedicated metablocks and one common block in the memory array, so that the files are no longer needed for the host. Dedicated metablocks can be immediately deleted for reuse, and common blocks can be incorporated into a garbage collection schedule. Directory and FAT information sent by the host typically tells the host that it has deleted the file by removing the directory entry for that file. In some cases, this deletion is reflected in the FAT item. Since the memory system can determine from the directory that the file has been deleted by the host, the metablock containing only the file's data can be deleted. At this point, such metablocks can be added to the queue of metablocks to be deleted as part of a continuous playback operation. Similarly, the common block containing the data for the file can be added to the garbage collected metablock queue so that the space occupied by the used data can be reclaimed. If the memory system keeps track of host file deletions and those files are stored contiguously in metablocks, and many metablocks contain only one file's data, schedule the replay operations efficiently Can be assembled. An example of such scheduling is described in US Patent Application No. 11 / 259,423 entitled “Scheduling of reclaim operations in non-volatile memory” filed on October 25, 2005. Yes.

  The notification scheme based on FAT sectors and directory sectors has the advantage that it uses signals already commonly used in LBA interfaces. Although the FAT sector and the directory sector are different from many conventional systems in transmission timing, they contain useful information and are generally compatible with the conventional LBA interface. Thus, a host using a notification scheme according to an embodiment of the present invention is compatible with a memory system that does not use such a notification scheme. Such a memory system stores a FAT sector and a directory sector, but does not help them in determining the storage location of the host data sector. The FAT sector stored in this manner is effective because it includes an already stored data cluster item. Therefore, when an unexpected power failure occurs, there is no error in the FAT data stored in the nonvolatile memory. Since the FAT information of a certain file is incomplete, it can be understood that the memory system did not complete the data storage of the file when a power failure occurred.

  In the above-described example, the allocation information is transmitted using the sector (FAT and directory) of the control data. However, other information can be transmitted from the host using a signal suitable for the existing logical interface. By sending two or more of the same FAT sectors, subsequent host behavior can be communicated to the memory system. The host can tell the memory system that, in one example, it does not need immediate access to the memory system and that power is maintained. This can be indicated by transmitting overlapping FAT sectors one after another. There are cases where only one of these sectors is written by the memory system and both are written. In response to receiving the duplicate FAT sector, the memory system can enter an idle state because it determines that power is maintained and the host does not seek immediate access. A memory system that has entered an idle state can perform a housekeeping operation such as a reproduction operation to perform garbage collection of metablocks that contain used data, or organize metablocks that have unwritten portions. The idle state is terminated by receiving another host command. The memory system can communicate a busy status to the host while performing a housekeeping operation in the idle mode. The busy status indicator informs the host that the memory system is performing a housekeeping operation, but does not prevent the host from sending a command to terminate the housekeeping operation and begin executing a new command. Absent. In another example, the host can communicate an imminent power outage by sending the same FAT sector three times. The memory system can respond to such a signal by entering a shutdown state. The memory system that has entered this state stores data that has not yet been stored in the non-volatile memory, and instructs the host of the busy status until some other operation for safely stopping the power is performed. The host waits until the memory system is no longer busy before turning off the power. The host can also convey other host behavior by sending multiple identical FAT or directory sectors. The host can identify a specific file to be deleted by repeating the control information sector. When the memory system receives an indication from the host that a particular file should be deleted, that file is placed in the garbage collection queue. Similarly, the host can identify a specific file to be erased by repeating the control information sector. When the memory system receives an indication from the host that a particular file should be erased, the memory system places the file in the garbage collection queue, immediately begins garbage collection, and all the data in the file is collected. Remove from the non-volatile memory array.

  If a memory system that can use a notification signal is connected to a host that does not provide such a notification signal, the memory system determines that the host does not provide a notification signal and then data in a manner that does not require such a signal. Is stored. The memory system can make this determination when it first receives contact from the host. For example, if a memory system receives a data sector that is written without a FAT or directory sector, the memory system can determine that the host cannot provide such a signal and ignore the sector's file allocation in selecting a storage location. You can choose the method. In one example, the host can determine whether the memory system can use the notification signal by an “identify drive” command from the host. In response to the “drive identification” command, the memory system returns information including the presence or absence of this capability. In the default data storage method used by a memory system connected to a host that does not support the notification signal, data can be stored as shown in FIG. 7 regardless of the file allocation of a specific sector. U.S. Patent Application No. 10 / 750,155 filed on December 30, 2003 (Patent Document 16), U.S. Patent Application No. 10 / 917,888 filed on August 13, 2004 (Patent Document 17) ), 10 / 917,867 (patent document 18), 10 / 917,889 (patent document 19), and US patent application 10 / 917,725 (patent document 20), such as An example of a storage method is described.

  In another embodiment, the notification scheme is not limited to communications compliant with existing interfaces. To provide allocation information from the host to the memory system, additional commands that do not fit into existing interfaces can be defined. Hosts and cards that use such additional commands typically require handshaking routines when they are first connected, on which they can confirm that the use of such additional commands is possible. Typically, hosts and cards that can use such additional commands can operate without additional commands when connected to a host or card that cannot use the additional commands. Thus, backward compatibility is maintained for the host and memory system using such new commands. Additional commands not related to conveying file allocation information are also provided. For example, an explicit command can be defined to erase or delete a particular file on the host.

  While various aspects of the present invention have been described in relation to exemplary embodiments thereof, it is to be understood that the invention is entitled to protection within the full scope of the appended claims. I can do it.

1 schematically shows a non-volatile memory system connected to a currently implemented host. FIG. 2 is a block diagram of an example flash memory system used as the nonvolatile memory of FIG. 1. FIG. 3 is a typical circuit diagram of a memory cell array that can be used in the system of FIG. An example of the physical memory organization of the system of FIG. FIG. 5 shows an enlarged view of a portion of the physical memory of FIG. 4. Figure 6 shows a further enlarged view of a portion of the physical memory of Figures 4 and 5; Fig. 2 illustrates a common logical address interface between a host and a reprogrammable memory system. Fig. 2 shows a file interface between a host and a reprogrammable memory system. Fig. 4 illustrates a logical address interface used for logical address to logical file translation by a memory system. Fig. 4 illustrates a logical interface between a host and a memory system, where logical-physical address translation in the memory system relies on file-logical address information received from the host. FIG. 11 illustrates the logical interface of FIG. 10 where a file is logically fragmented by the host and then fragmented by the memory system when the file is stored. The storage of file allocation information of files A and B in a memory system using a directory and a file allocation table (FAT) is shown. The operation of the notification method when the host file A is transmitted as a logically continuous host data cluster is shown. The operation of the notification method when the host file B is transmitted as a host data cluster including a jump in logical address is shown. FIG. 5 shows storage of file allocation information of files C and D in a memory system including a directory and a file allocation table (FAT). A notification method in the case where the host files C and D are transmitted as logically continuous clusters while the sector cluster is exchanged between the file C and the file D is shown.

Claims (34)

A method of storing data sectors of a plurality of files in a non-volatile memory array, wherein each sector of the plurality of files is mapped to a common logical address space by a host,
Receiving file allocation information from the host carrying a file to which a host data sector has been allocated;
Then receiving from the host the host data sector to be stored in the non-volatile memory array;
Then storing the host data sector at a physical location in the non-volatile memory array determined according to the file to which it has been assigned based on the file assignment information from the host;
Including methods. The method of claim 1, wherein
The file allocation information from the host includes a sector of file allocation table information. The method of claim 2, wherein
The host data sector is in a cluster of sectors, and the sector of the file allocation table information includes a file allocation table entry that points to the cluster. The method of claim 1, wherein
The file allocation information from the host includes a sector of directory information containing the file item. The method of claim 1, wherein
The method wherein the sectors are stored in an erase block dedicated to storing sectors from the file. The method of claim 5, wherein
A method of receiving additional information from the host after storing the host data sector indicating that the sector is the last sector in the file, and in response the file is closed and incorporated into a playback schedule. The method of claim 1, wherein
Receiving two or more sectors of the same control data from the host; and correspondingly performing a playback operation while providing a status indicator to the host. The method of claim 1, wherein
Receiving two or more of the same control data sectors, and correspondingly preparing the memory array for a power failure accordingly. A method of storing host data sectors from a host file in a non-volatile memory array having a metablock as a minimum erasure unit, wherein the host file sectors and other file sectors are mapped to a common logical address space In
Receiving a first plurality of data sectors of the host file, wherein the first plurality of sectors occupy a first portion of the logical address space;
Then receiving a second plurality of sectors that are not of the host file, wherein the second plurality of sectors occupy a second portion of the logical address space;
Thereafter, receiving a third plurality of sectors of the host file, wherein the third plurality of sectors occupies a third portion of the logical address space and the first portion of the logical address space Is spaced from the third portion of the logical address space;
In response to information identifying the first and third portions of the logical address space as assigned to the host file, the first plurality of sectors and the third plurality of sectors are identified in the memory array. Storing in a first metablock;
Storing the second plurality of sectors in a second metablock of the memory array;
Including methods. The method of claim 9, wherein
The first metablock is dedicated to storing data of the host file. The method of claim 9, wherein
The method wherein the first and third portions of the logical address space are identified as assigned to the host file by a directory and file allocation table sector transmitted by the host. The method of claim 9, wherein
The second portion of the logical address space extends from the first portion of the logical address space to the third portion of the logical address space and receives the second plurality of sectors. Prior to receiving a directory sector that communicates that a first cluster of the second plurality of sectors is not assigned to the host file. The method of claim 12, wherein
Prior to receiving the third plurality of sectors, further comprising receiving a file allocation table sector indicating that a first cluster of the third plurality of sectors is assigned to the host file. . A method of storing a host data file in a non-volatile memory array having a metablock as a minimum erase unit,
Receiving a first plurality of data sectors of the host data file, each of the first plurality of sectors having a logical address in a logical address space set for the memory array; A plurality of sectors having logical addresses occupying two or more discontinuous portions of the logical address space;
Receiving a second plurality of data sectors that are not of the host data file, wherein each of the second plurality of sectors has a logical address in the logical address space; A sector is received while receiving the first plurality of sectors; and
Storing the data of the two or more discontinuous portions of the logical address space in a metablock containing only data of the host data file;
Including methods. The method of claim 14, wherein
Prior to receiving each of the first plurality of sectors, further comprising receiving file allocation information regarding each of the first plurality of sectors, the file allocation information including each of the first plurality of sectors. A method of identifying as belonging to the host data file. The method of claim 15, wherein
The file allocation information takes the form of a file allocation table and a directory sector. The method of claim 14, wherein
Receiving file end information conveying the logical address of the end of the host data file, closing the host data file accordingly, and scheduling the host data file for garbage collection. Further including methods. A method of coordinating a memory system with a host that assigns sectors of a host data file to a common logical address space,
The memory system receives a plurality of host data sectors from the host, the plurality of sectors are assigned to a host file, the plurality of host data sectors have non-adjacent logical addresses assigned by the host;
In response to determining whether the plurality of sectors are assigned to the host file and the memory system determines that the plurality of sectors are assigned to the host file, A method of storing the plurality of sectors in a part of the memory array such that the plurality of sectors are arranged adjacent to each other. The method of claim 18, wherein:
The memory system determines whether each of the plurality of sectors is allocated to the host file using file allocation information received from the host. The method of claim 19, wherein
The method wherein the file allocation information received from the host includes one or more file allocation table sectors. The method of claim 19, wherein
The file allocation information received from the host includes one or more directory sectors. The method of claim 18, wherein:
The memory system further determines that the end of the host file has been received, closes the file accordingly, and schedules the file for garbage collection. A non-volatile memory system associated with a host that allocates a sector of a host data file to a common logical address space,
A memory interface for receiving a plurality of host data sectors assigned to a host file, wherein the plurality of host data sectors have non-adjacent logical addresses assigned by the host;
In response to determining whether the plurality of sectors are allocated to the host file and determining that the plurality of sectors are allocated to the host file, the plurality of sectors are arranged adjacent to each other. A memory controller for storing the plurality of sectors in a part of the memory array,
A non-volatile memory system comprising: The non-volatile memory system of claim 23.
The non-volatile memory system, wherein the memory controller determines whether each of the plurality of sectors is allocated to the host file using file allocation information received from the host. The non-volatile memory system of claim 24.
The non-volatile memory system, wherein the file allocation information received from the host includes one or more file allocation table sectors. The non-volatile memory system of claim 24.
The file allocation information received from the host is a volatile memory system including one or more directory sectors. The non-volatile memory system of claim 23.
The non-volatile memory system, wherein the memory controller further determines that the end of the host file has been received, closes the file accordingly, and schedules the file for garbage collection. A non-volatile memory system for storing data received from a host in a non-volatile memory array,
Receiving a plurality of host files as data sectors having logical addresses allocated from a logical address space set for the memory system, and receiving allocation information relating to the allocation of the plurality of host files to the logical address space; Interface,
A logical-physical translation circuit for determining a storage position of a data sector having a logical address, wherein the position is determined according to which of the plurality of host files is allocated to the logical address based on the allocation information. Logical-physical translation circuit to
A non-volatile memory system comprising: The non-volatile memory system of claim 28.
The logical-physical translation circuit is a nonvolatile memory system that is part of a memory controller. The non-volatile memory system of claim 28.
The non-volatile memory system, wherein the interface receives allocation information about the sector prior to receiving the sector. The non-volatile memory system of claim 28.
The logical-physical translation circuit is a nonvolatile memory system that stores the sector at a location physically adjacent to a storage location of another sector of the host file. The non-volatile memory system of claim 28.
The non-volatile memory system, wherein the logical-physical translation circuit stores each sector of the plurality of host files in a separate block of a non-volatile memory array such that a separate block contains only the sector of the host file. The non-volatile memory system of claim 28.
In the nonvolatile memory array, the allocation information is stored in a block that is not used for storing sectors of the plurality of host files. The non-volatile memory system of claim 28.
The non-volatile memory system, wherein the interface receives an end-of-host instruction and, in response, the host file sector stored in the memory array is stored in the same block as another host file sector.

Images