JP2009507414A - 半導体集積回路用論理モジュール - Google Patents

半導体集積回路用論理モジュール Download PDF

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Publication number
JP2009507414A
JP2009507414A JP2008528644A JP2008528644A JP2009507414A JP 2009507414 A JP2009507414 A JP 2009507414A JP 2008528644 A JP2008528644 A JP 2008528644A JP 2008528644 A JP2008528644 A JP 2008528644A JP 2009507414 A JP2009507414 A JP 2009507414A
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JP
Japan
Prior art keywords
input
logic
terminal
multiplexer
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2008528644A
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English (en)
Japanese (ja)
Inventor
クリシュナン ローヒニ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
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NXP BV
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Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of JP2009507414A publication Critical patent/JP2009507414A/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2008528644A 2005-09-05 2006-09-04 半導体集積回路用論理モジュール Withdrawn JP2009507414A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP05108122 2005-09-05
PCT/IB2006/053100 WO2007029167A1 (en) 2005-09-05 2006-09-04 Logic modules for semiconductor integrated circuits

Publications (1)

Publication Number Publication Date
JP2009507414A true JP2009507414A (ja) 2009-02-19

Family

ID=37663237

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008528644A Withdrawn JP2009507414A (ja) 2005-09-05 2006-09-04 半導体集積回路用論理モジュール

Country Status (5)

Country Link
US (1) US7696783B2 (zh)
EP (1) EP1929631A1 (zh)
JP (1) JP2009507414A (zh)
CN (1) CN101258679A (zh)
WO (1) WO2007029167A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015053533A (ja) * 2013-09-05 2015-03-19 敏則 末吉 プログラマブル論理回路及びその構成方法

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8836368B2 (en) * 2011-12-21 2014-09-16 Ecole Polytechnique Federale De Lausanne (Epfl) Non-LUT field-programmable gate arrays
US9231594B2 (en) 2011-12-21 2016-01-05 Ecole Polytechnique Federale De Lausanne (Epfl) Non-LUT field-programmable gate arrays
CN104737384B (zh) 2012-10-18 2017-06-16 山一电机株式会社 插座连接器、插头连接器及具备这两者的电连接器
CN106771958B (zh) * 2015-11-19 2020-11-03 恩智浦美国有限公司 具有低功率扫描系统的集成电路
CN109933301B (zh) * 2019-03-19 2023-04-14 中科亿海微电子科技（苏州）有限公司 可扩展可编程逻辑单元及可编程逻辑块结构

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5245226A (en) 1991-02-25 1993-09-14 Lattice Semiconductor Corporation Output logic macrocell
GB2267614B (en) 1992-06-02 1996-01-24 Plessey Semiconductors Ltd Logic cell
US5646546A (en) * 1995-06-02 1997-07-08 International Business Machines Corporation Programmable logic cell having configurable gates and multiplexers
US6294926B1 (en) 1999-07-16 2001-09-25 Philips Electronics North America Corporation Very fine-grain field programmable gate array architecture and circuitry
JP3613396B2 (ja) * 2001-06-25 2005-01-26 日本電気株式会社 機能ブロック
CN1751438A (zh) 2003-02-19 2006-03-22 皇家飞利浦电子股份有限公司 具有可编程逻辑单元阵列的电子电路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015053533A (ja) * 2013-09-05 2015-03-19 敏則 末吉 プログラマブル論理回路及びその構成方法

Also Published As

Publication number Publication date
EP1929631A1 (en) 2008-06-11
US7696783B2 (en) 2010-04-13
CN101258679A (zh) 2008-09-03
US20080224732A1 (en) 2008-09-18
WO2007029167A1 (en) 2007-03-15

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Effective date: 20090904