JP2009302307A - Manufacturing method of ferroelectric memory element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a ferroelectric memory element having an improved ferroelectric film. <P>SOLUTION: The manufacturing method comprises processes of: forming an underlayer iridium film 331 including a surface layer 334 in an amorphous shape in an upper portion of a base insulating film 23; oxidizing the surface layer 334 in an amorphous shape to form an iridium oxide layer 335; a process for forming a ferroelectric film on the iridium oxide layer 335 by an MOCVD method; and forming an electrode on the ferroelectric film. Since the surface layer 334 in an amorphous shape is formed and there is no polycrystalline structure on the surface layer 334, the surface layer 334 is thermally oxidized uniformly, thereby uniformizing volume expansion by oxidation and flattening the upper surface of the surface layer 334. Since the thickness of the surface layer 334 is set at not less than 10 nm and oxygen is hardly transmitted through the surface layer 334, the underlayer 331 is hardly oxidized, and thus the crystalline underlayer 331 is nonuniformly oxidized, and irregularities are prevented from being generated. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a ferroelectric memory device.

  A ferroelectric memory device using spontaneous polarization of a ferroelectric material is expected as a nonvolatile memory device capable of low voltage operation and high speed operation. In addition, since the ferroelectric memory device can be composed of one transistor / one capacitor, the memory cell can be integrated as high as a DRAM and is expected as a large-capacity memory device.

Ferroelectric materials include perovskite oxides such as lead zirconate titanate (Pb (Zr, Ti) O ₃ , hereinafter referred to as PZT), and bismuth such as bismuth strontium tantalate (SrBi ₂ Ta ₂ O ₉ ). Layered compounds are promising. In order to maximize the spontaneous polarization of the ferroelectric material, the crystal orientation is extremely important.

  For example, when PZT is used, in order to increase the amount of spontaneous polarization, a titanium-rich composition containing more Ti (titanium) than Zr (zirconium) is often employed. In this composition range, PZT belongs to tetragonal crystal, and its spontaneous polarization axis is c-axis. Ideally, the maximum amount of polarization can be obtained by c-axis orientation, but in practice it is very difficult, and an a-axis orientation component orthogonal to the c-axis exists at the same time. Since the a-axis alignment component does not contribute to polarization reversal, if the ratio increases, the spontaneous polarization amount may decrease.

  Therefore, it is considered that the a-axis is oriented in a direction offset by a certain angle from the substrate normal by setting the PZT to the (111) orientation. According to this, since the polarization axis has a component in the substrate normal direction, it is possible to contribute to polarization inversion. On the other hand, since the polarization axis of the c-axis orientation component is also at a certain offset angle with respect to the normal direction of the substrate, a certain amount of loss occurs in the surface charge amount induced by polarization reversal. However, since all crystal components can contribute to polarization reversal, the charge extraction efficiency is remarkably superior to the c-axis orientation.

As a method of forming a ferroelectric film made of PZT in the (111) orientation, there is a method disclosed in Patent Document 1. In Patent Document 1, a lower electrode made of (111) -oriented iridium is formed, the surface layer on the upper surface side is thermally oxidized to form an iridium oxide layer, and then a ferroelectric film is formed thereon. The formation of the ferroelectric film uses the MOCVD method in which the ferroelectric film material gas and the oxygen gas are chemically reacted to form a film. Further, after supplying an oxygen gas less than an amount necessary for a chemical reaction to form a film, an oxygen gas more than an amount necessary for the chemical reaction is supplied to form a film. Although the detailed mechanism has not yet been elucidated, it is said that the iridium oxide layer contributes to the determination of the growth orientation of PZT, and PZT can be mainly (111) oriented.
JP 2003-324101 A

  However, even when the method of Patent Document 1 is adopted, there are improvements in order to form a better ferroelectric film. That is, if the iridium film of the lower electrode is intended to have a (111) orientation, its crystallinity needs to be improved, so that the film quality is inevitably high. Then, it becomes difficult to diffuse oxygen well in the surface layer, and it becomes difficult to make the surface layer well an iridium oxide layer. Moreover, since iridium has a very high melting point, it usually has a polycrystalline structure. When this is oxidized, oxygen gas is likely to diffuse from the grain boundaries between the crystal grains, so that the degree of oxidation varies between the crystal grains and the grain boundaries, and the volume expansion due to oxidation varies. As a result, irregularities are generated on the surface of the iridium film, and a good ferroelectric film cannot be formed thereon.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide a method for manufacturing a good ferroelectric memory element by forming a good ferroelectric film.

  The method for manufacturing a ferroelectric memory element of the present invention includes a step of forming an iridium film including an amorphous surface layer above a substrate, and an oxidation step of oxidizing the amorphous surface layer to form an iridium oxide layer. And a step of forming a ferroelectric film on the iridium oxide layer by MOCVD, and a step of forming an electrode on the ferroelectric film.

Since the amorphous surface layer has a smaller film density than the crystalline surface layer, oxygen can be favorably diffused here. Further, since the non-uniformity of the density of iridium atoms due to the grain boundaries is eliminated as compared with the film having a polycrystalline structure, oxygen can be uniformly diffused into the surface layer having a uniform atom density. Accordingly, the surface layer can be satisfactorily and uniformly oxidized in the oxidation step, and the volume expansion due to the oxidation becomes uniform. Therefore, a flat iridium oxide layer can be formed, and a flat ferroelectric film can be formed on the flat iridium oxide layer. As a result, the ferroelectric film is prevented from being deteriorated in characteristics due to morphological roughness, and a ferroelectric film having good ferroelectric characteristics can be obtained. As described above, according to the present invention, a good ferroelectric memory element can be manufactured.
Note that the amorphous state means a state that is completely amorphous, or a state that is amorphous and includes microcrystals. Specifically, the X diffraction pattern does not have a sharp peak. Such an amorphous film has a film quality that is looser than that of a crystalline film and a film density that is smaller than that of a crystalline film.

  Further, in the step of forming the iridium film, a surface layer of the iridium film is formed by a sputtering method, and at least one or more of a substrate temperature, an atmospheric pressure, an atmospheric gas amount, or a film formation power at the time of formation is adjusted to be amorphous. It is preferable to use a surface layer. In this case, it is more preferable to form an amorphous film by performing the sputtering method without heating the substrate.

Usually, when a crystalline iridium film is formed using a sputtering method, the film is formed by heating the substrate temperature to about 500 to 550 ° C. If the substrate temperature is lowered and the film is formed without heating the substrate, surface migration due to the temperature of iridium atoms placed above the substrate can be suppressed, and a surface layer with low crystallinity is formed. can do.
Further, if the atmospheric pressure or the amount of atmospheric gas is increased, the frequency of sputtering particles (iridium) colliding with the atmospheric gas molecules during the flight increases. Thereby, the incident direction of the sputtering particles on the substrate can be varied, and a surface layer having low crystallinity can be formed.
Further, when the film formation power in the sputtering method is increased, the film formation rate of iridium is increased. Thereby, before the iridium atoms arranged above the substrate are regularly arranged, the iridium atoms come flying and stacked thereon, and a surface layer with low crystallinity can be formed.
As described above, an amorphous surface layer can be formed without complicating the process, and a ferroelectric memory element can be manufactured efficiently.

  Further, in the step of forming the iridium film, an underlayer having a (111) orientation belonging to a face-centered cubic crystal is formed above the substrate, and then an amorphous surface layer is formed thereon to form the underlayer It is preferable to form an iridium film including the surface layer. In this case, the amorphous surface layer is more preferably formed to a thickness of 10 nm to 60 nm.

  In the step of forming a ferroelectric film by MOCVD, the iridium oxide layer is decrystallized and recrystallized. If an iridium film including a (111) oriented underlayer is formed, the recrystallized portion can be (111) oriented by reflecting the orientation of the underlayer when the iridium oxide layer is recrystallized. . Therefore, a (111) oriented ferroelectric film can be formed on the recrystallized portion reflecting the crystal orientation. The (111) oriented ferroelectric film has excellent ferroelectric characteristics because the charge extraction efficiency is improved.

If the amorphous surface layer is formed to a thickness of 10 nm or more, when the surface layer is oxidized in the oxidation step, the underlying layer can be prevented from being oxidized. Therefore, for example, it is possible to prevent the base layer from being unevenly oxidized and thereby generate unevenness, and to prevent the surface layer from being uneven due to the unevenness.
If the amorphous surface layer is formed to a thickness of 60 nm or less, the crystal orientation of the underlayer can be satisfactorily inherited when the iridium oxide layer is recrystallized. Therefore, a (111) oriented ferroelectric film can be formed, and a good ferroelectric memory element can be manufactured.

  Hereinafter, although one embodiment of the present invention is described, the technical scope of the present invention is not limited to the following embodiment. In the following description, various structures are illustrated using drawings, but in order to show the characteristic parts of the structures in an easy-to-understand manner, the structures in the drawings are shown in different sizes and scales from the actual structures. There is. First, the configuration of an example of a ferroelectric memory element obtained by the manufacturing method of the present invention will be described.

  FIG. 1 is a side sectional view showing the main part of a ferroelectric memory device provided with the ferroelectric memory element of this example. As shown in FIG. 1, the ferroelectric memory device 1 has a stack type structure and includes a base 2 having a transistor 22 and a ferroelectric memory element 3 provided on the base 2. .

The base 2 includes a transistor 22 provided on a silicon substrate (substrate) 21 made of, for example, single crystal silicon, and a base insulating film 23 made of SiO ₂ provided so as to cover the transistor 22. . An element isolation region 24 is provided on the surface layer of the silicon substrate 21, and the space between the element isolation regions 24 corresponds to one memory cell.

  The transistor 22 includes a gate insulating film 221 provided on the silicon substrate 21, a gate electrode 222 provided on the gate insulating film 221, source regions 223 provided on both sides of the gate electrode 222 on the surface of the silicon substrate 21, and The drain region 224 and sidewalls 225 provided on the side surfaces of the gate electrode 222 are configured. In this example, a first plug 25 that is electrically connected to the source region 223 is provided, and a second plug 26 that is electrically connected to the source region 223 is provided to the drain region 224.

  The first plug 25 and the second plug 26 are made of a conductive material such as W (tungsten), Mo (molybdenum), Ta (tantalum), Ti, or Ni (nickel). In this example, the first plug 25 is electrically connected to a bit line (not shown), and the source region 223 and the bit line are electrically connected through the first plug 25.

  The ferroelectric memory element 3 of this example is formed on a conductive film 31 and an oxygen barrier film 32 that are sequentially formed on the base insulating film 23 and the second plug 26. The ferroelectric memory element 3 has a configuration in which a lower electrode 33, a ferroelectric film 34, and an upper electrode 35 are laminated in order from the lower layer. The lower electrode 33 is electrically connected to the second plug 26 through the oxygen barrier film 32 and the conductive film 31. That is, the lower electrode 33 and the drain region 224 are electrically connected.

  The conductive film 31 is made of a conductive material such as TiN, and the oxygen barrier film 32 is made of a conductive material having an oxygen barrier property such as TiAlN, TiAl, TiSiN, TiN, TaN, and TaSiN. The conductive film 31 and the oxygen barrier film 32 are preferably made of a material containing Ti that is particularly excellent in self-orientation. In this way, the crystal orientation of the lower electrode 33 and the ferroelectric film 34 is improved. be able to.

  The lower electrode 33 is composed of a single layer film or a multilayer film in which a plurality of layers are laminated, and the uppermost layer is an iridium film mainly composed of iridium. The iridium film has a (111) orientation whose crystal structure belongs to a face-centered cubic crystal, and may contain iridium oxide. In the case of a multilayer film, at least one of iridium, Pt (platinum), Ru (ruthenium), Rh (rhodium), Pd (palladium), and Os (osmium) is used as a layer other than the uppermost layer. An alloy or a film made of these oxides can be used. In this example, the lower electrode 33 made of a single layer iridium film is employed.

The ferroelectric film 34 is made of a ferroelectric material having a perovskite crystal structure represented by a general formula of ABO ₃ . For example, A in the above general formula consists of Pb or a part of Pb substituted with La, Ca (calcium), or Sr (strontium). Further, for example, B is made of Zr or Ti, and one of V (vanadium), Nb (niobium), Ta, Cr (chromium), Mo (molybdenum), W (tungsten), and Mg (magnesium). Two or more may be added. Specific examples of the ferroelectric material include PZT, SBT, (Bi, La) ₄ Ti ₃ O ₁₂ (bismuth lanthanum titanate: BLT), and the like.

  Since PZT has a track record as a ferroelectric material, it can be made highly reliable by using it. In the case of using PZT, it is preferable to make the Ti content larger than the Zr content from the viewpoint of increasing the spontaneous polarization amount. In this case, from the viewpoint of improving the hysteresis characteristics, it is preferable that PZT has a (111) orientation belonging to tetragonal crystal.

  In this example, the upper electrode 35 is electrically connected to a ground line (not shown) and is made of a single layer film or a multilayer film. As the film constituting the upper electrode, a film made of Al (aluminum), Ag (silver), Ni (nickel), or the like can be used in addition to the film applicable to the lower electrode described above. In this example, a multilayer film in which a platinum film, an iridium oxide film, and an iridium film (not shown) are sequentially laminated from the lower layer side.

  With the above structure, when a voltage is applied to the gate electrode 222 of the transistor 22, an electric field is applied between the source region 223 and the drain region 224 to turn on the channel, and a current flows therethrough. It becomes possible. When the channel is turned on, an electric signal from the bit line electrically connected to the source region 223 is transmitted to the drain region 224, and is further electrically connected to the drain electrode 224. 3 is transmitted to the lower electrode 33. A voltage can be applied between the upper electrode 35 and the lower electrode 33 of the ferroelectric memory element 3, and charges (data) can be accumulated in the ferroelectric film 34. As described above, the ferroelectric memory device 1 can read or write data (charges) by switching the electric signal to the ferroelectric memory element 3 by the transistor 22.

  Next, an embodiment of a method for manufacturing a ferroelectric memory device according to the present invention will be described. This embodiment will be described based on a method for manufacturing the ferroelectric memory device 1.

  2A to 2C, FIGS. 3A to 3C, and FIGS. 4A to 4C are cross-sectional process diagrams illustrating a method for manufacturing the ferroelectric memory device 1. FIG. In FIG. 2B and subsequent figures, the lower layer structure of the base 2 such as the transistor 22 is omitted.

  First, as shown in FIG. 2A, the base 2 is formed using a known method or the like. Specifically, for example, the element isolation region 24 is formed on the silicon substrate 21 by the LOCOS method, the STI method, or the like, and the gate insulating film 221 is formed on the silicon substrate 21 between the element isolation regions 24 by the thermal oxidation method or the like. Then, a gate electrode 222 made of polycrystalline silicon or the like is formed on the gate electrode 222. Then, impurities are implanted into the surface layer of the silicon substrate 21 between the element isolation region 24 and the gate electrode 222 to form doped regions 223 and 224. Then, a sidewall 225 is formed using an etch back method or the like. Then, impurities are further implanted into the doped regions 223 and 224 outside the sidewall 225 to form high-concentration impurity regions. In this embodiment, the doped region 223 functions as a source region, and the doped region 224 functions as a drain region.

Then, a base insulating film 23 is formed on the silicon substrate 21 on which the transistor 22 is formed by depositing SiO ₂ by, for example, a CVD method. Then, the base insulating film 23 on the source region 223 and the drain region 224 is etched to form a through hole that exposes the source region 223 and a through hole that exposes the drain region 224. Then, in each of these through holes, for example, Ti and TiN are sequentially formed by sputtering to form an adhesion layer (not shown).

  Then, tungsten is formed on the entire surface of the base insulating film 23 including the inside of the through hole by, for example, a CVD method, and the tungsten is embedded in the through hole. Then, the tungsten on the base insulating film 23 is removed by polishing the base insulating film 23 by a CMP method or the like. In this way, the first plug 25 is embedded in the through hole on the source region 223, and the second plug 26 is embedded in the through hole on the drain region 224. The base 2 is obtained as described above.

Next, the ferroelectric memory element 3 is formed (manufactured) on the base insulating film 23.
In the present embodiment, as shown in FIG. 2B, a conductive film 31a is formed on the base insulating film 23. Specifically, Ti is formed on the base insulating film 23 by using, for example, a CVD method or a sputtering method. Since Ti has high self-orientation, a (001) -oriented close-packed film belonging to hexagonal crystals is formed. Then, a conductive film 31a made of TiN is formed by a nitriding process in which the film is subjected to a heat treatment (for example, 500 ° C. or more and 650 ° C. or less) in a nitrogen atmosphere, for example. When the temperature of the heat treatment is less than 650 ° C., the influence on the characteristics of the transistor 22 is suppressed, and when the temperature is 500 ° C. or higher, the nitriding treatment is shortened. The formed conductive film 31a has a (111) orientation belonging to the face-centered cubic crystal, reflecting the orientation of Ti in the original metal state.

  Next, as shown in FIG. 2C, a TiAlN film is formed on the conductive film 31a by using, for example, a sputtering method or a CVD method to form an oxygen barrier film 32a. The oxygen barrier film 32a can be formed epitaxially by matching the crystal orientation with the conductive film 31a serving as the base. That is, the (111) -oriented oxygen barrier film 32a belonging to the face-centered cubic crystal can be formed by reflecting the crystal orientation of the conductive film 31a.

  Next, as illustrated in FIG. 3A, iridium is formed on the oxygen barrier film 32 a by a sputtering method in a state where the substrate temperature is heated to about 500 to 550 ° C., thereby forming a base layer 331. The underlayer 331 is a layer that becomes a part of the lower electrode 33 shown in FIG. The underlayer 331 can be formed by reflecting the crystal orientation of the underlayer similarly to the oxygen barrier film 32a. Since the oxygen barrier film 32a has the (111) orientation, the underlayer 331 can also be formed with the (111) orientation. Note that the base layer 331 has a polycrystalline structure having a large number of (111) -oriented crystal grains 332 grown in a columnar structure and crystal grain boundaries (interfaces) 333 between the crystal grains 332. The thickness of the base layer 331 is, for example, about 80 nm.

  Next, as shown in FIG. 3B, an amorphous surface layer 334 is formed on the base layer 331. Here, iridium is formed by a sputtering method to form the surface layer 334. A film having lower crystallinity can be formed as the substrate temperature is lower than the temperature at which iridium crystallizes during film formation. Further, the higher the atmospheric pressure in the deposition chamber in which the sputtering method is performed, or the greater the amount of gas such as an inert gas circulated in the deposition chamber, the lower the crystallinity. A film with low crystallinity can also be obtained by increasing the film formation power in a sputtering apparatus for injecting sputtered particles. By applying at least one of these, the crystallinity can be sufficiently lowered, and an amorphous film can be formed.

  In the present embodiment, a method is adopted in which the substrate temperature is made lower than the temperature at which iridium crystallizes. Here, the film is formed without heating the substrate. As a result, the substrate temperature becomes approximately room temperature, and the surface migration due to temperature of the sputtered particles (iridium) deposited on the base layer 331 is suppressed. Therefore, iridium can be formed without reflecting the crystal structure of the base layer 331, and an amorphous surface layer 334 is obtained. According to the sputtering method, the film thickness can be controlled with high accuracy. The surface layer 334 is preferably formed to a thickness of 10 nm to 60 nm, and here, it is formed to a thickness of about 20 nm. Further, according to the sputtering method, since the film quality of the film to be formed can be easily controlled, the surface layer 334 can be formed without complicating the process.

  Next, as shown in FIG. 3C, the amorphous surface layer 334 is oxidized to form an iridium oxide layer 335. As will be described in detail later, by oxidizing the surface layer 334 serving as the base of the ferroelectric film, a ferroelectric film mainly oriented in (111) can be formed. In the present embodiment, the surface layer 334 is oxidized by a thermal oxidation method using an MOCVD apparatus 50 as shown in FIG. Note that the MOCVD apparatus 50 is an apparatus used later in forming a ferroelectric film. Hereinafter, the configuration of the MOCVD apparatus 50 will be described.

  FIG. 5 is a diagram schematically showing the MOCVD apparatus 50. As shown in FIG. 5, the MOCVD apparatus 50 includes a chamber 51 that houses the substrate 2, a susceptor 52 that is disposed in the chamber 51 and places the substrate 2, and a shower head 53 that supplies gas into the chamber 51. And a heating lamp 54 for heating the mounted substrate 2.

  The shower head 53 is provided with supply pipes 55 and 56 for supplying the raw material gas, oxygen gas, and the like of the ferroelectric film 34 into the chamber 51. The MOCVD apparatus 50 is configured to supply source gas into the chamber 51 from the supply pipe 55 and supply oxygen gas into the chamber 51 from the supply pipe 56 by supply means (not shown) provided outside the chamber 51. It has become. The supply pipes 55 and 56 are provided independently of each other, and are not encountered until the source gas and the oxygen gas are supplied to the chamber 51. The chamber 51 is appropriately provided with an exhaust port (not shown). The susceptor 52 is provided with a heater (not shown) separately from the heating lamp 54.

  In order to thermally oxidize the surface layer 334 using the MOCVD apparatus 50 configured as described above, first, the substrate 2 (see FIG. 3B) on which the surface layer 334 is formed is placed on the susceptor 52. Then, oxygen gas is supplied from the supply pipe 56 into the chamber 51, and the substrate 2 is heated by the heating lamp 54 and the heater. Since the amorphous surface layer 334 has a smaller film density than the crystalline surface layer, oxygen can be diffused well in the surface layer 334 and can be oxidized well.

  By the way, normally, after forming a crystalline iridium film without forming an amorphous surface layer, the surface layer is oxidized. The crystalline iridium film has a polycrystalline structure and has a grain boundary between crystal grains. When such an iridium film is thermally oxidized, oxygen gas easily permeates (diffuses) into the grain boundary. Therefore, the degree of thermal oxidation becomes more prominent on the grain boundary side than on the crystal grain. Therefore, the degree of oxidation varies, and the degree of volume expansion due to oxidation varies. As a result, irregularities occur on the surface of the iridium film.

  In the present invention, the amorphous surface layer 334 is formed, and since the surface layer 334 does not have the polycrystalline structure as described above, it can be uniformly thermally oxidized. Therefore, the volume expansion due to oxidation becomes uniform, and the upper surface of the surface layer 334 can be flattened. Further, since the thickness of the surface layer 334 is 10 nm or more and oxygen hardly permeates the surface layer 334, the base layer 331 is hardly oxidized. This prevents the crystalline base layer 331 from being oxidized unevenly and causing unevenness.

  Next, as shown in FIG. 4A, the initial film 341 of the ferroelectric film 34 is formed on the iridium oxide layer 335, and the lower electrode 33a is formed. Specifically, after the iridium oxide layer 335 is formed, the base 2 is left on the susceptor 52 of the MOCVD apparatus 50. Then, the source gas and oxygen gas for the ferroelectric film 34 are respectively supplied from the supply pipes 55 and 56 into the chamber 51, and the substrate 2 is heated from the lower surface side to about 550 to 650 ° C. by the heating lamp 54.

In this embodiment, Pb (DIBM) [Pb (C ₉ H ₁₅ O ₂ ) ₂ : lead bis (diisobutyrylmethanato)], Zr (DIBM) [Zr (C ₉ H ₁₅ O ₂ ) is used as the source gas. ₂ : Zirconium (diisobutyryl methanato)], and Ti (OiPr) ₂ (DPM) ₂ [Ti (Oi-C ₃ H ₇ ) ₂ (C ₁₁ H ₁₉ O ₂ ) ₂ : Titanium (diisopropoxy) (Diisobutyrylmethanato)] is used.
Note that, as the source gas, Pb (DPM) ₂ [Pb (C ₁₁ H ₁₉ O ₂ ) ₂ : lead (dipivaloylmethanato)], Zr (IBPM) ₄ [Zr (C ₁₀ H ₁₇ O ₂ ) ₂ : Zirconium tetrakis (isobutyrylpivaloylmethanato)] and Ti (OiPr) ₂ (DPM) ₂ may be used.

  Further, the amount of oxygen gas is set to be smaller (for example, 0.1 times or more and less than 1.0 times) than the amount necessary for reacting the raw material gas. That is, by burning carbon or hydrogen, which is an organic component of the source gas, the metal components (Pb, Zr, Ti) of the source gas are separated, and these metal components are oxidized and crystallized to become PZT. An oxygen gas amount smaller than the sum of the oxygen gas amount necessary for burning the organic component and the oxygen gas amount necessary for oxidizing the metal component is supplied. Such an oxygen gas amount can be calculated based on the stoichiometry from the supplied raw material gas amount.

  Since the amount of oxygen gas to be supplied is less than the amount necessary for reacting the source gas, the formation of the initial film 341 proceeds while depriving the oxygen of the iridium oxide layer 335, that is, while reducing iridium oxide. Since the substrate 2 is heated to a temperature at which iridium can be crystallized (for example, 550 to 650 ° C.), the reduced iridium is recrystallized on the base layer 331. Since the thickness of the surface layer 334 (see FIG. 3A) is 60 nm or less, the reduced iridium can take over the (111) orientation of the underlayer 331, and this is reflected in the growth direction of the initial film 341. Can be made. In this way, the initial film 341 is formed in the (111) orientation, and the iridium film composed of the portion obtained by reducing and recrystallizing the iridium oxide layer 335 and the base layer 331 is used as the lower electrode 33a.

  Next, as shown in FIG. 4B, a core film 342 is formed on the initial film 341. Specifically, after the initial film 341 is formed, the substrate 2 is left on the susceptor 52 of the MOCVD apparatus 50. Then, the source gas and oxygen gas of the ferroelectric film 34 are supplied from the supply pipes 55 and 56 into the chamber 51, and the base 2 is heated from the lower surface side to about 450 to 550 ° C. by the heating lamp 54.

  Note that the amount of oxygen gas is set to be not less than the amount necessary for reacting the above-described raw material gas. Since the crystal orientation of the initial film 341 is the (111) orientation, the core film 342 can be formed epitaxially on the initial film 341, and the core film 342 can be formed in the (111) orientation. In addition, since the oxygen gas more than the amount necessary for reacting the source gas is supplied, the core film 342 can be formed without causing oxygen vacancies. Further, by making the heating temperature lower than that at the time of forming the initial film 341, the thermal influence on the transistor 22 (see FIG. 1) can be reduced. Since the initial film 341 is formed flat, the flat core film 342 can be formed thereon. In this way, a flat ferroelectric film 34a composed of the initial film 341 and the core film 342 is formed.

Usually, since the surface layer is not formed, the surface is uneven. If a ferroelectric film is formed on the uneven surface, the ferroelectric film is uneven. Since the uneven portion does not have the desired crystal orientation, it cannot contribute to the polarization inversion of the ferroelectric film.
In the present invention, since the surface layer 334 is uniformly oxidized and flattened, a flat initial film 341 can be formed thereon. Therefore, the flat core film 342 can be formed on the flat initial film 341, and the flat ferroelectric film 34a can be formed. Therefore, characteristic deterioration due to unevenness is prevented, and a good ferroelectric film 34a can be obtained.

Next, as shown in FIG. 4C, an upper electrode 35a made of a metal material such as platinum, iridium oxide, or iridium is formed on the ferroelectric film 34a by using, for example, a sputtering method or a CVD method.
Next, the conductive film 31a, the oxygen barrier film 32a, the lower electrode 33a, the ferroelectric film 34a, and the upper electrode 35a are patterned by using a known resist technique and photolithography technique, and the ferroelectric memory element 3 is formed. Form. In this way, the ferroelectric memory device 1 shown in FIG. 1 is obtained.

[Experimental example]
Next, differences in the crystal orientation of the ferroelectric film will be described for the five ferroelectric memory elements in which the lower electrode is formed under different conditions.

  FIG. 6 is a table showing the conditions under which the respective lower electrodes were formed for the five ferroelectric memory elements (Experimental Examples 1 to 5) formed for comparison in this experimental example. The difference between Experimental Examples 1 to 5 is only the formation conditions of the lower electrode composed of the base layer and the surface layer, and the ferroelectric film and the upper electrode are all formed by the same method. In any of the formation conditions, the base layer and the surface layer are formed by a sputtering method, and the substrate temperature when the base layer is formed is 500 ° C. Further, under any formation condition, the total thickness of the base layer and the surface layer is 100 nm.

  In Experimental Example 1, the lower electrode is formed without forming the surface layer. In Experimental Examples 2 and 3, the thickness of the underlayer is 80 nm and the thickness of the surface layer is 20 nm. In Experimental Examples 4 and 5, the thickness of the underlayer is 20 nm and the thickness of the surface layer is 80 nm. In Experimental Examples 2 and 4, the substrate temperature is 200 ° C. when the surface layer is formed, and in Experimental Examples 3 and 5, the substrate temperature is about room temperature when the surface layer is formed.

  FIG. 7 is a graph showing the (111) orientation ratio of the ferroelectric film (PZT) in each ferroelectric memory element formed under the conditions of FIG. The graph shown in FIG. 7 is based on data obtained by examining an X-ray diffraction (XRD) pattern for each ferroelectric memory element. The vertical axis indicates the orientation ratio of PZT (111), and the higher this value, the more stable and large polarization amount can be obtained. The orientation ratio of PZT (111) is determined by using the diffraction intensity I (222) of PZT (222), the diffraction intensity I (100) of PZT (100), and the diffraction intensity I (101) of PZT (101). I (222) / I (222) + I (100) + I (101)).

In Experimental Example 3 in which the substrate temperature at the time of forming the surface layer is about room temperature, the orientation ratio of PZT (111) is higher than in Experimental Example 2 in which the temperature is 200 ° C. Show. From this, it can be seen that a good ferroelectric film can be formed by lowering the substrate temperature during film formation by sputtering. This is presumably because the crystallinity of the surface layer is lowered by lowering the substrate temperature, and this can be oxidized well to form a good ferroelectric film.

  Further, in Experiment Example 3 in which the surface layer thickness was 20 nm, the orientation ratio of PZT (111) was higher than in Experiment Example 5 in which the film thickness of the surface layer was 80 nm. It shows a trend. From this, it can be seen that a good ferroelectric film can be formed by reducing the thickness of the surface layer. By reducing the surface layer thickness, the iridium oxide layer can reflect the crystal orientation of the underlayer during the formation of the initial film of the ferroelectric film, and this is reflected in the growth direction of the initial film. This is thought to be possible.

  Further, in Experimental Example 3 in which the surface layer was formed, the orientation ratio of PZT (111) was higher than in Experimental Example 1 in which the surface layer was not formed. Experimental Example 1 corresponds to a conventional method, and it can be seen that a good ferroelectric film can be formed by applying the present invention. When the surface of the ferroelectric film was observed with respect to Experimental Examples 1 and 3 using a scanning electron microscope (SEM), Experimental Example 3 to which the present invention was applied was more surface than Experimental Example 1 according to the conventional method. It was confirmed that the unevenness (roughness) was significantly reduced. From this, it is considered that by applying the present invention, the roughness is reduced and the portion that does not contribute to the polarization inversion is reduced, and a good ferroelectric film can be obtained.

  According to the method for manufacturing a ferroelectric memory element of the present invention, since the amorphous surface layer 334 is formed, the initial film 341 having a crystal orientation of (111) can be formed flat. Therefore, the (111) -oriented core film 342 can be formed flat on the flat initial film 341, and the (111) -oriented ferroelectric film 34a can be formed flat. Since the ferroelectric film 34a has a (111) orientation, its charge extraction efficiency is good. Further, since the ferroelectric film 34a is formed flat, a decrease in the polarization amount due to the unevenness is prevented. Thus, a good ferroelectric film 34a can be formed, and thus a good ferroelectric memory element 3 provided with the same can be manufactured.

  Although the stack type ferroelectric memory device has been described in the above embodiment, the present invention can also be applied to a planar type, and the effects of the present invention can be obtained. In the above embodiment, the amorphous surface layer 334 is thermally oxidized using the MOCVD apparatus. However, the amorphous surface layer 334 may be thermally oxidized by furnace annealing using an electric furnace or the like. Furnace annealing is subject to processing time restrictions such as infrared heating means (lamps) as in the case of thermal oxidation by lamp annealing, and restrictions on the amount of oxygen supplied, such as thermal oxidation by the MOCVD apparatus. There are few things. Therefore, sufficient thermal oxidation can be performed, and a good iridium oxide layer can be formed.

1 is a side cross-sectional configuration diagram illustrating an example of a ferroelectric memory device according to a method of the present invention. (A)-(c) is sectional process drawing which shows the manufacturing method of this invention. (A)-(c) is sectional process drawing which continues from FIG.2 (c). (A)-(c) is sectional process drawing which continues from FIG.3 (c). It is a schematic diagram which shows the structure of a MOCVD apparatus. It is a table | surface which shows the formation conditions of the lower electrode in Experimental example 1-5. It is a graph which shows the orientation rate of the ferroelectric film in Experimental Examples 1-5.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Ferroelectric memory device, 2 ... Base | substrate, 3 ... Ferroelectric memory element, 21 ... Silicon substrate (substrate | substrate), 22 ... Transistor, 33, 33a ... Lower electrode , 34, 34a ... ferroelectric film, 35, 35a ... upper electrode, 331 ... underlayer, 334 ... surface layer, 335 ... iridium oxide layer, 341 ... initial film, 342 ... Core film

Claims (5)

Forming an iridium film including an amorphous surface layer above the substrate;
An oxidation step of oxidizing the amorphous surface layer to form an iridium oxide layer;
Forming a ferroelectric film on the iridium oxide layer by MOCVD;
Forming a electrode on the ferroelectric film, and a method for manufacturing a ferroelectric memory element.   In the step of forming the iridium film, a surface layer of the iridium film is formed by a sputtering method, and at least one or more of a substrate temperature, an atmospheric pressure, an atmospheric gas amount, or a film formation power at the time of formation is adjusted to form an amorphous state. 2. The method of manufacturing a ferroelectric memory element according to claim 1, wherein the ferroelectric memory element is a surface layer.   3. The method of manufacturing a ferroelectric memory element according to claim 2, wherein an amorphous film is formed by performing the sputtering method without heating the substrate.   In the step of forming the iridium film, an underlayer having a (111) orientation belonging to a face-centered cubic crystal is formed above the substrate, and then an amorphous surface layer is formed thereon to form the underlayer and the The method of manufacturing a ferroelectric memory element according to claim 1, wherein an iridium film including a surface layer is formed.   5. The method of manufacturing a ferroelectric memory element according to claim 4, wherein the amorphous surface layer is formed to a thickness of 10 nm to 60 nm.

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