JP2009301491A - Memory controller, flash memory system equipped with memory controller, and control method for flash memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a management technique for a storage area capable of enhancing an efficiency of data rewriting, while restraining a burden concerned in management of a correspondence between a logical page and a physical page. <P>SOLUTION: Each logical block is applied with the management of the storage area fixed in the correspondence between the logical page and the physical page, and the management of the storage area not fixed in the correspondence between the logical page and the physical page. The management of the storage area in the logical area is changed to the management of the storage area not fixed in the correspondence between the logical page and the physical page, when data writing assigned with an area of capacity smaller than a prescribed sector number is indicated by a prescribed frequency or more, in the logical block applied with the management of the storage area not fixed in the correspondence between the logical page and the physical page. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a memory controller, a flash memory system including the memory controller, and a flash memory control method.

  In an information processing device (host system) such as a computer, an information storage device (flash memory) such as a CF (Compact Flash) card or SSD (Solid State Drive) using a flash memory as a storage medium for storing various file data System) is increasingly used. In such a flash memory system, access to the flash memory is performed based on an access instruction given from the host system. Further, in the access instruction given from the host system, the access target area is instructed by the address given to the area of sector (512 bytes) unit.

  In a NAND flash memory generally used as a storage medium of such a flash memory system, data is written in units of pages (physical pages), and stored data is stored in units of physical blocks including a plurality of physical pages. Erasing is performed.

  In a flash memory system using a NAND flash memory, a logical page obtained by collecting one or a plurality of sector-by-sector areas with addresses managed on the host system side is assigned to a physical page. To avoid complicated management of the correspondence between logical pages and physical pages, a logical block is formed by collecting a plurality of logical pages, and the correspondence between logical blocks and physical blocks is managed in units of blocks. Yes. Note that the correspondence between a logical page included in a logical block and a physical page included in a physical block corresponding to the logical block may or may not be fixed.

  A storage area management method in which the correspondence between a logical page included in a logical block and a physical page included in a physical block corresponding to the logical block is fixed (hereinafter referred to as “page correspondence relationship fixing method”) is For example, it is described in Patent Document 1. In this page correspondence fixed method, when data is written according to the access instruction from the host system, the data is written into the physical block corresponding to the logical block including the logical page of the write destination specified by the access instruction. Even if there is a physical page that has not been written, if data has been written to the physical page corresponding to the logical page of the write destination, another physical block is newly allocated to the logical block including the logical page of the write destination. Data is written to the physical block. Therefore, in the page correspondence fixed method, when new data given from the host system is written to the flash memory, the frequency at which the data stored in the flash memory is transferred to another physical block increases.

  The storage area management method in which the correspondence between the logical page included in the logical block and the physical page included in the physical block corresponding to the logical block is not fixed (hereinafter referred to as “page correspondence variable variable method”) For example, it is described in Patent Document 2. In this page correspondence variable method, data corresponding to each logical page given from the host system is written in order from the first physical page in which data in the physical block is not written. Therefore, in the page correspondence variable method, the frequency of data transfer as described above is low, but it is necessary to manage the correspondence between logical pages and physical pages.

  File data stored in the flash memory system is normally managed by a file system such as a FAT (File Allocation Table) file system or NT file system. Therefore, not only file data but also information for managing file data is stored in the flash memory system. For example, in the case of the FAT file system, information including the root directory and information on the cluster number used by the file are stored. Also in the case of the NT file system, information including a file name and an index is stored.

  Also, file data managed by the FAT file system / NT file system or the like is divided into data of a predetermined cluster size, and the divided data is stored in the flash memory. As the storage capacity of the flash memory system increases, the cluster size increases in stages, such as 512 bytes, 1 kbyte, 2 kbytes, and 4 kbytes. If the data to be written based on the write instruction given from the host system is file data, the data write is instructed in this cluster unit. That is, when the data to be written is file data, the data writing is not instructed in a unit smaller than the cluster size. On the other hand, if the data to be written is information for managing file data, data writing may be instructed in units smaller than the cluster size (for example, sector units).

  As an area in which data writing is instructed with this small capacity (hereinafter referred to as “small capacity access area”), for example, an area in which information for managing file data in the FAT file system or NT file system is stored Is mentioned. In the case of a FAT file system, a directory area in which information including a file name and a root directory is stored, and a FAT area in which information on a cluster number is stored correspond to a small capacity access area. In the case of the NT file system, an MFT (Master File Table) area (area allocated to a management record) in which information including a file name and an index is stored corresponds to a small capacity access area.

  Since information for managing such file data is frequently rewritten, data corresponding to the small-capacity access area is often rewritten frequently. Therefore, for the logical block to which the small capacity access area belongs, it is preferable that the correspondence relationship between the logical page included in the logical block and the physical page included in the physical block corresponding to the logical block is not fixed. That is, for the logical block to which the small-capacity access area belongs, it is preferable that the correspondence between the logical page and the physical page is managed by the page correspondence variable method.

Japanese Patent Laid-Open No. 11-110283 JP 2005-196736

  The flash memory system electrically connected to the host system accesses the flash memory in the flash memory system based on an access instruction given from the host system. The access instruction given from the host system includes a command for instructing writing or reading and a logical address for designating an area to be accessed. The flash memory system manages the correspondence between the logical address given by the host system and the physical address assigned to the storage area in the flash memory, and the data given from the host system is flashed based on this correspondence. Write to the memory or read data stored in the flash memory from the flash memory.

  In such access processing, whether or not the logical address given from the host system is a logical address assigned to the above-mentioned small capacity access area such as the directory area, FAT area, and MFT area is determined on the flash memory system side. It cannot be judged.

  That is, on the flash memory system side, the logical block to which the small capacity access area belongs cannot be determined. Therefore, the management of the correspondence between the logical page and the physical page by the page correspondence variable method cannot be applied only to the logical block to which the small capacity access area belongs. In addition, when the management of the correspondence between logical pages and physical pages using the page correspondence variable method is applied to all logical blocks, the efficiency of data rewriting improves, but the correspondence between logical pages and physical pages. The burden related to the management becomes large.

  Accordingly, an object of the present invention is to provide a storage area management technique capable of improving the efficiency of data rewriting while suppressing an increase in the burden associated with managing the correspondence between logical pages and physical pages.

A memory controller according to a first aspect of the present invention is a memory controller that controls access to a flash memory to be erased in units of physical blocks including a plurality of physical pages, in accordance with an access instruction given from a host system.
Logical block management means for managing, as a logical block, an area having a predetermined number of sectors including a plurality of areas in sector units to which a logical address designated by the access instruction is assigned;
Storage area allocating means for allocating a predetermined number of physical blocks in the flash memory to the logical block;
Logical block type determination means for determining the type of the logical block based on the number of times data write specifying a region having a capacity smaller than a predetermined number of sectors with respect to the region in each logical block is instructed by the access instruction; ,
Data writing means for writing data to a physical block corresponding to the logical block to which the write destination area designated by the access instruction belongs,
The logical block type determining means determines the logical block whose number is less than a predetermined number as a first logical block, and determines the logical block whose number is a predetermined number or more as a second logical block,
The data writing means writes data in the order of the logical addresses to the physical block corresponding to the logical block determined to be the first logical block, and the logical block determined to be the second logical block. Data is written to the physical block corresponding to the block without depending on the order of the logical addresses.

  In a preferred embodiment, the memory controller further includes data copying means for copying storage data in a physical block in which data is not written in the order of the logical addresses to another physical block in the order of the logical addresses. When writing of data designating an area having a capacity smaller than the predetermined number of sectors is not instructed for a predetermined period of time in any of the logical blocks in which the number of times is equal to or greater than the predetermined number, the logical block The type determining unit determines that any one of the logical blocks is a first logical block, and the data copying unit determines that the storage data in the physical block corresponding to the one logical block is another physical block. Are copied in the order of the logical addresses.

  A flash memory system according to a second aspect of the present invention comprises the memory controller according to the first aspect or the preferred embodiment, and a flash memory accessed by the memory controller.

A method according to a third aspect of the present invention is a flash memory control method in which erasing is performed in units of physical blocks including a plurality of physical pages in accordance with an access instruction given from a host system.
A logical block management step of managing, as a logical block, an area having a predetermined number of sectors including a plurality of areas in units of sectors to which a logical address designated by the access instruction is assigned;
A storage area allocation step for allocating a predetermined number of physical blocks in the flash memory to the logical block;
A logical block type determination step for determining a type of the logical block based on the number of times data write specifying a region having a capacity smaller than a predetermined number of sectors to the region in each logical block is instructed by the access instruction; ,
A data writing step of writing data to a physical block corresponding to the logical block to which the write destination area designated by the access instruction belongs,
In the writing method determining step, the logical block having the number of times less than a predetermined number is determined as a first logical block, and the logical block having the number of times being a predetermined number or more is determined as a second logical block,
In the data writing step, data is written in the order of the logical addresses to the physical block corresponding to the logical block determined as the first logical block, and the logical block determined as the second logical block Data is written to the physical block corresponding to the block without depending on the order of the logical addresses.

  In a preferred embodiment, there is further provided a data copying step of copying storage data in a physical block in which data is not written in the order of the logical addresses to another physical block in the order of the logical addresses. When the writing of data designating an area having a capacity smaller than the predetermined number of sectors is not instructed for a predetermined period with respect to an area in any of the logical blocks in which the number of times is equal to or greater than the predetermined number, the writing method In the determination step, any one of the logical blocks is determined as a first logical block, and in the data copying step, storage data in a physical block corresponding to the any one of the logical blocks is transferred to another physical block. It is copied in the order of the logical addresses.

  If the storage area management according to the present invention is applied to a flash memory system that operates based on an instruction from a host system, data rewriting can be performed while suppressing an increase in the burden associated with managing the correspondence between logical pages and physical pages. Efficiency can be improved. In addition, in the management of this storage area, the management of the area where the correspondence between the logical page and the physical page is fixed and the management of the area where the correspondence between the logical page and the physical page is not fixed are applied. There is no need to set a predetermined area.

  FIG. 1 is a block diagram schematically showing a configuration of a flash memory system 1 according to an embodiment of the present invention. As shown in FIG. 1, the flash memory system 1 includes a flash memory 2 and a memory controller 3 that controls the flash memory 2. The memory controller 3 and the flash memory 2 are connected via an internal bus 14.

  The flash memory system 1 is connected to the host system 4 via the external bus 13. The host system 4 is composed of a CPU (Central Processing Unit) for controlling the entire operation of the host system 4, a companion chip for transferring information to and from the flash memory system 1, and the like. The host system 4 may be various information processing apparatuses such as a personal computer and a digital still camera that process various types of information such as characters, sounds, and image information.

  As shown in FIG. 1, the memory controller 3 includes a microprocessor 6, a host interface block 7, an SRAM 8, a buffer 9, a flash memory interface block 10, an ECC (Error Correcting Code) block 11, and a ROM ( Read Only Memory) 12. The memory controller 3 constituted by these functional blocks is integrated on one semiconductor chip. Hereinafter, each functional block will be described.

  The host interface block 7 exchanges data, address information, status information, commands, and the like with the host system 4. Data or the like supplied from the host system 4 to the flash memory system 1 is taken into the flash memory system 1 (for example, the buffer 9) using the host interface block 7 as an entrance. Data supplied from the flash memory system 1 to the host system 4 is supplied to the host system 4 through the host interface block 7 as an exit.

  An SRAM (Static Random Access Memory) 8 is a volatile storage element, and information necessary for controlling the flash memory 2 is temporarily stored in the storage area. For example, an address conversion table, an empty block search table, etc. are held. Here, the address conversion table is a table showing the correspondence between logical blocks and physical blocks, and the free block search table is an erased physical block (or a physical block in which valid data is not stored). This is a table for searching.

  The ROM 12 is a nonvolatile storage element, and stores firmware necessary for the memory controller 3 to operate.

  The buffer 9 temporarily holds data given from the host system 4 or data read from the flash memory 2. For example, data written to the flash memory 2 is held in the buffer 9 until the flash memory 2 is in a writable state. The data read from the flash memory 2 is held in the buffer 9 until the host system 4 can receive the data.

  The flash memory interface block 10 executes various processes for the flash memory 2. In this process, data, address information, status information, commands, etc. are exchanged between the flash memory interface block 10 and the flash memory 2 via the internal bus 14.

  The ECC block 11 generates an error correcting code (ECC) added to data to be written to the flash memory 2 and is included in the read data based on the error correcting code added to the read data. Detect and correct errors.

  The microprocessor 6 controls the overall operation of the memory controller 3 in accordance with the program code read from the ROM 12.

  The memory controller 3 composed of the above functional blocks operates according to an access instruction given from the host system 4. This access instruction includes a command for instructing an operation such as writing, reading or erasing (hereinafter, a command given from the host system 4 is referred to as an “external command”). Further, when an external command for instructing writing or reading is given from the host system 4, address information for instructing an area to be accessed is given from the host system 4 together with this external command. This address information includes information indicating the start address and capacity (number of sectors) of the area to be accessed.

  Based on the access instruction given from the host system 4, the memory controller 3 instructs the flash memory 2 to perform an operation such as writing, reading or erasing (hereinafter, the command given by the memory controller 3 to the flash memory 2 is “ Internal command). When the memory controller 3 gives an internal command for instructing writing or reading to the flash memory 2, a physical address for instructing a storage area in the flash memory 2 is given to the flash memory 2 together with the internal command.

  The flash memory 2 is a NAND type flash memory, and includes a register and a memory cell array composed of a plurality of memory cells. The memory cell array includes a plurality of memory cell groups and word lines. In the memory cell group, a plurality of memory cells are connected in series. Each word line is for selecting a specific memory cell in the memory cell group. Data is written from the register to the memory cell or read from the memory cell to the register between the memory cell and the register in each memory cell group selected via the word line.

  In the NAND flash memory, data reading and writing are performed in units of pages (physical pages), and data erasing is performed in units of blocks (physical blocks). A physical block is composed of a plurality of physical pages. For example, one physical page is composed of a user area which is a 2048-byte storage area and a redundant area which is a 64-byte storage area, and one physical block is composed of 64 physical pages. Yes. The redundant area is an area in which additional data such as an error correcting code (ECC), logical address information, and a block status (flag) is stored. The logical address information is information indicating a logical block corresponding to the physical block. The block status (flag) is information indicating pass / fail of the physical block.

  The address space on the host system 4 side is managed by an LBA (Logical Block Address) which is a serial number assigned to an area (hereinafter referred to as a logical sector area) divided in units of sectors (512 bytes). The memory controller 3 handles an area composed of a plurality of logical sector areas as a logical block, and allocates one or a plurality of physical blocks to the logical block. The correspondence between the logical block and the physical block is managed by an address conversion table. In this address conversion table, the correspondence between the logical block and the physical block is managed by associating the physical block address (PBA) attached to the physical block with the logical block number (LBN) attached to the logical block. .

  In the present embodiment, as shown in FIG. 2, a logical block is formed by combining 256 logical sector areas having consecutive LBAs, and a logical block number (LBN) is assigned to this logical block. For example, the 256 logical sector areas of LBA # 0 to # 255 belong to the logical block of LBN # 0, and the 256 logical sector areas of LBA # 256 to # 511 belong to the logical block of LBN # 1. . As described above, the 2048,000 logical sector areas of LBA # 0 to # 20479999 belong to one of 8000 logical blocks of LBN # 0 to # 7999.

  Further, as a convenience for managing the address conversion table, the memory controller 3 treats a group of a plurality of logical blocks as a logical group, and manages the address conversion table in units of the logical group. Hereinafter, a serial number assigned to a logical group is referred to as a logical group number (LGN). In the example shown in FIG. 2, logical groups are formed such that logical blocks having consecutive LBNs are sequentially distributed to different logical groups. Here, the logical block of LBN # 0 is in the logical group of LGN # 0, the logical block of LBN # 1 is in the logical group of LGN # 1, and the logical block of LBN # 2 is in the logical group of LGN # 2. 1000 logical blocks of LBN # 0 to # 7999 are allocated to each logical group of LGN # 0 to # 7. The number of logical blocks included in each logical group can be set as appropriate, but is preferably set in consideration of the storage capacity of the physical page of the flash memory 2 in which the address translation table is stored. That is, the address conversion table corresponding to each logical group preferably has a capacity that can be stored in one physical page.

  Next, management of the correspondence between logical pages and physical pages, which is one of the features of this embodiment, will be described. In this embodiment, as shown in FIG. 3A, a logical page is formed by four logical sector areas. Accordingly, 64 logical pages with logical page numbers (LPN) # 0 to # 63 are formed in a logical block including 256 logical sector areas. The number of logical sector regions in which this logical page is formed, that is, how many sectors the logical page capacity is to be set can be appropriately set in consideration of the storage capacity of the physical page.

  When the sector numbers (SN) of # 0 to # 256 are assigned to the 265 logical sector areas included in the logical block as shown in FIG. 3 belongs to the logical page of LPN # 0, the logical sector areas of SN # 4 to # 7 belong to the logical page of LPN # 1, and the logical sector areas of SN # 252 to # 255 in the same manner. Belongs to the logical page of LPN # 63.

  In the present embodiment, a logical block including 64 logical pages is allocated to a physical block composed of 64 physical pages. Therefore, the data corresponding to each logical page in the logical block is written to any physical page in the physical block assigned to the logical block. The memory controller 3 manages whether or not the correspondence between the logical page and the physical page is fixed in units of logical blocks.

  FIG. 3B shows a case where the correspondence between the logical page and the physical page is fixed, and FIG. 3C shows a case where the correspondence between the logical page and the physical page is not fixed. In FIG. 3B and FIG. 3C, the physical numbers (PPNs) # 0 to # 63 are attached to the 64 physical pages constituting the physical block. When the correspondence between the logical page and the physical page is fixed, as shown in FIG. 3B, the LPN # 0 logical page corresponds to the PPN # 0 physical page, and the LPN # 1 logical page The logical page of LPN # 63 corresponds to the physical page of PPN # 63. Therefore, when the correspondence between the logical page and the physical page is fixed, for example, data corresponding to the logical page of LPN # 0 is written only to the physical page of PPN # 0 and not written to other physical pages. On the other hand, when the correspondence between the logical page and the physical page is not fixed, the correspondence between the logical page and the physical page can be freely changed. For example, FIG. 3C is an example of the correspondence between the logical page and the physical page when the correspondence between the logical page and the physical page is not fixed, and the logical page of LPN # 4 is the physical page of PPN # 0. The logical page of LPN # 6 corresponds to the physical page of PPN # 1, and the logical page of LPN # 0 corresponds to the physical page of PPN # 2. In this correspondence, data corresponding to the logical page of LPN # 4 is written to the physical page of PPN # 0, but the data written to the physical page of PPN # 0 is any logical page of LPN # 0 to # 63. It may be data corresponding to.

  A logical block (hereinafter referred to as “first area management block”) to which management of a storage area in which the correspondence between the logical page and the physical page is fixed, and a storage area in which the correspondence between the logical page and the physical page is not fixed. The logical block to which the management is applied (hereinafter referred to as “second area management block”) is determined by the memory controller 3. Next, this determination method will be described.

  When the host system 4 instructs the flash memory system 1 to write data, the host system 4 is given an external command for instructing writing and address information for instructing a write destination area. It is done. This address information includes information indicating the number of sectors in the write destination area. Here, if the data to be written is file data, the data is written in units of clusters, so the number of sectors in the write destination area does not become smaller than the cluster size (sector number). On the other hand, if the data to be written is information for managing file data, the number of sectors in the write destination area may be smaller than the size of the cluster (number of sectors).

  Therefore, in the case where writing in a unit smaller than the cluster size (number of sectors) is instructed to an area corresponding to a specific range of LBA, the area stores information for managing file data. It is likely that it is assigned first. For example, when the host system 4 employs a FAT file system, a directory area in which information including the file name and the root directory of the file is stored, and a FAT area in which cluster number information is stored are allocated. There is a high possibility that an instruction to write in a unit whose LBA range is smaller than the cluster size (number of sectors) is given. In the NT file system, the MFT (Master File Table) area (area allocated to the management record) in which information including the file name and index is stored is smaller than the cluster size (number of sectors). There is a high possibility that writing is instructed.

  Therefore, the memory controller 3 manages file data such as a directory area, FAT area, or MFT (Master File Table) area based on the number of sectors in the write destination area included in the address information given from the host system 4. The logical block including the area (hereinafter referred to as “file management area”) in which the above information is stored is specified. Further, the memory controller 3 applies storage area management that does not fix the correspondence between the logical page and the physical page only to the logical block specified as the logical block including the file management area. That is, only the logical block specified as the logical block including the file management area is changed from the first area management block to the setting of the second area management block, and is not specified as the logical block including the file management area. The logical block is set as the first area management block.

  Therefore, although the rewriting efficiency is improved for the logical block specified as the logical block including the file management area, it is necessary to manage the correspondence between the logical page and the physical page. Next, the management of the correspondence between the logical page and the physical page in the logical block specified as the logical block including the file management area, that is, the logical block set as the second area management block will be described.

  For example, the memory controller 3 has information (hereinafter referred to as “page management information”) indicating the correspondence between the logical page and the physical page in the redundant area of the physical block allocated to the logical block set as the second area management block. ) Is managed, the correspondence between the logical page and the physical page in the logical block set as the second area management block is managed. The memory controller 3 reads this page management information and determines the correspondence between the logical page and the physical page based on the read page management information.

  When data is written to the physical page in the physical block assigned to the logical block set as the second area management block, the LPN of the logical page corresponding to this data is written to the redundant area The correspondence between the logical page and the physical page is determined based on the LPN written in the redundant area.

  When data is written to the physical page in the physical block assigned to the logical block set as the second area management block, the next page (user area) of the physical page to which the last data is written, A table (hereinafter referred to as “page management table”) indicating physical pages corresponding to the logical pages of LPN # 0 to # 63 may be written. In this case, the memory controller 3 can grasp the correspondence between the logical page and the physical page for all logical pages by reading the latest page management table.

  Note that it is preferable that two physical blocks be assigned to the logical block set as the second area management block. That is, it is preferable that a larger number of physical blocks be assigned to the logical block set as the second area management block than the logical block set as the first area management block. In this way, the number of physical pages that can be allocated to each logical page increases, so that the data rewriting efficiency is further improved. Further, when the page management table is written in the user area, a sufficient physical page is secured as the page management table write destination.

  Hereinafter, the operation of the memory controller 3 in the present embodiment will be described.

  First, an operation in which the memory controller 3 specifies a logical block including a file management area will be described.

  The host interface block 7 of the memory controller 3 includes various registers accessible from the host system 4 (hereinafter referred to as “host interface registers”). An access instruction given from the host system 4 to the memory controller 3 is written in the host interface register. When the host system 4 instructs the memory controller 3 to write data, “external command for instructing data writing”, “LBA for instructing writing of head data”, and “number of sectors in the data writing area” (The number of sectors corresponding to the capacity of data to be written) "is written to the host interface register.

  In this embodiment, the data to be written is file data or the file data is managed based on “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” written in the host interface register. It is determined whether the information is for use. In order to make this determination, a threshold value (hereinafter referred to as “sector number setting value”) is set for “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” written in the host interface register. Is done. The memory controller 3 determines that the data to be written is file data when “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” is equal to or larger than the sector number setting value. If it is smaller than the value, it is determined that the data to be written is information for managing the file data.

  As already described, if the data to be written is file data, the data is written in units of clusters. Therefore, the sector number setting value is preferably set in accordance with the number of sectors in the cluster. However, the sector number setting value may be smaller than the number of sectors in the cluster. For example, when the number of sectors in the cluster is 8, the sector number setting value may be “4”.

  Next, a table used for specifying a logical block including a file management area (hereinafter referred to as “small capacity write management table”) will be described with reference to FIG. In the small capacity write management table shown in FIG. 4, a write setting flag indicating whether each logical block is set as the first area management block or the second area management block, and the number of sectors The number of times of writing data with the number of sectors smaller than the set value (hereinafter referred to as “the number of small capacity writing instructions”) is written. The write setting flag written in the small capacity write management table and the small capacity write instruction count are associated with each LBN. The write setting flag “0” indicates that the logical block is set as the first area management block, and the write setting flag “1” indicates that the logical block is set as the second area management block. It shows that. This small capacity write management table is updated on the SRAM 8 and stored in the flash memory 2. When this small-capacity write management table is not stored in the flash memory 2, the small-capacity write management table in which the write setting flag is set to “0” and the small-capacity write instruction count is set to “0” (FIG. 4A )) Is created on the SRAM 8, and the created small-capacity write management table is stored in the flash memory 2.

  When an access instruction for instructing writing is given from the host system 4, that is, when an "external command for instructing data writing" is written in the host interface register, the memory controller 3 sends the host interface register together with the external command. It is determined whether or not “the number of sectors in the area in which data is written (the number of sectors corresponding to the capacity of the data to be written)” written in is smaller than the sector number setting value. If it is determined that the value is smaller than the sector number setting value, the memory controller 3 further specifies the logical block to which the data write destination area corresponding to the external command belongs. That is, in this process, the logical block to which the area instructed to write the data having the sector number smaller than the sector number setting value belongs is specified. For example, when the sector number setting value is “4”, “512” is set as the LBA for instructing the writing of the head data together with the external command for instructing the host interface register to write the data. When “1” is written as the number of sectors corresponding to the capacity of the data to be written), the logical block of LBN # 2 is the logical block to which the area instructed to write the data with the sector number smaller than the sector number setting value belongs. Identified.

  The small-capacity write management table is updated when a logical block to which an area instructed to write data having a sector number smaller than the sector number set value belongs is specified. In this update process, the small-capacity write instruction count associated with the LBN of the logical block to which the area instructed to write data having a sector number smaller than the sector count setting value on the small-capacity write management table is increased by one. It is. For example, when the logical block to which the area for which the writing of data with the number of sectors smaller than the sector number setting value belongs is the logical block of LBN # 2, it is associated with LBN # 2 on the small capacity write management table. If the small capacity write instruction count is “10”, the small capacity write instruction count is rewritten to “11”.

  In the present embodiment, a threshold (hereinafter referred to as “write count setting value”) is also provided for the small-capacity write instruction count on the small-capacity write management table. When any of the small-capacity write instruction counts on the small-capacity write management table is equal to or greater than the write count setting value, the setting of the logical block of the LBN associated with the small-capacity write instruction count is the first The area management block is changed to the second area management block. Further, the write setting flag associated with the LBN of the logical block is rewritten from “0” to “1”. For example, when the write count setting value is set to “128” and the small-capacity write instruction count associated with LBN # 2 reaches “128”, the logical block setting of LBN # 2 is set to the first. The first area management block is changed to the second area management block. Further, the write setting flag associated with LBN # 2 is rewritten from “0” to “1” (see FIG. 4B).

  Next, a case where the LBA range assigned to the file management area is changed on the host system 4 side will be described. When such a change is made, a logical block that includes a logical sector area corresponding to the LBA range allocated to the file management area becomes a logical block that does not include a logical sector area corresponding to the LBA range. It may become. That is, when the LBA range assigned to the file management area is changed, the logical block to which the area instructed to write data having a sector number smaller than the sector number setting value may change. In such a case, data is not written in units smaller than the cluster size (number of sectors) for the physical block corresponding to the logical block set in the second area management block. On the other hand, data is written in units smaller than the cluster size (number of sectors) to the physical block corresponding to the logical block set in the first area management block.

  For logical blocks that no longer include a logical sector area corresponding to the LBA range due to a change in the LBA range assigned to the file management area, the first area management block to the second area management block Settings need to be changed to block. For example, when the range of the LBA allocated to the file management area is changed from the range of # 512 to # 767 to the range of # 768 to # 1023, the logical block setting of LBN # 2 is set to the second area management block Need to be changed to the first area management block.

  Therefore, the memory controller 3 identifies the logical block that no longer includes the logical sector area corresponding to the range of the LBA assigned to the file management area, and sets the logical block from the second area management block to the second area management block. Change to 1 area management block. Then, when the setting of the logical block is changed from the second area management block to the first area management block, the memory controller 3 transfers the data stored in the physical block corresponding to the logical block to another physical block. Rewrite (copy) the physical pages in the block in the order of LPN. That is, the data corresponding to the logical block is transferred again to another physical block so as to satisfy the correspondence between LPN and PPN (see FIG. 3B) when the correspondence between the logical page and the physical page is fixed. Written. The other physical block (copy destination physical block) is assigned to the logical block instead of the physical block corresponding to the logical block (copy source physical block).

  Next, using the small capacity write management table as shown in FIG. 4, the memory controller 3 identifies the logical block that no longer includes the logical sector area corresponding to the LBA range allocated to the file management area. An operation for changing the setting of the logical block from the second area management block to the first area management block will be described. In this example, the memory controller 3 sets all the small-capacity write instruction counts on the small-capacity write management table to “0” every predetermined period (for example, every time a data write instruction is given from the host system). A reset process for returning is executed (see FIG. 4C). When executing this reset process, the number of small-capacity write instructions associated with each LBN corresponds to the number of data write instructions with a sector number smaller than the sector number set value during a predetermined period. When the small capacity write instruction count is “0” when executing the above, it means that the writing of data having a sector number smaller than the sector number set value has not been instructed during the predetermined period.

  When executing the reset process, the memory controller 3 refers to the small-capacity write instruction count associated with the LBN whose write setting flag is set to “1”, and the small-capacity write instruction count is “0”. If it is, the write setting flag of the LBN is changed to “0”. As a result of the memory controller 3 operating in this way, any logical block set in the second area management block is not instructed to write data having a sector number smaller than the sector number set value during a predetermined period. The setting of the logical block is changed from the second area management block to the first area management block.

  When the reset process is executed, if the number of small-capacity write instructions associated with the LBN for which the write setting flag is set to “1” is less than the predetermined number, the LBN The write setting flag may be changed to “0”. In this case, for any one of the logical blocks set in the second area management block, the number of times that writing of data with a sector number smaller than the sector number set value is instructed during the predetermined period is the predetermined number of times. When the number is smaller, the setting of the logical block is changed from the second area management block to the first area management block. When the setting of the logical block is changed from the second area management block to the first area management block, the data corresponding to the logical block includes the LPN when the correspondence between the logical page and the physical page is fixed. The correspondence relationship of the PPN is written in order (in this embodiment, in the order of LPN) to the physical block assigned to the logical block.

  In addition, it is preferable that a write setting flag and a small-capacity write instruction count regarding the logical block corresponding to the physical block are written in the redundant area in the physical block to which any logical block is allocated. Here, the redundant area and the information written in the redundant area will be described to the extent necessary for explaining the present embodiment. Each physical page included in the physical block is normally used by being divided into a user area in which data given from the host system is written and a redundant area in which other data is written. For data stored in the user area, an error correcting code (ECC) is usually generated for each sector, and the error correcting code is written in the redundant area. Therefore, as shown in FIG. 5, the redundant area 20 includes a common redundant area 21 in which information on the entire physical block or information on each physical page is written, and a divided redundant area allocated to each sector area of the user area. 22 are used. The write setting flag is preferably written in the common redundant area 21 of the first physical page in the physical block or the common redundant area 21 of each physical page. The number of small capacity write instructions is preferably written in the common redundant area 21 or the divided redundant area 22 of each physical page.

  Next, the operation of the memory controller 3 in the present embodiment will be described with reference to the flowchart of FIG.

Step 1 (S1):
When an access instruction can be given from the host system, the memory controller 3 determines whether the access instruction is a write instruction. That is, it is determined whether or not the external command given from the host system is a write command. If the external command given from the host system is a write command (S1: Yes), the process proceeds to step 2 (S2).

Step 2 (S2):
The memory controller 3 determines whether or not an instruction to write data having a sector number smaller than the sector number setting value k is instructed. That is, it is determined whether or not the value of “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” given together with the write command from the host system is less than k. When the value of “the number of sectors in the data writing area (the number of sectors corresponding to the capacity of the data to be written)” is less than k (S2: Yes), the process proceeds to step 3 (S3).

Step 3 (S3):
The memory controller 3 specifies the logical block to which the data write destination area specified by the write instruction from the host system belongs. That is, the memory controller 3 is based on the “LBA instructing writing of head data” and “the number of sectors in the area to write data (the number of sectors corresponding to the capacity of the data to be written)” given together with the write command from the host system. The LBA range corresponding to the data write destination area is obtained. Then, a logical block including a logical sector area in the LBA range is specified.

Step 4 (S4):
The memory controller 3 updates the small capacity write management table. That is, the memory controller 3 increases the value of the small-capacity write instruction count associated with the LBN of the logical block specified in step 3 (S3) by one.

Step 5 (S5):
The memory controller 3 determines that the number of write instructions for the sector number smaller than the sector number setting value k (k is a natural number) for the area in the logical block specified in step 3 (S3) is the write number setting value n (n is It is determined whether or not the natural number has been reached. In other words, the memory controller 3 updates the small capacity write management table in step 4 (S4), so that the value of the small capacity write instruction count associated with the LBN of the logical block specified in step 3 (S3) is changed. It is determined whether or not n has been reached. When the value of the small capacity write instruction count associated with the LBN of the logical block identified in step 3 (S3) has reached n (S5: Yes), the process proceeds to step 6 (S6).

Step 6 (S6):
In the memory controller 3, the write setting flag corresponding to the logical block specified in step 3 (S3) is changed from “0” to “1”. That is, the setting of the logical block specified in step 3 (S3) is changed from the first area management block to the second area management block.

  The above is the description of the operation of the memory controller 3 in the present embodiment.

  Although not specifically shown in FIG. 6, if S2: No, the logical block including the data write destination area is the logical block set as the first area management block, and thus the write operation is performed. The target data is written to the physical block corresponding to the logical block in an order that does not depend on the LPN. In the case of S5: No, if the logical block specified in S3 is a logical block set as the first area management block, the logical block is written in the order in which the data to be written does not depend on the LPN. On the other hand, if the logical block specified in S3 is the logical block set as the second area management block, the data to be written is the logical block in the LPN order. It is written in the physical block corresponding to the block.

  Further, the value of the sector number setting value k, the value of the write count setting value n, the capacity of the area included in the logical block, the number of physical blocks allocated to each logical block, and the like can be set as appropriate. Further, as described above, every small capacity write instruction count on the small capacity write management table is returned to “0” every predetermined period (for example, every time a data write instruction is given from the host system 4 a predetermined number of times). In order to do so, a counter that is counted up every time the host system 4 is instructed to write data is provided, and when the count value reaches a predetermined value, all the small capacities on the small capacity write management table are provided. The number of write instructions may be returned to “0”.

  Although the embodiment of the present invention has been described above, this is an example for explaining the present invention, and the scope of the present invention is not limited to this embodiment. Of course, various modifications can be made without departing from the scope of the present invention.

  For example, in the above-described embodiment, the small-capacity write management table is used to manage the small-capacity write instruction count (the number of times the data write of the sector number smaller than the sector number setting value is instructed). The number of small capacity write instructions may be managed by a method. For example, each time data is written to each physical block, if the memory controller 3 writes the latest small-capacity write instruction count in the redundant area of the physical block, the data is written in the redundant area of the physical block. Based on the small-capacity write instruction count, the logical block that is instructed to write data specifying an area smaller than the sector number set value a predetermined number of times is specified.

  In addition, every time an instruction to write data with a sector number smaller than the sector number setting value is given, the “LBA instructing the writing of head data” and “the number of sectors in the data writing area (capacity of data to be written) corresponding to the instruction are written. Data is cumulatively recorded, and when this data is accumulated a predetermined number of times, this data is aggregated, and data is written a specified number of times specifying an area smaller than the sector number setting value. The instructed logical block may be specified.

  In the embodiment, the small-capacity access area (the area instructed to write data with the number of sectors smaller than the sector number setting value) is a file management area such as a directory area, FAT area, or MFT (Master File Table) area. However, the present invention can be applied even if the small capacity area is not the file management area.

1 is a block diagram showing a schematic configuration of a flash memory system according to an embodiment of the present invention. It is a figure for demonstrating the correspondence of the address space by the side of a host system, and the address space in flash memory. It is a figure for demonstrating the correspondence of a logical page and a physical page. It is a figure for demonstrating a small capacity write management table. It is a figure for demonstrating the information written in a redundant area. 4 is a flowchart for explaining an operation of the memory controller according to the embodiment of the present invention.

Explanation of symbols

1 ... flash memory system, 2 ... flash memory, 3 ... memory controller

Claims (5)

A memory controller that controls access to a flash memory that is erased in units of physical blocks including a plurality of physical pages in accordance with an access instruction given from a host system,
Logical block management means for managing, as a logical block, an area having a predetermined number of sectors including a plurality of areas in sector units to which a logical address designated by the access instruction is assigned;
Storage area allocating means for allocating a predetermined number of physical blocks in the flash memory to the logical block;
Logical block type determination means for determining the type of the logical block based on the number of times data write specifying a region having a capacity smaller than a predetermined number of sectors with respect to the region in each logical block is instructed by the access instruction; ,
Data writing means for writing data to a physical block corresponding to the logical block to which the write destination area designated by the access instruction belongs,
The logical block type determining means determines the logical block whose number is less than a predetermined number as a first logical block, and determines the logical block whose number is a predetermined number or more as a second logical block,
The data writing means writes data in the order of the logical addresses to the physical block corresponding to the logical block determined to be the first logical block, and the logical block determined to be the second logical block. A memory controller, wherein data is written to a physical block corresponding to a block without depending on the order of the logical addresses. Data copy means for copying storage data in a physical block in which data is not written in the order of the logical addresses to another physical block in the order of the logical addresses is further provided. The logical block type determining means, when no writing of data designating an area having a capacity smaller than the predetermined number of sectors is instructed for a predetermined period of time in the logical block, And the data copying means writes the storage data in the physical block corresponding to any one of the logical blocks to another physical block in the order of the logical addresses. The memory controller according to claim 1. A memory controller according to claim 1 or 2,
And a flash memory system accessed by the memory controller. A flash memory control method in which erasing is performed in units of physical blocks including a plurality of physical pages in accordance with an access instruction given from a host system,
A logical block management step of managing, as a logical block, an area having a predetermined number of sectors including a plurality of areas in units of sectors to which a logical address designated by the access instruction is assigned;
A storage area allocation step for allocating a predetermined number of physical blocks in the flash memory to the logical block;
A logical block type determination step for determining a type of the logical block based on the number of times data write specifying a region having a capacity smaller than a predetermined number of sectors to the region in each logical block is instructed by the access instruction; ,
A data writing step of writing data to a physical block corresponding to the logical block to which the write destination area designated by the access instruction belongs,
In the writing method determining step, the logical block having the number of times less than a predetermined number is determined as a first logical block, and the logical block having the number of times being a predetermined number or more is determined as a second logical block,
In the data write step, data is written to the physical block corresponding to the logical block determined as the first logical block in the order of the logical addresses, and the logical block determined as the second logical block A flash memory control method, wherein data is written to a physical block corresponding to a block without depending on the order of the logical addresses. A data copying step of copying storage data in a physical block in which data is not written in the logical address order to another physical block in the logical address order; When writing of data designating an area having a capacity smaller than the predetermined number of sectors is not instructed for a predetermined period of time in the logical block, the write method determination step causes any one of the logical blocks to be It is determined that the logical block is a first logical block, and the data copying step causes the storage data in the physical block corresponding to any one of the logical blocks to be copied to another physical block in the order of the logical addresses. 5. The method of controlling a flash memory according to claim 4,

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