JP2009296774A - Converter - Google Patents

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JP2009296774A
JP2009296774A JP2008147197A JP2008147197A JP2009296774A JP 2009296774 A JP2009296774 A JP 2009296774A JP 2008147197 A JP2008147197 A JP 2008147197A JP 2008147197 A JP2008147197 A JP 2008147197A JP 2009296774 A JP2009296774 A JP 2009296774A
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switching
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switching elements
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JP5275687B2 (en
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Yasuhisa Tasaka
泰久 田坂
Shinichi Sakamoto
信一 坂本
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Sumitomo Heavy Industries Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a converter with a plurality of arrays of switching elements connected in parallel, which improves controllability in a low output region by switching the number of parallel arrays in an output region where current ripples zero-cross to prevent zero cross of the current ripples in low output. <P>SOLUTION: The converter includes: a plurality of arrays of switching elements connected in parallel between a low voltage side and a high voltage side; a plurality of reactors whose one ends are connected to the plurality of arrays of switching elements, respectively, and the other ends are connected in common to the low voltage side; and a capacitor connected in parallel to the output side, and the converter switches the plurality of arrays of switching elements while shifting phase, thereby moving energy between the low voltage side and the high voltage side. Specifically, the converter includes a current detection means for detecting a current value on the input side, and a controller for performing switching control of the number (n) of the plurality of parallel arrays of the plurality of switching elements on the basis of the current value of the input side and the calculated value of current ripples of the input side. With this configuration, the zero cross of the current ripples is prevented in low output. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、低圧側と高圧側との間に複数列のスイッチング素子を並列接続してスイッチング制御を行なうことで昇圧あるいは降圧を行なうコンバータ装置に関する。   The present invention relates to a converter device that performs step-up or step-down by performing switching control by connecting a plurality of rows of switching elements in parallel between a low-voltage side and a high-voltage side.

コンバータ装置の一例として、昇圧比m倍で機能する昇降圧コンバータ装置において、mに最も近い整数N’の整数倍Nのチョッパ回路を並列に接続し、各列のチョッパ回路の電流位相を2π/N(rad)ずつずらした位相制御を行うことで、電流リップルを低減させることが可能であることが知られている(例えば特許文献1参照)。   As an example of a converter device, in a buck-boost converter device that functions at a boost ratio m times, a chopper circuit having an integer multiple N that is the closest to m is connected in parallel, and the current phase of each chopper circuit in each column is 2π / It is known that current ripple can be reduced by performing phase control shifted by N (rad) (see, for example, Patent Document 1).

特許文献1はまた、N列(N相)のチョッパ回路の並列数切替え制御(多相制御)について開示している。すなわち、昇圧比が2倍、3倍、6倍と変動する負荷に対し、チョッパ回路を6並列で構成し、昇圧比に近い整数倍に並列数(相数)を切替える制御を行なうことで電流リップルの低減を行なうことを企図している。   Patent Document 1 also discloses parallel number switching control (multiphase control) of chopper circuits of N rows (N phases). That is, for a load whose boost ratio fluctuates by 2 times, 3 times, and 6 times, the chopper circuit is configured in 6 parallel, and the current is controlled by switching the parallel number (number of phases) to an integer multiple close to the boost ratio. It is intended to reduce ripple.

しかしながら、特許文献1の並列数切替え制御(多相多重制御)では、低圧側の電圧変動に対して高圧側の電圧を制御するようにしており、低出力領域での制御性能について考慮していない。つまり、N数が大きくなると各チョッパ回路への入力電流が小さくなる。すると、低出力領域で各相の電流リップル波形がゼロクロスし、その結果、低出力領域において電流波形が歪んで制御が不安定になり、かつ設計当初に見込んだ電流リップルの低減効果を得ることができないという問題点がある。   However, in the parallel number switching control (multi-phase multiplex control) of Patent Document 1, the voltage on the high voltage side is controlled with respect to the voltage fluctuation on the low voltage side, and control performance in the low output region is not considered. . That is, as the N number increases, the input current to each chopper circuit decreases. Then, the current ripple waveform of each phase zero-crosses in the low output region, and as a result, the current waveform is distorted in the low output region and the control becomes unstable, and the current ripple reduction effect expected at the beginning of the design can be obtained. There is a problem that it is not possible.

特開2004−357388JP2004-357388

本発明の課題は、スイッチング素子によるコンバータを複数列並列接続して構成したコンバータ装置において、電流リップルがゼロクロスする出力領域で並列数切替えを行うことにより、低出力時の電流リップルのゼロクロスを防止し、特に低出力領域での制御性を向上させることができるようにすることにある。   An object of the present invention is to prevent zero crossing of current ripple at low output by switching the parallel number in an output region where current ripple is zero crossing in a converter device configured by connecting converters by switching elements in parallel in a plurality of rows. In particular, the controllability in the low output region can be improved.

本発明の他の課題は、設計当初に見込んだ電流リップルの低減効果を得られる出力領域を広げることができるようにすることにある。   Another object of the present invention is to make it possible to widen an output region in which a current ripple reduction effect expected at the beginning of design can be obtained.

本発明は、低圧側と高圧側との間に並列接続された複数列のスイッチング素子と、一端を前記複数列のスイッチング素子にそれぞれ接続され他端を前記低圧側に共通接続された複数のリアクトルと、出力側に並列接続されたコンデンサを含み、前記複数列のスイッチング素子を、位相をずらしてスイッチングすることにより前記低圧側と前記高圧側との間でエネルギーの移動を行うコンバータ装置であって、入力側の電流値を検出する電流検出手段と、前記入力側の電流値と入力側の電流リップルの計算値とに基づいて前記複数列のスイッチング素子の並列数nの切替え制御を行なう制御装置を備えることにより、低出力時の電流リップルのゼロクロスを防止することを特徴とする。   The present invention relates to a plurality of rows of switching elements connected in parallel between a low voltage side and a high voltage side, and a plurality of reactors having one end connected to the plurality of rows of switching elements and the other end commonly connected to the low voltage side. And a converter device including a capacitor connected in parallel on the output side, and transferring energy between the low voltage side and the high voltage side by switching the plurality of rows of switching elements out of phase. A current detecting means for detecting a current value on the input side, and a control device for performing switching control of the parallel number n of the switching elements in the plurality of columns based on the current value on the input side and the calculated value of the current ripple on the input side Is provided to prevent zero crossing of current ripple at low output.

本発明によるコンバータ装置においては更に、入力側の電圧値を検出する電圧検出手段を備えることで、前記制御装置は、前記入力側の電流リップルを、前記入力側の電圧値、スイッチング周波数を含むあらかじめ定められた式に基づいて算出する。   The converter device according to the present invention further includes voltage detection means for detecting a voltage value on the input side, so that the control device includes a current ripple on the input side including a voltage value on the input side and a switching frequency in advance. Calculate based on a defined formula.

本発明によるコンバータ装置においては更に、あらかじめ作成された前記入力側の電流値と前記並列数nとの対応関係を示すマップ図を保存した記憶装置を備えることで、前記制御装置は、前記電流検出手段で検出された前記入力側の電流値を基に前記マップ図を参照して前記並列数nを決定することができる。   In the converter device according to the present invention, the control device further includes a storage device that stores a map diagram showing a correspondence relationship between the input-side current value and the parallel number n, which is created in advance. The parallel number n can be determined with reference to the map diagram based on the current value on the input side detected by the means.

本発明によるコンバータ装置によれば、前記制御装置は、前記並列数nが、前記電流リップルの計算値ΔInと前記入力側の電流値Iinとを用いた以下の式を満足するかどうかの判別を行い、
n≦2Iin/ΔIn
上記式を満足する場合には前記電流リップルの再計算に戻り、上記式を満足しない場合には上記式の右辺の計算値における小数以下を切り捨てて整数となる数を前記並列数nとして決定することができる。
According to the converter device of the present invention, the control device determines whether or not the parallel number n satisfies the following expression using the calculated value ΔIn of the current ripple and the current value Iin on the input side. Done
n ≦ 2Iin / ΔIn
If the above equation is satisfied, the process returns to the recalculation of the current ripple. If the above equation is not satisfied, the decimal number in the calculated value on the right side of the above equation is rounded down to determine an integer number as the parallel number n. be able to.

なお、前記制御装置は、スイッチングすべき列のスイッチング素子にのみスイッチング用の制御信号を与えることにより、前記並列数nの切替えを行うようにしても良い。   Note that the control device may perform switching of the parallel number n by giving a control signal for switching only to the switching elements in the column to be switched.

本発明のコンバータ装置によれば、入力側の電流値と入力側の電流リップルの計算値とに基づいて複数列のスイッチング素子の並列数の切替え制御を行なうことで、低出力時の電流リップルのゼロクロスを防止し、制御性の安定化、かつ設計当初に見込んだ電流リップルの低減効果を得ることができる。   According to the converter device of the present invention, by performing switching control of the parallel number of the switching elements in a plurality of columns based on the current value on the input side and the calculated value of the current ripple on the input side, the current ripple at the time of low output can be reduced. Zero crossing can be prevented, controllability can be stabilized, and the current ripple reduction effect expected at the beginning of design can be obtained.

図1に本発明の第1の実施形態による昇降圧コンバータ装置の構成を示すが、以下では昇圧コンバータ装置として機能する場合を想定して説明する。   FIG. 1 shows a configuration of a buck-boost converter device according to a first embodiment of the present invention. Hereinafter, a description will be given assuming that it functions as a boost converter device.

本コンバータ装置は、直流電源11、S(Sは正の整数)列のリアクトル21、22、・・・、2S、S列の対をなすパワーデバイス(スイッチング素子)31、32、・・・、3S及び対をなす各パワーデバイスに並列接続された対のダイオード41、42、・・・、4S、各列に共通の出力側に接続されたコンデンサ51、電流カレントセンサCTを含んで直流電源11の電流を入力電流Iinとして検出する電流検出回路61、直流電源11の電圧を検出する電圧検出回路62、装置出力側に接続されて出力電圧及び出力電流を検出する電圧検出回路63及び電流検出回路(電流カレントセンサCTを含む)64、制御装置71で構成される。   The converter apparatus includes a DC power supply 11, reactors 21, 22,..., 2S, S columns (switching elements) 31, 32,. 4S, a pair of diodes 41, 42,..., 4S connected in parallel to each power device in a pair, a capacitor 51 connected to the output side common to each column, and a current current sensor CT, and a DC power supply 11 Current detection circuit 61 for detecting the current of the current as input current Iin, voltage detection circuit 62 for detecting the voltage of DC power supply 11, voltage detection circuit 63 for detecting output voltage and output current connected to the device output side, and current detection circuit 64 (including current current sensor CT) and control device 71.

S列のリアクトル21〜2SはS列の対をなすパワーデバイス31〜3Sに対応し、一端側が直流電源11の出力側に共通に接続され、他端側は対応する列における対のパワーデバイス間の接続ラインに接続される。制御装置71は、電流検出回路61、64、電圧検出回路62、63からそれぞれ検出信号を受け、パワーデバイス31、32、・・・、3Sのスイッチング制御動作を行う。   The reactors 21 to 2S in the S row correspond to the power devices 31 to 3S forming a pair in the S row, one end side is commonly connected to the output side of the DC power supply 11, and the other end side is between the pair of power devices in the corresponding row. Connected to the connection line. The control device 71 receives the detection signals from the current detection circuits 61 and 64 and the voltage detection circuits 62 and 63, respectively, and performs the switching control operation of the power devices 31, 32,.

以上のように、本コンバータ装置では、並列接続したS列の対をなすパワーデバイス31〜3Sがそれぞれ、制御装置71により2π/Sずつずらした電流位相で順に位相制御されることにより、ダイオード41〜4Sと共にコンバータ(あるいはチョッパ回路)として動作する。なお、位相制御の順番は、図示されている31、32、・・・、3Sの順に限る必要は無い。これは、例えば、S=5の場合、第1列−第3列−第5列−第2列−第4列−第1列というように、位置的に隣合うパワーデバイスのオンが続かないようにすることでパワーデバイスの放熱効果を向上させることができるからである。   As described above, in this converter device, the power devices 31 to 3S forming a pair of S columns connected in parallel are sequentially phase-controlled by the control device 71 with a current phase shifted by 2π / S, whereby the diode 41 It operates as a converter (or chopper circuit) together with ~ 4S. The order of the phase control is not necessarily limited to the order of 31, 32,. This is because, for example, when S = 5, the power devices adjacent in position do not continue to be turned on, such as the first column-third column-fifth column-second column-fourth column-first column. This is because the heat dissipation effect of the power device can be improved.

図2に、S列の各列に入力される電流の波形を示す。図2に示すように、各列に流れる入力電流Ibの波形は、DC(直流)成分である電流Iin_ndとAC(交流)成分である電流リップルΔInで形成されている。そして、DC成分電流Iin_ndとAC成分電流リップルΔInとの間に下記の式(1)の関係が成立した場合に、入力電流波形はゼロクロスする。   FIG. 2 shows waveforms of currents input to each column of S columns. As shown in FIG. 2, the waveform of the input current Ib flowing in each column is formed by a current Iin_nd that is a DC (direct current) component and a current ripple ΔIn that is an AC (alternating current) component. When the relationship of the following formula (1) is established between the DC component current Iin_nd and the AC component current ripple ΔIn, the input current waveform crosses zero.

Iin_nd<ΔIn/2 (1)
よって、入力電流波形がゼロクロスしない条件は下記の式(2)となる。
Iin_nd <ΔIn / 2 (1)
Therefore, the condition that the input current waveform does not cross zero is expressed by the following equation (2).

Iin_nd≧ΔIn/2 (2)
第1の実施形態によるコンバータ装置では、制御装置71が演算デバイスとしての機能を有して、式(2)の条件を満足させるべく、直流電源11に接続するパワーデバイスの並列数n(但し、n≦S)を下記の式(3)の条件で切替えるように制御を行なう。
Iin_nd ≧ ΔIn / 2 (2)
In the converter device according to the first embodiment, the control device 71 has a function as an arithmetic device, and in order to satisfy the condition of the expression (2), the parallel number n of power devices connected to the DC power source 11 (provided that Control is performed so that n ≦ S) is switched under the condition of the following expression (3).

n≦2Iin/ΔIn (3)
但し、式(3)においてIinは、前述したように、直流電源11からS列のリアクトル21〜2Sに入力される前の電流値(A)であり、電流検出回路61で検出される。
n ≦ 2Iin / ΔIn (3)
However, in Expression (3), Iin is a current value (A) before being input from the DC power supply 11 to the reactors 21 to 2S in the S row, as described above, and is detected by the current detection circuit 61.

上記の並列数切替え制御は以下に説明する方法1−1又は1−2で行なうことができる。   Said parallel number switching control can be performed by the method 1-1 or 1-2 demonstrated below.

1−1.事前に、AC成分電流リップルΔInを下記の式(4)で算出して、各並列数における式(3)の条件を満足する入力電流Iinのマップ図を図3に示すように作成して制御装置71内の記憶装置に保存しておく。制御装置71は、マップ図を参照して、電流検出回路61で検出した入力電流Iinに対応する並列数nを決定する。   1-1. In advance, the AC component current ripple ΔIn is calculated by the following equation (4), and a map of the input current Iin satisfying the condition of the equation (3) in each parallel number is created and controlled as shown in FIG. The data is stored in a storage device in the device 71. The control device 71 determines the parallel number n corresponding to the input current Iin detected by the current detection circuit 61 with reference to the map diagram.

ΔIn=(Vin・Duty)/(Ln・fs) (4)
但し、式(4)において、Vinは電圧検出回路62で検出される直流電源11の電圧(V)、Dutyはパワーデバイスのオン、オフのデューティ比、Lnは各列のリアクトルのインダクタンス(H)、fsはキャリア周波数(スイッチング周波数)(Hz)である。
ΔIn = (Vin · Duty) / (Ln · fs) (4)
However, in Expression (4), Vin is the voltage (V) of the DC power supply 11 detected by the voltage detection circuit 62, Duty is the duty ratio of on / off of the power device, and Ln is the inductance (H) of the reactor in each column. , Fs is a carrier frequency (switching frequency) (Hz).

1−2.図1の電流検出回路61で入力電流Iinを、電圧検出回路62で電圧Vinをそれぞれ検出し、制御装置71で式(4)の演算を行なう。動作する並列数nが式(3)の条件を満足しない場合は、式(3)の右辺における計算値の整数(小数は切捨て)に並列数nを決定する。   1-2. The input current Iin is detected by the current detection circuit 61 of FIG. 1 and the voltage Vin is detected by the voltage detection circuit 62, and the control device 71 performs the calculation of equation (4). When the operating parallel number n does not satisfy the condition of Expression (3), the parallel number n is determined as an integer (decimal numbers are rounded down) on the right side of Expression (3).

図4は、制御装置71により上記1−2の方法で行なわれる並列数nの切替え制御を説明するためのフローチャート図であり、以下に簡単に動作の流れを説明する。   FIG. 4 is a flowchart for explaining the switching control of the parallel number n performed by the control device 71 by the above method 1-2, and the flow of the operation will be briefly described below.

図4において、並列数切替え制御が開始されると、入力電流Iin、入力電圧Vinがそれぞれ検出される(ステップS1)。制御装置71は、式(4)によりAC成分電流リップルΔInを演算する(ステップS2)。続いて、ステップS3では、検出された入力電流Iinと演算されたAC成分電流リップルΔInについて式(3)の条件を満足するかどうかの判別を行なう。式(3)の条件を満足しない場合にはステップS2に戻ってAC成分電流リップルΔInの再演算を行なう。式(3)の条件を満足する場合には、ステップS4において式(3)の右辺の整数(小数以下は切捨て)になる並列数nを決定する。ステップS5では、決定した並列数nになるようにパワーデバイス31〜3Sの制御を行なう。ステップS6では、並列数nの切替え制御を終了するかどうかの判別が行なわれ、Yesの場合には並列数切替え制御が終了し、Noの場合にはステップS2へ戻る。   In FIG. 4, when the parallel number switching control is started, the input current Iin and the input voltage Vin are detected (step S1). The control device 71 calculates the AC component current ripple ΔIn using the equation (4) (step S2). Subsequently, in step S3, it is determined whether or not the condition of the expression (3) is satisfied for the detected input current Iin and the calculated AC component current ripple ΔIn. If the condition of equation (3) is not satisfied, the process returns to step S2 to recalculate the AC component current ripple ΔIn. If the condition of Expression (3) is satisfied, in Step S4, the parallel number n that becomes an integer on the right side of Expression (3) (decimal numbers are rounded down) is determined. In step S5, the power devices 31 to 3S are controlled so that the determined parallel number n is reached. In step S6, it is determined whether or not the switching control of the parallel number n is terminated. If Yes, the parallel number switching control is terminated, and if No, the process returns to step S2.

並列数nの切替えは下記の方法を用いて行なう。   Switching of the parallel number n is performed using the following method.

制御装置71が、上記式(3)を満足する並列数のパワーデバイスにのみスイッチング動作させる指令を与えることで、並列数nを切替える。   The control device 71 switches the parallel number n by giving a command to perform the switching operation only to the parallel number of power devices satisfying the above-described formula (3).

上記の方法において、並列数切替え制御は、現時点での並列数の最終列のパワーデバイスのスイッチングが終了した時点で行うことが望ましい。勿論、この場合の最終列というのは、例えば現時点の並列数が5列の場合、5列目を意味するものではなく、スイッチング動作が最終に行われた列のことである。   In the above method, it is desirable that the parallel number switching control is performed at the time when the switching of the power devices in the last column of the current parallel number is completed. Of course, the last column in this case does not mean the fifth column, for example, when the current parallel number is five, but is the column where the switching operation is finally performed.

以上、本発明を昇圧コンバータ装置として機能させる場合について説明したが、本コンバータ装置は降圧コンバータとしても動作可能である。この場合、図1に示されたコンデンサ51側の2つの端子に高圧電源が接続されて入力側とされる。パワーデバイス31〜3Sに対する並列数切替え制御動作は上記実施形態と同じであり、出力側、つまり図1の直流電源11に対応する箇所に降圧された電圧が得られる。なお、入力電圧、入力電流の検出はそれぞれ、電圧検出回路63、電流検出回路64で行なわれる。   As described above, the case where the present invention is caused to function as a boost converter device has been described. However, the converter device can also operate as a step-down converter. In this case, a high voltage power source is connected to the two terminals on the capacitor 51 side shown in FIG. The parallel number switching control operation for the power devices 31 to 3S is the same as that in the above-described embodiment, and a stepped-down voltage is obtained on the output side, that is, the portion corresponding to the DC power supply 11 in FIG. The input voltage and the input current are detected by the voltage detection circuit 63 and the current detection circuit 64, respectively.

上記の実施形態によるコンバータ装置によれば、式(2)の条件になるように並列数nを切替えることで、低出力時の電流リップルのゼロクロスを防止し、制御性の安定化、かつ設計当初に見込んだ電流リップルの低減効果を得ることができる。特に、この並列数切替え制御を低出力領域が連続定格であるバッテリー駆動装置やバッテリー駆動車に適用することにより、低出力時の制御性が安定し、電流リップルが低減することで、コンデンサの損失が低減されて、効率の改善による省エネルギー化が可能である。   According to the converter device according to the above embodiment, by switching the parallel number n so as to satisfy the condition of Expression (2), the zero ripple of the current ripple at the time of low output is prevented, the controllability is stabilized, and the initial design The effect of reducing the current ripple expected in FIG. In particular, by applying this parallel number switching control to battery-driven devices and battery-powered vehicles that have a continuous rating in the low output region, the controllability at low output is stabilized and the current ripple is reduced, resulting in a loss of capacitors. Can be saved, and energy can be saved by improving efficiency.

本発明は、昇降圧コンバータ装置だけでなく、昇圧コンバータ装置や降圧コンバータ装置にも適用可能であり、バッテリー駆動装置やバッテリー駆動車への適用に適している。   The present invention can be applied not only to a buck-boost converter device but also to a boost converter device or a buck converter device, and is suitable for application to a battery drive device or a battery drive vehicle.

図1は、本発明によるコンバータ装置を昇圧コンバータ装置として使用する場合の実施形態について示した回路構成図である。FIG. 1 is a circuit configuration diagram showing an embodiment when a converter device according to the present invention is used as a boost converter device. 図2は、図1のS列における各列に入力される電流波形を示した図である。FIG. 2 is a diagram showing a current waveform input to each column in the S column of FIG. 図3は、本発明による並列数切替え制御に使用される、入力電流Iinと並列数nの対応関係を示したマップ図である。FIG. 3 is a map diagram showing the correspondence between the input current Iin and the parallel number n used in the parallel number switching control according to the present invention. 図4は、本発明による並列数切替え制御の一例を説明するためのフローチャート図である。FIG. 4 is a flowchart for explaining an example of the parallel number switching control according to the present invention.

符号の説明Explanation of symbols

11 直流電源
21〜2S リアクトル
31〜3S 対をなすパワーデバイス
41〜4S 対をなすダイオード
11 DC power supply 21 to 2S reactor 31 to 3S paired power device 41 to 4S paired diode

Claims (5)

低圧側と高圧側との間に並列接続された複数列のスイッチング素子と、一端を前記複数列のスイッチング素子にそれぞれ接続され他端を前記低圧側に共通接続された複数のリアクトルと、出力側に並列接続されたコンデンサを含み、前記複数列のスイッチング素子を、位相をずらしてスイッチングすることにより前記低圧側と前記高圧側との間でエネルギーの移動を行うコンバータ装置であって、
入力側の電流値を検出する電流検出手段と、
前記入力側の電流値と入力側の電流リップルの計算値とに基づいて前記複数列のスイッチング素子の並列数nの切替え制御を行なう制御装置を備えることにより、低出力時の電流リップルのゼロクロスを防止することを特徴とするコンバータ装置。
A plurality of switching elements connected in parallel between the low-voltage side and the high-pressure side; a plurality of reactors having one end connected to the plurality of switching elements and the other end commonly connected to the low-pressure side; and an output side A plurality of rows of switching elements including a capacitor connected in parallel, and a converter device that transfers energy between the low-voltage side and the high-voltage side by switching the phase-shifted elements,
Current detection means for detecting the current value on the input side;
By providing a control device that performs switching control of the parallel number n of the plurality of rows of switching elements based on the current value on the input side and the calculated value of the current ripple on the input side, zero crossing of the current ripple at low output can be achieved. The converter apparatus characterized by preventing.
更に、入力側の電圧値を検出する電圧検出手段を備え、
前記制御装置は、前記入力側の電流リップルを、前記入力側の電圧値、スイッチング周波数を含むあらかじめ定められた式に基づいて算出することを特徴とする請求項1に記載のコンバータ装置。
Furthermore, a voltage detection means for detecting the voltage value on the input side is provided,
The converter device according to claim 1, wherein the control device calculates the current ripple on the input side based on a predetermined formula including a voltage value and a switching frequency on the input side.
更に、あらかじめ作成された前記入力側の電流値と前記並列数nとの対応関係を示すマップ図を保存した記憶装置を備え、
前記制御装置は、前記電流検出手段で検出された前記入力側の電流値を基に前記マップ図を参照して前記並列数nを決定することを特徴とする請求項1又は2に記載のコンバータ装置。
Furthermore, a storage device storing a map diagram showing a correspondence relationship between the current value on the input side and the parallel number n created in advance is provided,
3. The converter according to claim 1, wherein the control device determines the parallel number n with reference to the map diagram based on a current value on the input side detected by the current detection unit. 4. apparatus.
前記制御装置は、前記並列数nが、前記電流リップルの計算値ΔInと前記入力側の電流値Iinとを用いた以下の式を満足するかどうかの判別を行い、
n≦2Iin/ΔIn
上記式を満足する場合には前記電流リップルの再計算に戻り、上記式を満足しない場合には上記式の右辺の計算値における小数以下を切り捨てて整数となる数を前記並列数nとして決定することを特徴とする請求項1又は2に記載のコンバータ装置。
The control device determines whether or not the parallel number n satisfies the following expression using the calculated value ΔIn of the current ripple and the current value Iin on the input side:
n ≦ 2Iin / ΔIn
If the above equation is satisfied, the process returns to the recalculation of the current ripple. If the above equation is not satisfied, the decimal number in the calculated value on the right side of the above equation is rounded down to determine an integer number as the parallel number n. The converter device according to claim 1 or 2, wherein
前記制御装置は、スイッチングすべき列のスイッチング素子にのみスイッチング用の制御信号を与えることにより、前記並列数nの切替えを行うことを特徴とする請求項1〜4のいずれか1項に記載のコンバータ装置。   The said control apparatus performs switching of the said parallel number n by giving the control signal for switching only to the switching element of the row | line | column which should be switched, The any one of Claims 1-4 characterized by the above-mentioned. Converter device.
JP2008147197A 2008-06-04 2008-06-04 Converter device Expired - Fee Related JP5275687B2 (en)

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KR101064764B1 (en) 2009-12-30 2011-09-14 두산중공업 주식회사 Extended non-isolated soft-switched multiphase dc-dc converter for voltage-gain ratio and power-gain ratio
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CN103095133A (en) * 2013-01-04 2013-05-08 浙江上方光伏科技有限公司 Current-sharing control system of double Boost converters connected in parallel
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CN109525109A (en) * 2017-09-20 2019-03-26 丰田自动车株式会社 DC-DC converter
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