JP2009296633A - Amplifier circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an amplifier capable of optimizing an efficiency over one range of an output power level. <P>SOLUTION: An amplifier circuit 11 includes an amplifier 12, a required power display 15, a power-controlling circuit 14, and a power-measuring circuit 13. The amplifier 12 has an input to amplify an input signal for generating an output signal and to control a supplied current I for driving the amplifier, and the input with the supplied current I and a supplied voltage V fed thereto. The power-controlling circuit calculates to apply the values about both of the supplied current I and the supplied voltage V in accordance with arbitrary one of a plurality of required power levels, so as to operate the amplifier at a maximal efficiency over a wide range of power level. The power-controlling circuit further includes power-controlling loops, thereby enabling the regulation of the output power to be performed in accordance with the measuring value of the output power and the output power of the required power level. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an amplifier circuit and a method of operating an amplifier.

  Electronic amplifiers, particularly power amplifiers, are widely used in audio equipment and telecommunications transceiver transmitters. One requirement for such an amplifier is to obtain the maximum possible efficiency. For purposes of this description, amplifier efficiency may be considered as the ratio between alternating current (AC) output power and direct current (DC) input power supplied to the amplifier.

  In known amplifiers, this requirement is addressed by first identifying the required output power level and then optimizing the amplifier for that particular output power level. One known method of optimizing the amplifier is to select the optimum load for the required output power level. Another method is to employ a switchable load that can be adjusted according to different required output power levels. Typically, in the case of a single value load, the efficiency decreases, but at relatively high power levels where the loss is maximized, the output is measured to minimize the impact of this efficiency, measured as lost power loss. The power level is specified to be either the maximum operating level or a level slightly below the maximum operating level.

However, this method has the problem that for a given load it is only possible to maintain near optimal efficiency with respect to the output power level specified for that load. If an amplifier optimized for a particular output power level is used for a different power level and that amplifier is not readjusted (eg, by adjusting the load), significant efficiency As a result, this results in a decrease in For example, if a Class A amplifier with a fixed supply voltage is optimized for an output power level of P watts, the amplifier will be an ideal 50 when operated at that output power level P. Will have an efficiency approaching% (theoretical maximum for zero transistor saturation voltage V _sat ). If the same Class A amplifier is operated at an output power level of P / 2 watts, the maximum efficiency that can be theoretically obtained is 25%.

  The present invention seeks to provide an amplifier whose efficiency can be optimized over a range of output power levels.

  In accordance with one aspect of the present invention, an amplifier that amplifies an input signal to generate an output signal, the amplifier supplied by a supply voltage and a supply current, and according to a transfer function to optimize amplifier efficiency An amplifier circuit is provided comprising control means for adjusting both supply current and supply voltage.

  In accordance with another aspect of the present invention, an amplifier for amplifying an input signal to generate an output signal, receiving a current control signal input for determining a supply current, and both a supply voltage V and a supply current I An amplifier having an input for driving the amplifier, means for identifying the required power level, and calculating values of supply current I and supply voltage V to optimize the amplifier efficiency at the specified power level. There is provided an amplifier circuit comprising control means for applying a corresponding current control signal and a corresponding supply voltage to the respective inputs of the amplifier.

  The control means adjusts the supply current I and the supply voltage V to maximize the amplifier efficiency according to the variable required output power level P and to maintain the amplifier efficiency substantially constant over the range of the amplifier output power level P. It may be operable.

In fact, the amplifier circuit may comprise a transistor and the control means

It may be operable to adjust the supply voltage V as follows. Here, R is the actual impedance indicated by the output of the transistor die, and V _sat is the transistor saturation voltage. The supply current I is adjusted,

It becomes.

  This allows the amplifier efficiency to be the same (ie ideally close) over a wide range of output power. This is particularly advantageous for devices that are required to operate at more than one output power level. This is achieved without requiring readjustment of the load impedance. In other words, a constant value of load impedance may be used for different output power levels without compromising amplifier efficiency.

  A common application for amplifier circuits is the base station (terrestrial or satellite) of a telecommunications system, i.e. in particular, efficiency is a key parameter, and movement that can change dynamically over time and over a wide range of levels. The present invention relates to dynamic power control in a terminal.

  Also, if the battery is used to supply power to the amplifier by adjusting the voltage V input to the amplifier rather than supplying power directly from the battery to the amplifier, the efficiency of the amplifier is, for example, Unaffected by fluctuations in the amount of charge in the battery, such as occurs as a result of battery discharge. A DC-DC converter may be used to provide a variable supply voltage. The DC-DC converter has a relatively high efficiency.

  Furthermore, by adjusting both the input supply voltage and the supply current, the level of harmonics generated in non-A class operation can be controlled more easily. In other words, a symmetric waveform can be generated over a wide range of output power levels by limiting voltage and current appearing in both the peak and trough of the signal waveform. This reduces the level of the second harmonic generated.

  In accordance with a further aspect of the invention, a method is provided for operating an amplifier that amplifies an input signal to produce an output signal. The method includes adjusting both the supply current I and the supply voltage V according to a transfer function to supply a supply voltage and a supply current to the amplifier and to optimize the amplifier efficiency.

Schematic showing a transistor amplifier circuit. Schematic which shows the collector characteristic curve and dynamic load line of the transistor of FIG. Having a DC operating point on the V _s and 1 / 2I _s, schematic diagram showing an idealized collector characteristic curve and the dynamic load line. Having a DC operating point on the V _s and I _s, schematic diagram showing an idealized collector characteristic curve and the dynamic load line. , Schematic showing idealized collector characteristic curves and dynamic load lines with DC operating points at V _s and 2I _s . Schematic showing idealized collector characteristic curves and dynamic load lines with DC operating points at 1.5V _s and 1.5I _s . Schematic showing idealized collector characteristic curves and dynamic load lines with DC operating points at 0.75 V _s and 0.75 I _s . 6 is a flowchart of one method for optimizing the efficiency of an amplifier. Fig. 6 is a flow chart of another method for optimizing the efficiency of an amplifier. FIG. 2 is a schematic block diagram showing all functions of an amplifier circuit. FIG. 4 is another more detailed block diagram of an amplifier circuit. FIG. 4 is another more detailed block diagram of an amplifier circuit.

  The foregoing and further features of the present invention will be described in detail together with the appended claims and their advantages, and the following detailed description of exemplary embodiments of the present invention will be considered with reference to the accompanying drawings. It will become clearer.

Referring to FIG. 1 of the accompanying drawings, there is shown an amplifier 1 comprising an NPN bipolar transistor TR1. The inductor L1 is connected to the collector terminal 2 of the transistor TR1. Similarly, the inductor L2 is connected to the base terminal 3 of the transistor TR1. The load Z _load is connected to the collector terminal 2 via the lossless matching circuit M1. The lossless matching circuit completely converts the load Z _load into the real impedance R _opt . Thus, the effective load presented to the transistor collector is R _opt . Matching circuit M1 preferably includes any transistor parasitics (collector-emitter capacitance and load inductance) such that R _opt is the impedance presented to the transistor die. R _opt is called the dynamic load impedance and has a pure value of resistance measured in ohms.

Here, referring to FIG. 2, the collector characteristic curve (1) of the transistor TR1 is shown together with the dynamic load line (2). The horizontal axis of the graph corresponds to the collector-emitter voltage _Vce (alternatively, if a field effect transistor (FET) is used instead of the NPN bipolar transistor TR1, _Vce is the drain-source voltage _Vds (With zero volt source)). The vertical axis of the graph corresponds to the collector current I _cc (the equivalent of the FET is the drain current I _dd ). The multiple curves (1) correspond to different values of base current (corresponding to different values of gate voltage for the FET). The slope of the dynamic load line is equal _to- (1 / _Ropt ). V _s indicates a specific value of the DC supply voltage on the collector, while I _s indicates a specific value of the DC collector supply current.

In FIG. 2, the collector AC voltage is a sine wave with an amplitude V _s , and the collector AC current is a sine wave with an amplitude I _s . For transistor TR1 that exhibits the characteristics of FIG. 2, this transistor is biased for maximum efficiency. The condition for maximum efficiency is represented by the load line (2) and corresponds to the unique value of R _opt . That is, since the output power level increases from zero, eventually R _opt is predetermined to start limiting on both voltage and current simultaneously when limiting begins to occur.

The output power level is

be equivalent to. Here, the unit of P _ac is watts, the unit of V _ce and V _sat is volt, and the unit of R _opt is ohms. In FIG. 2, V _ce = V _s . Therefore,

It becomes.

V _sat, there is a trend towards zero, the DC collector supply current I _s,

Therefore, P _ac is

There is a tendency to go to. Since the DC input power is V _s · I _s , the resulting theoretical efficiency is 50% (as V _sat approaches zero).

Equation 2 can be used to calculate the optimal DC supply voltage V _s :

From V _s , the required DC collector supply current I _cc can be calculated:

3, 4 and 5 show three graphs of collector characteristic curves and dynamic load lines. In each of these graphs, V _ce = V _s is a constant value, and the slope of the load line derived from R _opt is constant.

It is. For each graph, the value of the collector DC supply current I _cc is different (a multiple or divisor of I _s ). For simplicity, the characteristic curve has been approximated so that V _sat is zero. The locus of the collector voltage V _ce and the collector current I _cc is a load line.

FIG. 3 illustrates an idealized collector characteristic curve and dynamic load line with DC operating points at V _s and 1 / 2I _s where V _s and I _s are constant. In FIG.

It is. For limiting when the signal is maximal for linear operation (limiting is about to occur), the efficiency is 25%.

FIG. 4 shows an idealized collector characteristic curve and dynamic load line with DC operating points at V _s and I _s . In FIG. 4, I _cc = I _s in order to bias the transistor for maximum efficiency. The collector AC voltage is a sine wave with an amplitude V _s , and the collector current is a sine wave with an amplitude I _s . This corresponds to the condition of FIG. 2 and is directed to V _sat which is assumed to be zero. In this condition, the amplifier is on the threshold of saturation and maximum voltage and current amplitude is obtained while maintaining linear (Class A) operation with no voltage or current limiting. The theoretical efficiency is therefore 50%.

FIG. 5 shows an idealized collector characteristic curve and dynamic load line with DC operating points at V _s and 2I _s . In FIG. 5, I _cc = 2I _s . Since the signal amplitude increases from zero, voltage limiting first occurs on the minimum value of the voltage, not on the maximum value of the voltage, resulting in a higher level of second harmonic rise compared to the base. You will understand. For the supply current of FIG. 5, if the amplifier is operating at the maximum power level while maintaining linear (Class A) operation (shown), the efficiency is 25%.

FIGS. 6 and 7 show two examples where both supply voltage and supply current I _cc are adjusted simultaneously, resulting in a theoretical efficiency of 50% for each of the two different power levels. 6, has a DC operating point to 1.5V _s and 1.5I _s, showing the idealized collector characteristic curve and the dynamic load line. FIG. 7 shows an idealized collector characteristic curve and dynamic load line with DC operating points at 0.75 V _s and 0.75 I _s .

  8 and 9 show a slightly different way of controlling the amplifier. FIG. 8 is a flowchart of one method for optimizing amplifier efficiency. In FIG. 8, the required level of power at the output from the amplifier is received at stage 3. Next, the value for the supply voltage V in stage 4 is calculated by the subsequent calculation 5 of current I. The calculated voltage and current are then applied to the amplifier at 6 to optimize its efficiency. FIG. 9 is a flowchart of another method for optimizing amplifier efficiency. In FIG. 9, the same operation is performed, but the voltage and current calculations for stages 4 and 5 are performed simultaneously or non-sequentially.

FIG. 10 of the accompanying drawings is a schematic diagram of an amplifier circuit 11 that uses control of supply current and supply voltage. The amplifier circuit 11 includes an amplifier 12, and the amplifier 12 may include, for example, the amplifier of FIG. Amplifier 12 has a current control signal input (I _control ) that determines supply current I and an input that receives both supply voltage V and supply current I to drive the amplifier. In the case of a bipolar transistor amplifier, the I _control signal operates to adjust the base bias current of the transistor and then acts to adjust the supply current (collector current). In the case of a FET amplifier, the I _control signal operates to adjust the gate voltage of the transistor, which in turn acts to adjust the supply current (drain current).

  Amplifier 12 receives the signal on the input line and outputs an amplified version of the received signal on the output line. The power measurement circuit 13 may be, for example, an envelope detector, but is connected to the output line and measures the power in the signal on the output line. Alternatively, a power measurement circuit may be placed in series with the output line, but it can still be appreciated to perform the same power measurement function.

  A signal representing the power is supplied from the power measurement circuit 13 to the power control circuit 14. The power control circuit 14 also receives a required power level signal from the required power level indicator 15. In an audio amplifier circuit, the required power level indicator can be a variable resistor connected to a volume control knob for selection by the user. In cellular telephone systems, power control is used to control power output by the cellular telephone. Power control essentially comes from one or both of two sources, ie from the cellular telephone itself or from the cellular system. In the former case, power control is performed by measuring the power in the communication signal received by the cellular telephone and adjusting the output power inversely proportional to this signal. In the latter case, power control is performed in the form of a command signal from a mobile controller in the cellular system, which measures the power in the signal received from the cellular telephone and sets the required parameters in the system. In order to comply with the above, a command for adjusting the output power is sent to the cellular telephone. Thus, in a cellular telephone amplifier, the required power level indicator may be a register that receives data from a source internal or external to the cellular telephone.

  The power control circuit uses the required power level signal to calculate and generate the supply voltage V and the supply current I described above. The power control circuit 14 also uses the required power level signal from the required power level indicator 15 along with the output power signal from the power measurement circuit 13 to accurately control the required output power V or Further adjust the value of I.

  In general, efficiency is controlled by adjusting both supply voltage and supply power according to the required power level using a transfer function. The transfer function is implemented using the above equation or a circuit that applies one or more look-up tables having an empirically determined relationship between power level, supply current and supply voltage. In any case, the power control circuit 14 determines the values of the supply current I and the supply voltage V that are necessary to achieve the optimum amplifier efficiency for the required / required power output. Thereafter, the power control circuit 14 adjusts the supply current I and the supply voltage V according to the determination.

FIG. 11 is a more detailed block diagram of the amplifier circuit, showing how to control efficiency and power separately. Power control is achieved by adjusting the supply voltage according to the measured output power. The requested power level is input to the calculation unit 17 in the power control circuit 14, which calculates values for V, I and corresponding values of I _control . I _control at the calculated value is input to amplifier 12 on line 19. In this way, the efficiency of the amplifier is controlled.

  The supply voltage V with the calculated value is output to the adder circuit 21 on the line 20. The output from the power measurement circuit 13, ie the signal representing the actual power, is input to the control unit 22, which also receives the requested power level signal from the required power level register 16. The control unit 22 acts as a comparator that provides a signal that is proportional to the difference between the requested power level signal and the signal representing the actual power.

  The output of the control unit 22 is also input to the summing circuit 21 so that the summing circuit 21 adjusts the supply voltage V applied to the amplifier 12 according to the difference between the requested power and the actual power. The summing circuit 21, the control function 22, the amplifier 12 and the power measuring circuit 13 thus constitute elements of a control loop for controlling the output power of the amplifier 12 as a separate parameter, which is not affected by the efficiency control. To do.

  FIG. 12 is another detailed block diagram of an amplifier circuit showing an alternative arrangement where power control is achieved by adjusting the supply current according to the measured output power. The arrangement in FIG. 12 is similar to the arrangement shown in FIG. 11 except that the output power is controlled by adjusting the supply current as opposed to the supply voltage.

  In an alternative arrangement (not shown), the power control circuit 14 may additionally or alternatively provide an amplifier circuit to optimize the amplifier efficiency based on the input power to the amplifier and the amplifier gain. 12 supply voltage and current are controlled. Accordingly, in this arrangement, the power measurement circuit 13 measures the input signal and then adjusts the supply voltage and current of the amplifier. A value can be assumed for the gain of the amplifier based on knowledge of the characteristics of the amplifier. Alternatively, gain can be measured by measuring output power using a second power measurement circuit. Independent and accurate power control can be implemented as shown in FIG.

  Although the invention has thus been described with reference to the preferred embodiments, the embodiments are merely exemplary and modifications or variations contemplated by those with appropriate knowledge and skill can be understood from the appended claims and their claims. It should be well understood that it can be made without departing from the spirit and scope of the invention as set forth in the equivalents.

Claims (38)

An amplifier supplied with a supply voltage V and biased by a bias current I to amplify an input signal and generate an output signal;
An amplifier circuit comprising control means for adjusting both the bias current I and the supply voltage V in order to optimize the amplifier efficiency according to the transfer function. The amplifier circuit of claim 1, further comprising means for determining a required output power, wherein the transfer function serves to calculate values for both bias current I and supply voltage V according to the required output power. . In use, an amplifier circuit according to claim 1 or claim 2, wherein the output signal is output to a load impedance and the transfer function serves to calculate a value for both the bias current I and the supply voltage V according to the load impedance. The control means comprises a power measurement circuit for measuring the power of the signal output from the amplifier, and the transfer function has a value relating to at least one of the bias current I and the supply voltage V according to the measured power of the output signal. An amplifier circuit according to any one of the preceding claims, which serves to calculate. 5. An amplifier circuit as claimed in claim 4, further comprising means for determining a required output power level, wherein the transfer function serves to calculate values for both the bias current I and the supply voltage V according to the required power. An amplifier circuit according to any one of the preceding claims, wherein the control means comprises a look-up table and the transfer function is calculated via the look-up table. An amplifier according to any preceding claim, wherein the control means is operable to adjust the bias current I and the supply voltage V to maintain the amplifier efficiency substantially constant over a range of amplifier output power levels P. circuit. The amplifier circuit of claim 7, wherein the amplifier output power level P is an AC output power level. 9. The amplifier circuit of claim 8, wherein the amplifier comprises a transistor, and the output of the transistor die is applied to the actual impedance R. The control means

_10. The amplifier circuit of claim 9, wherein the amplifier circuit is operable to regulate the supply voltage V, where V _sat is a transistor saturation voltage. The control means

The amplifier circuit of claim 10 operable to adjust the bias current I as follows. The control means

The amplifier circuit of claim 10 operable to adjust the bias current I as follows. The control means

The amplifier circuit of claim 10 operable to adjust the bias current I as follows. The amplifier circuit according to claim 9, wherein the transistor is a bipolar transistor, and the bias current I is a collector current of the bipolar transistor. The amplifier circuit according to claim 9, wherein the transistor is a field effect transistor, and the bias current I is a drain current of the field effect transistor. 16. The load R is pre-determined such that, when limiting begins when the amplifier output power level P increases, both voltage and current limiting begins substantially simultaneously. The amplifier circuit according to the item. An amplifier circuit according to any preceding claim, wherein the control means is operable to adjust the bias current I and the supply voltage V simultaneously. A mobile terminal for a communication system, comprising the amplifier circuit according to any one of the preceding claims. A base station for a communication system, comprising the amplifier circuit according to any one of claims 1 to 17. A communication system comprising one or more mobile terminals according to claim 16 and one or more base stations according to claim 19. The communication system according to claim 20, wherein the communication system is a CDMA based system. A method of operating an amplifier that amplifies an input signal and generates an output signal,
Supply the supply voltage V to the amplifier,
Supply the supply current I to the amplifier,
A method comprising adjusting both supply voltage V and supply current I to optimize amplifier efficiency according to a transfer function. 23. The method of claim 22, further comprising identifying the required output power and calculating values for both the bias current I and the supply voltage V according to the required output power. 24. A method according to claim 22 or claim 23, further comprising outputting an output signal from the amplifier to a load impedance and calculating a value for the one or more bias currents I and the supply voltage V according to the load impedance. 25. The method of any one of claims 22 to 24, further comprising measuring the power of the signal output from the amplifier and calculating a value for both the bias current I and the supply voltage V according to the measured power of the output signal. 2. The method according to item 1. 26. The method of claim 25, further comprising: determining a required output power level and calculating values for both bias current I and supply voltage V according to the required power. 27. A method according to any one of claims 22 to 26, further comprising calculating a transfer function using a lookup table. 28. A method according to any one of claims 22 to 27, further comprising adjusting the bias current I and the supply voltage V to maintain the amplifier efficiency substantially constant over a range of amplifier output power levels P. . 29. The method of claim 28, wherein the amplifier output power level P is an AC output power level. Supply voltage V is

_30. The method of claim 29, wherein V _sat is a transistor saturation voltage. The bias current I is

32. The method of claim 30, wherein the method is adjusted as follows. The bias current I is

32. The method of claim 30, wherein the method is adjusted as follows. The bias current I is

32. The method of claim 30, wherein the method is adjusted as follows. 34. A method according to any one of claims 30 to 33, wherein the transistor is a bipolar transistor and the bias current I is the collector current of the bipolar transistor. 34. A method according to any one of claims 30 to 33, wherein the transistor is a field effect transistor and the bias current I is a drain current of the field effect transistor. 36. A method according to any one of claims 30 to 35, further comprising predetermining the load R and limiting both voltage and current substantially simultaneously as the amplifier output power level P increases. 37. A method according to any one of claims 22 to 36, further comprising adjusting bias current I and supply voltage V substantially simultaneously. An amplifier for amplifying an input signal to generate an output signal for driving the amplifier to receive both a supply voltage V and a supply current I and a current control signal input for determining a supply current An amplifier having
A means of identifying the required power level;
Control means for calculating values of supply current I and supply voltage V to optimize the amplifier efficiency at the specified power level and applying a corresponding current control signal and a corresponding supply voltage to the respective inputs of the amplifier; An amplifier circuit comprising:

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