JP2009295931A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device with which a silicide film of proper film thickness can be formed between gate structures on a semiconductor substrate even if the distance between the gate structures is small. <P>SOLUTION: A metal film 8 is formed on a semiconductor substrate 1 including a first region so that the film thickness of the metal film 8 can be a predetermined film thickness or larger, wherein the first region is a region between gate structures G1, G2 on the semiconductor substrate 1. A heat energy in such a degree that the metal film 8 of a desired thickness can react with silicon composed of the semiconductor substrate 1 for forming a silicide film 11 is added to the semiconductor substrate 1. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a silicidation process and a semiconductor device formed by the manufacturing method.

  Conventionally, there are semiconductor device manufacturing methods including a silicidation process (for example, Patent Documents 1 and 2). An example of a method for manufacturing a semiconductor device including a conventional silicidation process will be briefly described.

  At least two gate structures each including a gate insulating film and a gate electrode are formed at a predetermined distance from each other in a region defined by the element isolation insulating film on the semiconductor substrate. Further, ion implantation is performed on the semiconductor substrate using the gate structure as a mask. Thereby, a first impurity diffusion layer is formed in the surface of the semiconductor substrate. Further, sidewalls are formed on the side surfaces of the gate electrode. An ion implantation process is performed on the semiconductor substrate using the gate structure including the sidewall as a mask. Thereby, a second impurity diffusion layer is formed in the surface of the semiconductor substrate.

  Next, the natural oxide film on the silicon surface is removed by dry etching, and a metal film such as Ni is formed by sputtering. Thereafter, a protective metal film is further formed and heat treatment is performed. By the heat treatment, the metal film reacts with silicon of the semiconductor substrate, and a silicide film is formed on the semiconductor substrate.

  After removing the unreacted metal film and the protective metal film, an interlayer insulating film is formed, and the interlayer insulating film is planarized by a chemical mechanical polishing method. Thereafter, a contact hole is opened in the interlayer insulating film by a combination of lithography and etching. Then, a contact plug is formed in the contact hole. Thereafter, a wiring layer is formed.

JP 2004-146696 A JP 2004-228351 A

  However, as the integration of LSI (Large Scale Integration) increases, the distance between the gate structures also decreases. Therefore, when the metal film is formed by sputtering, the thickness of the metal film formed between the gate structures is reduced. For example, the film thickness of the metal film formed on the semiconductor substrate between the gate structures is about 60 to 70% of the film thickness of the metal film formed on the flat portion on the semiconductor substrate other than between the gate structures. For this reason, the silicide film formed in the surface of the semiconductor substrate between the gate structures is thinner than the silicide formed in the surface of the semiconductor substrate in the flat portion.

  As described above, when the thickness of the silicide film formed in the surface of the semiconductor substrate between the gate structures is reduced, the resistance value of the silicide film increases. In particular, in an LSI having a multilayer wiring structure, a silicide film may aggregate due to heat treatment when forming an interlayer insulating film or a wiring layer. When such agglomeration occurs, an increase in the resistance value of the silicide film formed in the surface of the semiconductor substrate between the gate structures becomes remarkable.

  When the silicide film is aggregated, the semiconductor substrate not covered with the silicide film is etched when the contact hole is opened in the interlayer insulating film. In this situation, a barrier metal constituting the contact plug is formed. Then, the barrier metal penetrates in a spike shape in the etched portion of the semiconductor substrate. Intrusion of spike-like barrier metal into the semiconductor substrate causes destruction of the semiconductor junction.

  The increase in resistance of the silicide film and the penetration of spike-like barrier metal in the semiconductor substrate significantly increase the power consumption of the device. Then, the operation of the transistor is hindered, and the product yield is lowered.

  Accordingly, the present invention provides a method for manufacturing a semiconductor device capable of forming a silicide film having an appropriate film thickness within the surface of a semiconductor substrate between gate structures even if the distance between the gate structures is reduced. With the goal. Another object of the present invention is to provide a semiconductor device manufactured by the method for manufacturing the semiconductor device.

  In order to achieve the above object, according to one embodiment of the present invention, the thickness of the metal film formed in the first region which is the region on the semiconductor substrate between the gate structures is equal to or greater than the desired thickness. A metal film is formed on the semiconductor substrate including the first region. In order to form a silicide film, thermal energy is applied to the semiconductor substrate to such an extent that the metal film having a desired thickness reacts with silicon constituting the semiconductor substrate.

  According to the above embodiment, even if the distance between the gate structures is reduced, a silicide film having an appropriate film thickness can be formed on the semiconductor substrate between the gate structures. Therefore, it is possible to prevent the silicide film from being aggregated and broken.

  Hereinafter, the present invention will be specifically described with reference to the drawings showing embodiments thereof.

<Embodiment>
Hereinafter, the manufacturing method of the semiconductor device according to the present embodiment will be specifically described with reference to process cross-sectional views.

  An STI (Shallow Trench Isolation) method is applied to the semiconductor substrate 1 made of silicon. Thereby, as shown in FIG. 1, the element isolation insulating film 2 is formed in the surface of the semiconductor substrate 1. In the following description, a plurality of (two in this embodiment) transistors of the same conductivity type (P-type or N-type) are formed in a region defined by the element isolation insulating film 2.

  Next, as shown in FIG. 1, a gate insulating film 3 made of, for example, a silicon oxide film or a silicon oxynitride film is formed on the semiconductor substrate 1. Further, as shown in FIG. 1, a gate electrode 4 made of polysilicon is formed on the gate insulating film 3. In FIG. 1, each of the gate structures G1 and G2 includes a gate insulating film 3 and a gate electrode 4.

  Next, as shown in FIG. 2, impurity ions of a predetermined conductivity type are implanted into the semiconductor substrate 1 using the gate structures G1 and G2 including the gate electrode 4 as a mask. By the ion implantation, as shown in FIG. 2, a relatively shallow first impurity diffusion layer 5 is formed in the surface of the semiconductor substrate 1 on both sides of the gate structures G1 and G2.

  Next, a silicon oxide film and a silicon nitride film are stacked in this order on the semiconductor substrate 1 so as to cover the gate structures G1 and G2. Thereafter, an anisotropic etching process is performed on the silicon oxide film and the silicon nitride film. Thus, as shown in FIG. 3, sidewalls 6 having a laminated structure are formed on both side surfaces of the gate electrode 4 (or the gate structures G1 and G2). By this process, the gate structures G1 and G2 are constituted by the gate insulating film 3, the gate electrode 4, and the sidewalls 6. That is, in the present application, the gate structures G1 and G2 mean a structure including at least the gate electrode 4.

  Further, with the miniaturization of the device, the distance L between the gate structure G1 after the sidewall 6 is formed and the gate structure G2 after the sidewall 6 is formed (the distance L in the left-right direction in FIG. 3) is 80 nm or less. . As the device is miniaturized, the aspect ratio (the distance L between the gate structure G1 after the sidewall 6 is formed and the gate structure G2 after the sidewall 6 is formed and the height H of the gate structures G1 and G2) = H / L) is 1 or more.

  In the following description, a region on the semiconductor substrate 1 between the gate structure G1 and the gate structure G2 is referred to as a first region in the process cross-sectional view. On the other hand, in the process sectional view, a region other than between the gate structure G1 and the gate structure G2 (in the process sectional view, the region on the semiconductor substrate 1 between the element isolation insulating film 2 and the gate structure G1 and the element isolation insulating film) (Region on the semiconductor substrate 1 between 2 and the gate structure G2) is referred to as a second region. The second region can also be understood as a flat portion.

  In other words, the first region is a region on the impurity diffusion layers 5 and 7 sandwiched between the gate structures G1 and G2, and is a region to which a bottom surface of a contact plug CP formed later is connected. The second region is a region on the main surface of the semiconductor substrate 1 on the element formation side, and is a region between one gate structure and the element isolation insulating film 2 and an element isolation insulating film 2 (not shown). It is a sandwiched area.

  For example, in the first region, the coverage rate of the predetermined film when the predetermined film is formed is less than 100%. Further, it is assumed that a predetermined film is formed under the same film formation conditions. At this time, the film thickness of the predetermined film formed in the first region is smaller than the film thickness of the same predetermined film formed in the second region.

  Next, as shown in FIG. 3, impurity ions of a predetermined conductivity type are implanted into the semiconductor substrate 1 using the gate structures G1 and G2 as a mask. By the ion implantation, as shown in FIG. 3, a relatively deep second impurity diffusion layer 7 is formed in the surface of the semiconductor substrate 1 on both sides of the gate structures G1 and G2 including the sidewalls 6.

  Next, dry etching using a gas containing hydrofluoric acid or fluorine is performed on the surface of the semiconductor substrate 1 having the structure shown in FIG. Thereby, the natural oxide film formed on the surface of the semiconductor substrate 1 can be removed.

  Next, a metal film 8 is formed (formed) on the upper surface (first region and second region) of the semiconductor substrate 1 so as to cover the gate structures G1 and G2 by sputtering (FIG. 4). Further, a metal nitride film 9 is formed (formed) as a protective film on the metal film 8 by the same sputtering method (FIG. 4).

  Here, as described above, the metal film 8 formed in the first region due to the small distance L between the gate structures G1 and G2 (in other words, the aspect ratio is 1 or more). Is thinner than the thickness of the metal film 8 formed in the second region. Therefore, when the metal film 8 is formed, the first region and the second region are set so that the film thickness of the metal film 8 formed in the first region is not less than the desired film thickness d1. A metal film 8 is formed on the semiconductor substrate 1.

  In the present embodiment, the case where two gate structures G1 and G2 are formed on the semiconductor substrate 1 is described. Unlike this, for example, when three or more gate structures are formed on the semiconductor substrate 1, the first region is a contact plug on the impurity diffusion layer in each region between the gate structures. A region where the distance between gate structures provided with (contact holes) is a minimum value. Needless to say, the minimum value of the distance between the gate structures varies to some extent. However, the minimum value that can be taken can be roughly determined depending on the specifications of the device used for forming the gate structure.

  The desired film thickness d1 is such that the silicide film 11 formed later in the surface of the semiconductor substrate 1 in the first region has an impurity diffusion layer formed in the surface of the semiconductor substrate 1 in the first region. It is determined so as not to reach the joint surfaces of 5 and 7. The film thickness of the silicide film 11 to be formed is estimated so that aggregation does not occur due to the heat treatment at the time of forming the wiring layer or the like (film thickness of the silicide film 11 = 20 to 30 nm). From the above, the desired film thickness d1 is set so that the distance between the formed silicide film 11 and the interface between the impurity diffusion layers 5 and 7 is a minimum distance that does not cause junction breakdown during device operation. It is determined.

  For example, it is assumed that the desired film thickness d1 of the metal film 8 determined from the above viewpoint is 10 nm. Furthermore, it is assumed that the coverage rate of the metal film 8 by the sputtering method between the gate structures G1 and G2 is 70%. In these cases, the thickness of the metal film 8 in the second region, which is a flat region on the semiconductor substrate 1, is the reciprocal of the desired film thickness d1 and the coverage rate (70%) of the first region. The metal film 8 is formed under the film formation conditions so that the multiplication result (= 10 nm / 0.7≈14.3 nm) is obtained.

  The predetermined film thickness d1 is a minimum required film thickness of the metal film 8 formed in the first region, and the metal film 8 formed in the first region is the predetermined film thickness. It may be d1 or more. In other words, the metal film 8 formed in the second region may be (d1 / coverage rate of the first region) or more.

  The coverage rate of the metal film 8 in the first region is uniquely determined according to the distance between the gate structures in the first region. For example, the relationship shown in FIG. 5 is established between the coverage ratio of the metal film 8 in the first region and the distance between the gate structures in the first region. Here, the horizontal axis of FIG. 5 is the distance (nm) between the gate structures, and the vertical axis is the coverage rate (%) of the metal film 8. The relationship between the coverage ratio of the metal film 8 in the first region and the distance between the gate structures in the first region varies depending on the specifications of the film forming apparatus for the metal film 8 and the type of the metal film 8. . Therefore, the relationship is determined according to experiments and empirical rules.

  Therefore, according to an empirical rule, a step of preparing in advance data indicating the relationship between the coverage ratio of the metal film 8 in the first region and the distance between the gate structures in the first region is required. Then, the coverage ratio of the first region is obtained from the measured distance between the gate structures of the first region and the data. Thereafter, the metal film 8 is formed under the film forming conditions obtained using the obtained coverage ratio of the first region. Here, as described above, the film formation condition is the result of multiplying the film thickness of the metal film 8 in the second region by the desired film thickness d1 and the reciprocal of the obtained coverage ratio of the first region. The film forming conditions are such that (= d1 / coverage ratio of the first region) or more.

  The metal film 8 is made of Co (cobalt), Ni (nickel) metal, Pd (palladium), Pt (platinum), Hf (hafnium), V (vanadium), and Ta (tantalum). , Ru (ruthenium), Yb (ytterbium), Er (erbium), Al (aluminum), W (tungsten), Ti (titanium) or an alloy to which several percent to several tens of percent of metal is added good.

  For example, if the metal film 8 is formed after the vacuum transfer without exposing the semiconductor substrate 1 to the atmosphere after the natural oxide film is removed by dry etching with a fluorine-containing gas, the silicide films 10, 11, 12 can be formed. In addition, it is desirable to continuously form the metal nitride film 9 after the formation of the metal film 8 without exposing the semiconductor substrate 1 to the atmosphere in the same sputtering apparatus.

  Thereafter, thermal energy is applied to the semiconductor substrate 1 to such an extent that the metal film 8 corresponding to the desired film thickness d1 reacts with silicon constituting the semiconductor substrate 1. Thereby, as shown in FIG. 6, silicide films 10 and 11 are formed in the surface of the semiconductor substrate 1, and a silicide film 12 is formed in the surface of the gate electrode 4. Here, a silicide film (first silicide film) 11 is formed in the surface of the semiconductor substrate 1 in the first region. On the other hand, a silicide film (second silicide film) 10 is formed in the surface of the semiconductor substrate 1 in the second region.

  It is assumed that the metal film 8 is formed with a desired film thickness in the first region between the gate electrodes G1 and G2. In this case, as shown in FIG. 6, the formation of the silicide film 11 uses up all of the metal film 8 on the semiconductor substrate 1 in the first region for the metal silicidation reaction.

  Here, RTA (Rapid Thermal Anneal) processing can be adopted as the processing for applying the thermal energy. When the RTA process is adopted, the semiconductor substrate 1 is heated at a predetermined temperature for a heating time sufficient for the metal film 8 having the desired film thickness d1 to react with silicon constituting the semiconductor substrate 1. On the other hand, heat treatment is performed.

  For example, when the metal film 8 is a Ni film or a Ni alloy film, heat treatment is performed in a nitrogen atmosphere at a temperature of 200 to 400 ° C. for a predetermined heating time. For example, the relationship between the heating time at 280 ° C. and the thickness of the metal film 8 that reacts with silicon has the relationship shown in FIG. The horizontal axis of FIG. 7 is the heating time (second), and the vertical axis is the reaction film thickness (nm) of the metal film 8. In the case where the metal film 8 having a desired film thickness (for example, 10 nm) is reacted with silicon by the RTA treatment in a nitrogen atmosphere at 280 ° C., the heat treatment time is set to about 80 seconds from the relationship of FIG. It ’s fine.

  The relationship between the heating time and the reaction film thickness of the metal film 8 varies depending on the specifications of the heat treatment apparatus, the type of the metal film 8, and the heating temperature. Therefore, in accordance with experiments and empirical rules, a step of preparing in advance data indicating the relationship between the heating time in a predetermined heating time and the reaction film thickness of the metal film 8 is required. And the heating time of predetermined temperature is calculated | required from the desired film thickness of the metal film 8, and the said data. Thereafter, for the formation of the silicide films 10 to 12, the determined heating time and a predetermined temperature are given to the semiconductor substrate 1 on which the metal film 8 is formed.

  The same silicidation process is performed on the entire semiconductor substrate 1. Therefore, the film thickness of the silicide film (first silicide film) 11 formed in the first region is the same as the film thickness of the silicide film (second silicide film) 10 formed in the second region. Become. The film thicknesses of the silicide films 10 and 11 are estimated before the silicidation process, and are values used for determining the desired film thickness of the metal film 8.

  FIG. 6 shows the state after the silicidation process is performed in the case where the metal film 8 is formed to have a desired film thickness. As described above, the metal film 8 does not remain on the semiconductor substrate 1 in the first region in FIG. 6 due to the silicidation process. This is because a silicidation process is performed in which the metal film 8 having a desired thickness is reacted with silicon. Note that the thickness of the metal film 8 formed in the second region is larger than the thickness of the metal film 8 formed in the first region. Therefore, when the metal film 8 having a desired film thickness formed in the first region is used up for the silicidation reaction, as shown in FIG. 6, there is one unreacted metal film 8 in the second region. Part will remain.

  Unlike the above, it is assumed that the metal film 8 thicker than the desired film thickness is formed in the first region. In this case, by performing a silicidation process in which the metal film 8 having a desired thickness is reacted with silicon, the unreacted metal film 8 is formed not only in the second region but also in the first region. Some will remain (see FIG. 8).

  Now, after the silicide films 10 to 12 are formed, the unreacted metal film 8 and metal nitride film 9 are removed using a mixed solution of sulfuric acid and hydrogen peroxide solution. As shown in FIG. 9, the silicide films 10 and 11 remain in the surface of the semiconductor substrate 1 and the silicide film 12 remains in the surface of the gate electrode 4 even after the removal process.

Thereafter, a second RTA process may be performed on the semiconductor substrate 1 under the following conditions. The temperature is 400 to 600 ° C., and the heating time is 10 to 60 seconds. When the metal film 8 is a Ni film or an alloy thereof, the silicide films 10 and 11 formed by the first heat treatment described above are formed as a metal film 8 having a large composition, for example, a Ni ₂ Si film. The Ni ₂ Si film has a relatively high resistance value. Therefore, the Ni ₂ Si film is converted into a relatively low resistance NiSi film by the _second heat treatment.

  Next, an interlayer insulating film 15 made of a silicon oxide film is formed on the semiconductor substrate 1 shown in FIG. 9 by CVD (Chemical Vapor Deposition) (see FIG. 10). The film thickness of the interlayer insulating film 15 is, for example, 500 to 1000 nm. Thereafter, the upper surface of the interlayer insulating film 15 is polished and flattened by a CMP (Chemical Mechanical Polishing) method (see FIG. 10).

  Next, a contact hole serving as a through hole is formed in the interlayer insulating film 15 by a combination of lithography and etching. Then, a CVD method or a PVD (Physical Vapor Deposition) method is performed on the contact hole. Thereby, the barrier metal 16 composed of a laminated film of Ti and TiN is formed. Thereafter, a W (tungsten) film 17 is formed on the barrier metal 16 by a CVD method. Thereafter, the CMP method is performed on the barrier metal 16 and the W film 17. As a result, as shown in FIG. 10, a contact plug CP composed of the barrier metal 16 and the W film 17 is formed in the contact hole.

  Here, in addition to the contact plug CP electrically connected to the silicide film 11 formed in the surface of the semiconductor substrate 1 in the first region, the silicide film formed in the surface of the semiconductor substrate 1 in the second region. A contact plug CP electrically connected to the terminal 10 is also formed.

  After that, a semiconductor device including a transistor is completed by forming a wiring layer or the like.

  Next, after describing the problems of the conventional method for manufacturing a semiconductor device, the effect of the method for manufacturing a semiconductor device according to the present embodiment will be described.

  When the distance between the gate structures G1 and G2 is reduced, as described above, the thickness of the metal film 8 formed in the first region is thinner than that of the metal film 8 formed in the second region. In this situation, it is assumed that in the heat treatment for silicidation, a heat treatment that is equal to or higher than the thermal energy for reacting all of the metal film 8 formed in the first region with silicon constituting the semiconductor substrate 1 is performed. In this case, as shown in FIG. 11, the thickness of the silicide film 11 formed in the first region is thinner than the thickness of the silicide film 10 formed in the second region.

  Thus, when the thickness of the silicide film 11 formed in the first region is thin, the possibility that the silicide film 11 is aggregated by heat treatment when forming the interlayer insulating film and the wiring layer is increased. If the silicide film 11 is aggregated, the semiconductor substrate 1 is etched to a depth equal to or greater than the thickness of the silicide film 11 when the contact hole is opened in the interlayer insulating film 15. In this situation, the barrier metal 16 is formed. Then, as shown in FIG. 12, spike-like barrier metal 16 s is formed inside the semiconductor substrate 1. The formation of the spike-like barrier metal 16s in the semiconductor substrate 1 causes the destruction of the semiconductor junction.

  Therefore, in the method for manufacturing a semiconductor device according to the present embodiment, a metal film 8 having a desired thickness or more is formed on the semiconductor substrate 1 in the first region. In order to form the silicide films 10 to 12, heat energy is applied so as to cause the metal film 8 having a desired film thickness to react with silicon constituting the semiconductor substrate 1.

  As described above, the metal film 8 is formed and silicided in consideration of the film thickness of the silicide film 11 formed in the surface of the semiconductor substrate 1 in the first region. Therefore, even if the distance L between the gate structures G1 and G2 is reduced, the silicide film 11 having an appropriate thickness can be formed on the semiconductor substrate 1 between the gate structures G1 and G2. Therefore, aggregation of the silicide film 11 can be prevented. As described above, since the condensation of the silicide film 11 can be prevented, the spike-like barrier metal 16s as shown in FIG. 12 is not formed, and the semiconductor junction can be prevented from being broken.

  Even in the surface of the semiconductor substrate 1 in the second region, it is possible to prevent the silicide film 10 having a thickness greater than necessary from being formed. Therefore, even in the formation in the second region, it is possible to prevent the semiconductor junction from being broken. Here, as described above, when the method of manufacturing a semiconductor device according to the present embodiment is employed, the film thickness of the silicide film (first silicide film) 11 formed in the first region, and the second The thickness of the silicide film (second silicide film) 10 formed in the region is the same.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, a semiconductor in which the aspect ratio (= H / L) between the distance L between the gate structures G1 and G2 and the height H of the gate structures G1 and G2 is 1 or more. Useful when creating devices. Specifically, when the distance L between the gate structures G1 and G2 is 80 nm or less and the height H of the gate structures G1 and G2 is 100 nm or more, when L is 60 nm or less, H is 80 nm or more. In the case of a certain configuration, or when L is 50 nm or less and H is 60 nm or more, the method of manufacturing a semiconductor device according to the present embodiment is particularly useful.

  Further, in the method of manufacturing the semiconductor device according to the present embodiment, the desired thickness of the metal film 8 is that of the silicide film 11 formed on the semiconductor substrate 1 in the first region. It is determined so as not to reach the joint surface of the impurity diffusion layers 5 and 7 formed in the surface of the semiconductor substrate 1.

  Therefore, the formation of the silicide film 11 can surely prevent the semiconductor junction from being broken. In addition, process design that can avoid aggregation of the silicide film 11 is also facilitated.

  In the case where a plurality of gate structures are formed on the semiconductor substrate 1, the distance between the gate structures having contact plugs (contact holes) on the impurity diffusion layer is the minimum value. It is an area. Then, a metal film 8 having a desired thickness or more is formed in the first region. Then, the semiconductor substrate 1 is provided with thermal energy sufficient to cause the silicidation reaction of the metal film 8 corresponding to the desired film thickness.

  Thereby, even in the fine region where the distance between the gate structures is the shortest, the aggregation of the silicide film 11 and the semiconductor junction breakdown can be prevented.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, the thickness of the metal film 8 in the second region is equal to or greater than the multiplication result of the desired thickness and the reciprocal of the coverage rate in the first region. The metal film 8 is formed under various film forming conditions.

  Setting the thickness of the metal film 8 formed in the second region is easy in the process. Therefore, by adopting the above film forming conditions, it is possible to reliably prevent the thickness of the metal film 8 in the first region from being less than the desired thickness.

  In the method for manufacturing a semiconductor device according to this embodiment, data illustrated in FIGS. 5 and 7 is prepared in advance.

  Thereby, the coverage rate of the first region and the heating time for silicidation can be obtained more easily using the data. That is, the metal film 8 can be formed and silicided more accurately and easily.

  Note that a heat treatment such as RTA is employed as a treatment for applying thermal energy for the silicidation treatment. As a result, the heat treatment for allowing the metal film 8 corresponding to the desired film thickness to react with silicon at a predetermined temperature can be adjusted by the heating time. Since the process control during the heating time is very easy, the silicide film 11 in which aggregation and junction breakdown do not occur can be created more accurately and easily.

  The present invention can be applied to all LSIs that form a silicide film on a semiconductor substrate. The present invention can be applied not only when silicon is used as the semiconductor substrate 1, but also when germanium is contained in silicon or carbon is contained in silicon.

It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is a figure which illustrates the relationship between the coverage rate of a metal film, and the distance between the gate structures in a 1st area | region. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is a figure which illustrates the relationship between a heating time and the reaction film thickness of a metal film. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is process sectional drawing for demonstrating the manufacturing method of the semiconductor device which concerns on this invention. It is a figure for demonstrating the reason for which the manufacturing method of the semiconductor device which concerns on this invention is required. It is a figure for demonstrating the reason for which the manufacturing method of the semiconductor device which concerns on this invention is required.

Explanation of symbols

  1 semiconductor substrate, 2 element isolation insulating film, 3 gate insulating film, 4 gate electrode, 5, 7 impurity diffusion layer, 8 metal film, 9 metal nitride film, 10, 11, 12 silicide film, 15 interlayer insulating film, 16 barrier Metal film, 17 W film, CP contact plug, G1, G2 gate structure, L gate structure distance, H gate structure height.

Claims (15)

(A) forming at least two gate structures including a gate electrode as a component on a silicon semiconductor substrate;
(B) The semiconductor including the first region so that a film thickness of a metal film formed in a first region which is a region on the semiconductor substrate between the gate structures is equal to or greater than a desired film thickness. Forming the metal film on a substrate;
(C) After the step (B), the semiconductor film is added with thermal energy to such an extent that the metal film having a desired thickness reacts with silicon constituting the semiconductor substrate. And a step of forming a silicide film in the surface of the substrate. The desired film thickness is
The thickness of the silicide film formed in the surface of the semiconductor substrate in the first region does not reach the junction surface of the impurity diffusion layer formed in the surface of the semiconductor substrate in the first region. The method of manufacturing a semiconductor device according to claim 1, wherein: The step (A)
A step of forming a plurality of gate structures on the semiconductor substrate;
The first region is
2. The method of manufacturing a semiconductor device according to claim 1, wherein the distance between the gate structures provided with contact holes on the impurity diffusion layer is a minimum value. The step (B)
The film thickness of the metal film in the second region different from the first region on the semiconductor substrate is equal to or greater than the result of multiplying the desired film thickness and the reciprocal of the coverage rate of the first region. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the metal film is formed under film forming conditions. (D) preparing in advance data indicating a relationship between a distance between the gate structures in the first region and the coverage rate of the metal film in the first region;
(E) further comprising the step of obtaining the coverage rate in the first region from the distance between the gate structures in the first region and the data;
The step (B)
The step of forming the metal film according to the film formation conditions obtained using the coverage rate in the first region obtained from the result of the step (E).
The method of manufacturing a semiconductor device according to claim 4. The step (C)
It is a step of performing heat treatment on the semiconductor substrate for a heating time sufficient for the metal film of the desired thickness to react with silicon constituting the semiconductor substrate at a predetermined temperature. A method for manufacturing a semiconductor device according to claim 1. (F) preparing in advance data indicating a relationship between the heating time and the thickness of the metal film that reacts with silicon at the predetermined temperature;
(G) further comprising the step of obtaining the heating time from the desired film thickness of the metal film and the data,
The step (C)
The heating time determined from the result of the step (G), the step of giving the predetermined temperature to the semiconductor substrate,
The method of manufacturing a semiconductor device according to claim 6. The step (A)
2. The method of manufacturing a semiconductor device according to claim 1, wherein the gate structure is formed so that an aspect ratio between a distance between the gate structures and a height of the gate structure is 1 or more. The step (A)
9. The method of manufacturing a semiconductor device according to claim 8, wherein a distance between the gate structures is 80 nm or less. The step (B)
2. The method of manufacturing a semiconductor device according to claim 1, wherein the metal film containing Ni is a step of forming the metal film. The step (B)
11. The step of forming the metal film further including at least one of Pd, Pt, Hf, V, Ta, Ru, Yb, Er, Al, W, and Ti. A method for manufacturing a semiconductor device. A semiconductor substrate;
At least two gate structures formed on the semiconductor substrate and including a gate electrode as a component;
A first silicide film formed in a surface of the semiconductor substrate between the gate structures;
A second silicide film formed in the surface of the semiconductor substrate other than between the gate structures,
The aspect ratio between the distance between the gate structures and the height of the gate structure is:
1 or more,
The film thickness of the first silicide film and the film thickness of the second silicide film are:
The same,
A semiconductor device. The distance between the gate structures is
80 nm or less,
The semiconductor device according to claim 12. In the first silicide film and the second silicide film,
Contains at least Ni,
The semiconductor device according to claim 12. In the first silicide film and the second silicide film,
At least one of Pd, Pt, Hf, V, Ta, Ru, Yb, Er, Al, W, Ti is further included,
The semiconductor device according to claim 14.

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