JP2009290387A - Encoder, decoder and recording reproducing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that circuit scale and power consumption increase because an increase in the number of memory devices to be used and acceleration of an operation frequency of a device are required by an increase in the number of accesses to a reference memory in performing encoding and decoding of a motion picture of a high resolution and high frame rate. <P>SOLUTION: An encoder, a decoder and a recording reproducing device can achieve high-speed processing while suppressing an increase in circuit scale and power consumption by enabling reduction of the number of accesses to the reference memory by processing a macroblock of a first input frame, a macroblock of a second input frame and a macroblock of a third input frame per macroblock, using image data for a search range read from the reference memory in processing of referencing the image data of the common search range among the first input frame, the second input frame and the third input frame which are different from each other. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an encoder, a decoder, and a recording / reproducing apparatus. For example, the present invention relates to an encoder for encoding an image and converting it into a bit stream, a decoder for decoding the encoded bit stream, and a recording / reproducing apparatus using these.

  As background art of this technical field, for example, there is JP-A-2007-104231 (Patent Document 1). In this publication, “[Problem] Transcoder for transcoding with improved usability by using information indicating whether encoding is performed in Inter or Intra mode of encoded information added to a stream before conversion. The present invention provides a recording apparatus and a transcoding method. [Solution] A transcoder decodes a moving picture stream encoded by a first encoding method that performs intraframe encoding and interframe predictive encoding, and A decoder for detecting sub-information indicating whether the data is encoded by intra-frame encoding or inter-frame prediction encoding; When the sub-information is information indicating that intra-frame encoding is performed and when it is information indicating that inter-frame prediction encoding is performed In is described an encoder for changing the frames to be referred to when encoding, and. "(Abstract) with.

  As background art in this technical field, for example, there is JP-A-2006-270683 (Patent Document 2). According to the publication, “[Problem] When data is detected, data is frequently transferred from the frame memory, so the bus bandwidth is compressed and the processing performance deteriorates. [Solution] The motion compensator 60 includes a frame memory 80. In addition to the SRAM 66, the pre-reading SRAM 64 is provided in addition to the SRAM 66. The motion vector detecting unit 62 is a pixel area having a high reference frequency within a predetermined search range of the reference image held in the frame memory 80. Is previously transferred from the frame memory 80 to the prefetch SRAM 64. On the other hand, the motion vector detection unit 62 transfers pixel data that needs to be referred to when searching for a motion vector from the frame memory 80 to the SRAM 66 each time the search is performed. The motion vector detection unit 62 switches between the prefetch SRAM 64 and the normal SRAM 66 and refers to them, The motion search is advanced "(summary).

JP 2007-104231 A JP 2006-270683 A

  As a moving image encoding technique, MPEG2 (ISO / IEC 13813-2, International Standard) is adopted for broadcasting use and recording on a recording medium. In addition, H.264 (ITE / ISO 14496-10 / H.264AVC) / AVC (Advanced Video Coding), which supports higher compression, has begun to be adopted as a recording method for recording media.

  In these encoding methods, each frame constituting a moving image is divided into macroblock units of 16 pixels × 16 pixels, and processing in units of macroblocks is performed.

  Also, an intra-frame prediction image (hereinafter referred to as I picture) that is encoded based on intra-frame information, and a forward prediction image (hereinafter referred to as P picture) that is encoded using a temporally forward frame as a reference image. ), And bidirectional prediction images (hereinafter referred to as B pictures) that are encoded with reference to temporally forward and backward frames, respectively. The reference frame configuration at the time of encoding is disclosed in Patent Document 1 described above.

  For P pictures and B pictures, a macroblock similar to the current macroblock to be encoded is searched from a predetermined reference image for each macroblock, and the spatial distance and direction from the searched macroblock are determined. Difference information between the motion vector to be represented and the searched macroblock is calculated. Next, these pieces of information are compressed by DCT transform (Discrete Cosine Transform), quantization and variable length coding. As described above, these encoding methods are methods characterized by improving the compression rate by compressing difference information with respect to the reference image in the forward direction and the backward direction in terms of time.

  However, when encoding and decoding a P picture and a B picture, a reference memory for storing the reference image is required to use the reference image, and the reference memory can be realized by, for example, SDRAM. .

  When encoding and decoding high-resolution and high-frame-rate moving images, access to the reference memory increases.

  In addition, when an encoder and decoder are installed in the device, the reference memory is used for memory processing for graphic processing and processing with external devices for the purpose of improving cost performance and reducing the size of the device. It is conceivable to use it in common with a memory for doing so. However, when the reference memory is shared, it is necessary to secure a data bandwidth for the reference memory access of the encoding and decoding processes.

  Therefore, there is a problem that the number of memory devices to be used is increased and the operating frequency of the devices is required to be increased, resulting in an increase in power consumption.

  Further, as in the method of Patent Document 2, by increasing the intermediate memory, the method of reducing the access to the reference memory and ensuring the data bandwidth, the encoding of moving images with high resolution and high frame rate, and When performing decoding, there is a problem that the circuit scale of the intermediate memory increases.

  An object of the present invention is to provide an encoder, a decoder, and a recording / reproducing apparatus that realize high-speed processing. For example, while suppressing an increase in circuit scale, it is possible to reduce access to the reference memory during encoding and decoding processing without increasing the number of devices for the reference memory and increasing the operating frequency of the device. An object of the present invention is to provide an encoder and a decoder that realize high-speed processing, and to provide a recording / reproducing apparatus equipped with the encoder and the decoder.

  The above object can be achieved by the invention described in the claims.

  According to the present invention, an encoder, a decoder, and a recording / reproducing apparatus that realize high-speed processing can be provided.

  Problems, configurations, and effects other than those described above will become apparent from the following description of embodiments.

  Embodiments of the present invention will be described below with reference to the drawings.

  As a preferred embodiment of the present invention, the configuration and operation of an encoder will be described.

  In the present embodiment, description will be made using the H.264 method. However, the present invention is not limited to this, and examples of the encoding method include the MPEG2 method, MPEG4, H.261, H263, and SMTPE VC1.

  In the H.264 method or the like, it is possible to perform multiframe compensation in which a reference frame for motion compensation can be arbitrarily selected from already encoded frames.

  The configuration of the embodiment will be described with reference to FIG. An image input interface unit 001 for inputting image data to be encoded, a buffer unit 002 for storing image data output from the input interface unit 001 as an input image, an input image output from the buffer unit, and a plurality of already encoded images A motion compensation unit 003 that performs motion compensation processing between the reference image and creates difference data between the input image and the predicted image, and a frequency transform unit that performs frequency conversion and quantization of the difference data output from the motion compensation unit 004, intermediate data storage unit 005 for storing the intermediate data output from the previous frequency conversion unit in units of macroblocks, encoding for encoding the intermediate data output from the intermediate data unit with a syntax compliant with the standard Unit 006, bit stream output unit 007 for outputting the bit stream output from the encoding unit, encoded image A reference memory unit 008, which is a reference image storage unit for making a reference image for later motion compensation, and an encoder 100 including an intermediate memory unit 009 for storing a reference image in a range necessary for motion compensation processing are shown. .

  For example, the buffer unit 002 and the reference memory unit 008 may be assigned to different addresses on a common SDRAM.

  FIG. 2 shows a reference image frame configuration used in the motion compensation unit in the present embodiment.

  In the figure, I, P, and B respectively indicate picture types, I is an intra-frame predicted image that is encoded based on intra-frame information, and P is a temporally forward frame as a reference image The forward prediction image (predictive-codec) to be encoded, B is the type that performs bi-directional prediction image (bidirectionally-predictive-codec) encoded using the forward and backward frames as reference images in terms of time. Show.

  When encoding a P3 frame, search for a similar macroblock from the vicinity of the macroblock of the P3 frame to be encoded and the hatched corresponding macroblock of the I0 frame that is temporally forward, and determine the macro Calculate the difference with the block.

  For the B1 frame, the macroblock of the B1 frame to be encoded, the I0 frame that is temporally forward, and the similar macroblock from the vicinity of the corresponding macroblock that is hatched of the P3 frame that is temporally backward And the difference from the determined macroblock is calculated. For the B2 frame, similarly to the B1 frame, the reference image is processed in the same manner as the B1 frame with the I0 frame and the P3 frame as reference images.

  When encoding a P6 frame, a macro determined by searching for a similar macroblock from the vicinity of the corresponding macroblock hatched in the P3 frame that is temporally forward and the P6 frame that is to be encoded is determined. Calculate the difference with the block.

  Further, in the encoding process, since an already encoded frame is used as a reference image, it is necessary to store the encoded frame in the reference memory 008. FIG. 3 shows an example in which encoding is performed using the reference image stored in the reference memory 008 with the reference memory 008 as the reference image storage number 3 side.

  When the B3 frame in FIG. 3 is encoded, pixel data around the corresponding macroblock are read from the reference memory unit 008 for the temporally forward frame I2 and temporally backward frame P5, and motion compensation is performed. The part 003 searches for a similar macroblock, and calculates a difference from the pixel data of the determined similar macroblock.

  When encoding a B4 frame, the pixel data around the corresponding macroblock is read from the reference memory unit 008 for the frame I2 that is temporally forward and the frame P5 that is temporally backward, as with the B3 frame. Then, the motion compensation unit 003 searches for a similar macroblock, and calculates a difference from the pixel data of the determined similar macroblock.

  When encoding a P8 frame, read out the pixel data around the corresponding macroblock using the B3 frame and the P5 frame used as the temporally backward reference image in the B4 frame as the temporally forward frame. Then, the motion compensation unit 003 searches for a similar macroblock, and calculates a difference from the pixel data of the determined similar macroblock.

  As described above, a total of five reference images are repeatedly read from the reference memory unit 008 twice for the I2 frame and three times for the P5 frame during the period for encoding the three frames B3, B4, and P8.

  FIG. 4 is a conceptual diagram of an encoding process in which the reference image data read from the reference memory unit 008 is temporarily stored in the intermediate memory 009 and the read count to the reference memory unit 008 is reduced.

  Unlike FIG. 3, when encoding the B3 frame, the pixel data around the corresponding macroblock of the reference image is read from the reference memory unit 008, stored in the intermediate memory unit 009, and the B3 frame, B4 frame, and P8 frame are simultaneously stored. Process. At this time, the motion compensation unit 003 and the frequency conversion unit 004 perform the encoding process of 3 frames by taking 3 times as long as the encoding processing speed is 1/3 times normal.

  FIG. 5 shows a conceptual diagram of processing order in units of macroblocks when encoding B3 frame, B4 frame, and P8 frame. MB0 in the figure indicates the upper left macroblock of each frame, MBn indicates the nth macroblock in each frame, MBn + 1 indicates the macroblock to be processed next to MBn, and MBx indicates the lower right of each frame. Indicates a macroblock. At the start of the encoding process, the encoding process of MB0 of the B3 frame is performed with reference to the I2 frame and the P5 frame stored in the intermediate memory unit 009. After the encoding process of MB0 of B3 frame is completed, the encoding process of MB0 of B4 frame is performed with reference to the same frame as MB0 of B3 frame. After the encoding process of MB0 of the B4 frame is completed, the encoding process of MB0 of the P8 frame is performed with reference to the P5 frame stored in the intermediate memory unit 009. After completing the encoding process of MB0 of each frame, until the encoding process of MBn, MBn + 1, ..., MBx and the macroblock at the lower right of the screen is completed, the macroblock unit of B3 frame, B4 frame and P8 frame Continue encoding with.

  FIG. 6 shows a conceptual diagram of a search range for similar macroblocks. When the processing target macroblock position is determined as a range to search for a range of H pixels on the left and right and V pixels on the top and bottom, the intermediate memory unit 009 has left and right from the processing target macroblock position of the I2 frame and the P5 frame. Stores image data (hatched range in the figure) in the range of H pixels and V pixels above and below. The motion compensation unit 003 searches for a macroblock similar to the MBn of the B3 frame using the image data of the I2 frame and the P5 frame stored in the intermediate memory unit 009. After determining the similar macroblock, the encoding process I do. After the MBn MBn encoding process is completed, a macroblock similar to the B4 frame MBn is searched and encoded. After the encoding process of MBn of the B4 frame is completed, a macroblock similar to MBn of the P8 frame is searched and encoded using only the image data of the P5 frame stored in the intermediate memory unit 009.

  By performing the above processing procedure, it is possible to realize a three-frame encoding process that takes three times as long as one frame period.

  Further, when it is not real-time encoding, processing may be performed over three times as long as one frame period.

  Further, as shown in FIG. 7, it is possible to encode the B3 frame, the B4 frame, and the P8 frame at the same time as a configuration having three encoding units.

  The encoding unit 006 receives data from the intermediate data storage unit 005 in time series in units of macro blocks. The generated bit stream is output from the encoding unit 006 to the bit stream output unit 007. With this configuration, the reference image data amount to be read from the reference memory unit 008 is read out in two reference images in total for the I2 frame once and the P5 frame once in the processing period of 3 frames. It is possible to reduce to 2/5 times.

  According to the present embodiment, since the number of accesses to the reference memory during the encoding process is reduced, an encoder that realizes high-speed processing while suppressing an increase in circuit scale and power consumption is configured.

  In this embodiment, the H.264 encoder that realizes real-time processing is described as an object, but the present invention is not limited to real-time processing. The technique of actually searching for a plurality of reference images to realize multi-frame encoding and selecting an efficient reference image is not practical because it increases circuit scale and power consumption. In order to reduce the scale and power consumption, the H.264 encoder is configured to fix the frame of the reference image for motion compensation, but the present invention is not limited to the above-described reference frame configuration.

Further, the search algorithm for similar macroblocks in the present embodiment assumes a full search in the range stored in the intermediate memory unit 009. However, in the present invention, only a hierarchical search or a part of the intermediate memory is assumed. Even if an algorithm for searching for is used, it is equally effective.
Further, the present invention is not limited to the above-described embodiment, and can be modified and implemented without departing from the spirit of the present invention.

  As a preferred embodiment of the present invention, the configuration of a decoder will be described.

  In the present embodiment, description will be made using the H.264 method. However, the present invention is not limited to this, and examples of the encoding method include the MPEG2 method, MPEG4, H.261, H263, and SMTPE VC1.

  The configuration of the embodiment will be described with reference to FIG. A bitstream input unit 101 for inputting a bitstream to be decoded, a decoding unit 102 for decoding the bitstream output from the input unit 101 according to a standard, and storing data output from the decoding unit in units of macroblocks Intermediate data storage unit 103, intermediate data in units of macroblocks output from the intermediate data storage unit is inversely quantized and inverse frequency conversion unit 104 for inverse frequency conversion, differential data output from the inverse frequency conversion unit and already decoded Motion compensation between a plurality of converted reference images, a motion compensation unit 105 for generating image data, a buffer unit 106 for storing image data output from the motion compensation unit, and stored in the buffer unit 106 An image output interface 107 for outputting image data, and a reference image storage unit for using the decoded image as a reference image for later motion compensation Reference memory unit 108 that depicts a decoder 200 having an intermediate memory unit 109 for storing the range of the reference image necessary for the motion compensation process.

  For example, the buffer unit 106 and the reference memory unit 108 may be assigned to different addresses on a common SDRAM.

  The bit stream decoded by the decoder 200 is assumed to be encoded by the encoder 100 of the first embodiment. Therefore, the reference image frame configuration and the principle of reducing the number of reads of the reference memory unit 108 are the same as those of the encoder 100 of the first embodiment.

  Next, as another preferred embodiment of the present invention, an application example to a product will be described. In this embodiment, an application example to a recording / reproducing apparatus (for example, a camcorder or a camera-equipped mobile phone) will be described as a first practical example of a product.

  In this embodiment, for example, image data from an image sensor such as a camera or digital image content is input from the outside, and an encoding format is recorded on a recording medium such as a hard disk (HDD), a magneto-optical disk, or a flash memory. This is effective when the coding rate is changed.

  FIG. 9 shows a block diagram when the captured image data from the camera is stored in a recording medium. The image data input from the image input interface unit 709 is encoded by the encoding device 100 to generate a stream. The generated stream is recorded by a recording medium interface unit 706 on a recording medium unit 707 such as an HDD.

  In order to play back the recorded stream, the stream is read from the HDD, decoded by the decoding device 200, and if the image is output to a display, the decoded image is sent to the display unit 708.

  Further, the encoded image may be encoded again by the encoding device 100 in order to perform bit rate conversion and format conversion on the reproduced image decoded by the decoder device 200.

  According to the present embodiment, since the frequency of access to the reference memory of the encoder and decoder can be reduced, the encoder and decoder including the memory used other than the encoding device 100 and the decoding device 200, and the reference memory Can be arranged on a common memory, and a recording / reproducing apparatus with improved usability can be provided.

  In addition, according to the present embodiment, high-quality moving image bit rate conversion and format conversion can be realized.

  Next, a second product practical example (for example, a recorder) using this embodiment will be described.

  This embodiment is effective when analog and digital television broadcasts and programs that have already been recorded are stored in recording media such as HDDs and DVDs with different encoding formats and encoding rates.

  FIG. 10 shows a block diagram when digital broadcasting is stored in a recording medium.

  The digital broadcast received by the tuner unit 701 is decoded by the demodulation unit 702 and decomposed into moving image information and audio information by the demultiplexer unit 703. The moving image information is decoded by the decoding device 200, and if the image is output to a display, the decoded image is sent to the display unit 708. Further, the reproduction image decoded by the decoding device is encoded by the encoding device 100 to generate a stream.

  According to the present embodiment, since the frequency of access to the reference memory of the encoder and decoder can be reduced, the encoder and decoder including the memory used other than the encoding device 100 and the decoding device 200, and the reference memory Can be arranged on a common memory, and a recording / reproducing apparatus with improved usability can be provided.

It is a figure which shows Example 1 of the encoder in this invention. It is a frame block diagram in Example 1 of the encoder in the present invention. It is a conceptual diagram of the conventional encoding process. It is a conceptual diagram of the 1st encoding process in this invention. It is a conceptual diagram which shows the process per macroblock in the 1st encoding process in this invention. It is a conceptual diagram of the search range of a similar macroblock in the 1st encoding process in this invention. It is a 2nd conceptual diagram of the encoding process in this invention. It is a block diagram which shows Example 2 of the decoder in this invention. It is a figure which shows the structure of the product Example 3 in this invention. It is a figure which shows the structure of the product Example 4 in this invention.

Explanation of symbols

001 Image input interface unit 002 Buffer unit 003 Motion compensation unit 004 Frequency conversion unit 005 Intermediate data storage unit 006 Encoding unit 007 Bit stream output unit 008 Reference memory unit 009 Intermediate memory unit 100 Encoding device 101 Bit stream input unit 102 Decoding unit 103 Intermediate Data storage unit 104 Inverse frequency conversion unit 105 Motion compensation unit 106 Buffer unit 107 Image output interface output unit 108 Reference memory unit 109 Intermediate memory unit 200 Decoding device 701 Tuner unit 702 Decoding unit 703 Multiplexer unit 704 User interface unit 705 CPU unit 706 Recording Medium interface unit 707 Recording medium 708 Display unit 709 Image display unit

Claims (19)

Encoding processing that refers to image data for a common search range in different first input frame, second input frame, and third input frame,
When processing the first input frame, the second input frame, and the third input frame using image data for the search range read from the reference memory,
For the macroblock to be processed, the macroblock of the first input frame, the macroblock of the second input frame, and the macroblock of the third input frame,
An encoder characterized by switching and processing in units of macroblocks. The encoder according to claim 1, wherein
An encoder characterized in that a processing time required for encoding three frames is completed within a processing time of three frames. The encoder according to claim 1, wherein
When processing the first input frame, the second input frame, and the third input frame, the image data for the search range read from the reference memory is stored in the intermediate memory, and the image is read from the intermediate memory. The data is used to process the first input frame, the second input frame, and the third input frame,
An encoder characterized in that the number of times image data is read from a reference memory is reduced. The encoder according to claim 1, wherein
With reference to the first input frame F0 and the second input frame F1, the third input frame F2, the fourth input frame F3, and the input frame F0 or the input frame that perform bi-directional predictive encoding are used. With respect to the fifth input frame F4 that performs one-way predictive coding with only one of F1 as a reference object,
An encoder characterized by switching image data for a search range in units of macroblocks and processing the input frame F2, the input frame F3, and the input frame F4. The encoder according to claim 1, wherein
With reference to the first input frame F0, for the third input frame F2, the fourth input frame F3, and the fifth input frame F4 that perform one-way predictive coding,
An encoder characterized by switching image data for a search range in units of macroblocks using image data from the reference memory and processing the input frame F2, the input frame F3, and the input frame F4. An encoder according to claim 3,
The encoder is characterized in that the intermediate memory unit is arranged independently of the reference memory unit and shares a memory other than the reference memory unit and the intermediate memory. The encoder according to claim 1, wherein
An encoder characterized in that an image stream obtained by encoding and generating three different frames is output in time series within a period of encoding three frames. The encoder according to claim 1, wherein
An image input interface unit for inputting moving image data;
A buffer unit for storing image data output from the image input interface unit as an input image;
A motion compensation unit that performs a motion compensation process between the input image output from the buffer unit and the already encoded reference image, and generates difference data between the input image and the predicted image;
Frequency conversion and error conversion of error data output by the motion compensation unit, and a frequency conversion unit
An intermediate data storage unit for storing data output by the frequency conversion unit in units of macroblocks;
An encoding unit that encodes data output by the intermediate data storage unit into a syntax conforming to a standard;
A bitstream output unit for outputting a bitstream output from the encoding unit;
A reference memory unit that is a reference image storage unit for making the encoded image a reference image for later motion compensation processing;
An intermediate memory unit for storing a reference image in a range necessary for motion compensation processing;
An encoder comprising:   An image data output from an image input interface that has a recording medium interface and captures a moving image or a still image is encoded by the encoder according to claim 1, and an encoded image stream that is an output of the encoder is A recording / reproducing apparatus for recording on a recording medium via the recording medium interface. About decoding processing for referring to image data for a common reference range in different first input frame, second input frame, and third input frame,
When processing the first input frame, the second input frame, and the third input frame using image data for a reference range read from a reference memory,
For the macroblock to be processed, the macroblock of the first input frame, the macroblock of the second input frame, and the macroblock of the third input frame,
A decoder characterized by switching in units of macroblocks.   11. The decoder according to claim 10, wherein a processing time required for decoding three frames is completed within a processing time of three frames. The decoder according to claim 10, comprising:
When processing the first input frame, the second input frame, and the third input frame, the image data for the reference range read from the reference memory is stored in the intermediate memory, and the image is read from the intermediate memory. The data is used to process the first input frame, the second input frame, and the third input frame,
A decoder characterized in that the number of times image data is read from a reference memory is reduced. The decoder according to claim 10, comprising:
With reference to the first input frame F0 and the second input frame F1, the third input frame F2 for performing bidirectional predictive decoding, the fourth input frame F3, and the input frame F0 or the input frame For the fifth input frame F4 for which one-way predictive decoding is performed with only one of F1 as a reference object,
A decoder characterized by switching image data for a search range in units of macroblocks and processing the input frame F2, the input frame F3, and the input frame F4. The decoder according to claim 10, comprising:
With reference to the first input frame F0, for the third input frame F2, the fourth input frame F3, and the fifth input frame F4 that perform one-way predictive decoding,
A decoder characterized by switching image data for a search range in units of macroblocks and processing the input frame F2, the input frame F3, and the input frame F4. A decoder according to claim 12, comprising:
The decoder, wherein the intermediate memory unit is arranged independently of the reference memory unit and shares a memory other than the reference memory unit and the intermediate memory. The decoder according to claim 10, comprising:
A decoder characterized in that image data obtained by decoding and generating three different frames is output in time series within a period of decoding three frames. The decoder according to claim 10, comprising:
The decoder according to claim 1, wherein the input image stream is an image stream encoded by the encoder according to claim 1. The decoder according to claim 10, comprising:
A bitstream input unit for inputting a bitstream;
A decoding unit that decodes the bitstream output from the bitstream input unit according to a standard;
An intermediate data storage unit for storing the decoded data in units of macroblocks;
Inverse quantization and inverse frequency conversion to macroblock unit data output from the intermediate data storage unit;
A motion compensation unit that performs motion compensation between the difference data output from the inverse frequency transform unit and a reference image that has already been decoded;
A buffer unit for storing image data output from the motion compensation;
An image output interface unit for outputting the image data stored in the buffer unit;
A reference memory unit which is a reference image storage unit for setting the decoded image as a reference image for later motion compensation;
An intermediate memory unit for storing a reference image in a range necessary for motion compensation processing;
A decoder comprising: The recording / reproducing apparatus according to claim 9,
Having an image display,
11. A recording / reproducing apparatus, wherein image data obtained by decoding an input image stream by the decoder according to claim 10 is output to the image display unit.

Images