JP2009281773A - Current sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a current sensor that dynamically adjusts an offset amount without discontinuing measurement of a current value and has high responsiveness. <P>SOLUTION: The current sensor 1 includes a shunt resistance sensor 20 and a Hall element sensor 10. This current sensor 1 includes a differential amplifier 31, a sample and hold circuit 32, a digital storage circuit 40, a switch 33, a substracter 34 and a control part 35 controlling these elements. The control part 35 selects an output signal of the sample and hold circuit 32 as an offset amount by the switch 33 when a sensor signal output from the shunt resistance sensor 20 comes to have a prescribed value or less, while it starts driving of the digital storage circuit 40. When storing of the digital storage circuit 40 is completed thereafter, an output signal of the digital storage circuit 40 is selected as the offset amount by the switch 33. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a current sensor including a Hall sensor using a Hall element.

Conventionally, current values of line currents of various electric devices are detected using a current sensor using a Hall element.
Specifically, this current sensor prepares a core having a gap, and the core is arranged so that a line current to be measured passes through the central axis of the core. A Hall element is disposed between the gaps, and a control current is passed through the Hall element.
According to this current sensor, the magnetic force generated in proportion to the current is converged by the core and passes through the Hall element. Then, this Hall element converts the magnetic force into a voltage and outputs it as a detection signal.

By the way, the Hall element constituting the above current sensor has a unique offset voltage due to component difference, individual difference, and the like.
Therefore, there is a method of measuring the offset voltage of the Hall element and removing the offset voltage based on the measurement result (see, for example, Patent Document 1). Specifically, the correction circuit includes a processor and a D / A converter, converts digital data output from the processor into an analog signal by the D / A converter, and uses the analog signal as a reference to calculate the offset voltage. Adjust the level. Thereby, the offset voltage is automatically corrected.
JP-A-8-43512

However, since this offset voltage has a characteristic that it changes with changes in ambient temperature or with time, the level of the offset voltage once set may change.
Further, the method using the D / A converter takes time to determine the level of the offset voltage. Therefore, it is necessary to temporarily interrupt the measurement of the current value until the offset voltage level is determined.

  An object of the present invention is to provide a current sensor that can dynamically adjust an offset without interrupting measurement of a current value and has high responsiveness.

  A current sensor (for example, a current sensor 1 described later) of the present invention has a shunt resistor (for example, a shunt resistor 21 described later) connected in series to an output conductor (for example, an output conductor 2 described later) through which a current to be measured flows. ) Is used to detect a current flowing through the output conductor using a shunt resistance sensor (for example, a shunt resistance sensor 20 described later) and a Hall element (for example, a Hall element 12 described later). A difference sensor that outputs a difference between a sensor signal output from the Hall element sensor and a reference voltage as an analog signal. A dynamic amplifier (for example, a differential amplifier 31 described later) and a sample-and-hold circuit (for example, a differential amplifier 31 that holds an output signal of the differential amplifier The sample-and-hold circuit 32) and A / D conversion for converting the analog signal output from the sample-and-hold circuit into a digital signal are executed, the digital signal is stored, and the stored digital signal is converted into an analog signal. Digital storage means (for example, digital storage circuit 40 to be described later) that performs D / A conversion to be converted into one of the output signal of the sample and hold circuit and the output signal of the digital storage means is selected as an offset amount Switching means (for example, a switch 33 described later) and offset removing means (for example, a subtractor described later) for removing the offset from the sensor signal of the Hall element sensor based on the offset amount output from the switching means. 34) and control means for controlling them (for example, a control unit 35 described later) And when the sensor signal output from the shunt resistance sensor falls below a predetermined value, the control means selects the output signal of the sample and hold circuit as an offset amount by the switching means, and the digital storage means When the storage of the digital storage means is completed after that, the output signal of the digital storage means is selected as the offset amount by the switching means.

  According to the present invention, when the sensor signal output from the shunt resistance sensor becomes equal to or less than the predetermined value, the output signal of the sample and hold circuit is selected as the offset voltage by the switching means and the driving of the digital storage means is started. Thereafter, when the storage of the digital storage means is completed, the output signal of the digital storage means is selected as the offset amount by the switching means.

  Therefore, the period when the current is not flowing through the output lead wire is surely detected by the shunt resistance sensor, and the offset amount is stored by the digital storage means, the offset is output using the offset amount output from the sample and hold circuit. Remove. Thereafter, when the storage of the offset amount is completed by the digital storage means, the offset is removed using the stored offset amount. For this reason, the offset amount can be adjusted dynamically without interrupting the measurement of the current value.

  Further, the sample and hold circuit cannot hold the offset amount for a long period of time due to factors such as discharge, but the digital storage means can hold the offset amount for a long period of time. Therefore, by using the offset amount from the sample and hold circuit, the responsiveness is improved, and by using the offset amount from the digital storage means, the offset amount can be secured over a long period of time.

  In this case, when the D / A conversion output of the digital storage means is determined, the control means preferably selects the output signal of the digital storage means as an offset amount by the switching means.

In this case, the digital storage means includes a counter circuit that outputs a digital signal (for example, a counter circuit 44 described later) and a storage unit that stores the digital signal output from the counter circuit (for example, a digital memory 42 described later). A D / A conversion unit (for example, a D / A converter 43 described later) that converts the digital signal stored in the storage unit into an analog signal;
A comparator (for example, a comparator 45 described later) that compares the output signal of the sample and hold circuit and the output signal of the D / A converter, and the counter circuit includes the D / A converter It is preferable to increase or decrease the signal level of the digital signal until the signal level of the output signal matches the signal level of the output signal of the sample and hold circuit.

  According to the present invention, since the counter circuit and the comparator are included, the circuit can be configured at low cost.

  According to the present invention, the offset amount output from the sample-and-hold circuit is used for the period in which the state in which no current flows through the output conductor is reliably detected by the shunt resistance sensor and the offset amount is stored by the digital storage means. Remove the offset. Thereafter, when the storage of the offset amount is completed by the digital storage means, the offset is removed using the stored offset amount. For this reason, the offset amount can be adjusted dynamically without interrupting the measurement of the current value. Further, by using the offset amount from the sample and hold circuit, the responsiveness is improved, and by using the offset amount from the digital storage means, the offset amount can be secured for a long period of time.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description of the embodiments, the same constituent elements are denoted by the same reference numerals, and the description thereof is omitted or simplified.
[First Embodiment]
FIG. 1 is a diagram showing a configuration of a signal processing circuit of the current sensor 1 according to the first embodiment of the present invention.
The current sensor 1 includes a Hall element sensor 10, a shunt resistance sensor 20, a differential amplifier 31, a sample and hold circuit 32, a digital storage circuit 40 as a digital storage means, a switch 33 as a switching means, and a subtractor as an offset removal means. 34, and a control unit 35 as control means for controlling them.

The hall element sensor 10 detects a line current flowing through the output conductor 2 in a non-contact manner, and includes an annular core 11 having a gap 111 and a hall element 12.
The core 11 is disposed so that the output conductor 2 passes through the central axis.
A control current is applied to the Hall element 12, which is disposed in the gap 111 of the core 11.
In the Hall element sensor 10, when a magnetic force is generated in proportion to the line current flowing through the output conductor 2, the generated magnetic force is converged by the core 11 and passes through the Hall element 12. Then, the Hall element 12 converts the magnetic force into a voltage and outputs it as a sensor signal.

The differential amplifier 31 outputs the difference between the sensor signal from the Hall element sensor 10 and the reference voltage ref as an analog signal.
The sample and hold circuit 32 holds the output signal of the differential amplifier 31 for a certain period.

The digital storage circuit 40 includes an A / D converter 41, a digital memory 42, and a D / A converter 43.
The digital storage circuit 40 performs A / D conversion for converting the analog signal output from the sample and hold circuit 32 into a digital signal by the A / D converter 41, and stores the digital signal by the digital memory 42. Thereafter, the D / A converter 43 executes D / A conversion for converting the stored digital signal into an analog signal.

The switch 33 selects and outputs one of the output signal of the sample and hold circuit 32 and the output signal of the digital storage circuit 40 as an offset.
The subtractor 34 removes the offset from the sensor signal of the hall element sensor 10 based on the offset amount output from the switch 33.

  The shunt resistance sensor 20 detects a line current flowing through the output lead 2, a shunt resistor 21 connected in series to the output lead 2, a comparator 22 that measures a potential difference between both ends of the shunt resistor 21, And an isolator 23 that insulates the comparator 22 from the control unit 35.

  The resistance value of the shunt resistor 21 is reduced in order to reduce the resistance loss. However, when the resistance value is decreased, it is necessary to improve the amplifier gain, or the SN ratio (signal-to-noise ratio) is decreased. Therefore, in this embodiment, the resistance value of the shunt resistor 21 is reduced, and the potential difference between both ends of the shunt resistor 21 is measured to determine only the presence or absence of current.

  The isolator 23 is for insulating the output conductor 2 through which a high-voltage current flows from the control unit 35 through which a low-voltage current flows. The isolator 23 is configured using a photocoupler, a coil, a capacitor, and the like.

  According to the above shunt resistance sensor 20, the comparator 22 measures the potential difference between both ends of the shunt resistance 21, and outputs it as a sensor signal.

  When a current flows through the output conductor 2 and the current detected by the shunt resistor 21 is equal to or less than a predetermined value, the control unit 35 selects the output signal of the sample and hold circuit 32 as an offset amount by the switch 33 and stores the digital storage When the drive of the circuit 40 is started and then the storage of the digital storage circuit 40 is completed, the output signal of the digital storage circuit 40 is selected by the switch 33 as an offset amount.

The operation of the current sensor 1 will be described with reference to the flowchart of FIG.
In step S <b> 1, the control unit 35 detects a sensor signal from the shunt resistance sensor 20.
In step S <b> 2, it is determined based on the sensor signal from the shunt resistance sensor 20 whether or not a line current is flowing through the output conductor 2. Specifically, it is determined whether or not the sensor signal from the shunt resistance sensor 20 is a predetermined value or more.
If this determination is YES, it can be determined that the line current is flowing, so the sensor signal of the Hall element sensor 10 cannot be used as the offset amount, and the process proceeds to step S6. On the other hand, if this determination is NO, it can be determined that no line current is flowing, so the sensor signal of the Hall element sensor 10 can be adopted as the offset amount, and the process moves to step S3.

  In step S <b> 3, the sensor signal of the hall element sensor 10 is detected and held by the sample and hold circuit 32.

  In step S4, the sensor signal from the sample and hold circuit 32 is selected as an offset amount by the switch 33. Then, the subtracter 34 removes this offset amount from the sensor signal of the Hall element sensor 10.

  In step S5, the digital storage circuit 40 is driven to store the offset amount as a digital signal.

In step S6, when the output of the D / A converter 43 of the digital storage circuit 40 is confirmed, it is determined that the storage of the digital storage circuit 40 is completed, and the output signal from the digital storage circuit 40 is again converted to the offset amount by the switch 33. This offset amount is removed from the sensor signal from the Hall element sensor 10.
As described above, the output signal from the sample and hold circuit 32 is selected as the offset amount during the period in which the storage process is executed by the digital storage circuit 40.

According to this embodiment, there are the following effects.
(1) During the period in which the offset amount is stored in the digital storage circuit 40, the offset is removed using the offset amount output from the sample and hold circuit. Thereafter, when the storage of the offset amount is completed by the digital storage means, the offset is removed using the stored offset amount. For this reason, since the offset amount can be secured even while the digital storage means is being driven, the offset can be adjusted dynamically without interrupting the measurement of the current value.

  (2) The sample and hold circuit 32 cannot hold the offset amount for a long period due to factors such as discharge, but the digital memory 42 can hold the offset amount for a long period. Therefore, by using the offset amount from the sample and hold circuit 32, the responsiveness is improved, and by using the offset amount from the digital storage circuit 40, the offset amount can be secured over a long period of time.

[Second Embodiment]
In the present embodiment, the configuration of the digital storage circuit 40 is different from that of the first embodiment.
FIG. 3 is a diagram showing a configuration of a digital storage circuit 40A according to the second embodiment of the present invention.

That is, this embodiment is different from the first embodiment in that a counter circuit 44 and a comparator 45 are provided instead of the A / D converter 41.
That is, the digital storage circuit 40 includes a counter circuit 44, a digital memory 42 as a storage unit, a D / A converter 43 as a D / A conversion unit, and a comparator 45.

The comparator 45 compares the output signal of the sample and hold circuit 32 with the output signal of the D / A converter 43.
Based on the comparison result of the comparator 45, the counter circuit 44 increases or decreases the signal level of the digital signal until the signal level of the output signal of the D / A converter 43 matches the signal level of the output signal of the sample and hold circuit 32. .

According to the present embodiment, in addition to the same effects as the above (1) and (2), the following effects can be obtained.
(3) Since the counter circuit 44 and the comparator 45 are provided instead of the A / D converter 41, the circuit can be configured at low cost.

It should be noted that the present invention is not limited to the above-described embodiment, and modifications, improvements, etc. within a scope that can achieve the object of the present invention are included in the present invention.
For example, if an EEPROM, Flash, or the like is used as the digital memory 42, the offset amount can be held even when the current sensor 1 is turned off.

It is a figure which shows the structure of the signal processing circuit of the current sensor which concerns on 1st Embodiment of this invention. It is a flowchart which shows operation | movement of the current sensor which concerns on the said embodiment. It is a figure which shows the structure of the signal processing circuit of the current sensor which concerns on 2nd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Current sensor 2 Output lead 10 Hall element sensor 12 Hall element 21 Shunt resistance 20 Shunt resistance sensor 31 Differential amplifier 32 Sample and hold circuit 33 Switch (switching means)
34 Subtractor (offset removal means)
35 Control unit (control means)
40, 40A Digital storage circuit (digital storage means)
42 Digital memory (storage unit)
43 D / A converter (D / A converter)
44 Counter circuit 45 Comparator

Claims (3)

A shunt resistance sensor that detects the current flowing through the output lead using a shunt resistor connected in series to the output lead through which the current to be measured flows, and the current flowing through the output lead using a Hall element are detected in a non-contact manner. A current sensor comprising:
A differential amplifier that outputs a difference between a sensor signal output from the Hall element sensor and a reference voltage as an analog signal;
A sample and hold circuit for holding the output signal of the differential amplifier;
A / D conversion is performed to convert an analog signal output from the sample and hold circuit into a digital signal, the digital signal is stored, and a D / A conversion is performed to convert the stored digital signal into an analog signal. Digital storage means;
Switching means for selecting and outputting one of the output signal of the sample and hold circuit and the output signal of the digital storage means as an offset amount;
Offset removing means for removing the offset from the sensor signal of the Hall element sensor based on the offset amount output from the switching means;
Control means for controlling these, and
When the sensor signal output from the shunt resistance sensor falls below a predetermined value, the control means selects the output signal of the sample and hold circuit as an offset amount by the switching means and starts driving the digital storage means Then, when the storage of the digital storage means is completed, the output signal of the digital storage means is selected as an offset amount by the switching means. The current sensor according to claim 1.
When the output of the D / A conversion of the digital storage means is determined, the control means selects the output signal of the digital storage means as an offset amount by the switching means. The current sensor according to claim 1.
The digital storage means includes a counter circuit that outputs a digital signal;
A storage unit for storing a digital signal output from the counter circuit;
A D / A converter that converts the digital signal stored in the storage unit into an analog signal;
A comparator for comparing the output signal of the sample and hold circuit and the output signal of the D / A converter;
The current sensor characterized in that the counter circuit increases / decreases the signal level of the digital signal until the signal level of the output signal of the D / A converter matches the signal level of the output signal of the sample and hold circuit.

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