JP2009277793A - Substrate for wiring and wiring substrate - Google Patents

Substrate for wiring and wiring substrate Download PDF

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JP2009277793A
JP2009277793A JP2008126196A JP2008126196A JP2009277793A JP 2009277793 A JP2009277793 A JP 2009277793A JP 2008126196 A JP2008126196 A JP 2008126196A JP 2008126196 A JP2008126196 A JP 2008126196A JP 2009277793 A JP2009277793 A JP 2009277793A
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wiring
substrate
conductive layer
base material
wiring board
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Masahiko Kawashima
政彦 川島
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Asahi Kasei Corp
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Asahi Kasei E Materials Corp
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Photovoltaic Devices (AREA)
  • Chemically Coating (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate for wiring and a wiring substrate such that manufacturing steps are greatly decreased, a film manufacturing time of a conductive layer is shortened, larger area is easily obtained, and various substrates have conductive layers. <P>SOLUTION: The substrate for wiring includes a base and a conductive layer formed on the base by using a wet plating method. The base is selected from a group of glass, plastic, and silicon wafers, and the substrate for wiring includes the conductive layer formed substantially entirely over the base. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は配線用基板及び配線基板に関する。本発明の配線用基板は湿式メッキ法を用いて、ガラス等の基板に直接に導電層を形成するため、製造工程を大幅に削減することができ、導電層の製膜時間を短縮することができるほか、容易に大面積化を図ることが可能で、かつ、様々な基板に関して導電層を具備することができる。また、種々の金属種を選択できるため、抵抗値、溶融温度等の金属種由来の様々な性能を付与することができる。さらに配線用基板が透明であるガラス、プラスチックを用いた場合、該配線用基板の導電層を部分的に除去することにより透明な配線基板を得ることができる。   The present invention relates to a wiring board and a wiring board. Since the wiring substrate of the present invention forms a conductive layer directly on a substrate such as glass using a wet plating method, the manufacturing process can be greatly reduced, and the time for forming the conductive layer can be shortened. In addition, the area can be easily increased, and a conductive layer can be provided for various substrates. Moreover, since various metal seed | species can be selected, various performance derived from metal seed | species, such as resistance value and a melting temperature, can be provided. Further, when glass or plastic whose wiring substrate is transparent is used, a transparent wiring substrate can be obtained by partially removing the conductive layer of the wiring substrate.

近年、透明導電膜の需要がディスプレイ等を中心に伸びており、高透明で、かつ、低抵抗の透明導電膜を安価に製膜することが急務となっている。透明導電膜の導電材料としての観点からは、金属は電気をよく通すが光(可視光)を反射し、また黒鉛も電気を通すが可視光を吸収して透明性を示さないので、導電性は満たすことができるが、透明性を確保することは困難である。通常、透明で電気をよく通す膜を作製するためにはワイドギャップ半導体を利用する。ワイドギャップ半導体では、エネルギーギャップが紫外域に対応するため可視光を吸収することなく、透明で、かつ、導電性を発揮することが可能となる。ワイドギャップ半導体の導電機構はキャリア電子の移動によるものであり、キャリア電子の密度が金属よりかなり低いため可視光を反射しない。このためワイドギャップ半導体からなる膜は可視光をよく透過するが、キャリア電子の密度の高い膜は、キャリア電子が赤外光を反射するため赤外領域の透過率は減少する傾向がある。   In recent years, the demand for transparent conductive films has been growing mainly in displays and the like, and there is an urgent need to form a transparent conductive film having high transparency and low resistance at low cost. From the viewpoint of the conductive material of the transparent conductive film, metal conducts electricity well but reflects light (visible light), and graphite also conducts electricity but absorbs visible light and does not show transparency. Can be satisfied, but it is difficult to ensure transparency. Usually, a wide gap semiconductor is used to produce a transparent film that conducts electricity well. In the wide gap semiconductor, since the energy gap corresponds to the ultraviolet region, it is transparent and can exhibit conductivity without absorbing visible light. The conduction mechanism of the wide gap semiconductor is based on the movement of carrier electrons, and the density of carrier electrons is considerably lower than that of metal, so that visible light is not reflected. Therefore, a film made of a wide gap semiconductor transmits visible light well, but a film having a high carrier electron density tends to reduce the transmittance in the infrared region because the carrier electrons reflect infrared light.

この様に得られた透明導電膜は、透明かつ電気をよく通すという特異な性質を利用して、透明ヒーター、ノートパソコンや携帯電話の表示素子用電極、太陽電池用電極、プラズマディスプレイパネル用電極などに用いられ、今後さらなる需要増加が期待されている。透明導電膜用材料としてよく用いられている物質は酸化インジウム・スズ(ITO)、酸化亜鉛(ZnO)、酸化スズ(SnO)等であり、現時点ではITO膜が低抵抗の材料である。   The transparent conductive film obtained in this way is transparent and uses a unique property of conducting electricity well, transparent heaters, electrodes for display elements of notebook computers and mobile phones, electrodes for solar cells, electrodes for plasma display panels The demand is expected to increase further in the future. Substances often used as a transparent conductive film material are indium tin oxide (ITO), zinc oxide (ZnO), tin oxide (SnO), and the like, and at present, the ITO film is a low resistance material.

一般的にITO透明導電膜は、スパッタリング法、真空蒸着法、ゾル・ゲル法、クラスタービーム蒸着法、PLD法等様々な方法でプラスチックやガラス上に製膜され、市場に投入されている。   In general, ITO transparent conductive films are formed on plastics and glass by various methods such as sputtering, vacuum deposition, sol-gel method, cluster beam deposition, and PLD, and are put on the market.

しかしながら、このような透明導電膜は、その製膜のために真空環境を用いるものが多く、真空環境の作成とその維持に様々な煩雑な作業が必要となる。また、大きな透明導電膜を作成するために大きな真空環境が必要となるが、その大きな真空環境を安定して高真空条件を維持するのは大変困難である。   However, such a transparent conductive film often uses a vacuum environment for film formation, and various complicated operations are required to create and maintain the vacuum environment. Moreover, a large vacuum environment is required to produce a large transparent conductive film, but it is very difficult to stably maintain the high vacuum condition in the large vacuum environment.

例えば、特開2001−11642号公報(特許文献1)には、酸化亜鉛を湿式メッキ法により製膜して得られる、高い可視光透過率と低い比抵抗値を有する透明導電性酸化亜鉛皮膜が開示されている。   For example, JP-A-2001-11642 (Patent Document 1) discloses a transparent conductive zinc oxide film having a high visible light transmittance and a low specific resistance value, which is obtained by forming a zinc oxide film by a wet plating method. It is disclosed.

この透明導電性酸化亜鉛皮膜は、湿式メッキ法により製膜されるため、従来の真空環境を必要とせず容易に大面積で製膜できる点が優れている。   Since this transparent conductive zinc oxide film is formed by a wet plating method, it is excellent in that it can be easily formed in a large area without requiring a conventional vacuum environment.

また、特開2006−310401号公報(特許文献2)にはポリイミド樹脂フィルムからなるプリント配線基板の片面又は両面に乾式製膜法で形成された金属層と、その金属層上に電気メッキ又は無電解メッキで形成された導電性を有する第2の金属層とを有する金属皮膜ポリイミド樹脂フィルムからなるプリント配線に、エッチングパターンを形成するというプリント配線基板の製造方法が開示されている。   Japanese Patent Laid-Open No. 2006-310401 (Patent Document 2) discloses a metal layer formed by a dry film forming method on one or both sides of a printed wiring board made of a polyimide resin film, and electroplating or non-plating on the metal layer. A printed wiring board manufacturing method is disclosed in which an etching pattern is formed on a printed wiring made of a metal-coated polyimide resin film having a conductive second metal layer formed by electrolytic plating.

このプリント配線基板は、ポリイミド樹脂フィルム上にメタライズ法によって銅を被覆し、その上にメッキ法を用いて合計約8ミクロン程度の銅の金属層を形成し、その金属層からアルカリ性のエッチング溶液を用いてピッチ間が50μmの櫛型パターンを形成している。この方法では、ポリイミド樹脂フィルムに、乾式製膜法で形成された金属層と、その金属層上に電気メッキ又は無電解メッキで形成された導電性を有する第2の金属層とを設けることにより、プラスチックフィルム上に導電性を確保し、エッチングの際、アルカリ金属水酸化物を用いることで、従来のパターン処理で問題になっていた金属成分の残留問題や近年の微細加工パターンにおける信頼性の消失を解決できる点で優れている。   In this printed circuit board, copper is coated on a polyimide resin film by a metallization method, and a copper metal layer of about 8 microns in total is formed thereon by using a plating method, and an alkaline etching solution is formed from the metal layer. A comb pattern with a pitch of 50 μm is formed. In this method, a polyimide resin film is provided with a metal layer formed by a dry film forming method and a conductive second metal layer formed by electroplating or electroless plating on the metal layer. By ensuring the conductivity on the plastic film and using an alkali metal hydroxide during the etching, the residual problem of metal components, which has been a problem in conventional pattern processing, and the reliability in recent microfabrication patterns It is excellent in that the disappearance can be solved.

特開2001−11642号公報JP 2001-11642 A 特開2006−310401号公報JP 2006-310401 A

特開2001−11642号公報に開示されている金属酸化物の湿式メッキでは、得られる皮膜は透明であるが湿式メッキに数時間という長時間を要し、製膜作業効率が悪いという問題が残されている。また、特開2006−310401号公報に開示されているポリイミド樹脂フィルムに金属層を乾式方法及び湿式方法の両方を駆使して導電層を担う金属層を製膜する方法では、乾式方法及び湿式方法の両方を使用しているが、乾式方法では真空環境を作成し、蒸着法やスパッタ法で金属層を製膜するため、真空環境の作成及びその維持に煩雑な作業や手間がかかるほか、大面積化の問題が残されている。   In the metal oxide wet plating disclosed in Japanese Patent Application Laid-Open No. 2001-11642, the obtained film is transparent, but the wet plating takes a long time of several hours, and the problem of poor film forming work efficiency remains. Has been. In addition, in the method of forming a metal layer carrying a conductive layer on a polyimide resin film disclosed in JP-A-2006-310401 using both a dry method and a wet method, a dry method and a wet method are used. However, the dry method creates a vacuum environment and deposits a metal layer by vapor deposition or sputtering, which requires complicated work and labor to create and maintain the vacuum environment. The problem of areaization remains.

本発明者らは、上記課題を達成するために鋭意検討した結果、本発明の目的を達成する配線用基板及び配線基板を発明するに至った。   As a result of intensive studies to achieve the above-mentioned problems, the present inventors have invented a wiring board and a wiring board that achieve the object of the present invention.

すなわち、本発明は下記の通りである。
(1) 基材及び湿式メッキ法を用いて形成された、導電層を該基材上に含むことを特徴とする配線用基板。
(2) 前記基材がガラス、プラスチック、及びシリコンウェハからなる群から選ばれる基材であり、該基材上にほぼ全面に導電層が形成されている(1)記載の配線用基板。
(3) 前記湿式メッキ法が無電解メッキ法である(1)又は(2)の配線用基板。
(4) 前記導電層に用いられる金属種が、金、銀、銅、亜鉛、ニッケル、錫、及びクロムからなる群から選ばれる少なくとも1種である(1)〜(3)のいずれか一項記載の配線用基板。
(5) 前記基材が透明である(1)〜(4)のいずれか一項記載の配線用基板。
(6) (1)〜(5)のいずれか一項記載の配線用基板から導電層を部分的に除去することにより作成された配線を有する配線基板。
(7) (6)記載の配線基板を有することを特徴とする集電電極。
(8) 太陽電池の集電電極である(7)記載の集電電極。
That is, the present invention is as follows.
(1) A wiring substrate comprising a conductive layer formed on a base material and a wet plating method.
(2) The wiring substrate according to (1), wherein the base material is a base material selected from the group consisting of glass, plastic, and a silicon wafer, and a conductive layer is formed on substantially the entire surface of the base material.
(3) The wiring board according to (1) or (2), wherein the wet plating method is an electroless plating method.
(4) Any one of (1) to (3), wherein the metal species used for the conductive layer is at least one selected from the group consisting of gold, silver, copper, zinc, nickel, tin, and chromium. The printed wiring board.
(5) The wiring substrate according to any one of (1) to (4), wherein the base material is transparent.
(6) A wiring board having wiring created by partially removing the conductive layer from the wiring board according to any one of (1) to (5).
(7) A current collecting electrode comprising the wiring board according to (6).
(8) The collector electrode according to (7), which is a collector electrode of a solar cell.

本発明の配線用基板は、湿式メッキ法を用いて、ガラス等の基板に直接に導電層を形成するため、製造工程を大幅に削減することができ、導電層の製膜時間を短縮することができるほか、容易に大面積化を図ることが可能で、かつ、様々な基板に関して導電層を具備することができる。また、種々の金属種を選択できるため、抵抗値、溶融温度等の金属種由来の様々な性能を付与することができる。さらに配線用基板が透明であるガラス、プラスチックを用いた場合、該配線用基板の導電層を部分的に除去することで透明な配線基板を得ることができる。本発明はこのようなメリットを有する配線用基板及び配線基板を提供する。   Since the wiring substrate of the present invention forms a conductive layer directly on a substrate such as glass using a wet plating method, the manufacturing process can be greatly reduced, and the time for forming the conductive layer can be shortened. In addition, the area can be easily increased, and a conductive layer can be provided for various substrates. Moreover, since various metal seed | species can be selected, various performance derived from metal seed | species, such as resistance value and a melting temperature, can be provided. Further, when glass or plastic whose wiring substrate is transparent is used, a transparent wiring substrate can be obtained by partially removing the conductive layer of the wiring substrate. The present invention provides a wiring board and a wiring board having such merits.

以下本発明を詳細に説明する。
<配線用基板、配線基板>
本発明でいう配線用基板とは配線を描画するために導電層を基材の表面に具備したものを示し、表面とは基材の片面又は両面でもよい。また、配線を自由に描画するために導電層は表面ほぼ全面に具備していることが好ましい。本発明の配線基板とは本発明の配線用基板から部分的に導電層を除去して配線を描画したものを示す。
<除去>
本発明の配線用基板から導電層を部分的に除去することとは、配線を描画するために、ほぼ全面に具備された導電層を公知の方法によって部分的に除去することを言う。公知の方法とは、酸やアルカリ物質による化学的エッチングやレーザーやメカニカル手法による物理的エッチング等が挙げられるが、いかなる方法であっても湿式メッキ法で作成された導電層を除去することができれば支障はない。
<基材>
本発明で用いられる基材としては、ガラス、プラスチック、シリコンウェハ等が挙げられる。ガラスは、主成分となる二酸化珪素と副成分となる種々の金属化合物を粉末として混合し、高温で溶融して液体状態としたものを急冷することにより製造されるものであり、白板ガラス、青板ガラス、耐熱ガラス等々が挙げられる。また、プラスチックとして、フェノール樹脂、エポキシ樹脂、メラミン樹脂、ユリア樹脂、不飽和ポリエステル樹脂、アルキド樹脂、ポリウレタン樹脂、熱硬化性ポリイミド樹脂等の熱硬化性樹脂や、高密度、中密度、低密度等の各種ポリエチレン樹脂、ポリプロピレン樹脂、ポリ塩化ビニル樹脂、ポリ塩化ビニリデン樹脂、ポリスチレン樹脂、ポリ酢酸ビニル樹脂、アクリロニトリルブタジエンスチレン樹脂、アクリル系樹脂、ナイロン等のポリアミド樹脂、ポリアセタール樹脂、ポリカーボネート樹脂、ポリフェニレンエーテル樹脂、ポリブチレンテレフタレート樹脂、ポリエチレンテレフタレート樹脂、環状ポリオレフィン (COP) 等の熱可塑性樹脂が挙げられる。さらに高純度な珪素の薄円盤であるシリコンウェハ等が挙げられる。
<透明基材>
特に上記基材の中で、厚さに関わらず透明である基材、又は厚さ10mm程度で透過率50%以上の透明性を有する基材からは、湿式メッキ法を用いて、上記記載の基材上にほぼ全面に導電層を形成して配線用基板を作成し、該配線用基板の導電層を部分的に除去することにより、透明性を有し、かつ、導電性を有する配線基板が得られる。この様に得られた配線基板は透明導電膜付基板としても使用できる。通常、透明導電膜の導電材料として金属は電気をよく通すが光(可視光)を反射し、黒鉛も電気を通すが可視光を吸収して透明性を示さないので、導電性は満たすことができるが、透明性を確保することは困難である。通常、透明で電気をよく通す膜を作製するためにはワイドギャップ半導体を利用する。ワイドギャップ半導体では、エネルギーギャップが紫外域に対応するため可視光を吸収することなく、透明で、かつ、導電性を発揮することが可能となる。ワイドギャップ半導体の導電機構はキャリア電子の移動によるものであり、キャリア電子の密度が金属よりかなり低いため可視光を反射しない。このためワイドギャップ半導体からなる膜は可視光をよく透過するが、キャリア電子の密度の高い膜は、キャリア電子が赤外光を反射するため赤外領域の透過率は減少する傾向がある。
The present invention will be described in detail below.
<Wiring board, wiring board>
The wiring substrate as used in the present invention refers to a substrate provided with a conductive layer on the surface of a base material for drawing wiring, and the surface may be one or both sides of the base material. In order to freely draw the wiring, the conductive layer is preferably provided on almost the entire surface. The wiring board of the present invention refers to a wiring drawn by partially removing the conductive layer from the wiring board of the present invention.
<Removal>
The partial removal of the conductive layer from the wiring substrate of the present invention means that the conductive layer provided on almost the entire surface is partially removed by a known method in order to draw the wiring. Known methods include chemical etching with acid or alkali materials, physical etching with laser or mechanical methods, etc., but any method can remove the conductive layer created by wet plating method. There is no hindrance.
<Base material>
Examples of the substrate used in the present invention include glass, plastic, and silicon wafer. Glass is produced by mixing silicon dioxide as the main component and various metal compounds as subcomponents as powder, and rapidly cooling those that have been melted at high temperature to form a liquid state. Examples include plate glass and heat-resistant glass. In addition, as plastic, thermosetting resins such as phenol resin, epoxy resin, melamine resin, urea resin, unsaturated polyester resin, alkyd resin, polyurethane resin, thermosetting polyimide resin, high density, medium density, low density, etc. Various polyethylene resins, polypropylene resins, polyvinyl chloride resins, polyvinylidene chloride resins, polystyrene resins, polyvinyl acetate resins, acrylonitrile butadiene styrene resins, acrylic resins, polyamide resins such as nylon, polyacetal resins, polycarbonate resins, polyphenylene ether resins And thermoplastic resins such as polybutylene terephthalate resin, polyethylene terephthalate resin, and cyclic polyolefin (COP). Furthermore, a silicon wafer that is a thin disk of high-purity silicon can be used.
<Transparent substrate>
In particular, among the above-mentioned base materials, a base material that is transparent regardless of the thickness, or a base material having a transparency of about 10 mm in thickness and a transmittance of 50% or more, is described above by using a wet plating method. A wiring board having transparency and conductivity by forming a wiring board by forming a conductive layer on substantially the entire surface of a substrate and partially removing the conductive layer of the wiring board. Is obtained. The wiring board thus obtained can also be used as a substrate with a transparent conductive film. Normally, metal as a conductive material of a transparent conductive film can conduct electricity well, but reflects light (visible light), and graphite also conducts electricity but absorbs visible light and does not show transparency, so conductivity can be satisfied. Although it is possible, it is difficult to ensure transparency. In general, a wide gap semiconductor is used to produce a transparent film that conducts electricity well. In the wide gap semiconductor, since the energy gap corresponds to the ultraviolet region, it is transparent and can exhibit conductivity without absorbing visible light. The conduction mechanism of the wide gap semiconductor is based on the movement of carrier electrons, and the density of carrier electrons is considerably lower than that of metal, so that visible light is not reflected. Therefore, a film made of a wide gap semiconductor transmits visible light well, but a film having a high carrier electron density tends to reduce the transmittance in the infrared region because the carrier electrons reflect infrared light.

本発明の透明導電膜付基板は、光を透過する部分と導電性を示す配線部分とが別々に存在するため、透過する光の波長分布を変えることがない。そのため、ワイドギャップ半導体を用いた透明導電膜では困難であった近赤外領域での高い透過率を示すことができる。
<湿式メッキ>
本発明においては、容易に大面積化ができることや均一に金属の薄膜を被覆するという観点から、湿式メッキ法が好ましい。湿式メッキ法には大きく分けて、電解メッキ法と無電解メッキ法がある。本発明ではどちらの方法を用いてもよいが、無電解メッキ法が電気を通さないガラス、プラスチック等に金属の薄膜を被覆した表面処理を施すことができるため好ましい。本発明でいう湿式メッキとは液中で基材表面を金属の薄膜で被覆する表面処理のことを言い、湿式メッキ法とはそのための方法を言う。本発明では公知の湿式メッキを用いて基材表面を金属の薄膜で被覆する表面処理を施し、導電層を設ける。無電解メッキ法は通常、パラジウム等の核を定着させて、その核から各種金属を生長させる方法であり、 無電解ニッケルメッキ、無電解ニッケル-タングステン合金めっき 無電解銅めっき、無電解スズめっき、無電解金めっき等が挙げられる。本発明で使用される無電解メッキの核としては通常、パラジウムが使用されるが、公知の方法であれば支障がなく、他の金属を使用してもよい。
In the substrate with a transparent conductive film of the present invention, since the light transmitting portion and the wiring portion exhibiting conductivity exist separately, the wavelength distribution of the transmitted light is not changed. Therefore, a high transmittance in the near-infrared region, which has been difficult with a transparent conductive film using a wide gap semiconductor, can be exhibited.
<Wet plating>
In the present invention, the wet plating method is preferable from the viewpoint of easy area enlargement and uniform coating of a metal thin film. The wet plating method is roughly classified into an electrolytic plating method and an electroless plating method. Either method may be used in the present invention, but the electroless plating method is preferable because a surface treatment in which a metal thin film is coated on glass, plastic or the like that does not conduct electricity can be performed. The wet plating referred to in the present invention refers to a surface treatment in which a substrate surface is coated with a metal thin film in a liquid, and the wet plating method refers to a method therefor. In the present invention, the surface of the substrate is coated with a metal thin film using a known wet plating, and a conductive layer is provided. The electroless plating method is usually a method of fixing a nucleus such as palladium and growing various metals from the nucleus. Electroless nickel plating, electroless nickel-tungsten alloy plating, electroless copper plating, electroless tin plating, Examples include electroless gold plating. As the core of the electroless plating used in the present invention, palladium is usually used. However, there is no problem if it is a known method, and other metals may be used.

本発明の湿式メッキ法に用いられる金属種が金、銀、銅、亜鉛、ニッケル、錫、及びクロムからなる群から選ばれる少なくとも1種の金属を含むことが好ましく、これらの金属種の複合又はタングステン等の他金属との複合でもよい。例えば、低抵抗を必要とする配線基板の場合、金、銀、銅等の抵抗が低い金属を使用したり、硬さを必要とする配線基板の場合、クロム等の金属を使用したり、所望の物性を金属種によって種々変化させることができる。本発明の湿式メッキのメッキ厚さは導電機能が発現できればいかなる厚みであっても支障はないが、配線用基板の導電層を部分的に除去する観点から、あまり厚いメッキ層では導電層が厚くなり、除去時の作業性が悪くなる。湿式メッキによる導電層の厚みは好ましくは500nm〜1mm、より好ましくは550nm〜0.8mmである。
<用途>
本発明の配線用基板及び配線基板は通常用いられる配線基板や集電電極として用いることができるほか、基板が透明である場合、LCDなどのフラットパネルディスプレイ、太陽電池、タッチパネルなどの透明電極(集電電極)や、帯電防止膜、電磁波シールド材などに用いることができる。
The metal species used in the wet plating method of the present invention preferably contains at least one metal selected from the group consisting of gold, silver, copper, zinc, nickel, tin, and chromium. It may be a composite with other metals such as tungsten. For example, in the case of a wiring board that requires low resistance, a metal having a low resistance such as gold, silver, or copper is used. In the case of a wiring board that requires hardness, a metal such as chrome is used. Various physical properties can be changed depending on the metal species. The plating thickness of the wet plating according to the present invention may be any thickness as long as the conductive function can be exhibited, but from the viewpoint of partially removing the conductive layer of the wiring board, the conductive layer is too thick in the case of a too thick plating layer. Therefore, workability at the time of removal is deteriorated. The thickness of the conductive layer by wet plating is preferably 500 nm to 1 mm, more preferably 550 nm to 0.8 mm.
<Application>
The wiring board and wiring board of the present invention can be used as a wiring board and a collecting electrode that are usually used. When the board is transparent, a transparent panel (collecting electrode) such as a flat panel display such as an LCD, a solar cell, and a touch panel. Electric electrode), an antistatic film, an electromagnetic shielding material, and the like.

以下に、実施例に基づき、本発明を詳細に説明する。なお、本発明で用いる評価方法も各実施例中に示す通りである。
<無電解銀メッキ作成>
実施例1
帝人デュポン社製ポリエチレンテレフタレートO3グレード(厚さ125μm)を基材として用いて、以下の手法を用いて該基材に湿式無電解銀メッキを行った。
Below, based on an Example, this invention is demonstrated in detail. In addition, the evaluation method used by this invention is also as showing in each Example.
<Making electroless silver plating>
Example 1
Using a polyethylene terephthalate O3 grade (thickness: 125 μm) manufactured by Teijin DuPont as a substrate, wet electroless silver plating was performed on the substrate using the following method.

奥野製薬工業株式会社社製エースクリーンA−220(建浴濃度50g/L、温度50℃、浸漬時間5分)にて基材の脱脂を行い、水洗後水酸化ナトリウム(濃度200g/L、温度70〜75℃)及び奥野製薬工業株式会社社製PBTエンチャントTR(濃度200ml/L、浸漬時間20分)にてエッチングを行った。その後、温度60℃、浸漬時間3分で基材を湯洗後、濃塩酸(濃度100ml/L、室温)及び奥野製薬工業株式会社社製TMP中和用添加剤(濃度20ml/L、浸漬時間2分)にて中和し、奥野製薬工業株式会社社製キャタリストC(濃度40ml/L、室温)及び濃塩酸(濃度150ml/L、浸漬時間5分)で核付けしたのち、奥野製薬工業株式会社社製ムデンシルバーMGS(MGS−1:100ml/L、MGS−2:400ml/L、MGS−3:10ml/L 室温で10分)で無電解銀メッキをポリエチレンテレフタレート基材上に施し、配線用基板を得た。無電解銀メッキの厚さは600nmであった。
実施例2〜3
実施例2は基材としてスライドガラスを用い、実施例3は基材としてシリコンウェハ(250μm)を用いて、実施例1と同等の方法によって無電解銀メッキを各基材上に施し、配線用基板を得た。導電性評価として四端子四探針方式ロレスタ-GP(ダイヤインストロメンツ社製)を用いてJIS K 7194に準拠して測定した。
The base material is degreased with Okure Pharmaceutical Co., Ltd. A-screen A-220 (building bath concentration 50 g / L, temperature 50 ° C., immersion time 5 minutes), washed with water and then sodium hydroxide (concentration 200 g / L, temperature) 70 to 75 ° C.) and PBT enchant TR (concentration 200 ml / L, immersion time 20 minutes) manufactured by Okuno Pharmaceutical Co., Ltd. Thereafter, the substrate was washed with hot water at a temperature of 60 ° C. and an immersion time of 3 minutes, and then concentrated hydrochloric acid (concentration 100 ml / L, room temperature) and TMP neutralizing additive (concentration 20 ml / L, immersion time) manufactured by Okuno Pharmaceutical Co., Ltd. 2 minutes), and after nucleating with catalyst C (concentration 40 ml / L, room temperature) and concentrated hydrochloric acid (concentration 150 ml / L, immersion time 5 minutes) manufactured by Okuno Pharmaceutical Co., Ltd., Okuno Pharmaceutical Industries Electroless silver plating is performed on the polyethylene terephthalate substrate with Muden Silver MGS (MGS-1: 100 ml / L, MGS-2: 400 ml / L, MGS-3: 10 ml / L at room temperature for 10 minutes) manufactured by Co., Ltd. A wiring board was obtained. The thickness of the electroless silver plating was 600 nm.
Examples 2-3
Example 2 uses a slide glass as a base material, Example 3 uses a silicon wafer (250 μm) as a base material, electroless silver plating is performed on each base material by the same method as Example 1, and for wiring A substrate was obtained. For conductivity evaluation, measurement was performed according to JIS K 7194 using a four-terminal four-probe system Loresta-GP (manufactured by Dia Instruments).

実施例1〜3の導電性評価結果はシート抵抗でいずれも0.1〜0.2Ω/□であり、良好な低抵抗を示した。
<エッチング>
実施例1〜3で作成した配線用基板の無電解銀メッキ面に、1mm角の窓を切り取ったメッシュ状テフロン(登録商標)テープを貼付してマスキングをしたのち、30%塩酸中に浸漬してマスキングを施していない部分の無電解銀メッキを除去し、水洗後、マスキングテープを剥し、配線基板としての格子状の無電解銀メッキ基板を得た。
<導電性評価及び透明性評価>
導電性評価は四端子四探針方式JIS−K−7194に準拠して測定した。
The conductivity evaluation results of Examples 1 to 3 were all sheet resistances of 0.1 to 0.2Ω / □, indicating good low resistance.
<Etching>
A mesh Teflon (registered trademark) tape with a 1 mm square window cut off was applied to the electroless silver-plated surface of the wiring board prepared in Examples 1 to 3, and then immersed in 30% hydrochloric acid. Then, the electroless silver plating in the portion not masked was removed, washed with water, and then the masking tape was peeled off to obtain a grid-like electroless silver plating substrate as a wiring substrate.
<Conductivity evaluation and transparency evaluation>
The conductivity evaluation was measured according to a four-terminal four-probe method JIS-K-7194.

実施例1、実施例2、及び実施例3の導電性評価結果は、シート抵抗でそれぞれ0.5Ω/□、2Ω/□、1.3Ω/□であり、良好な低抵抗を示した。   The conductivity evaluation results of Example 1, Example 2, and Example 3 were 0.5Ω / □, 2Ω / □, and 1.3Ω / □, respectively, in terms of sheet resistance, indicating good low resistance.

また、透明性評価は全光線透過率をASTM D−1003に準拠して測定した。   Moreover, transparency evaluation measured the total light transmittance based on ASTMD-1003.

実施例1、実施例2、及び実施例3の全光透過率は、それぞれ85%、88%、90%と、いずれも80%以上であり、良好な透明性を示した。   The total light transmittances of Example 1, Example 2, and Example 3 were 85%, 88%, and 90%, respectively, which were 80% or more, indicating good transparency.

Claims (8)

基材及び湿式メッキ法を用いて形成された導電層を該基材上に含むことを特徴とする配線用基板。   A wiring substrate comprising a base material and a conductive layer formed using a wet plating method on the base material. 前記基材がガラス、プラスチック、及びシリコンウェハからなる群から選ばれる基材であり、該基材上にほぼ全面に導電層が形成されている請求項1記載の配線用基板。   The wiring substrate according to claim 1, wherein the base material is a base material selected from the group consisting of glass, plastic, and a silicon wafer, and a conductive layer is formed on substantially the entire surface of the base material. 前記湿式メッキ法が無電解メッキ法である請求項1又は2の配線用基板。   The wiring substrate according to claim 1 or 2, wherein the wet plating method is an electroless plating method. 前記導電層に用いられる金属種が、金、銀、銅、亜鉛、ニッケル、錫、及びクロムからなる群から選ばれる少なくとも1種である請求項1〜3のいずれか一項記載の配線用基板。   The wiring substrate according to claim 1, wherein the metal species used for the conductive layer is at least one selected from the group consisting of gold, silver, copper, zinc, nickel, tin, and chromium. . 前記基材が透明である請求項1〜4のいずれか一項記載の配線用基板。   The wiring substrate according to claim 1, wherein the base material is transparent. 請求項1〜5のいずれか一項記載の配線用基板から導電層を部分的に除去することにより作成された配線を有する配線基板。   The wiring board which has the wiring produced by removing a conductive layer partially from the wiring board as described in any one of Claims 1-5. 請求項6記載の配線基板を有することを特徴とする集電電極。   A current collecting electrode comprising the wiring substrate according to claim 6. 太陽電池の集電電極である請求項7記載の集電電極。   The current collecting electrode according to claim 7, which is a current collecting electrode for a solar cell.
JP2008126196A 2008-05-13 2008-05-13 Substrate for wiring and wiring substrate Pending JP2009277793A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258803A (en) * 2010-06-10 2011-12-22 Shin Etsu Chem Co Ltd Silicon substrate with plating layer having through holes
CN104132976A (en) * 2014-06-11 2014-11-05 中国科学院长春应用化学研究所 Method for in-situ construction of electrode through electro-depositing super-stable metal thin films on ITO conductive glass surface
JP2016081947A (en) * 2014-10-10 2016-05-16 東レ株式会社 Insulation sheet for solar cell

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63255377A (en) * 1987-04-09 1988-10-21 Seiko Instr & Electronics Ltd Metallic electrode layer on transparent conductive film pattern
JP2005248314A (en) * 2004-03-08 2005-09-15 Toyota Motor Corp Plating method for nonconducting plate
JP2006302530A (en) * 2005-04-15 2006-11-02 Sharp Corp Dye-sensitized solar cell and its manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63255377A (en) * 1987-04-09 1988-10-21 Seiko Instr & Electronics Ltd Metallic electrode layer on transparent conductive film pattern
JP2005248314A (en) * 2004-03-08 2005-09-15 Toyota Motor Corp Plating method for nonconducting plate
JP2006302530A (en) * 2005-04-15 2006-11-02 Sharp Corp Dye-sensitized solar cell and its manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011258803A (en) * 2010-06-10 2011-12-22 Shin Etsu Chem Co Ltd Silicon substrate with plating layer having through holes
CN104132976A (en) * 2014-06-11 2014-11-05 中国科学院长春应用化学研究所 Method for in-situ construction of electrode through electro-depositing super-stable metal thin films on ITO conductive glass surface
JP2016081947A (en) * 2014-10-10 2016-05-16 東レ株式会社 Insulation sheet for solar cell

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