JP2009267173A - Printed circuit board, and manufacturing method thereof - Google Patents

Printed circuit board, and manufacturing method thereof Download PDF

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JP2009267173A
JP2009267173A JP2008116381A JP2008116381A JP2009267173A JP 2009267173 A JP2009267173 A JP 2009267173A JP 2008116381 A JP2008116381 A JP 2008116381A JP 2008116381 A JP2008116381 A JP 2008116381A JP 2009267173 A JP2009267173 A JP 2009267173A
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resist layer
resist
layer
light
wiring board
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JP2009267173A5 (en
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Hidenori Kato
英規 加藤
Taro Yukimasa
太郎 行政
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Shinko Seisakusho KK
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Shinko Seisakusho KK
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  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a printed circuit board, small in the reflection of light from an insulating layer (resist layer) on the surface of a printed circuit board, small in the undercut of an opening of an insulating layer pattern formed so as to eliminate a spot or discoloration occurring on the mounting pad at the opening, and suitable for the mounting of a semiconductor chip for imaging. <P>SOLUTION: A manufacturing method of the printed circuit board includes a process for forming a first resist layer 2 on a substrate 3 with a wiring 4 formed thereon, a process for forming a second resist layer 1 on the first resist layer 2, an exposing process for simultaneously curing the first and second resist layers employing a predetermined mask, a developing process for simultaneously resolving the uncured parts of the first and second resist layers and a process for effecting post cure, while the second resist layer is a black resist layer for suppressing the reflection of light. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、プリント配線基板に関し、特に基板表面に光の反射を抑えるための黒色の絶縁層を有するプリント配線基板に関する。   The present invention relates to a printed wiring board, and more particularly to a printed wiring board having a black insulating layer for suppressing light reflection on the surface of the board.

従来、プリント配線基板には、表層の絶縁層(ソルダーレジスト)に、主として緑色又は黄色の感光性樹脂、或いは熱硬化性のエポキシ系の樹脂を使用してきた。そのため、その表面は光を反射しやすくCCDやCMOSなどの撮像用半導体チップが搭載された場合、チップの受光部に搭載部周囲の絶縁層から反射する光が取り込まれてハレーションを引き起こし、鮮明な画像を得ることが困難であった。
そこで、絶縁層を形成する樹脂に無機フィラーや顔料などを添加することで、絶縁層表面の光の反射を抑え、撮像用チップの受光部へ不要な光の侵入を防止していた。
Conventionally, a printed wiring board has mainly used a green or yellow photosensitive resin or a thermosetting epoxy resin for a surface insulating layer (solder resist). Therefore, when an imaging semiconductor chip such as a CCD or CMOS is easily mounted on the surface of the chip, light reflected from the insulating layer around the mounting portion is taken into the light receiving portion of the chip, causing halation, and clear. It was difficult to obtain an image.
Therefore, by adding an inorganic filler, a pigment, or the like to the resin forming the insulating layer, reflection of light on the surface of the insulating layer is suppressed, and unnecessary light intrusion to the light receiving portion of the imaging chip is prevented.

近年、プリント配線基板の高密度化により、プリント配線基板表面の絶縁層パターンにおいても高密度に部品の実装ができる微細なパターンが要求されている。   In recent years, with the increase in the density of printed wiring boards, there has been a demand for fine patterns capable of mounting components at high density even in the insulating layer pattern on the surface of the printed wiring board.

しかしながら、感光性の樹脂で形成される絶縁層に、光の反射を抑えるために顔料を添加した樹脂やフィラーを多く含む樹脂を使用した場合、フォトリソグラフィ工程の露光において、紫外線が樹脂内部にまで十分届かないため光重合反応による硬化が不十分となり、次工程のパターン現像により所定のパターンに形成された絶縁層の剥離、又は大きなアンダーカットが生じたりするなどの不具合が生じ、高密度実装用のプリント配線基板に要求される絶縁層パターンを実現できないという不具合が発生していた。
このアンダーカットの部分には、製造工程の薬液成分などが残留し易く、実装パッドにシミや変色を生じさせ、外観不良となったり、半導体チップを実装する組立工程での実装不良を引き起こす要因となっていた。
However, when an insulating layer made of a photosensitive resin uses a resin with a pigment added to suppress reflection of light or a resin containing a large amount of filler, ultraviolet rays are exposed to the inside of the resin during exposure in the photolithography process. Because it does not reach enough, curing due to photopolymerization reaction becomes insufficient, and there is a problem such as peeling of the insulating layer formed in the predetermined pattern or large undercut due to pattern development in the next process, for high density mounting There has been a problem that the insulating layer pattern required for the printed wiring board cannot be realized.
In this undercut part, chemical components in the manufacturing process are likely to remain, causing spots and discoloration on the mounting pad, resulting in poor appearance and mounting defects in the assembly process of mounting the semiconductor chip. It was.

特に、光の反射を抑える効果が高く、視認性の良い(例えば、特許文献1参照)黒色の感光性レジストを用いた場合では、紫外線の透過性が他の緑色、赤色、黄色、藍色等の感光性レジストに比較して弱く、レジスト層深部にまで紫外線が届かずレジスト層最下部において光重合反応による硬化が進み難く、大きなアンダーカットの発生や絶縁層の剥離などの不具合原因となっていた。   In particular, when a black photosensitive resist having a high effect of suppressing reflection of light and having good visibility (see, for example, Patent Document 1) is used, the transmittance of ultraviolet rays is other green, red, yellow, indigo, etc. It is weak compared to other photosensitive resists, ultraviolet rays do not reach the deep part of the resist layer, and it is difficult for the photopolymerization to cure at the bottom of the resist layer, causing problems such as large undercuts and peeling of the insulating layer. It was.

そこで、この黒色の感光性レジストを用いた場合のアンダーカット量を低減する方法として、光透過性の高い400〜500nmの波長を含む紫外線により露光すると共に、波長を変更したことによる温度上昇の対策として露光装置内の冷却を行なうプリント配線基板の製造方法が特許文献2に開示されている。
特開平11−115598号公報 特開2003−29417号公報
Therefore, as a method of reducing the amount of undercut when this black photosensitive resist is used, measures against temperature rise caused by changing the wavelength while exposing with ultraviolet light having a wavelength of 400 to 500 nm having high light transmittance. Patent Document 2 discloses a method of manufacturing a printed wiring board that cools an exposure apparatus.
Japanese Patent Laid-Open No. 11-115598 JP 2003-29417 A

しかしながら、露光装置内を冷却して光透過性の高い波長の紫外線を用いる特許文献2の方法では、たとえ露光装置内の冷却を行なったとしてもプリント配線基板の温度を完全に均一に抑えることはできず、プリント配線基板自体に熱損傷を与えてしまう恐れがある。
又、特許文献1には、良好な視認性を得られることは示されているが、その形態がランド、銅箔パターン及び第1のレジスト印刷を覆うように設けられているため、感光性レジストを硬化させた場合の過剰なアンダーカットの発生、レジスト層の剥離などの不具合を起こすことは無く、従って本発明において課題となっている不具合に対しては何も示されていない。
However, in the method of Patent Document 2 in which the inside of the exposure apparatus is cooled and ultraviolet rays having a high light transmittance are used, even if the inside of the exposure apparatus is cooled, the temperature of the printed wiring board can be suppressed completely uniformly. The printed wiring board itself may be damaged by heat.
Further, Patent Document 1 shows that good visibility can be obtained, but since the form is provided so as to cover the land, the copper foil pattern, and the first resist printing, the photosensitive resist No problems such as the occurrence of excessive undercuts and peeling of the resist layer are caused when the curable resin is cured. Therefore, nothing is indicated for the problems that are problems in the present invention.

このような状況に鑑み本発明は、プリント配線基板表面の絶縁層(レジスト層)からの光の反射が少なく、形成した絶縁層パターン開口部のアンダーカットが小さく、開口部の実装パッドに生じるシミや変色の無い撮像用半導体チップの実装に適したプリント配線基板を提供する。   In view of such a situation, the present invention has little reflection of light from the insulating layer (resist layer) on the surface of the printed wiring board, the undercut of the formed insulating layer pattern opening is small, and the stain generated on the mounting pad of the opening is small. Provided is a printed wiring board suitable for mounting an imaging semiconductor chip without any discoloration.

本発明の第一の発明は、配線が形成された基板に、第1の感光性レジストを塗布、乾燥して第1レジスト層を形成する工程と、この第1レジスト層上に第2の感光性レジストを塗布、乾燥して第2レジスト層を形成する工程と、所定のマスクを用いて第1及び第2レジスト層を同時に硬化する露光工程と、第1及び第2レジスト層の未硬化部分を同時に溶解する現像工程と、ポストキュアを行なう工程とを含み、第2レジスト層が光の反射を抑制する黒色レジスト層であるプリント配線基板の製造方法で、更に第1レジスト層の紫外線透過率は、第2レジスト層の紫外線透過率より高いレジスト層であるプリント配線基板の製造方法である。   According to a first aspect of the present invention, there is provided a step of applying a first photosensitive resist to a substrate on which wiring is formed and drying to form a first resist layer, and a second photosensitive layer on the first resist layer. A step of applying and drying a conductive resist to form a second resist layer, an exposure step of simultaneously curing the first and second resist layers using a predetermined mask, and an uncured portion of the first and second resist layers A method for producing a printed wiring board, wherein the second resist layer is a black resist layer that suppresses reflection of light, and further includes an ultraviolet transmittance of the first resist layer. These are the manufacturing methods of the printed wiring board which is a resist layer higher than the ultraviolet transmittance of a 2nd resist layer.

本発明の第二の発明は、配線が形成された基板と、この基板上に設けられる第1レジスト層と、第1レジスト層上に設けられる第2レジスト層とを備え、第1レジスト層は第2レジスト層の紫外線透過率より高い紫外線透過率を有する絶縁層で、第2レジスト層は光の反射を抑制する層表面を有する絶縁層であるプリント配線基板であり、この第2レジスト層の光の反射を抑制する層表面が、光を吸収する色彩の層表面、或いは乱反射を起こす形状の層表面であることを特徴とし、更に第2レジスト層の光の反射を抑制する層表面が、黒色の層表面であることを特徴とするものである。   A second invention of the present invention comprises a substrate on which wiring is formed, a first resist layer provided on the substrate, and a second resist layer provided on the first resist layer, wherein the first resist layer is The second resist layer is an insulating layer having an ultraviolet transmittance higher than that of the second resist layer, and the second resist layer is a printed wiring board having an insulating layer surface that suppresses reflection of light. The layer surface that suppresses the reflection of light is a layer surface of a color that absorbs light, or a layer surface that causes irregular reflection, and the layer surface that suppresses the reflection of light of the second resist layer, It is a black layer surface.

本発明に係るプリント配線基板は、その表面の絶縁層(第2レジスト層)から光の反射が少なく、絶縁層パターン開口部のアンダーカットが小さく、且つその開口部の実装パッドに生じるシミや変色の発生が無く、撮像用半導体チップの実装に適したプリント配線基板である。   The printed wiring board according to the present invention has little reflection of light from the insulating layer (second resist layer) on the surface thereof, the undercut of the opening of the insulating layer pattern is small, and a stain or discoloration generated on the mounting pad of the opening The printed wiring board is suitable for mounting an imaging semiconductor chip.

以下、図を用いて本発明を詳細に説明する。
図1は、本発明の2層の絶縁層を有するプリント配線基板の部分断面図である。
図2は、絶縁層パターン開口部の拡大模式断面図で、(a)は本発明に係る2層のレジスト層からなるもので、(b)は従来の1層のレジスト層からなるものである。
図1から図2において、1は第2レジスト層(絶縁層)、1aは従来の1層のレジスト層、2は第1レジスト層(絶縁層)、3は樹脂基材、4は実装パッド、10はプリント配線基板、d、dはアンダーカット量である。
Hereinafter, the present invention will be described in detail with reference to the drawings.
FIG. 1 is a partial cross-sectional view of a printed wiring board having two insulating layers according to the present invention.
FIG. 2 is an enlarged schematic cross-sectional view of the opening portion of the insulating layer pattern, wherein (a) is composed of two resist layers according to the present invention, and (b) is composed of one conventional resist layer. .
1 to 2, 1 is a second resist layer (insulating layer), 1a is a conventional resist layer, 2 is a first resist layer (insulating layer), 3 is a resin substrate, 4 is a mounting pad, 10 is a printed wiring board, and d 0 and d 1 are undercut amounts.

図1並びに図2(a)に示される本発明は、第1レジスト層となる第1の感光性レジストを塗布して仮乾燥させたプリント配線基板上に、第2レジスト層となる光の反射を抑制する色彩の黒色となる第2の感光性レジストを塗布して仮乾燥させる。次いで、紫外線で所定のマスクを通して露光した後、パターン現像を行い、2つの感光性レジストを完全に硬化させるためポストキュアを実施する。最終的に基板表面の絶縁層であるレジスト層が2層構造となり、開口部のアンダーカットd(図2(a))が、従来のアンダーカットd(図2(b))より小さいプリント配線基板となる。 The present invention shown in FIG. 1 and FIG. 2 (a) reflects light that becomes a second resist layer on a printed wiring board that has been first dried by applying a first photosensitive resist that becomes a first resist layer. A second photosensitive resist that has a black color to suppress the above is applied and temporarily dried. Next, after exposure through a predetermined mask with ultraviolet rays, pattern development is performed, and post-cure is performed in order to completely cure the two photosensitive resists. Finally, the resist layer, which is an insulating layer on the substrate surface, has a two-layer structure, and the undercut d 0 (FIG. 2A) of the opening is smaller than the conventional undercut d 1 (FIG. 2B). It becomes a wiring board.

第1レジスト層上に第2レジスト層を設ける2段階でのレジスト層形成により、絶縁層としての充分な厚みを有するレジスト層が形成されると共に、上層となる第2レジスト層よりも、下層の第1レジスト層の方が、紫外線の透過率が高いために、上層から透過してくる紫外線量が少量であっても、下層の第1レジスト層最下部における硬化反応が進行し、充分に硬化するので、パターン現像による絶縁層の開口部に形成されるアンダーカットの量を小さくでき、従って実装パッド上に不純物残渣が残らないプリント配線基板を作製できる。
これらのレジスト層の層厚みについては、第1レジスト層の厚みを、第2レジスト層の厚みと同じ厚み、或いはした方が好ましい。
By forming the resist layer in two stages by providing the second resist layer on the first resist layer, a resist layer having a sufficient thickness as an insulating layer is formed, and a lower layer than the second resist layer serving as an upper layer is formed. Since the first resist layer has a higher ultraviolet transmittance, the curing reaction proceeds at the lowermost first resist layer even if the amount of ultraviolet light transmitted from the upper layer is small. Therefore, the amount of undercut formed in the opening of the insulating layer by pattern development can be reduced, and thus a printed wiring board can be produced in which no impurity residue remains on the mounting pad.
Regarding the layer thicknesses of these resist layers, it is preferable that the thickness of the first resist layer is the same as or the same as the thickness of the second resist layer.

又、第2レジスト層は、光の反射を抑制する層表面を有している。このような層表面としては、光を吸収する色彩の層表面、特に黒色を代表とする光を吸収する度合いの高い色の層表面が好ましく、或いは乱反射を起こしやすい不規則な表面凹凸を有する層表面が挙げられる。
尚第2レジスト層は、層表面のみが光の反射を抑制する構成だけでなく、層表面を含むレジスト層全体が、絶縁層であるなら光の反射を抑制する構成となっていても良い。
以下、実施例を用いて説明する。
The second resist layer has a layer surface that suppresses reflection of light. As such a layer surface, a layer surface of a color that absorbs light, particularly a layer surface of a color that absorbs light, typically black, is preferable, or a layer having irregular surface irregularities that easily cause irregular reflection. Surface.
The second resist layer may be configured not only to suppress light reflection only on the layer surface but also to suppress light reflection if the entire resist layer including the layer surface is an insulating layer.
Hereinafter, description will be made using examples.

配線が形成されたガラス/ビスマレイミド−トリアジン積層基板上に、第1の感光レジストとして紫外線透過率29.5%の感光性レジスト(太陽インキPSR−4000AUS308(緑色))を膜厚20μmとなるように塗布して85℃で25分間乾燥させて第1のレジスト層を形成した後、このレジスト上に第2の感光性レジストとして紫外線透過率7.3%の感光性レジスト(太陽インキPSR−4000EG23(黒色))を膜厚が20μmとなるように塗布して85℃で35分間乾燥させて第2のレジスト層を形成した。   A photosensitive resist (solar ink PSR-4000AUS308 (green)) having an ultraviolet transmittance of 29.5% is used as the first photosensitive resist on the glass / bismaleimide-triazine laminated substrate on which the wiring is formed so as to have a film thickness of 20 μm. And a first resist layer is formed at 85 ° C. for 25 minutes to form a first resist layer, and then a photosensitive resist (solar ink PSR-4000EG23 having an ultraviolet transmittance of 7.3%) is formed on the resist as a second photosensitive resist. (Black)) was applied to a film thickness of 20 μm and dried at 85 ° C. for 35 minutes to form a second resist layer.

次いで、1200mj/cm紫外線で所定のネガフィルムマスクを通して露光した後、40℃の1wt%炭酸ナトリウム水溶液にて1分間スプレー現像を実施した。更にレジスト層を完全に硬化させるため150℃で40分間のポストキュアを施し、表面絶縁層が2層構造で、上層側の絶縁層が黒色のプリント配線基板を作製した。 Next, after exposure through a predetermined negative film mask with 1200 mj / cm 2 ultraviolet rays, spray development was performed for 1 minute with a 1 wt% sodium carbonate aqueous solution at 40 ° C. Further, a post-cure was performed at 150 ° C. for 40 minutes to completely cure the resist layer, and a printed wiring board having a surface insulating layer having a two-layer structure and a black upper insulating layer was produced.

このプリント配線基板の一部を切り取り、形成した2層の絶縁層の開口部を断面観察すると、アンダーカット量(d)は平均8μmであり、開口部に要求される10μm未満を満足していた。
又、このプリント配線基板にNi−Auめっきを施し、外観検査を実施したところ、絶縁層の開口部にある実装パッドの表面には、シミや変色などの不具合は確認されず、良好な表面状態を示した。
When a part of this printed wiring board is cut out and the opening of the two insulating layers formed is cross-sectionally observed, the amount of undercut (d 0 ) is 8 μm on average and satisfies the requirement of less than 10 μm for the opening. It was.
Moreover, when Ni-Au plating was applied to this printed wiring board and appearance inspection was performed, defects such as spots and discoloration were not confirmed on the surface of the mounting pad in the opening of the insulating layer, and the surface condition was good. showed that.

次に、このプリント配線基板をIPC/JEDEC Standard J−STD−020 moisture soak level2に従って前処理後、260℃の溶融鉛共晶はんだ上で30秒フロートさせて耐熱試験を実施し、絶縁層の剥離などを観察したが、剥離などの不良は確認されず、良好な密着状態を示していた。   Next, this printed wiring board was pretreated in accordance with IPC / JEDEC Standard J-STD-020 moisture soak level 2 and then floated on a molten lead eutectic solder at 260 ° C. for 30 seconds to perform a heat resistance test, and the insulation layer was peeled off. However, defects such as peeling were not confirmed, indicating a good adhesion state.

(比較例)
比較のために、膜厚が40μmになるように紫外線透過率7.3%の感光性レジスト(太陽インキPSR−4000EG23(黒色))を塗布して85℃で60分間乾燥させて1層のレジスト層とした以外は実施例1と同様の手順でプリント配線基板を作製した。
(Comparative example)
For comparison, a photosensitive resist (solar ink PSR-4000EG23 (black)) with an ultraviolet transmittance of 7.3% is applied to a film thickness of 40 μm and dried at 85 ° C. for 60 minutes to form a single layer resist. A printed wiring board was produced in the same procedure as in Example 1 except that the layers were used.

作製したプリント配線基板の断面観察を実施し、アンダーカット量(d)を測定したが、本発明例の5倍近い平均40μmであり、要求精度である10μm未満を遥かに満足していなかった。又、Ni−Auめっきを施した後、外観検査を実施したところ製造工程で使用した薬品の残留によると見られる実装パッド上にめっきシミが確認され、撮像用半導体チップを搭載するプリント配線基板として用いることは困難であった。 The cross section of the produced printed wiring board was observed, and the undercut amount (d 1 ) was measured. The average was 40 μm, nearly five times that of the example of the present invention, and the required accuracy was less than 10 μm. . In addition, after performing the appearance inspection after applying Ni-Au plating, plating stains are confirmed on the mounting pad that seems to be due to the residue of chemicals used in the manufacturing process, and as a printed wiring board on which the imaging semiconductor chip is mounted It was difficult to use.

本発明の2層のレジスト層(絶縁層)を有するプリント配線基板の部分断面図である。It is a fragmentary sectional view of the printed wiring board which has two resist layers (insulating layer) of this invention. 絶縁層パターン開口部の拡大模式断面図で、(a)は本発明に係る2層のレジスト層からなるもので、(b)は従来の1層のレジスト層からなるものである。It is an expansion schematic sectional drawing of an insulating-layer pattern opening part, (a) consists of two resist layers which concern on this invention, (b) consists of one conventional resist layer.

符号の説明Explanation of symbols

1 第2レジスト層:上層側(絶縁層)
1a 従来の1層のレジスト層
2 第1レジスト層:下層側(絶縁層)
3 樹脂基材
4 実装パッド
10 プリント配線基板
、d アンダーカット量
1 Second resist layer: Upper layer side (insulating layer)
1a Conventional resist layer 2 First resist layer: lower layer side (insulating layer)
3 Resin base material 4 Mounting pad 10 Printed wiring board d 0 , d 1 Undercut amount

Claims (5)

配線が形成された基板に第1の感光性レジストを塗布、乾燥して第1レジスト層を形成する工程と、
前記第1レジスト層上に第2の感光性レジストを塗布、乾燥して第2レジスト層を形成する工程と、
所定のマスクを用いて前記第1及び第2レジスト層を同時に硬化する露光工程と、
前記第1及び第2レジスト層の未硬化部分を同時に溶解する現像工程と、
ポストキュアを行なう工程とを含み、
前記第2レジスト層が、光の反射を抑制する黒色のレジスト層であることを特徴とするプリント配線基板の製造方法。
Applying a first photosensitive resist to a substrate on which wiring is formed, and drying to form a first resist layer;
Applying a second photosensitive resist on the first resist layer and drying to form a second resist layer;
An exposure step of simultaneously curing the first and second resist layers using a predetermined mask;
A developing step of simultaneously dissolving uncured portions of the first and second resist layers;
Including post-cure process,
The method of manufacturing a printed wiring board, wherein the second resist layer is a black resist layer that suppresses reflection of light.
前記第1レジスト層の紫外線透過率が、前記第2レジスト層の紫外線透過率より高いことを特徴とする請求項1に記載のプリント配線基板の製造方法。   The method for manufacturing a printed wiring board according to claim 1, wherein the ultraviolet transmittance of the first resist layer is higher than the ultraviolet transmittance of the second resist layer. 配線が形成された基板と、
前記基板上に設けられる第1レジスト層と、
前記第1レジスト層上に設けられる第2レジスト層と、
を備え、
前記第1レジスト層は、前記第2レジスト層の紫外線透過率より高い紫外線透過率を有する絶縁層で、
前記第2レジスト層は、絶縁層且つ光の反射を抑制する層表面を有する絶縁層で、
あることを特徴とするプリント配線基板。
A substrate on which wiring is formed;
A first resist layer provided on the substrate;
A second resist layer provided on the first resist layer;
With
The first resist layer is an insulating layer having an ultraviolet transmittance higher than that of the second resist layer,
The second resist layer is an insulating layer and an insulating layer having a layer surface that suppresses reflection of light,
A printed wiring board characterized by being.
前記第2レジスト層の光の反射を抑制する層表面が、光を吸収する色彩の面、或いは乱反射を起こす形状の面であることを特徴とする請求項3に記載のプリント配線基板。   The printed wiring board according to claim 3, wherein the surface of the second resist layer that suppresses light reflection is a color surface that absorbs light or a surface that causes irregular reflection. 前記第2レジスト層の光の反射を抑制する層表面が、黒色の表面であることを特徴とする請求項3に記載のプリント配線基板。   The printed wiring board according to claim 3, wherein the layer surface that suppresses the reflection of light of the second resist layer is a black surface.
JP2008116381A 2008-04-25 2008-04-25 Printed circuit board, and manufacturing method thereof Pending JP2009267173A (en)

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JP2009267173A5 JP2009267173A5 (en) 2010-07-08

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10798825B2 (en) 2018-11-13 2020-10-06 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05127017A (en) * 1991-11-07 1993-05-25 Toyo Ink Mfg Co Ltd Production of color filter
JP2000321762A (en) * 1999-05-13 2000-11-24 Hitachi Chem Co Ltd Production of resist pattern, formation of barrier rib of plasma display panel and production of plasma display panel
JP2002176199A (en) * 2000-12-07 2002-06-21 Eito Kogyo:Kk Substrate for mounting led and its manufacturing method
JP2007086268A (en) * 2005-09-21 2007-04-05 Toray Ind Inc Photosensitive sheet

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05127017A (en) * 1991-11-07 1993-05-25 Toyo Ink Mfg Co Ltd Production of color filter
JP2000321762A (en) * 1999-05-13 2000-11-24 Hitachi Chem Co Ltd Production of resist pattern, formation of barrier rib of plasma display panel and production of plasma display panel
JP2002176199A (en) * 2000-12-07 2002-06-21 Eito Kogyo:Kk Substrate for mounting led and its manufacturing method
JP2007086268A (en) * 2005-09-21 2007-04-05 Toray Ind Inc Photosensitive sheet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10798825B2 (en) 2018-11-13 2020-10-06 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

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