JP2009260761A - Digital broadcast receiver, and decoder control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform timeout processing appropriate for speedily carrying out decode processing. <P>SOLUTION: A digital broadcast receiver includes: a decoder for decoding a received digital broadcast signal; and a control unit for setting a timeout time of decode processing to the decoder, the control unit being configured to reset the decoder for setting again a longer timeout time than the last timeout time in a case where decode processing is not successful within the set timeout time, and to cause the decoder to retry the decode processing. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a digital broadcast receiver capable of receiving a digital broadcast signal and a control method for a decoder for decoding the digital broadcast signal.

  In recent years, it has become common to process and manage audio and video in digital format in audio equipment and video equipment. The trend of digital encoding of audio and video in such audio equipment has spread to the broadcasting related industry. Digital broadcasting systems using digital encoding technology that are currently in practical use include, for example, XM Satellite Radio, Sirius Satellite Radio, IBOC (In Band On Channel), DAB (Digital Audio Broadcasting), DMB (Digital Multimedia Broadcasting) ISDB-T (Integrated Services Digital Broadcasting-Terrestrial).

  An example of a digital broadcast receiver for viewing such a digital broadcast service is disclosed in Patent Document 1. The digital broadcast receiver disclosed in Patent Document 1 has a configuration that conforms to the ISDB-T system or the like. The digital broadcast receiver performs high-accuracy channel search at high speed using various signals obtained in the process of demodulating and decoding the broadcast signal.

  By the way, unlike an analog broadcast receiver, a digital broadcast receiver needs to perform complicated processing in a decoder that decodes a demodulated signal. Specific processing performed by the decoder includes error correction processing of a multiplexed data stream, separation processing, decoding of each separated stream, lip sync, and the like. Furthermore, in digital broadcasting, as the transmission speed is increased due to the development of information transmission technology, there is a background that the capacity of broadcasted services will be increased in the future. The decoder is designed to be more complicated in order to process a large-capacity broadcast service.

  As the decoder is designed to be complex, potential decoder bugs increase. Developers debug in the testing process and resolve any bugs found. However, since there is no way to prove that the bug is absolutely nonexistent, it is virtually impossible to eliminate the bug completely from a complicated decoder.

If bugs remain in the decoder, for example, if the quality of the received signal deteriorates and decoding errors occur frequently, the decoding process may take an excessive amount of time due to the bugs. In some cases, the decoding process may not be completed. When these phenomena occur, the decoder is reset, that is, the data stream buffered in the decoder is discarded and the decoder setting is returned to the default. Then, after the reset, the above-mentioned problem may be solved by causing the decoder to retry the decoding process. For this reason, a fixed timeout time is usually set in the decoder. The decoder is reset when a certain timeout time elapses after a decoding error occurs, and retry the decoding process.
JP 2004-266658 A

  However, it is difficult to appropriately and appropriately set the timeout time. For example, when the timeout time is set short, the decoder may be reset before the decoding process succeeds when the decoding process takes longer time than normal due to a decoding error or the like. In this case, the reset and retry are repeatedly executed, and the decoding process is not completed. If the timeout time is set to be long, the above-described adverse effects can be eliminated. However, there is a disadvantage that the decoding process takes longer time than when the time-out time is short if the decoding will succeed quickly once reset.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a digital broadcast receiver and a decoder control method for performing a timeout process suitable for promptly executing a decoding process. It is in.

  A digital broadcast receiver capable of receiving a digital broadcast signal according to an embodiment of the present invention that solves the above problems includes a decoder that decodes the received digital broadcast signal, and a control unit that sets a timeout time for decoding processing for the decoder And have. The control unit is configured to reset the decoder to reset a longer timeout time than the previous time and to cause the decoder to retry the decoding process when the decoding process is not successful within the set timeout period. The

  As described above, the digital broadcast receiver according to the present invention is configured to increase the timeout time according to the time required for the decoding process. Therefore, by setting the timeout time to be initially short, an advantageous effect is obtained in that the time required for the decoding process can be reduced as a result when the decoding process succeeds quickly once the decoder is reset. In addition, since the timeout time gradually increases, it is possible to effectively avoid the adverse effects of repeated resetting and retrying of the decoder that may occur when the timeout time is short.

  The digital broadcast receiver according to the present invention may further include a channel selection operation unit that receives a channel selection operation by a user. In the digital broadcast receiver configured as described above, when the channel selection operation is performed, the control unit sets a timeout time for the decoder, and executes a decoding process for the channel selected by the channel selection operation. Request.

  In addition, the digital broadcast receiver according to the present invention may further include a channel information holding unit that holds information on a channel that was last selected at the time of previous use. In the digital broadcast receiver configured as described above, the control unit sets a timeout time for the decoder immediately after power-on, and requests execution of decoding processing based on the channel information held in the channel information holding unit. To do.

  Here, the broadcast radio wave attenuates as the digital broadcast receiver moves away from the broadcast station. Therefore, the time-out period may be set according to the distance from the broadcasting station of the digital broadcast receiver. In order to realize such setting according to the distance of the timeout time, the digital broadcast receiver according to the present invention may further include a position calculating unit that calculates the current position. In such a configuration, the control unit can set the timeout time based on the calculated current position and the position of the broadcasting station corresponding to the selected channel. The longer the digital broadcast receiver is away from the broadcast station, the longer the timeout time is set.

  In addition, a method for controlling a decoder for decoding a digital broadcast signal according to an aspect of the present invention that solves the above problems includes a decoding step for decoding the digital broadcast signal by the decoder, and a timeout for setting a timeout time for decoding processing for the decoder. A time setting step, a reset step for resetting the decoder when the decoding process is not successful within the set time-out time, a time-out time resetting step for resetting a time-out time longer than the previous time to the reset decoder, A decoding process retry step for causing the decoder whose timeout time is reset to retry the decoding process.

  Thus, in the decoder control method according to the present invention, the timeout time is increased according to the time required for the decoding process. Therefore, by setting the timeout time to be short initially, there is an advantageous effect that the time required for the decoding process can be reduced as a result when the decoding process succeeds quickly once the decoder is reset. In addition, since the timeout time gradually increases, it is possible to effectively avoid the adverse effects of repeated resetting and retrying of the decoder that may occur when the timeout time is short.

  The decoder control method according to the present invention may further include a position calculating step for calculating a current position. In this case, in the timeout time setting step, the timeout time is set based on the calculated current position and the position of the broadcasting station corresponding to the selected channel.

  According to the present invention, the timeout time is increased according to the time required for the decoding process. Therefore, by setting the timeout time to be initially short, an advantageous effect is obtained in that the time required for the decoding process can be reduced as a result when the decoding process succeeds quickly once the decoder is reset. In addition, since the timeout time gradually increases, it is possible to effectively avoid the adverse effects of repeated resetting and retrying of the decoder that may occur when the timeout time is short.

  Hereinafter, a digital broadcast receiver according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram illustrating a configuration of a digital broadcast receiver 100 according to the present embodiment. The digital broadcast receiver 100 is an in-vehicle digital broadcast receiver, is designed in conformity with a digital radio broadcast of a predetermined system, and is configured to receive and process a broadcast signal in a signal format of the system. Yes. XM Satellite Radio, Sirius Satellite Radio, IBOC, DAB, etc. are assumed for the digital radio broadcast of a predetermined system.

  As shown in FIG. 1, the blocks of the digital broadcast receiver 100 are connected to each other via a system bus 10. Each block accesses necessary hardware via the system bus 10 after the digital broadcast receiver 100 is powered on. For example, immediately after the digital broadcast receiver 100 is turned on, a CPU (Central Processing Unit) 20 accesses a ROM (Read-Only Memory) 22. The CPU 20 calls the firmware stored in the ROM 22 and develops it in a work area of a RAM (Random-Access Memory) 24 to activate the system of the digital broadcast receiver 100. As a result, the blocks operate in conjunction with each other as necessary to execute processing, and the selected digital radio broadcast is reproduced.

  The digital radio broadcast selected immediately after the power is turned on is a broadcast corresponding to the channel that was last selected at the time of previous use (hereinafter referred to as “last channel”). The last channel information is held in the flash ROM 26. Further, after the power is turned on, the user operates the operation panel 44 as necessary to select a channel. The information of the last channel is overwritten with the information of the channel selected by the channel selection operation. When executing PLL (Phase Locked Loop) control on the tuner 32, the CPU 20 refers to information on the last channel held in the flash ROM 26 or the channel overwritten according to the channel selection operation.

  The digital broadcast receiver 100 processes and reproduces the digital radio broadcast signal as follows. That is, the digital broadcast receiver 100 receives radio waves with the antenna 30 and outputs them to the tuner 32. The tuner 32 performs a PLL operation based on the channel information held in the flash ROM 26 and extracts an RF (Radio Frequency) signal of the selected channel from the received radio wave. Then, the extracted RF signal is frequency-converted to an intermediate frequency suitable for signal processing such as filtering. The tuner 32 amplifies the IF (Intermediate Frequency) signal obtained by the frequency conversion of the RF signal to a preset intensity, performs A / D conversion, and outputs the signal to the demodulation circuit 34.

  Here, the transmission system of digital radio broadcasting is generally OFDM (Orthogonal Frequency Division Multiplex) which has high frequency utilization efficiency and is resistant to multipath fading. Accordingly, the digital radio broadcast received and processed by the digital broadcast receiver 100 is also assumed to be an OFDM-modulated broadcast signal. Therefore, the demodulator 34 orthogonally demodulates the IF signal from the tuner 32, establishes reception synchronization suitable for the guard interval length or the like by synchronous reproduction, converts it to a transport stream (TS), and converts it into a decoder. 36. At the timing when the channel selection channel is set or changed immediately after the power is turned on or at the time of channel selection operation, a decoding process execution request from the CPU 20 is input to the decoder 36 together with the transport stream.

  The decoder 36 includes a TS decoder 36a and an audio decoder 36b. The transport stream output from the demodulator 34 is input to the TS decoder 36a. Then, processing corresponding to the execution request is executed in the decoder 36. Specifically, the TS decoder 36a decodes an error correction code included in the transport stream, and performs error correction processing on the transport stream. Next, the error-corrected transport stream is separated into an audio stream and accompanying data. The separated audio stream is output to the audio decoder 36b. The audio decoder 36b decodes the audio stream at a timing according to the time stamp added to the audio stream, converts the audio stream into audio data, and outputs the audio data to the D / A converter 38. The audio data is D / A converted by the D / A converter 38 and reproduced from the speaker 50 as sound. When the conversion from the transport stream to the audio data is successful, the decoder 36 transmits a decoding success notification to the CPU 20.

  The incidental data separated by the TS decoder 36a is, for example, information such as the name of a provider that provides a broadcast service, the name of a song being broadcast, and the name of an artist, and is temporarily transferred to the RAM 24. The auxiliary data transferred to the RAM 24 is analyzed by the CPU 20 and then subjected to image processing by the image processing unit 42. Then, after the image processing, it is displayed on the display 60 as supplementary information regarding the radio broadcast being reproduced.

  By the way, in broadcasting systems such as XM Satellite Radio, Sirius Satellite Radio, IBOC, and DAB, the baseband signal is primarily modulated by QPSK (Quadrature Phase Shift Keying) with a long symbol length, and is strong against multipath fading. Suitable for reception. However, the quality of received signals may be significantly reduced in places where high-rise buildings are dense and where the influence of multipath fading is strong, or places where reception strength is low because the distance from the broadcast base station is long. Thus, when the received signal is low quality, the transport stream demodulated by the demodulation circuit 34 is also low quality. As a result, decoding errors frequently occur in the decoder 36, and it may take time to decode the transport stream.

  When decoding errors occur frequently as described above, the process of the decoder 36 may be occupied by the error processing routine due to a bug remaining in the decoder 36. At this time, since the process is difficult to be released, there is a problem that it takes an excessively long time to decode the transport stream. In some cases, the decoding process may not be completed.

  The digital broadcast receiver 100 is designed in view of the above circumstances. Specifically, the decoding process is efficiently performed by executing a timeout process described below.

  FIG. 2 is a flowchart of timeout processing executed by the CPU 20. The CPU 20 sets the initial value of the timeout time T to “10” and writes it in the timeout register immediately after the power is turned on or when a channel selection operation by the operation panel 44 is accepted (Step 1, hereinafter in this specification and drawings). Step is abbreviated as “S”).

  Next, the CPU 20 executes the process of S2. In the process of S2, the CPU 20 outputs a decoding process execution request to the decoder 36 when it is immediately after power-on, and executes the decoding process for the last channel held in the flash ROM 26. When a channel selection operation by the operation panel 44 is accepted, a decoding process execution request is output to the decoder 36 to execute the decoding process for the channel selected by the channel selection operation.

  Subsequently, the CPU 20 sets the count value t for time-out detection to the time-out time T, that is, “10” and writes it in the count register (S3). Then, the loop processing after S4 is performed.

  In the process of S4, the CPU 20 determines whether or not the decoding success notification has been received. When the decoding success notification is received (S4: YES), the CPU 20 ends the timeout processing of FIG. 2 because the decoding processing by the decoder 36 has been successful. If the decoding success notification has not been received (S4: NO), the count value t is decremented by 1 (S5). Next, it is determined whether or not the count value t after 1 decrement is larger than 0 (S6).

  In the process of S6, when the count value t is larger than 0 (S6: YES), the CPU 20 waits for a predetermined time (S7). Then, after waiting for a predetermined time, the process returns to the process of S4 and the processes of S4 to S6 are executed again. Unless the decoding process by the decoder 36 is successful, the processes of S4 to S6 are repeatedly executed at intervals of about 1 second. Therefore, the count value t becomes 0 after about 10 seconds have elapsed since the time-out process in FIG.

  In the process of S6, when the count value t becomes 0 (S6: NO), the CPU 20 resets the decoder 36, that is, discards various streams buffered in the TS decoder 36a and the audio decoder 36b and The setting is returned to the default (S8). As a result, each process of the decoder 36 is forcibly released. Next, the value of the timeout time T is incremented by 10, and the incremented timeout time T (that is, T = T + 10) is written to the timeout register (S9). Then, the process returns to the process of S2, and a decoding process execution request is output to the decoder 36 to retry the decoding process after S2. The decoding process of the decoder 36 is executed under a situation where the timeout time T is 10 seconds longer than the previous time.

  According to the timeout process of FIG. 2, the timeout time T is initially set to 10 seconds. Therefore, the decoder 36 retries the decoding process after being reset relatively early and forcibly releasing each process when decoding errors occur frequently and the decoding process takes time. For this reason, if the decoder 36 is reset once and the decoding process succeeds quickly, an advantageous effect is obtained that the time required for the decoding process can be compressed as a result.

  However, even when the decoder 36 is reset and each process is forcibly released, the time required for the decoding process may not change. Conventionally, in order to avoid the inconvenience that is a concern in this case, that is, repeated resetting and retrying of the decoder, the timeout time has to be set long in advance. As a result, the advantageous effects described above cannot be obtained, and decoding processing often takes time. However, according to the time-out process of FIG. 2, the time-out time T is increased for the first time only when it has been found that the decoding process can take time after 10 seconds. Thus, since the digital broadcast receiver 100 has a configuration in which the timeout time T is increased in accordance with the time required for the decoding process, the above advantageous effects can be enjoyed while effectively avoiding the above-mentioned disadvantages. Therefore, a rapid success of the decoding process is achieved.

  The above is the description of the embodiment of the present invention. The present invention is not limited to the above-described configuration, and various modifications can be made within the scope of the technical idea of the present invention. For example, the value of the timeout time T is an example, and an appropriate value is selected according to the broadcasting method, the specification of the receiver, and the like.

  In addition, the digital broadcast receiver according to the present invention can be configured to be compatible with digital television broadcast systems such as DMB and ISDB-T.

  Broadcast radio waves attenuate as the digital broadcast receiver moves away from the broadcast station. Therefore, the initial value and the increase time of the timeout time T may be set according to the distance. In order to realize such a setting according to the distance of the timeout time T, the digital broadcast receiver is equipped with a GPS receiver. The current position of the moving object is calculated by the GPS receiver, and then the distance between the current position and the broadcasting station corresponding to the selected channel is obtained. Based on the distance thus obtained, an initial value and an increase time of the timeout time T are set.

It is a block diagram which shows the structure of the digital broadcast receiver of embodiment of this invention. It is a flowchart figure which shows the timeout process performed in embodiment of this invention.

Explanation of symbols

10 System bus 20 CPU
22 ROM
24 RAM
26 Flash ROM
30 Antenna 32 Tuner 34 Demodulator 36 Decoder 38 D / A Converter 42 Image Processor 44 Operation Panel 50 Speaker 60 Display 100 Digital Broadcasting Receiver

Claims (7)

In a digital broadcast receiver capable of receiving digital broadcast signals,
A decoder that decodes the received digital broadcast signal;
A control unit for setting a time-out period of decoding processing for the decoder;
Have
When the decoding process is not successful within the set time-out time, the control unit resets the decoder to reset a time-out time longer than the previous time, and causes the decoder to retry the decoding process. A digital broadcast receiver characterized by. It further has a channel selection operation unit that receives a channel selection operation by the user,
When the channel selection operation is performed, the control unit sets the timeout time for the decoder, and requests execution of the decoding process for a channel selected by the channel selection operation. The digital broadcast receiver according to claim 1. It further has a channel information holding unit that holds information on the channel that was last selected at the time of previous use,
The control unit sets the timeout time for the decoder immediately after power-on, and requests the execution of the decoding process based on the channel information held in the channel information holding unit. The digital broadcast receiver according to any one of claims 1 and 2. It further has a position calculation unit for calculating the current position,
4. The control unit according to claim 1, wherein the control unit sets the timeout time based on the calculated current position and a position of a broadcasting station corresponding to the selected channel. 5. Digital broadcast receiver.   The digital broadcast receiver according to any one of claims 1 to 4, wherein the digital broadcast receiver is an in-vehicle digital broadcast receiver. In a control method of a decoder for decoding a digital broadcast signal,
A decoding step for decoding the digital broadcast signal by the decoder;
A time-out time setting step for setting a time-out time of the decoding process for the decoder;
A reset step of resetting the decoder if the decoding process is not successful within the set timeout period;
A timeout time resetting step for resetting the reset decoder with a timeout time longer than the previous time;
A decoding process retry step for causing the decoder with the reset timeout time to retry the decoding process;
A decoder control method comprising: A position calculating step for calculating a current position;
The decoder control method according to claim 6, wherein in the timeout time setting step, the timeout time is set based on the calculated current position and a position of a broadcasting station corresponding to the selected channel.

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