JP2009260057A - Silicon carbide semiconductor device, and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a silicon carbide semiconductor device capable of reducing backward leakage current and also suppressing reduction of forward current. <P>SOLUTION: The silicon carbide semiconductor device constituted of: an n-type semiconductor substrate 1; an n<SP>-</SP>type semiconductor layer 2 formed on the surface of the n-type semiconductor substrate 1 and with concentration of n-type impurity lower than that of the n-type semiconductor substrate 1; an n<SP>--</SP>type low impurity concentration layer 3 formed inside the n<SP>-</SP>type semiconductor layer 2 and with concentration of the n-type impurity lower than that of the n<SP>-</SP>type semiconductor layer 2; a p-type embedding area 4 formed by contacting the n<SP>--</SP>type low impurity concentration layer 3 inside the n<SP>-</SP>type semiconductor layer 2, arranged at a predetermined interval in the horizontal direction in the n<SP>-</SP>type semiconductor layer 2 and the whole surface of which is covered with the n<SP>--</SP>type impurity concentration layer 3; and a shot key electrode 5 formed on the surface of the n<SP>-</SP>type semiconductor layer 2. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device made of silicon carbide and a method for manufacturing the same.

  Conventionally, as a semiconductor device for suppressing a reverse leakage current of a Schottky barrier diode, a plurality of p-type semiconductor regions are formed under the Schottky electrode constituting the Schottky barrier diode, and the inside of the Schottky barrier diode is formed. A junction barrier Schottky diode provided with a pn junction is known. In this junction barrier Schottky diode, since the junction area between the Schottky electrode and the n-type semiconductor layer is reduced by the p-type semiconductor region formed under the Schottky electrode, the resistance (on-resistance) when a forward voltage is applied is reduced. In order to solve this problem, a low impurity concentration layer having a low carrier density is provided inside the junction barrier Schottky diode, and the p-type semiconductor region is provided in contact with the low impurity concentration layer. There is a silicon semiconductor device in which a depletion layer generated at a pn junction when a reverse voltage is applied is expanded in a low impurity concentration layer direction, that is, in a horizontal direction to pinch-off a reverse leak current conduction path (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 2-151067 (FIG. 1)

  However, when the structure of the silicon semiconductor device as described above is applied to the silicon carbide semiconductor device as it is, the silicon carbide semiconductor has a carrier density higher than that of the silicon semiconductor and the depletion layer is less likely to spread than the silicon semiconductor. However, there is a problem that the reverse leakage current path cannot be pinched off due to the spread of the depletion layer. In order to pinch-off the current path of the reverse leakage current in the silicon carbide semiconductor device by the depletion layer, it is necessary to reduce the installation interval of the p-type semiconductor region and increase the number of installations compared to the silicon semiconductor device. Thus, if the interval between the p-type semiconductor regions is reduced and the number is increased, the contact area between the Schottky electrode and the n-type semiconductor layer decreases, so that the on-resistance increases, and as a result, the forward current decreases and the desired current decreases. This causes a problem that it is impossible to obtain the characteristics. In particular, since the silicon carbide semiconductor has a characteristic that the forward current is reduced during high-temperature operation, this phenomenon becomes significant in a silicon carbide semiconductor device operated at 200 ° C. or higher.

  The present invention has been made to solve the above problems, and provides a silicon carbide semiconductor device capable of reducing reverse leakage current and suppressing forward current reduction.

  A silicon carbide semiconductor device according to the present invention is formed on a surface of a silicon carbide semiconductor substrate having a first conductivity type impurity having a first conductivity type impurity, and has a first conductivity higher than that of the silicon carbide semiconductor substrate. A first conductivity type silicon carbide semiconductor layer having a low impurity concentration and a first conductivity type formed inside the silicon carbide semiconductor layer and having a first conductivity type impurity concentration lower than that of the silicon carbide semiconductor layer A low impurity concentration silicon carbide layer and a second impurity silicon carbide layer formed in contact with the low impurity concentration silicon carbide layer and spaced apart in the horizontal direction of the silicon carbide semiconductor layer. A silicon carbide semiconductor device comprising a conductive type buried region and a Schottky electrode formed on a surface of the silicon carbide semiconductor layer, wherein the upper surface of the buried region is formed of the silicon carbide semiconductor layer or the low impurity It is characterized in that the covering by the concentration silicon carbide layer.

  According to the silicon carbide semiconductor device of the present invention, the silicon carbide semiconductor device is formed in the first conductivity type silicon carbide semiconductor layer in contact with the first conductivity type low impurity concentration silicon carbide layer, and the horizontal direction of the silicon carbide semiconductor layer is By covering the upper surface of the buried region of the second conductivity type spaced apart from each other with the silicon carbide semiconductor layer or the low impurity concentration silicon carbide layer, the reverse leakage current is reduced and the forward current is reduced. Can also be suppressed.

Embodiment 1 FIG.
FIG. 1 is a cross-sectional view showing a configuration of a silicon carbide semiconductor device according to a first embodiment of the present invention. FIGS. 2 (a) to (c) and FIGS. 3 (a) to (b) are carbonizations according to the present embodiment. It is sectional drawing which shows the manufacturing process of a silicon semiconductor device.

In FIG. 1, a silicon carbide semiconductor device includes an n-type semiconductor substrate 1, an n ⁻ -type semiconductor layer 2 formed on the surface of the n-type semiconductor substrate 1 and having a lower n-type impurity concentration than the n-type semiconductor substrate 1. N ⁻ -type low impurity concentration layer 3 formed inside n ⁻ -type semiconductor layer 2 and having a lower n-type impurity concentration than n ⁻ -type semiconductor layer 2, and n ⁻ -type semiconductor layer 2 and n ⁻ -type semiconductor layer 2. ^- formed in contact with the form low impurity concentration layer 3, n ^- are arranged at a predetermined distance in the horizontal direction form the semiconductor layer 2, the entire n ^- covered p-type by the shape low impurity concentration layer 3 A buried region 4 and a Schottky electrode 5 formed on the surface of the n ^{− type} semiconductor layer 2 are provided. In addition, an ohmic electrode 6 is formed on the back surface of the n-type semiconductor substrate 1, and the end surface of the Schottky electrode 5 is surrounded on the surface of the n ⁻ -type semiconductor layer 2 in order to improve the breakdown voltage of the semiconductor device. A p-type termination 7 is formed.

  Here, the n-type (first conductivity type) impurity concentration is an effective n-type impurity concentration obtained by subtracting the actual p-type (second conductivity type) impurity concentration from the actual n-type impurity concentration. This also applies to the concentration of the p-type impurity.

The n-type semiconductor substrate 1, the n ⁻ -type semiconductor layer 2, the n ⁻⁻ -type low impurity concentration layer 3, the p-type buried region 4, and the p-type termination portion 7 are all formed of a silicon carbide semiconductor. The Schottky electrode 5 is formed of a metal film such as titanium, nickel, or molybdenum, and forms a Schottky junction with the n ^{− type} semiconductor layer 2. On the other hand, the ohmic electrode 6 is formed of a metal film such as nickel and forms an ohmic junction with the n-type semiconductor substrate 1. The n-type semiconductor substrate 1 is a silicon carbide substrate having a resistivity of about 20 mΩ · cm, and the n ⁻ -type semiconductor layer 2 and the n ⁻⁻ -type low impurity concentration layer 3 are, for example, 1 × 10 ¹⁶ atoms / cm, respectively. ³ and 1 to 3 × 10 ¹⁵ atoms / cm ³ . The p-type buried region 4 and the p-type termination portion 7 are formed with an impurity concentration of 1 × 10 ¹⁷ atoms / cm ³ or more.
In FIG. 1, the cross section of the p-type embedded region 4 is a rectangle, but the cross-sectional shape is not limited to a rectangle and may have a curved portion. FIG. 1 shows an example in which three p-type buried regions 4 are provided. In an actual element, a number corresponding to the size of the semiconductor is arranged.

Next, a method for manufacturing this silicon carbide semiconductor device will be described.
First, as shown in FIG. 2A, an n ^{− type} semiconductor layer 2a is formed on an n type semiconductor substrate 1 having a resistivity of about 20 mΩ · cm so that the impurity concentration is 1 × 10 ¹⁶ atoms / cm ^3. Epitaxially grow. Then, the amount of n-type impurities introduced is reduced during the epitaxial growth of the n ⁻ -type semiconductor layer 2a so that the concentration of the n-type impurities is 3 × 10 ¹⁵ atoms / cm ³ lower than that of the n ⁻ -type semiconductor layer 2a. The n ⁻ -type low impurity concentration layer 3 is adjusted to be formed on the surface of the n ⁻ -type semiconductor layer 2a. The impurity concentration again adjusted to ⁿ the introduction amount of n-type impurity to be ^{1 × 10 16 atoms / cm 3} - to form the shape semiconductor layer 2b ^- n on the surface of the form low impurity concentration layer 3 A four-layer silicon carbide semiconductor is manufactured.

Next, as shown in FIG. 2B, an implantation mask 8 having openings 8a to 8c at predetermined positions is formed by photolithography on the n ^{− type} semiconductor layer 2b formed in the above step. Then, a p-type impurity such as aluminum or boron is ion-implanted from above the implantation mask 8 to form a p-type buried region 4 in contact with the n ^{−− type} low impurity concentration layer 3. At this time, the implantation energy of the p-type impurity is set so that the entire surface of the p-type buried region 4 is covered with the n ^{−− type} low impurity concentration layer 3. Thereafter, the implantation mask 8 is removed using a chemical.

Then, as shown in FIG. 2C, an implantation mask 9 having openings 9a and 9b is formed on the surface of the n ⁻ -type semiconductor layer 2b by photolithography in the same manner as in the above step. Then, a p-type termination 7 is formed on the surface of the n ⁻ -type semiconductor layer 2b under the openings 9a and 9b by re-implanting p-type impurities such as aluminum and boron from the implantation mask 9. Thereafter, the implantation mask 9 is removed using a chemical. And it heat-processes at the temperature of 1500-1800 degreeC in inert gas atmosphere, such as argon, and activates a p-type impurity. Since impurities in silicon carbide hardly diffuse even at high temperatures, a fine impurity concentration distribution can be maintained even after heat treatment.
It should be noted that there is a difference in the p-type impurity concentration between the region in which the state before the ion implantation was the n ⁻ -type semiconductor 2 and the region in which the n ⁻⁻ -type low impurity concentration layer 3 was formed. Since the shape termination portion 7 only needs to have an impurity concentration of 1 × 10 ¹⁷ atoms / cm ³ or more, there is almost no influence. The order of the p-type buried region 4 forming step and the p-type termination portion 7 forming step may be interchanged.

  Thereafter, as shown in FIG. 3A, after a nickel metal film 6a is formed on the back surface of the n-type semiconductor substrate 1 by sputtering, the temperature is raised to 1000 ° C. in an inert gas atmosphere such as argon. Heat treatment is performed to form the ohmic electrode 6.

Then, as shown in FIG. 3B, on the surface of the n ⁻ -type semiconductor layer 2b, for example, a metal that forms Schottky contact with silicon carbide such as titanium, nickel, or molybdenum is formed by a method such as sputtering or electron beam evaporation. A metal film 5a is formed by film formation. Thereafter, patterning is performed on the metal film 5a with a photoresist, and an unnecessary portion of the metal is removed with an acid or the like to form the Schottky electrode 5.
The Schottky electrode 5 is formed by performing patterning so that a photoresist remains in a portion where the metal film is unnecessary before forming the metal film 5a, and then forming the metal film 5a on the n ⁻ -type semiconductor layer. After the film is formed on the surface of 2b, the photoresist may be removed together with the metal film formed thereon with an organic solvent such as acetone, and the lift-off method may be used to leave the metal film only in the necessary portions as electrodes. Good.

In the silicon carbide semiconductor device thus formed, when a forward voltage is applied between Schottky electrode 5 and ohmic electrode 6, the forward current flows from Schottky electrode 5 to n ⁻ -type semiconductor layer 2. And flows between the p-type buried regions 4 to the n-type semiconductor substrate 1. At this time, since the entire surface of the p-type buried region 4 is covered with the n ⁻ -type low impurity concentration layer 3, the contact between the Schottky electrode 5 and the n ⁻ -type semiconductor layer 2 is not hindered by the p-type buried region 4. . Thus, since the forward current flows from the Schottky electrode 5 to the n ⁻ -type semiconductor layer 2 without being blocked by the p-type buried region 4, the on-resistance can be reduced, and as a result, the reduction of the forward current can be suppressed. .

On the other hand, when a reverse voltage is applied between the Schottky electrode 5 and the ohmic electrode 6, the depletion layer spreads from the contact portion between the p-type buried region 4 and the n ^{−− type} low impurity concentration layer 3. Here, n ^- is smaller than the concentration of n-type impurities forms the semiconductor layer 2, the depletion layer n ^{- -} Shape concentration of the n-type impurity of low impurity concentration layer 3 is n-type low impurity concentration layer 3 of It will be formed spreading in the direction. Since the entire surface of the p-type buried region 4 is covered with the n ^{−− type} low impurity concentration layer 3, the depletion layer extends both in the horizontal direction and the vertical direction, and in particular, the depletion layer extending in the horizontal direction is adjacent to the depletion layer. Since the layers are connected to each other, the conduction path of the reverse leakage current is pinched off, and the reverse leakage current can be suppressed.

According to the present embodiment, by covering the entire surface of the p-type buried region 4 with the n ^{−− type} low impurity concentration layer 3, the forward current is not interrupted by the p-type buried region 4 but from the Schottky electrode 5. ^- since flows to form the semiconductor layer 2, it is possible to suppress the reduction of the forward current. In particular, since silicon carbide semiconductors have a characteristic that the forward current decreases during high-temperature operation, the effect is remarkable in a silicon carbide semiconductor device operated at 200 ° C. or higher. In addition, since a depletion layer at the pn junction extends not only in the horizontal direction but also in the vertical direction when a reverse voltage is applied, reverse leakage current can be efficiently suppressed.

In this embodiment, the entire surface of the p-type buried region 4 n ^- had covered by the shape low impurity concentration layer 3, as shown in FIG. 4, the upper and lower surfaces of the p-type buried region 4, respectively n ^{- The − type} low impurity concentration layer 3 and the n ^{− type} semiconductor layer 2 may be formed flush with the boundary surfaces 3a and 3b, or one of the upper and lower surfaces may be formed flush with the boundary surface 3a or 3b. May be. The upper surface of the p-type buried region 4 as shown in FIG. 5 is the n ^- type low impurity concentration layer 3 and the n ^- protrude from the boundary plane 3a of the -type semiconductor layer 2 to the Schottky electrode 5 side, the top n ^- may be covered in the form semiconductor layer 2, as shown in FIG. 6, the lower surface of the p-type buried region 4 is the n ^- type low impurity concentration layer 3 and the n ^- boundary surface 3b of the -type semiconductor layer 2 protrudes from the n-type semiconductor substrate 1 side, the upper surface of the n ^- in the form low impurity concentration layer 3, the lower surface n ^- may be configured so as to cover the respective -type semiconductor layer 2. Furthermore, as shown in FIG. 7, p form the buried region 4 the n ^- type low impurity concentration layer 3 and the n ^- through both of the boundary surfaces 3a and 3b of the form semiconductor layer 2, the semiconductor and the upper and lower surfaces It can also be covered with layer 2. These silicon carbide semiconductor devices are manufactured in the same process as in the first embodiment.

In any of the above configurations, the forward current is not blocked by the p-type buried region 4 by covering the upper surface of the p-type buried region 4 with the n ^{− type} semiconductor layer 2 or the n ^{−− type} low impurity concentration layer 3. The current flows from the Schottky electrode 5 to the n ⁻ -type semiconductor layer 2 and the reduction of the forward current can be suppressed. In addition, since it is not necessary to cover the entire surface of the p-type buried region 4 with the n ^{−− type} low impurity concentration layer 3, a margin can be provided at the position where the p-type buried region 4 is formed, and a silicon carbide semiconductor device is manufactured. Becomes easier.

Embodiment 2. FIG.
8 (a) to 8 (c) and FIGS. 9 (a) to 9 (c) are cross-sectional views showing the steps for manufacturing the silicon carbide semiconductor device according to the second embodiment of the present invention. The silicon carbide semiconductor device shown in the first embodiment can also be manufactured by the manufacturing method according to the present embodiment.
First, as shown in FIG. 8 (a), on the resistivity consists of silicon carbide is n-type semiconductor substrate 1 of about 20 m [Omega · cm, the impurity concentration of, for example, ^{1 × 10 16 atoms / cm 3} n - -type semiconductor Layer 2 is grown epitaxially.

As shown in FIG. 8B, an implantation mask 10 having openings 10a to 10d is formed on the surface of the n ^{− type} semiconductor layer 2 thus formed by photolithography. Then, a p-type impurity such as aluminum or boron is ion-implanted from above the implantation mask 10, and the p-type impurity is implanted into the n ⁻ -type semiconductor layer 2 below the openings 10 a to 10 d of the implantation mask 10. At this time, the implantation amount of the p-type impurity is set so that the implanted region is not a p-type semiconductor, but an n-type semiconductor having an impurity concentration of about 1 to 3 × ¹⁵ atoms / cm ³ , for example. In this way, the n ^- -type semiconductor layer 2 n ^- to form the shape low impurity concentration layer 3. Thereafter, the implantation mask 10 is removed using a chemical.

Next, as shown in FIG. 8C, an implantation mask 11 having openings 11a to 11c is formed on the surface of the n ⁻ -type semiconductor layer 2 by photolithography in the same manner as in the above step. Then, a p-type impurity such as aluminum or boron is again implanted from above the implantation mask 11 so that the upper surface is covered with the n ⁻ -type semiconductor layer 2 inside the n ⁻ -type semiconductor layer 2 below the openings 11a to 11c. Then, a p-type buried region 4 in contact with the n ^{−− type} low impurity concentration layer 3 is formed. Thereafter, the implantation mask 11 is removed using a chemical.

Then, as shown in FIG. 9A, an implantation mask 12 having openings 12a and 12b is formed on the surface of the n ^{− type} semiconductor layer 2 of the n type semiconductor substrate 1 by photolithography in the same manner as in the above step. . Then, a p-type termination 7 is formed on the surface of the n ⁻ -type semiconductor layer 2 below the openings 12a and 12b by re-implanting p-type impurities such as aluminum and boron from above the implantation mask 12. Thereafter, the implantation mask 12 is removed using a chemical. Then, the implanted p-type impurity is activated by performing heat treatment at a temperature of about 1500 to 1800 ° C. in an inert gas atmosphere such as argon gas using an induction heating furnace or the like.
The order of the n ^{−− type} low impurity concentration layer 3 forming step, the p-type buried region 4 forming step and the p-type termination 7 forming step may be changed.

Thereafter, as shown in FIG. 9B, a metal film 6a such as nickel is formed on the back surface of the n-type semiconductor substrate 1 by a method such as sputtering, and then 1000 ° C. in an inert gas atmosphere such as argon. The ohmic electrode 6 is formed by applying a certain degree of heat treatment.
Then, as shown in FIG. 9C, a metal that forms Schottky contact with silicon carbide such as titanium is formed on the surface of the n ^{− type} semiconductor layer 2 of the n type semiconductor substrate 1 by a method such as sputtering, After patterning with a photoresist, the unnecessary metal is removed with an acid or the like to form the Schottky electrode 5.

According to this embodiment, n ^- a p-type impurity to form the semiconductor layer 2 n by ion implantation ^- because it forms a form low impurity concentration layer 3, compared with the manufacturing method shown in Embodiment 1 The epitaxial growth process can be simplified.

It is sectional drawing which shows the silicon carbide semiconductor device in Embodiment 1 of this invention. It is a figure which shows the manufacturing process of the silicon carbide semiconductor device in Embodiment 1 of this invention. FIG. 3 is a diagram showing a manufacturing step of the silicon carbide semiconductor device in the first embodiment of the present invention following FIG. 2. It is sectional drawing which shows the modification of the silicon carbide semiconductor device in Embodiment 1 of this invention. It is sectional drawing which shows the modification of the silicon carbide semiconductor device in Embodiment 1 of this invention. It is sectional drawing which shows the modification of the silicon carbide semiconductor device in Embodiment 1 of this invention. It is sectional drawing which shows the modification of the silicon carbide semiconductor device in Embodiment 1 of this invention. It is a figure which shows the manufacturing process of the silicon carbide semiconductor device in Embodiment 2 of this invention. FIG. 9 is a diagram showing a manufacturing step of the silicon carbide semiconductor device in the second embodiment of the present invention subsequent to FIG. 8.

Explanation of symbols

1 n-type semiconductor substrate (first conductivity type silicon carbide semiconductor substrate), 2 n ⁻ type semiconductor layer (first conductivity type silicon carbide semiconductor layer), 3 n ⁻⁻ type low impurity concentration layer (first conductivity type) (Low impurity concentration silicon carbide layer), 3a, 3b interface, 4 p-type buried region (second conductivity type buried region), 5 Schottky electrode.

Claims (7)

A first conductivity type silicon carbide semiconductor substrate having a first conductivity type impurity;
A first conductivity type silicon carbide semiconductor layer formed on a surface of the silicon carbide semiconductor substrate and having a lower concentration of impurities of the first conductivity type than the silicon carbide semiconductor substrate;
A first conductivity type low impurity concentration silicon carbide layer formed inside the silicon carbide semiconductor layer and having a lower concentration of first conductivity type impurities than the silicon carbide semiconductor layer;
A buried region of a second conductivity type formed inside the silicon carbide semiconductor layer in contact with the low impurity concentration silicon carbide layer and spaced apart in the horizontal direction of the silicon carbide semiconductor layer;
In a silicon carbide semiconductor device comprising a Schottky electrode formed on the surface of the silicon carbide semiconductor layer,
An upper surface of the buried region is covered with the silicon carbide semiconductor layer or the low impurity concentration silicon carbide layer.   2. The silicon carbide semiconductor device according to claim 1, wherein the entire buried region is covered with a low impurity concentration silicon carbide layer.   2. The silicon carbide semiconductor device according to claim 1, wherein at least one of an upper surface and a lower surface of the buried region is formed flush with a boundary surface between the low impurity concentration silicon carbide layer and the silicon carbide semiconductor layer.   2. The silicon carbide semiconductor device according to claim 1, wherein an upper surface of the buried region protrudes toward a Schottky electrode from a boundary surface between the low impurity concentration silicon carbide layer and the silicon carbide semiconductor layer.   5. The silicon carbide semiconductor device according to claim 1, wherein a lower surface of the buried region protrudes from a boundary surface between the low impurity concentration silicon carbide layer and the silicon carbide semiconductor layer toward the silicon carbide semiconductor substrate. A first conductivity type silicon carbide semiconductor layer having a first conductivity type impurity concentration lower than that of the silicon carbide semiconductor substrate is formed on a surface of the first conductivity type silicon carbide semiconductor substrate having the first conductivity type impurities. Process,
Forming a first conductivity type low impurity concentration silicon carbide layer having a lower concentration of first conductivity type impurities than the silicon carbide semiconductor layer on a surface of the silicon carbide semiconductor layer;
Forming on the surface of the low impurity concentration silicon carbide layer a first conductivity type silicon carbide semiconductor layer having the same concentration of the first conductivity type impurity as the silicon carbide semiconductor layer;
Inside the silicon carbide semiconductor layer, the silicon carbide semiconductor layer is disposed in contact with the low impurity concentration silicon carbide layer and spaced apart in the horizontal direction of the silicon carbide semiconductor layer, and the upper surface is the silicon carbide semiconductor layer or the low impurity concentration silicon carbide. Forming a second conductivity type buried region covered with a layer by implanting a second conductivity type impurity;
Forming a Schottky electrode on the surface of the silicon carbide semiconductor layer. A first conductivity type silicon carbide semiconductor layer having a first conductivity type impurity concentration lower than that of the silicon carbide semiconductor substrate is formed on a surface of the first conductivity type silicon carbide semiconductor substrate having the first conductivity type impurities. Process,
By implanting a second conductivity type impurity, a first conductivity type low impurity concentration silicon carbide layer having a first conductivity type impurity concentration lower than that of the silicon carbide semiconductor layer is formed inside the silicon carbide semiconductor layer. Process,
Inside the silicon carbide semiconductor layer, the silicon carbide semiconductor layer is disposed in contact with the low impurity concentration silicon carbide layer and spaced apart in the horizontal direction of the silicon carbide semiconductor layer, and the upper surface is the silicon carbide semiconductor layer or the low impurity concentration silicon carbide. Forming a second conductivity type buried region covered with a layer by implanting a second conductivity type impurity;
Forming a Schottky electrode on the surface of the silicon carbide semiconductor layer.

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