JP2009249257A - Dielectric ceramic and laminated ceramic capacitor - Google Patents

Dielectric ceramic and laminated ceramic capacitor Download PDF

Info

Publication number
JP2009249257A
JP2009249257A JP2008101475A JP2008101475A JP2009249257A JP 2009249257 A JP2009249257 A JP 2009249257A JP 2008101475 A JP2008101475 A JP 2008101475A JP 2008101475 A JP2008101475 A JP 2008101475A JP 2009249257 A JP2009249257 A JP 2009249257A
Authority
JP
Japan
Prior art keywords
region
ceramic
dielectric
crystal
crystal grain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008101475A
Other languages
Japanese (ja)
Other versions
JP5229685B2 (en
Inventor
Masahiro Otsuka
正博 大塚
Masayuki Ishihara
雅之 石原
Tomoyuki Nakamura
友幸 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2008101475A priority Critical patent/JP5229685B2/en
Publication of JP2009249257A publication Critical patent/JP2009249257A/en
Application granted granted Critical
Publication of JP5229685B2 publication Critical patent/JP5229685B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To keep high dielectric constant without damaging temperature characteristics and to secure required reliability and AC electric field characteristics. <P>SOLUTION: The dielectric ceramic comprises crystal particles 1 and a crystal grain boundary 2. When observed in an optional cross-section, ≥70% of the crystal particles 1 has a first region 3 consisting essentially of BaTiO<SB>3</SB>and a second region 4 consisting essentially of (Ba, Ca)TiO<SB>3</SB>, wherein the peripheral length L1 of an exposed part of the first region 3 to the crystal grain boundary 2 is formed longer than the peripheral length L2 of an exposed part of the second region 4 to the crystal grain boundary, and the second regions 4 are surrounded with the first region 3. It is preferable that at least one kind selected from a group of Si, Mg, Mn and V as an accessory ingredient and further at least one kind selected from a group of Sm, Gd, Dy, Er, Ho, Y and Zr are added if need. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は誘電体セラミック、及び積層セラミックコンデンサに関し、より詳しくは小型・大容量の積層セラミックコンデンサの誘電体材料に適した誘電体セラミック、及び該誘電体セラミックを使用して製造された積層セラミックコンデンサに関する。   The present invention relates to a dielectric ceramic and a multilayer ceramic capacitor, and more particularly, a dielectric ceramic suitable for a dielectric material of a small and large capacity multilayer ceramic capacitor, and a multilayer ceramic capacitor manufactured using the dielectric ceramic. About.

積層セラミックコンデンサは、多種多様な電子デバイスの回路に用いられる電子部品であり、電子デバイスの小型化に伴い、積層セラミックコンデンサについても小型化が求められている。   Multilayer ceramic capacitors are electronic components used in circuits of a wide variety of electronic devices, and with the miniaturization of electronic devices, miniaturization of multilayer ceramic capacitors is also required.

この種の積層セラミックコンデンサは、通常、誘電体層と誘電体層との間に内部電極が介在されたものを積層し、積層体を焼結させて形成される。そして、積層セラミックコンデンサの容量を低下させずに小型化するためには誘電体層を薄層化する必要がある。   This type of multilayer ceramic capacitor is usually formed by laminating a dielectric layer and a dielectric layer with an internal electrode interposed therebetween and sintering the multilayer body. In order to reduce the size of the multilayer ceramic capacitor without reducing the capacitance, it is necessary to make the dielectric layer thinner.

ところで、誘電体層の薄層化に伴い、高誘電率を有しかつ高温での長時間駆動にも耐え得る高信頼性を有する誘電体セラミックが求められる。   By the way, with the thinning of the dielectric layer, there is a demand for a dielectric ceramic having a high dielectric constant and high reliability that can withstand long-time driving at high temperatures.

高誘電率を有し、かつ信頼性の良好な誘電体セラミック材料としては、(Ba,Ca)TiO(以下、「BCT」という。)系材料が知られている。このBCTは、BaTiO(以下、「BT」という。)のBaの一部をCaで置換することにより、BTに比べて格子間距離が縮まり、これにより信頼性低下の原因と考えられる酸素空孔の移動を抑制することができる。したがって、BCTはBTに比べ信頼性に優れている。 As a dielectric ceramic material having a high dielectric constant and good reliability, a (Ba, Ca) TiO 3 (hereinafter referred to as “BCT”)-based material is known. In this BCT, by replacing a part of Ba of BaTiO 3 (hereinafter referred to as “BT”) with Ca, the interstitial distance is reduced as compared with BT, and thereby oxygen vacancy, which is considered to cause a decrease in reliability. The movement of the hole can be suppressed. Therefore, BCT is more reliable than BT.

このBCTを使用した先行技術としては、例えば、BCT系結晶粒子と、BT系結晶粒子とを有する誘電体セラミック(誘電体磁器)であって、前記BT系結晶粒子の平均粒径が前記BCT系結晶粒子の平均粒径よりも小さく、前記BT系結晶粒子の全域にわたってMg及びMnが存在するとともに、前記BT系結晶粒子表面に、アルカリ土類元素、希土類元素及びSiを含有する複合酸化物からなる被覆層を有し、かつ、前記BCT系結晶粒子がコアシェル構造を有する誘電体セラミックが知られている(特許文献1)。   As a prior art using this BCT, for example, it is a dielectric ceramic (dielectric ceramic) having BCT crystal particles and BT crystal particles, and the average particle diameter of the BT crystal particles is the BCT system. From the composite oxide containing an alkaline earth element, a rare earth element, and Si on the surface of the BT crystal particle, and Mg and Mn are present over the entire area of the BT crystal particle, which is smaller than the average particle diameter of the crystal particle. There is known a dielectric ceramic having a coating layer of which the BCT crystal particles have a core-shell structure (Patent Document 1).

この特許文献1の誘電体セラミックは、高い誘電率を有し温度特性の良好なBT系結晶粒子と、DCバイアス特性の良好なBCT系結晶粒子との混晶構造を有しているので、BT系結晶粒子からなる均一構造の誘電体セラミックに比べ、良好なDCバイアス特性を得ることが可能となり、また、BCT系結晶粒子からなる均一構造の誘電体セラミックに比べ、高誘電率かつ良好な静電容量の温度特性を得ることが可能となる。   The dielectric ceramic disclosed in Patent Document 1 has a mixed crystal structure of BT crystal grains having a high dielectric constant and good temperature characteristics, and BCT crystal grains having good DC bias characteristics. It is possible to obtain better DC bias characteristics compared to a uniform-structured dielectric ceramic made of system crystal grains, and a higher dielectric constant and better static performance than a uniform-structured dielectric ceramic made of BCT-type crystal grains. It becomes possible to obtain the temperature characteristic of the capacitance.

特開2003−63863号公報JP 2003-63863 A

しかしながら、上記特許文献1では、誘電体セラミックの磁器構造を、BCT系結晶粒子とBT系結晶粒子との混晶構造としているものの、BT系結晶粒子が偏って局所的に存在したり、BCT系結晶粒子が局所的に偏って存在してしまう場合があり、斯かる局所的な偏りは、誘電体層の薄層化に伴い、相対的に顕著になる。すなわち、誘電体層が薄層化すると、内部電極の断面を厚み方向から観察した場合、BT系結晶粒子又はBCT系結晶粒子のいずれか一方の結晶粒子のみからなる部分の存在確率が大きくなる。   However, in Patent Document 1, although the ceramic structure of the dielectric ceramic is a mixed crystal structure of BCT crystal particles and BT crystal particles, the BT crystal particles are unevenly present locally, There is a case where the crystal particles are locally biased, and the local bias becomes relatively remarkable as the dielectric layer is thinned. That is, when the dielectric layer is thinned, when the cross section of the internal electrode is observed from the thickness direction, the probability of existence of a portion composed of only one of the BT crystal particles and the BCT crystal particles increases.

したがって、例えば、信頼性の劣るBT系結晶粒子のみで形成された部分の割合が増加すると、内部電極−内部電極間に、前記BT系結晶粒子からなるショートパスが形成され、その結果、電界を印加した場合、負荷によっては電気抵抗値の低下を招くおそれがある。   Therefore, for example, when the ratio of the portion formed only of the BT crystal particles having poor reliability is increased, a short path made of the BT crystal particles is formed between the internal electrode and the internal electrode. When applied, depending on the load, the electrical resistance value may be reduced.

この場合、結晶粒子の粒子径を小さくすることにより、上記不具合を回避することも可能であるが、結晶粒子の微小化は比誘電率の低下を招くおそれがある。   In this case, it is possible to avoid the above problem by reducing the particle diameter of the crystal particles, but miniaturization of the crystal particles may cause a decrease in the relative dielectric constant.

また、結晶粒子を微小化するためには、原料となるセラミック粉末の粒子径も微小化する必要があるが、セラミック粉末の粒子径を微小化すると、粒子同士の凝集が生じ易くなる。そしてその結果、セラミック粉末をシート成形する際に、パッキング性が低くなって成形密度の低下を招くおそれがあり、また、焼成後も局所的な結晶粒子の粗密化を招くおそれがあることから、所望の信頼性を確保することが困難である。   Further, in order to make the crystal particles fine, it is necessary to make the particle diameter of the ceramic powder as a raw material fine. However, if the particle diameter of the ceramic powder is made fine, the particles tend to aggregate. And as a result, when the ceramic powder is formed into a sheet, there is a possibility that the packing property is lowered and the forming density is lowered, and there is a possibility that local crystal particles are coarsened even after firing. It is difficult to ensure desired reliability.

また、最近の誘電体層の薄層化に伴い、IC周辺に用いられる積層セラミックコンデンサでは、印加されるAC電圧が0.1V以下に小さくなる場合がある。したがって、AC印加電圧が低下しても、静電容量の変動を極力抑制する必要がある。すなわちAC電界特性の良好な誘電体セラミックの実現が望まれる。   In addition, with the recent thinning of the dielectric layer, the applied AC voltage may be reduced to 0.1 V or less in a multilayer ceramic capacitor used around the IC. Therefore, it is necessary to suppress the fluctuation of the capacitance as much as possible even when the AC applied voltage is lowered. That is, realization of a dielectric ceramic having good AC electric field characteristics is desired.

本発明はこのような問題点に鑑みなされたものであって、温度特性を損なうことなく高誘電率を維持し、かつ信頼性とAC電界特性を確保することができる誘電体セラミック、及びこれらの誘電体セラミックを使用した積層セラミックコンデンサを提供することを目的とする。   The present invention has been made in view of such a problem, and maintains a high dielectric constant without impairing temperature characteristics, and can ensure reliability and AC electric field characteristics. An object of the present invention is to provide a multilayer ceramic capacitor using a dielectric ceramic.

上記目的を達成するために本発明に係る誘電体セラミックは、結晶粒子と結晶粒界とを備えた誘電体セラミックであって、任意の断面を観察したとき、70%以上の結晶粒子が、BaTiOを主成分とする第1の領域と、(Ba,Ca)TiOを主成分とする第2の領域とを有し、かつ、前記第1の領域の結晶粒界への露出部分の周縁長が、前記第2の領域の結晶粒界への露出部分の周縁長よりも長いことを特徴としている。 In order to achieve the above object, the dielectric ceramic according to the present invention is a dielectric ceramic having crystal grains and crystal grain boundaries, and 70% or more of the crystal grains are observed when any cross section is observed. 3 and a second region mainly composed of (Ba, Ca) TiO 3 , and the periphery of the exposed portion of the first region to the crystal grain boundary The length is longer than the peripheral length of the exposed portion of the second region to the grain boundary.

尚、本発明では、「結晶粒界」は、「結晶三重点」を含むものとする。   In the present invention, the “crystal grain boundary” includes “crystal triple point”.

また、本発明の誘電体セラミックは、前記第2の領域が前記第1の領域で取り囲まれていることを特徴としている。   The dielectric ceramic of the present invention is characterized in that the second region is surrounded by the first region.

また、本発明の誘電体セラミックは、Si、Mg、Mn、及びVの群から選択された少なくとも1種の元素が含まれていることを特徴としている。   The dielectric ceramic of the present invention is characterized in that it contains at least one element selected from the group consisting of Si, Mg, Mn, and V.

さらに、本発明の誘電体セラミックは、Sm、Gd、Dy、Er、Ho、Y、及びZrの群から選択された少なくとも1種の元素が含まれていることを特徴としている。   Furthermore, the dielectric ceramic of the present invention is characterized in that it contains at least one element selected from the group consisting of Sm, Gd, Dy, Er, Ho, Y, and Zr.

また、本発明に係る積層セラミックコンデンサは、誘電体層と内部電極が交互に積層されてなるセラミック焼結体を有すると共に、該セラミック焼結体の両端部に外部電極が形成され、該外部電極と前記内部電極とが電気的に接続された積層セラミックコンデンサにおいて、前記誘電体層が、上記いずれかに記載の誘電体セラミックで形成されていることを特徴としている。   The multilayer ceramic capacitor according to the present invention includes a ceramic sintered body in which dielectric layers and internal electrodes are alternately stacked, and external electrodes are formed at both ends of the ceramic sintered body. In the multilayer ceramic capacitor in which the internal electrode and the internal electrode are electrically connected, the dielectric layer is formed of any one of the above dielectric ceramics.

本発明の誘電体セラミックによれば、任意の断面を観察したとき、70%以上の結晶粒子が、BaTiOを主成分とする第1の領域と、(Ba,Ca)TiOを主成分とする第2の領域とを有し、かつ、前記第1の領域の結晶粒界への露出部分の周縁長が、前記第2の領域の結晶粒界への露出部分の周縁長よりも長いので、結晶粒子がBCT又はBTの均一構造となる割合を低減できると共に、信頼性向上に寄与するBCTの周囲をAC電界特性の向上に寄与するBTが囲んだ構造を実現することが可能となる。そしてこれにより、誘電体層が薄層化しても、温度特性を損なうことなく高誘電率を維持し、かつ高い信頼性を有しながら、AC電界特性を向上させることが可能となる。 According to the dielectric ceramic of the present invention, when an arbitrary cross section is observed, 70% or more of the crystal grains are composed of the first region mainly composed of BaTiO 3 and the main component composed of (Ba, Ca) TiO 3. And the peripheral length of the exposed portion of the first region to the crystal grain boundary is longer than the peripheral length of the exposed portion of the second region to the crystal grain boundary. In addition, it is possible to reduce the ratio at which the crystal grains have a BCT or BT uniform structure, and to realize a structure in which the BT surrounding the BCT that contributes to improving the reliability surrounds the BCT. As a result, even when the dielectric layer is thinned, the AC electric field characteristics can be improved while maintaining a high dielectric constant without impairing the temperature characteristics and having high reliability.

また、Si、Mg、Mn、及びVの群から選択された少なくとも1種の元素が含まれ、さらにはSm、Gd、Dy、Er、Ho、Y、及びZrの群から選択された少なくとも1種の元素が含まれているので、比誘電率をより一層向上させることが可能となり、かつ更なる信頼性向上を図ることができる。   In addition, at least one element selected from the group of Si, Mg, Mn, and V is included, and at least one element selected from the group of Sm, Gd, Dy, Er, Ho, Y, and Zr is included. Therefore, the relative permittivity can be further improved, and the reliability can be further improved.

また、本発明の積層セラミックコンデンサによれば、誘電体層が、上記いずれかに記載の誘電体セラミックで形成されているので、誘電体層が薄層化(例えば、2μm以下)された場合であっても、AC電界特性と信頼性の両立が可能であり、かつ温度特性が良好で高誘電率を有する所望の積層セラミックコンデンサを得ることができる。   According to the multilayer ceramic capacitor of the present invention, since the dielectric layer is formed of any one of the above dielectric ceramics, the dielectric layer is thinned (for example, 2 μm or less). Even in such a case, it is possible to obtain a desired multilayer ceramic capacitor having both AC electric field characteristics and reliability, excellent temperature characteristics, and high dielectric constant.

次に、本発明の実施の形態を添付図面を参照しながら詳説する。   Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

図1は、本発明に係る誘電体セラミックの一実施の形態(第1の実施の形態)の要部を模式的に示した断面図である。   FIG. 1 is a cross-sectional view schematically showing a main part of one embodiment (first embodiment) of a dielectric ceramic according to the present invention.

本発明の誘電体セラミックは、結晶粒子1と結晶粒界2とを備え、任意の断面を観察したとき、70%以上の結晶粒子1が、下記(1)、(2)の要件を満たしている。すなわち、
(1)BTを主成分とする第1の領域3と、BCTを主成分とする第2の領域4とを有し、かつ
(2)図2に示すように、第1の領域3の結晶粒界2への露出部分の周縁長L1と、第2の領域4の結晶粒界2への露出部分の周縁長L2とは、L1>L2の関係を有している。
The dielectric ceramic of the present invention includes crystal grains 1 and crystal grain boundaries 2, and 70% or more of the crystal grains 1 satisfy the following requirements (1) and (2) when an arbitrary cross section is observed. Yes. That is,
(1) having a first region 3 containing BT as a main component and a second region 4 containing BCT as a main component, and (2) a crystal of the first region 3 as shown in FIG. The peripheral length L1 of the exposed portion to the grain boundary 2 and the peripheral length L2 of the exposed portion of the second region 4 to the crystal grain boundary 2 have a relationship of L1> L2.

そして、これによりAC電界特性と信頼性の双方の両立が可能な誘電体セラミックを得ることができる。   As a result, a dielectric ceramic capable of achieving both AC electric field characteristics and reliability can be obtained.

すなわち、BCTは、BTのBaの一部をCaで置換することによって、格子間距離を縮めることができ、これにより信頼性低下の原因となる酸素空孔の移動を抑制することができる。一方、BTは高誘電率を有すると共に温度特性に優れ、さらにはBCTに比べてAC電界特性の向上に寄与する。   That is, BCT can reduce the interstitial distance by substituting a part of Ba of BT with Ca, thereby suppressing the movement of oxygen vacancies that cause a decrease in reliability. On the other hand, BT has a high dielectric constant and excellent temperature characteristics, and further contributes to improvement of AC electric field characteristics as compared with BCT.

したがって、BTを主成分とする第1の領域3とBCTを主成分とする第2の領域4とを同一の結晶粒子内に共存させることにより、温度特性を損なうことなく高誘電率を維持し、かつ信頼性とAC電界特性の両立を図ることができると考えられる。   Therefore, the high dielectric constant can be maintained without impairing the temperature characteristics by coexisting the first region 3 mainly composed of BT and the second region 4 mainly composed of BCT in the same crystal grain. In addition, it is considered that both reliability and AC electric field characteristics can be achieved.

ところが、本発明者らの研究結果により、L1<L2、すなわち第2の領域4の結晶粒界への露出部分の周縁長L2を第1の領域3の結晶粒界への露出部分の周縁長L1よりも長くした場合は、第1の領域3の周縁のほぼ全域を第2の領域4で覆うことが難しく、第1の領域3の結晶粒界2への露出部分が少なからず形成されてしまうことが分かった。   However, according to the research results of the present inventors, L1 <L2, that is, the peripheral length L2 of the exposed portion of the second region 4 to the crystal grain boundary is set to the peripheral length of the exposed portion of the first region 3 to the crystal grain boundary. When it is longer than L1, it is difficult to cover almost the entire periphery of the first region 3 with the second region 4, and the exposed portion of the first region 3 to the crystal grain boundary 2 is not a little. I understood that.

したがって、この場合、積層セラミックコンデンサに電界を印加すると、該電界は、結晶粒界2に沿って伝播することなく、結晶粒子1の中心部、すなわち信頼性の低い第1の領域3を伝播することができる。すなわち、前記BT系結晶粒子からなるショートパスが内部電極−内部電極間に形成され、電界が前記ショートパスを伝播するため、信頼性を向上させることが困難となる。   Therefore, in this case, when an electric field is applied to the multilayer ceramic capacitor, the electric field does not propagate along the crystal grain boundary 2 but propagates through the central portion of the crystal grain 1, that is, the first region 3 having low reliability. be able to. That is, a short path made of the BT crystal grains is formed between the internal electrode and the internal electrode, and an electric field propagates through the short path, so that it is difficult to improve reliability.

これに対しL1>L2、すなわち第1の領域3の結晶粒界への露出部分の周縁長L1が第2の領域4の結晶粒界2への露出部分の周縁長L2よりも長い場合は、第2の領域4を第1の領域3で囲うことができる。そして、結晶粒子1の中心部が、信頼性の高いBCTを主成分とした第2の領域4であるので、電界は結晶粒界2に沿って伝播しなければならず、内部電極−内部電極間にショートパスが形成され難い。その結果、高い信頼性を得ることが可能となる。   On the other hand, when L1> L2, that is, the peripheral length L1 of the exposed portion of the first region 3 to the crystal grain boundary is longer than the peripheral length L2 of the exposed portion of the second region 4 to the crystal grain boundary 2, The second region 4 can be surrounded by the first region 3. And since the center part of the crystal grain 1 is the 2nd area | region 4 which has highly reliable BCT as a main component, an electric field must propagate along the crystal grain boundary 2, and internal electrode-internal electrode It is difficult to form a short path between them. As a result, high reliability can be obtained.

このような構造とすることにより、信頼性とAC電界特性の両立を図ることが可能となる。   With such a structure, it is possible to achieve both reliability and AC electric field characteristics.

また、上記(1)(2)の要件を満たす結晶粒子を、70%以上としたのは、以下の理由による。   The reason why the crystal grains satisfying the requirements (1) and (2) are set to 70% or more is as follows.

結晶粒子中、上記(1)(2)の要件を満たす結晶粒子が存在しても、その割合が70%未満の場合は、BCTがBTに十分に囲まれていない結晶粒子の割合が相対的に増加し、所望の信頼性向上を図ることができなくなるからである。   Even if crystal grains satisfying the requirements of (1) and (2) above exist in the crystal grains, if the ratio is less than 70%, the ratio of crystal grains in which BCT is not sufficiently surrounded by BT is relative This is because the desired reliability cannot be improved.

尚、上記(1)(2)の要件を満足する誘電体セラミックは、原料粉末の製造条件を制御することにより製造することができる。すなわち、後述するように、例えば、BCT粉末を作製した後、BCTとBTが所定配合量となるように該BCT粉末にBa化合物、Ti化合物を添加し、仮焼温度を調整することにより、上記(1)(2)の要件を満足する誘電体セラミックを容易に製造することができる。   The dielectric ceramic satisfying the requirements (1) and (2) can be manufactured by controlling the manufacturing conditions of the raw material powder. That is, as described later, for example, after preparing the BCT powder, the BaCT and BT are added to the BCT powder so that the BCT and BT have a predetermined blending amount, and the calcining temperature is adjusted to adjust the calcining temperature. (1) A dielectric ceramic that satisfies the requirements of (2) can be easily manufactured.

図3は、誘電体セラミックの第2の実施の形態を模式的に示した断面図であって、任意の断面で観察したとき、70%以上の結晶粒子は、この図3に示すように、第1の領域3の内部に第2の領域4が形成されている。   FIG. 3 is a cross-sectional view schematically showing the second embodiment of the dielectric ceramic. When observed in an arbitrary cross section, 70% or more of crystal grains are as shown in FIG. A second region 4 is formed inside the first region 3.

すなわち、この第2の実施の形態においても、任意の断面で観察したとき、70%以上の結晶粒子が、BTを主成分とする第1の領域3と、BCTを主成分とする第2の領域4とを有している。そして、第1の領域3の周縁のみが結晶粒界2に露出しており、第2の領域4の周縁は結晶粒界2に露出していない。つまり、第2の領域4が、第1の領域3に包囲された状態となっている。したがって、第1の実施の形態と同様、第1の領域3の結晶粒界2への露出部分の周縁長L1が、第2領域3の結晶粒界2への露出部分の周縁長L2よりも長く形成されていることとなる。   That is, also in this second embodiment, when observed in an arbitrary cross section, 70% or more of the crystal grains are the first region 3 containing BT as the main component and the second region containing BCT as the main component. Region 4. Only the periphery of the first region 3 is exposed at the crystal grain boundary 2, and the periphery of the second region 4 is not exposed at the crystal grain boundary 2. That is, the second region 4 is surrounded by the first region 3. Therefore, as in the first embodiment, the peripheral length L1 of the exposed portion of the first region 3 to the crystal grain boundary 2 is larger than the peripheral length L2 of the exposed portion of the second region 3 to the crystal grain boundary 2. It will be formed long.

そして、この第2の実施の形態でも、第1の実施の形態(図1及び図2)で述べたのと同様の理由から、温度特性を損なうことなく高誘電率を維持し、かつ高い信頼性を有しながら、AC電界特性を改善することができる。   In the second embodiment as well, for the same reason as described in the first embodiment (FIGS. 1 and 2), a high dielectric constant is maintained without impairing temperature characteristics, and high reliability is achieved. Thus, the AC electric field characteristics can be improved.

また、本誘電体セラミックは、BT及びBCTを主成分とするが、特性に影響を与えない範囲で、必要に応じて副成分を添加するのも好ましい。特に、Si、Mg、Mn、及びVの群から選択された少なくとも1種の元素や、Sm、Gd、Dy、Er、Ho、Y、及びZrの群から選択された少なくとも1種の元素を副成分として添加することにより、良好な温度特性やAC電界特性を維持しつつ、より一層の比誘電率の向上を図ることができ、更には信頼性を大幅に向上させることが可能となる。   Moreover, although this dielectric ceramic has BT and BCT as main components, it is also preferable to add a subcomponent as needed within the range which does not affect a characteristic. In particular, at least one element selected from the group consisting of Si, Mg, Mn, and V, and at least one element selected from the group consisting of Sm, Gd, Dy, Er, Ho, Y, and Zr are added as sub-elements. By adding it as a component, it is possible to further improve the dielectric constant while maintaining good temperature characteristics and AC electric field characteristics, and it is possible to greatly improve the reliability.

尚、これらの副成分は、結晶粒内の主成分に固溶していても良く、結晶粒界に存在していても良い。   In addition, these subcomponents may be dissolved in the main component in a crystal grain, and may exist in a crystal grain boundary.

次に、本誘電体セラミックを使用して製造された積層セラミックコンデンサについて詳述する。   Next, a multilayer ceramic capacitor manufactured using this dielectric ceramic will be described in detail.

図4は上記積層セラミックコンデンサの一実施の形態を模式的に示した断面図である。   FIG. 4 is a cross-sectional view schematically showing an embodiment of the multilayer ceramic capacitor.

該積層セラミックコンデンサは、セラミック焼結体5に内部電極6a〜6fが埋設されると共に、該セラミック焼結体5の両端部には外部電極7a、7bが形成され、さらに該外部電極7a、7bの表面には第1のめっき皮膜8a、8b及び第2のめっき皮膜9a、9bが形成されている。   In the multilayer ceramic capacitor, internal electrodes 6a to 6f are embedded in the ceramic sintered body 5, and external electrodes 7a and 7b are formed at both ends of the ceramic sintered body 5, and the external electrodes 7a and 7b are further formed. The first plating films 8a and 8b and the second plating films 9a and 9b are formed on the surface.

すなわち、セラミック焼結体5は、上記誘電体セラミックで形成された誘電体層10a〜10gと内部電極層6a〜6fとが交互に積層されて焼成されてなり、内部電極層6a、6c、6eは外部電極7aと電気的に接続され、内部電極層6b、6d、6fは外部電極7bと電気的に接続されている。そして、内部電極層6a、6c、6eと内部電極層6b、6d、6fとの対向面間で静電容量を形成している。   That is, the ceramic sintered body 5 is formed by alternately laminating and firing the dielectric layers 10a to 10g and the internal electrode layers 6a to 6f made of the dielectric ceramic, and the internal electrode layers 6a, 6c, and 6e. Are electrically connected to the external electrode 7a, and the internal electrode layers 6b, 6d, 6f are electrically connected to the external electrode 7b. An electrostatic capacitance is formed between the opposing surfaces of the internal electrode layers 6a, 6c, 6e and the internal electrode layers 6b, 6d, 6f.

次に、上記積層セラミックコンデンサの製造方法の一例について詳述する。   Next, an example of a method for manufacturing the multilayer ceramic capacitor will be described in detail.

まず、セラミック素原料として、BaCO、CaCO、TiOを用意し、所定量秤量する。 First, BaCO 3 , CaCO 3 , and TiO 2 are prepared as ceramic raw materials, and a predetermined amount is weighed.

次いで、この秤量物をPSZ(Partially Stabilized Zirconia:部分安定化ジルコニア)ボール等の玉石及び純水と共にボールミルに投入し、湿式で十分に混合粉砕した後、1000℃以上の温度で仮焼し、BCT粉末を作製する。   Next, this weighed product is put into a ball mill together with cobblestones such as PSZ (Partially Stabilized Zirconia) balls and pure water, sufficiently mixed and pulverized in a wet manner, calcined at a temperature of 1000 ° C. or higher, and BCT Make a powder.

次いで、主成分原料粉末中のBCTとBTとの割合が所定比率となるように、BCT粉末、及びBaCO、TiOを所定量秤量する。そして、この秤量物をPSZボール等の玉石及び純水と共にボールミルに投入し、湿式で十分に混合粉砕した後、1000〜1150℃程度の温度で仮焼し、BCT及びBTからなる主成分原料粉末を作製する。 Next, a predetermined amount of BCT powder, BaCO 3 , and TiO 2 are weighed so that the ratio of BCT and BT in the main component raw material powder becomes a predetermined ratio. Then, this weighed product is put into a ball mill together with cobblestones such as PSZ balls and pure water, sufficiently mixed and pulverized in a wet manner, calcined at a temperature of about 1000 to 1150 ° C., and a main component raw material powder consisting of BCT and BT Is made.

さらに、必要に応じ、上述した副成分化合物を上記主成分原料粉末に添加し、ボールミルで湿式混合した後、乾燥させ、これによりセラミック原料粉末を得る。   Furthermore, if necessary, the above-mentioned auxiliary component compound is added to the main component raw material powder, wet-mixed by a ball mill, and then dried to obtain a ceramic raw material powder.

次いで、このセラミック原料粉末を有機バインダや有機溶剤と共にボールミルに投入して湿式混合し、これによりセラミックスラリーを作製する。その後、ドクターブレード法等を使用してセラミックスラリーに成形加工を施し、セラミックグリーンシートを作製する。   Next, this ceramic raw material powder is put into a ball mill together with an organic binder and an organic solvent and wet-mixed, thereby producing a ceramic slurry. Thereafter, the ceramic slurry is formed using a doctor blade method or the like to produce a ceramic green sheet.

次いで、内部電極用導電性ペーストを使用してセラミックグリーンシート上にスクリーン印刷を施し、前記セラミックグリーンシートの表面に所定パターンの導電膜を形成する。   Next, screen printing is performed on the ceramic green sheet using the internal electrode conductive paste, and a conductive film having a predetermined pattern is formed on the surface of the ceramic green sheet.

尚、内部電極用導電性ペーストに含有される導電性材料としては、低コスト化の観点から、Ni、Cuやこれら合金を主成分とした卑金属材料を使用するのが好ましい。   As the conductive material contained in the internal electrode conductive paste, it is preferable to use a base metal material mainly composed of Ni, Cu or an alloy thereof from the viewpoint of cost reduction.

次いで、導電膜が形成されたセラミックグリーンシートを所定方向に複数枚積層し、導電膜の形成されていないセラミックグリーンシートで挟持し、圧着し、所定寸法に切断してセラミック積層体を作製する。そしてこの後、温度300℃〜500℃で脱バインダ処理を行ない、さらに、酸素分圧が10-9〜10-12MPaに制御されたH−N−HOガスからなる還元性雰囲気下、温度1200〜1300℃で約2時間焼成処理を行なう。これにより導電膜とセラミックグリーンシートとが共焼結され、内部電極6a〜6fと誘電体層10a〜10gとが交互に積層されてなるセラミック焼結体5が得られる。 Next, a plurality of ceramic green sheets on which a conductive film is formed are laminated in a predetermined direction, sandwiched between ceramic green sheets on which a conductive film is not formed, pressure-bonded, and cut into predetermined dimensions to produce a ceramic laminate. Thereafter, the binder removal treatment is performed at a temperature of 300 ° C. to 500 ° C., and the reducing atmosphere is made of H 2 —N 2 —H 2 O gas whose oxygen partial pressure is controlled to 10 −9 to 10 −12 MPa. Then, a baking treatment is performed at a temperature of 1200 to 1300 ° C. for about 2 hours. Thereby, the conductive film and the ceramic green sheet are co-sintered, and the ceramic sintered body 5 in which the internal electrodes 6a to 6f and the dielectric layers 10a to 10g are alternately laminated is obtained.

次に、セラミック焼結体5の両端面に外部電極用導電性ペーストを塗布し、焼付処理を行い、これにより外部電極7a、7bが形成される。   Next, a conductive paste for external electrodes is applied to both end faces of the ceramic sintered body 5 and subjected to a baking treatment, whereby external electrodes 7a and 7b are formed.

尚、外部電極用導電性ペーストに含有される導電性材料についても、低コスト化の観点からCu等の卑金属材料を使用するのが好ましい。   In addition, it is preferable to use base metal materials, such as Cu, also about the electroconductive material contained in the electroconductive paste for external electrodes from a viewpoint of cost reduction.

また、外部電極7a、7bの形成方法として、セラミック積層体の両端面に外部電極用導電性ペーストを塗布した後、セラミック積層体と同時に焼成処理を施すようにしてもよい。   In addition, as a method of forming the external electrodes 7a and 7b, a conductive paste for external electrodes may be applied to both end faces of the ceramic laminate, and then fired at the same time as the ceramic laminate.

そして、最後に、電解めっきを施して外部電極7a、7bの表面にNi等からなる第1のめっき皮膜8a、8bを形成し、さらに該第1のめっき皮膜8a、8bの表面にはんだやスズ等からなる第2のめっき皮膜9a、9bを形成し、これにより積層セラミックコンデンサが製造される。   Finally, electrolytic plating is performed to form first plating films 8a and 8b made of Ni or the like on the surfaces of the external electrodes 7a and 7b, and solder and tin are further formed on the surfaces of the first plating films 8a and 8b. The second plating films 9a and 9b made of the like are formed, whereby a multilayer ceramic capacitor is manufactured.

このように本積層セラミックコンデンサは、誘電体層10a〜10gが上記誘電体セラミックを使用して製造されているので、誘電体層10a〜10gが薄層化されても、温度特性を損なうことなく、高誘電率を維持し、さらに良好なAC電界特性を確保することができ、しかも高温負荷寿命が良好で信頼性に優れた積層セラミックコンデンサを得ることができる。   As described above, in the present multilayer ceramic capacitor, the dielectric layers 10a to 10g are manufactured using the dielectric ceramic, so that even if the dielectric layers 10a to 10g are thinned, the temperature characteristics are not impaired. In addition, it is possible to obtain a multilayer ceramic capacitor that can maintain a high dielectric constant, ensure good AC electric field characteristics, and have a good high temperature load life and excellent reliability.

尚、本発明は上記実施の形態に限定されるものではない。例えば、上記実施の形態では、主成分であるBCT及びBTを固相合成法により作製したが、加水分解法や水熱合成法、共沈法等により作製してもよい。さらに、セラミック素原料についても、炭酸塩や酸化物以外に、硝酸塩、水酸化物、有機酸塩、アルコキシド、キレート化合物等、合成反応の形態に応じて適宜選択することができる。   The present invention is not limited to the above embodiment. For example, in the above embodiment, the main components BCT and BT are produced by a solid phase synthesis method, but they may be produced by a hydrolysis method, a hydrothermal synthesis method, a coprecipitation method, or the like. Furthermore, the ceramic raw material can be appropriately selected according to the form of the synthesis reaction, such as nitrate, hydroxide, organic acid salt, alkoxide, chelate compound, etc. in addition to carbonate and oxide.

また、積層セラミックコンデンサの焼成処理で内部電極成分が結晶粒子内や結晶粒界に拡散するおそれがあるが、この場合も積層セラミックコンデンサの電気特性に何ら影響を及ぼすものではない。   Further, the internal electrode component may diffuse into the crystal grains or the crystal grain boundaries during the firing process of the multilayer ceramic capacitor. However, in this case, the electrical characteristics of the multilayer ceramic capacitor are not affected at all.

次に、本発明の実施例を具体的に説明する。   Next, examples of the present invention will be specifically described.

〔主成分原料粉末の作製及び準備〕
[試料番号1]
平均粒径200nmのBaTiO粉末を準備し、試料番号1の主成分原料粉末とした。
[Production and preparation of main ingredient raw material powder]
[Sample No. 1]
A BaTiO 3 powder having an average particle size of 200 nm was prepared and used as a main component raw material powder of sample number 1.

[試料番号2]
平均粒径200nmの(Ba0.95Ca0.05)TiO粉末を準備し、試料番号2の主成分原料粉末とした。
[Sample No. 2]
(Ba 0.95 Ca 0.05 ) TiO 3 powder having an average particle diameter of 200 nm was prepared and used as the main component raw material powder of sample number 2.

[試料番号3]
平均粒径200nmの(Ba0.95Ca0.05)TiO粉末を準備した。そして、(Ba0.95Ca0.05)TiO(BCT)とBaTiO(BT)が、モル比でBCT:BT=8:2となるように、(Ba0.95Ca0.05)TiO、BaCO及びTiOを秤量し、PSZボール及び純水と共にボールミルに投入して混合した。次いで、これを乾燥させた後、1000℃の温度で2時間仮焼し、試料番号3の主成分原料粉末を作製した。
[Sample No. 3]
(Ba 0.95 Ca 0.05 ) TiO 3 powder having an average particle diameter of 200 nm was prepared. (Ba 0.95 Ca 0.05 ) TiO 3 (BCT) and BaTiO 3 (BT) are (Ba 0.95 Ca 0.05 ) TiO 3 , BaCO 3 and TiO 2 so that the molar ratio is BCT: BT = 8: 2. Were weighed and put into a ball mill with PSZ balls and pure water and mixed. Subsequently, after drying this, it calcined for 2 hours at the temperature of 1000 degreeC, and produced the main component raw material powder of the sample number 3.

[試料番号4]
仮焼温度を1050℃とした以外は試料番号3と同様の方法で試料番号4の主成分原料粉末を作製した。
[Sample No. 4]
A main component raw material powder of Sample No. 4 was produced in the same manner as Sample No. 3 except that the calcining temperature was 1050 ° C.

[試料番号5]
仮焼温度を1100℃とした以外は試料番号3と同様の方法で試料番号5の主成分原料粉末を作製した。
[Sample No. 5]
A main component raw material powder of Sample No. 5 was produced in the same manner as Sample No. 3 except that the calcining temperature was 1100 ° C.

[試料番号6]
仮焼温度を1150℃とした以外は試料番号3と同様の方法で試料番号6の主成分原料粉末を作製した。
[Sample No. 6]
A main component raw material powder of Sample No. 6 was produced in the same manner as Sample No. 3 except that the calcining temperature was 1150 ° C.

[試料番号7]
平均粒径200nmのBaTiO粉末を準備した。そして、(Ba0.95Ca0.05)TiO(BCT)とBaTiO(BT)が、モル比でBCT:BT=8:2となるように、BaTiO、BaCO、CaCO及びTiOを秤量し、PSZボール及び純水と共にボールミルに投入して混合した。次いで、これを乾燥させた後、1000℃の温度で2時間仮焼し、試料番号7の主成分原料粉末を作製した。
[Sample No. 7]
BaTiO 3 powder having an average particle size of 200 nm was prepared. Then, BaTiO 3 , BaCO 3 , CaCO 3 and TiO 2 are weighed so that (Ba 0.95 Ca 0.05 ) TiO 3 (BCT) and BaTiO 3 (BT) have a molar ratio of BCT: BT = 8: 2. Then, it was put into a ball mill with PSZ balls and pure water and mixed. Subsequently, after drying this, it calcined for 2 hours at the temperature of 1000 degreeC, and produced the main component raw material powder of the sample number 7.

〔積層セラミックコンデンサの作製〕
上記試料番号1〜7の主成分原料粉末100モル部に対し1モル部のMgO、0.3モル部のMnOをPSZボール及び純水と共にボールミルに投入して混合し、その後、乾燥させてセラミック原料を得た。
[Production of multilayer ceramic capacitors]
1 mol part of MgO and 0.3 mol part of MnO are put into a ball mill together with PSZ balls and pure water and mixed with 100 mol parts of the main component raw material powders of the above sample numbers 1 to 7, and then dried to be ceramic. The raw material was obtained.

次に、このセラミック原料に対し、ポリビニルブチラール系バインダ及びエタノール等の有機溶媒を加え、ボールミルで所定時間湿式で混合し、セラミックスラリーを作製した。このセラミックスラリーをドクターブレード法によりシート成形し、厚み2.5μmの矩形のセラミックグリーンシートを作製した。そして、Niを主成分とする内部電極用導電性ペーストを用意し、該内部電極用導電性ペーストを前記セラミックグリーンシート上にスクリーン印刷し、該セラミックグリーンシート上に導電層を形成した。   Next, an organic solvent such as a polyvinyl butyral binder and ethanol was added to the ceramic raw material, and the mixture was wet mixed with a ball mill for a predetermined time to prepare a ceramic slurry. This ceramic slurry was formed into a sheet by a doctor blade method to produce a rectangular ceramic green sheet having a thickness of 2.5 μm. An internal electrode conductive paste containing Ni as a main component was prepared, and the internal electrode conductive paste was screen-printed on the ceramic green sheet to form a conductive layer on the ceramic green sheet.

次に、導電層が形成されたセラミックグリーンシートを導電層の引き出されている側が互い違いとなるように複数枚積層し、積層体を得た。この積層体を窒素雰囲気中、300℃の温度で加熱してバインダを燃焼させた後、酸素分圧10-9〜10-12MPaのH−N−HOガスからなる還元性雰囲気中、1200〜1300℃で2時間焼成し、セラミック焼結体を得た。 Next, a plurality of ceramic green sheets on which conductive layers were formed were stacked so that the sides from which the conductive layers were drawn were staggered to obtain a stacked body. After heating this laminated body at a temperature of 300 ° C. in a nitrogen atmosphere to burn the binder, a reducing atmosphere composed of H 2 —N 2 —H 2 O gas having an oxygen partial pressure of 10 −9 to 10 −12 MPa. Inside, it baked at 1200-1300 degreeC for 2 hours, and obtained the ceramic sintered compact.

次に、B−LiO−SiO−BaOガラスフリットを含有したCuを主成分とする外部電極用導電性ペーストを用意した。そして、この外部電極用導電性ペーストをセラミック焼結体の両端面に塗布し、窒素雰囲気下、800℃の温度で焼き付けて外部電極を形成し、これにより試料番号1〜7の積層セラミックコンデンサを得た。 Next, a conductive paste for external electrodes containing Cu as a main component and containing B 2 O 3 —Li 2 O—SiO 2 —BaO glass frit was prepared. And this electroconductive paste for external electrodes is apply | coated to the both end surfaces of a ceramic sintered compact, and it bakes at the temperature of 800 degreeC in nitrogen atmosphere, and forms an external electrode, Thereby, the multilayer ceramic capacitor of the sample numbers 1-7 is obtained. Obtained.

尚、このようにして得られた積層セラミックコンデンサは、外形寸法が長さ:2.0mm、幅:1.2mm、厚さ:1.0mmであり、内部電極間に介在する誘電体セラミック層の厚みは2μmであった。また、有効誘電体層の総数は100であり、一層当たりの対向電極面積は1.8mmであった。 The multilayer ceramic capacitor thus obtained has outer dimensions of length: 2.0 mm, width: 1.2 mm, thickness: 1.0 mm, and the dielectric ceramic layer interposed between the internal electrodes. The thickness was 2 μm. The total number of effective dielectric layers was 100, and the counter electrode area per layer was 1.8 mm 2 .

〔誘電体セラミックの構造分析〕
走査透過電子顕微鏡(scanning transmission electron microscopy;以下、「STEM」という。)とエネルギー分散型X線装置(energy dispersive x-ray spectroscopy;以下、「EDX」という。)を使用したSTEM−EDX法で元素分析を行い、結晶粒子の組成を同定した。
[Structural analysis of dielectric ceramics]
Element by STEM-EDX method using scanning transmission electron microscopy (hereinafter referred to as “STEM”) and energy dispersive x-ray spectroscopy (hereinafter referred to as “EDX”). Analysis was performed to identify the composition of the crystal particles.

具体的には、結晶粒子の外周から内方約15nmの周縁において、均等に10箇所サンプリングし、組成がBTを主成分とするかBCTを主成分とするかを同定した。すなわち、各サンプリング点において、CaとTiとのモル比Ca/Tiを測定し、モル比Ca/Tiが1%以上の場合をBCTとし、モル比Ca/Tiが1%未満の場合をBTとし、BTであると同定された箇所が7箇所以上存在した場合を本発明範囲内の結晶粒子とした。   Specifically, 10 points were sampled evenly at the periphery of about 15 nm inward from the outer periphery of the crystal grain, and it was identified whether the composition was mainly composed of BT or BCT. That is, at each sampling point, the molar ratio Ca / Ti between Ca and Ti is measured, and when the molar ratio Ca / Ti is 1% or more, BCT, and when the molar ratio Ca / Ti is less than 1%, BT. The case where seven or more locations identified as BT existed was regarded as crystal particles within the scope of the present invention.

このようにして10個の結晶粒子の構造分析を行い、本発明の範囲内にある結晶粒子の個数割合を調べた。   Thus, the structural analysis of 10 crystal grains was performed, and the number ratio of crystal grains within the scope of the present invention was examined.

〔特性評価〕
試料番号1〜7の各試料について、比誘電率εr、AC電界特性、及び信頼性を評価した。
(Characteristic evaluation)
For each of the sample numbers 1 to 7, the relative dielectric constant εr, AC electric field characteristics, and reliability were evaluated.

すなわち、自動ブリッジ式測定器を使用し、周波数1kHz、実効電圧1.0Vrms、温度25℃の条件で静電容量Cを測定し、試料寸法と静電容量Cから比誘電率εrを算出した。   That is, using an automatic bridge type measuring device, the capacitance C was measured under the conditions of a frequency of 1 kHz, an effective voltage of 1.0 Vrms, and a temperature of 25 ° C., and a relative dielectric constant εr was calculated from the sample dimensions and the capacitance C.

AC電界特性については、実効電圧1.0Vrmsの静電容量を基準とし、実効電圧を0.1Vrmsとしたときの静電容量の電圧変化率ΔC0.1/C1.0を求め、該電圧変化率ΔC0.1/C1.0が±20%以内を良品として評価した。 For AC electric field characteristics, the capacitance of the effective voltage 1.0Vrms as a reference, determine the voltage change rate [Delta] C 0.1 / C 1.0 in capacitance when the effective voltage was 0.1 Vrms, the voltage change rate [Delta] C 0.1 / C 1.0 within ± 20% was evaluated as a non-defective product.

信頼性については、高温負荷試験を行い、高温負荷寿命により評価した。すなわち、各試料10個について、温度150℃の高温下、16Vの直流電圧(電界換算で8kV/mm)を印加した。そして、絶縁抵抗の経時変化を測定し、絶縁抵抗が200kΩに低下した時点を故障が発生したと判断し、各試料についての平均値を平均故障時間として信頼性を評価した。   Reliability was evaluated by a high temperature load test and a high temperature load life. That is, a DC voltage of 16 V (8 kV / mm in terms of electric field) was applied to 10 samples at a high temperature of 150 ° C. And the time-dependent change of the insulation resistance was measured, it was judged that the failure occurred when the insulation resistance decreased to 200 kΩ, and the reliability was evaluated using the average value for each sample as the average failure time.

表1は試料番号1〜7の誘電体セラミックの構造、及び測定結果を示している。尚、表1中、L1はBTを主成分とする第1の領域の結晶粒界への露出部分の周縁長、L2はBCTを主成分とする第2の領域の同じ結晶粒界への露出部分の周縁長である。   Table 1 shows the structures of the dielectric ceramics of sample numbers 1 to 7 and the measurement results. In Table 1, L1 is the peripheral length of the exposed portion of the first region containing BT as a main component to the crystal grain boundary, and L2 is the exposure of the second region containing BCT as the main component to the same crystal grain boundary. The peripheral length of the part.

Figure 2009249257
Figure 2009249257

試料番号1は、誘電体セラミックの結晶粒子が、BTの均一構造からなるため、静電容量の電圧変化率ΔC0.1/C1.0は−17%であり、AC電界特性は良好であるが、平均故障時間が5時間と短く、信頼性に劣ることが分かった。 In Sample No. 1, since the dielectric ceramic crystal particles have a uniform structure of BT, the capacitance voltage change rate ΔC 0.1 / C 1.0 is −17% and the AC electric field characteristics are good, but the average It was found that the failure time was as short as 5 hours and the reliability was poor.

試料番号2は、誘電体セラミックの結晶粒子が、BCTの均一構造からなるため、平均故障時間は40時間であり、信頼性は良好であるが、静電容量の電圧変化率ΔC0.1/C1.0は−42%であり、AC電界特性に劣ることが分かった。 In Sample No. 2, the dielectric ceramic crystal particles have a BCT uniform structure, so the average failure time is 40 hours and the reliability is good, but the capacitance voltage change rate ΔC 0.1 / C 1.0 It was found to be inferior to the AC electric field characteristics.

また、試料番号7は、静電容量の電圧変化率ΔC0.1/C1.0は−18%であり、AC電界特性は良好であるが、平均故障時間が10時間と短く、信頼性に劣ることが分かった。これは、BTとBCTが結晶粒子内で共存するものの、L1>L2が成立する結晶粒子が、全結晶粒子の50%しかなく、したがってBCTがBTで囲まれている結晶粒子の割合が少なく、このため十分な信頼性が得られなかったものと思われる。 Sample No. 7 has a capacitance voltage change rate ΔC 0.1 / C 1.0 of −18%, and the AC electric field characteristics are good, but the average failure time is as short as 10 hours, which may be inferior in reliability. I understood. This is because although BT and BCT coexist in the crystal grains, there are only 50% of the crystal grains in which L1> L2 is established, and therefore the percentage of crystal grains in which BCT is surrounded by BT is small, For this reason, it seems that sufficient reliability was not obtained.

これに対し試料番号3〜6は、L1>L2である結晶粒子が70〜100%であり、結晶粒子の表面露出部分がBTで十分に覆われた結晶構造となっているため、静電容量の電圧変化率ΔC0.1/C1.0は−13〜−19%、平均故障時間は30〜45時間となり、1600〜1800の高比誘電率を維持しつつ、AC電界特性と信頼性の両立を図れることが分かった。 In contrast, Sample Nos. 3 to 6 have a crystal structure in which the crystal particles satisfying L1> L2 are 70 to 100% and the surface exposed portions of the crystal particles are sufficiently covered with BT. Voltage change rate ΔC 0.1 / C 1.0 of −13 to −19%, average failure time is 30 to 45 hours, and it is possible to achieve both AC electric field characteristics and reliability while maintaining a high relative dielectric constant of 1600 to 1800. I understood that.

尚、試料番号3〜6については、温度25℃を基準とし、−55℃〜+85℃の範囲で静電容量の変化率を測定したところ、いずれも±15%以内に抑制できた。すなわち、EIA規格のX5R特性を満足することが確認された。   In addition, about the sample numbers 3-6, when the change rate of the electrostatic capacitance was measured in the range of -55 degreeC-+85 degreeC on the basis of the temperature of 25 degreeC, all were suppressed within +/- 15%. That is, it was confirmed that the X5R characteristic of the EIA standard was satisfied.

〔実施例1〕の試料番号3の主成分原料粉末に副成分を添加し、特性を評価した。  Subcomponents were added to the main component raw material powder of Sample No. 3 in Example 1, and the characteristics were evaluated.

すなわち、副成分化合物として、SiO、MgO、MnO、V、Sm、Gd、Dy、Er、Ho、Y及びBaZrOの各粉末を用意した。 That is, subcomponent compounds, SiO 2, MgO, MnO, V 2 O 5, Sm 2 O 3, Gd 2 O 3, Dy 2 O 3, Er 2 O 3, Ho 2 O 3, Y 2 O 3 and BaZrO 3 powders were prepared.

そして、上記副成分化合物が、試料番号3の主成分原料粉末100モル部に対し、表2に示すモル部となるように、これら副成分化合物を秤量した。そして、前記主成分原料粉末及び副成分化合物をPSZボールや純水と共にボールミルに投入して混合した。次いで、これを乾燥させ、セラミック原料を得た。   Then, these subcomponent compounds were weighed so that the subcomponent compounds were in the mol parts shown in Table 2 with respect to 100 mol parts of the main component raw material powder of sample number 3. Then, the main component raw material powder and the auxiliary component compound were put into a ball mill together with PSZ balls and pure water and mixed. Next, this was dried to obtain a ceramic raw material.

その後は、上記〔実施例1〕と同様の方法・手順により、試料番号11〜23の積層セラミックコンデンサを得た。   Thereafter, multilayer ceramic capacitors of sample numbers 11 to 23 were obtained by the same method and procedure as in [Example 1].

次に、〔実施例1〕と同様の方法・手順で、比誘電率εr、静電容量の電圧変化率ΔC0.1/C1.0、平均故障時間を測定した。 Next, the dielectric constant εr, the capacitance voltage change rate ΔC 0.1 / C 1.0 , and the average failure time were measured in the same manner and procedure as in Example 1.

また、+25℃の静電容量を基準とし、−55℃〜+125℃の範囲で静電容量の温度変化率を測定した。   Moreover, the temperature change rate of the capacitance was measured in the range of −55 ° C. to + 125 ° C. with reference to the capacitance of + 25 ° C.

温度変化率が−55℃〜+85℃の範囲で±15%以内であればEIA規格のX5R特性を満足し、温度変化率が−55℃〜+105℃の範囲で±15%以内であればEIA規格のX6R特性を満足し、温度変化率が−55℃〜+125℃の範囲で±15%以内であればEIA規格のX7R特性を満足する。そして、これらを指標に温度特性を評価した。   If the temperature change rate is within ± 15% in the range of −55 ° C. to + 85 ° C., the X5R characteristic of the EIA standard is satisfied, and if the temperature change rate is within ± 15% in the range of −55 ° C. to + 105 ° C., EIA The standard X6R characteristic is satisfied, and if the temperature change rate is within ± 15% within the range of −55 ° C. to + 125 ° C., the X7R characteristic of the EIA standard is satisfied. Then, temperature characteristics were evaluated using these as indices.

表2は、主成分原料粉末100モル部に対する試料番号11〜23の各副成分元素のモル部、及びその測定結果を示している。   Table 2 shows the mole parts of the subcomponent elements of Sample Nos. 11 to 23 with respect to 100 mole parts of the main component raw material powder and the measurement results.

Figure 2009249257
Figure 2009249257

表2から明らかなように、副成分元素を主成分原料粉末に添加することにより、実施例1と同等以上のAC電界特性及び信頼性を得ることのできることが分かった。また、温度特性もX5R特性以上を確保できることも分かった。   As is apparent from Table 2, it was found that the AC electric field characteristics and reliability equal to or higher than those of Example 1 can be obtained by adding the subcomponent element to the main component raw material powder. It was also found that the temperature characteristics can be secured more than the X5R characteristics.

特に、Sm、Gd、Dy、Er、Ho、Y等の希土類元素やZrを添加した試料番号15〜23は、比誘電率をより一層向上させることができ、さらに平均故障時間が100時間以上となり、信頼性の大幅な向上を図ることができることが分かった。   In particular, sample numbers 15 to 23 to which rare earth elements such as Sm, Gd, Dy, Er, Ho, and Y and Zr are added can further improve the relative permittivity, and the average failure time is 100 hours or more. It was found that the reliability can be improved significantly.

本発明に係る誘電体セラミックの一実施の形態の要部を模式的に示した断面図である。It is sectional drawing which showed typically the principal part of one Embodiment of the dielectric ceramic which concerns on this invention. 第1の領域3の結晶粒界への露出部分の周縁長L1と第2の領域4の結晶粒界への露出部分の周縁長L2との関係を示す図である。FIG. 4 is a diagram showing the relationship between the peripheral length L1 of the exposed portion of the first region 3 to the crystal grain boundary and the peripheral length L2 of the exposed portion of the second region 4 to the crystal grain boundary. 本発明に係る誘電体セラミックの他の実施の形態の要部を模式的に示した断面図である。It is sectional drawing which showed typically the principal part of other embodiment of the dielectric ceramic which concerns on this invention. 本発明の誘電体セラミックを使用して製造された積層セラミックコンデンサの一実施の形態を示す断面図である。It is sectional drawing which shows one Embodiment of the laminated ceramic capacitor manufactured using the dielectric ceramic of this invention.

符号の説明Explanation of symbols

1 結晶粒子
2 結晶粒界
3 第1の領域
4 第2の領域
5 セラミック焼結体
6a〜6f 内部電極
7a、7b 外部電極
10a〜10g 誘電体層
DESCRIPTION OF SYMBOLS 1 Crystal grain 2 Crystal grain boundary 3 1st area | region 4 2nd area | region 5 Ceramic sintered compact 6a-6f Internal electrode 7a, 7b External electrode 10a-10g Dielectric layer

Claims (5)

結晶粒子と結晶粒界とを備えた誘電体セラミックであって、
任意の断面を観察したとき、70%以上の結晶粒子が、BaTiOを主成分とする第1の領域と、(Ba,Ca)TiOを主成分とする第2の領域とを有し、
かつ、前記第1の領域の結晶粒界への露出部分の周縁長が、前記第2の領域の結晶粒界への露出部分の周縁長よりも長いことを特徴とする誘電体セラミック。
A dielectric ceramic having crystal grains and crystal grain boundaries,
When an arbitrary cross section is observed, 70% or more of crystal grains have a first region mainly composed of BaTiO 3 and a second region mainly composed of (Ba, Ca) TiO 3 ,
The dielectric ceramic according to claim 1, wherein a peripheral length of a portion exposed to the crystal grain boundary of the first region is longer than a peripheral length of a portion exposed to the crystal grain boundary of the second region.
前記第2の領域が、前記第1の領域で取り囲まれていることを特徴とする請求項1記載の誘電体セラミック。   The dielectric ceramic according to claim 1, wherein the second region is surrounded by the first region. Si、Mg、Mn、及びVの群から選択された少なくとも1種の元素が含まれていることを特徴とする請求項1又は請求項2記載の誘電体セラミック。   3. The dielectric ceramic according to claim 1, wherein at least one element selected from the group consisting of Si, Mg, Mn, and V is contained. Sm、Gd、Dy、Er、Ho、Y、及びZrの群から選択された少なくとも1種の元素が含まれていることを特徴とする請求項1乃至請求項3のいずれかに記載の誘電体セラミック。   4. The dielectric according to claim 1, comprising at least one element selected from the group consisting of Sm, Gd, Dy, Er, Ho, Y, and Zr. 5. ceramic. 誘電体層と内部電極が交互に積層されてなるセラミック焼結体を有すると共に、該セラミック焼結体の両端部に外部電極が形成され、該外部電極と前記内部電極とが電気的に接続された積層セラミックコンデンサにおいて、
前記誘電体層が、請求項1乃至請求項4のいずれかに記載の誘電体セラミックで形成されていることを特徴とする積層セラミックコンデンサ。
The ceramic sintered body is formed by alternately laminating dielectric layers and internal electrodes, external electrodes are formed at both ends of the ceramic sintered body, and the external electrodes and the internal electrodes are electrically connected. In multilayer ceramic capacitors
A multilayer ceramic capacitor, wherein the dielectric layer is formed of the dielectric ceramic according to any one of claims 1 to 4.
JP2008101475A 2008-04-09 2008-04-09 Dielectric ceramic and multilayer ceramic capacitor Active JP5229685B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008101475A JP5229685B2 (en) 2008-04-09 2008-04-09 Dielectric ceramic and multilayer ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008101475A JP5229685B2 (en) 2008-04-09 2008-04-09 Dielectric ceramic and multilayer ceramic capacitor

Publications (2)

Publication Number Publication Date
JP2009249257A true JP2009249257A (en) 2009-10-29
JP5229685B2 JP5229685B2 (en) 2013-07-03

Family

ID=41310296

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008101475A Active JP5229685B2 (en) 2008-04-09 2008-04-09 Dielectric ceramic and multilayer ceramic capacitor

Country Status (1)

Country Link
JP (1) JP5229685B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010232258A (en) * 2009-03-26 2010-10-14 Kyocera Corp Laminated ceramic capacitor
JP2011105571A (en) * 2009-11-20 2011-06-02 Murata Mfg Co Ltd Dielectric ceramic and laminated ceramic capacitor
JP2014222656A (en) * 2010-04-28 2014-11-27 株式会社村田製作所 Dielectric material and thin-film capacitor using the same
US20150187498A1 (en) * 2013-12-27 2015-07-02 Murata Manufacturing Co., Ltd. Multilayer ceramic capacitor
US20150187497A1 (en) * 2013-12-27 2015-07-02 Murata Manufacturing Co., Ltd. Monolithic ceramic capacitor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002274935A (en) * 2001-03-16 2002-09-25 Kyocera Corp Dielectric ceramic and laminated electronic part
JP2007201277A (en) * 2006-01-27 2007-08-09 Kyocera Corp Laminated ceramic capacitor
JP2009238885A (en) * 2008-03-26 2009-10-15 Kyocera Corp Laminated ceramic capacitor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002274935A (en) * 2001-03-16 2002-09-25 Kyocera Corp Dielectric ceramic and laminated electronic part
JP2007201277A (en) * 2006-01-27 2007-08-09 Kyocera Corp Laminated ceramic capacitor
JP2009238885A (en) * 2008-03-26 2009-10-15 Kyocera Corp Laminated ceramic capacitor

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010232258A (en) * 2009-03-26 2010-10-14 Kyocera Corp Laminated ceramic capacitor
JP2011105571A (en) * 2009-11-20 2011-06-02 Murata Mfg Co Ltd Dielectric ceramic and laminated ceramic capacitor
US8264817B2 (en) 2009-11-20 2012-09-11 Murata Manufacturing Co., Ltd. Dielectric ceramic and laminated ceramic capacitor
JP2014222656A (en) * 2010-04-28 2014-11-27 株式会社村田製作所 Dielectric material and thin-film capacitor using the same
US20150187498A1 (en) * 2013-12-27 2015-07-02 Murata Manufacturing Co., Ltd. Multilayer ceramic capacitor
US20150187497A1 (en) * 2013-12-27 2015-07-02 Murata Manufacturing Co., Ltd. Monolithic ceramic capacitor
US9263190B2 (en) * 2013-12-27 2016-02-16 Murata Manufacturing Co., Ltd. Multilayer ceramic capacitor having high moisture resistance
US9390855B2 (en) * 2013-12-27 2016-07-12 Murata Manufacturing Co., Ltd. Monolithic ceramic capacitor containing perovskite compound

Also Published As

Publication number Publication date
JP5229685B2 (en) 2013-07-03

Similar Documents

Publication Publication Date Title
JP4626892B2 (en) Dielectric ceramic and multilayer ceramic capacitor
JP4805938B2 (en) Dielectric porcelain, manufacturing method thereof, and multilayer ceramic capacitor
JP4110978B2 (en) Dielectric ceramic, manufacturing method thereof, and multilayer ceramic capacitor
KR101000771B1 (en) Multilayer ceramic capacitor
JP4821357B2 (en) Electronic component, dielectric ceramic composition and method for producing the same
KR101494851B1 (en) Laminated ceramic capacitor and method for producing laminated ceramic capacitor
JP2004262717A (en) Dielectric ceramic, method of manufacturing the same and laminated ceramic capacitance
JP5343974B2 (en) Dielectric ceramic composition and multilayer ceramic capacitor
JPH11273985A (en) Dielectric ceramic and its manufacture, and laminated ceramic electronic part and its manufacture
JP2007258661A (en) Laminated ceramic capacitor and its manufacturing method
JP2006206362A (en) Dielectric ceramic and multilayer ceramic capacitor
JP4697582B2 (en) Dielectric ceramic, dielectric ceramic manufacturing method, and multilayer ceramic capacitor
JP2004214539A (en) Dielectric ceramic and laminated ceramic capacitor
JP5240199B2 (en) Dielectric ceramic and multilayer ceramic capacitor
JP4552419B2 (en) Dielectric ceramic and multilayer ceramic capacitors
JP5251913B2 (en) Dielectric ceramic composition and multilayer ceramic capacitor
JP5229685B2 (en) Dielectric ceramic and multilayer ceramic capacitor
JP3603607B2 (en) Dielectric ceramic, multilayer ceramic capacitor and method of manufacturing multilayer ceramic capacitor
JP4548118B2 (en) DIELECTRIC CERAMIC COMPOSITION, ELECTRONIC COMPONENT AND METHOD FOR PRODUCING THEM
JP4997685B2 (en) Dielectric ceramic composition and multilayer ceramic capacitor
JP2010208905A (en) Method for manufacturing dielectric ceramic, dielectric ceramic, method for manufacturing laminated ceramic capacitor and the laminated ceramic capacitor
JP5164356B2 (en) Multilayer ceramic capacitor and manufacturing method thereof
JP2016169129A (en) Dielectric ceramic composition and ceramic electronic component
JP4511323B2 (en) Multilayer ceramic capacitor and manufacturing method thereof
JPWO2009098918A1 (en) Dielectric ceramic and multilayer ceramic capacitor

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110317

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120918

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120926

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130225

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160329

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Ref document number: 5229685

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130310