JP2009238834A - Support substrate having nitride-based semiconductor layer, and method of forming same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of forming a support substrate having a nitride-based semiconductor layer that improves flatness of a surface of a semiconductor layer. <P>SOLUTION: The method of forming the support substrate having the nitride semiconductor layer includes the stages of: forming a groove portion 21 on a principal surface of an n-type GaN substrate 11; forming a light emitting element layer 12 having a principal surface comprising a (11-20) plane and a crystal growth surface 12a comprising a (000-1) plane including an inner surface 21a of the groove portion 21 as a starting point; and bonding the support substrate 32 to the light emitting element layer 12. The groove portion 21 extends substantially in parallel to the principal plane (11-20) of the n-type GaN substrate 11 and the (000-1) plane of the light emitting element layer 12. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a support substrate having a nitride-based semiconductor layer and a method for forming the same.

  Conventionally, a light emitting element made of a nitride material such as gallium nitride (GaN) has been put into practical use as a 405 nm blue-violet semiconductor laser (LD) as a recording / reproducing light source used in a DVD system or the like. In addition, semiconductor laser elements that oscillate in blue or green using nitride-based materials have been developed. In recent years, a light-emitting element formed on a polar surface ((0001) surface) of a GaN substrate takes into account that the light emission efficiency is lowered due to the influence of a large piezoelectric field, so that the non-polar surface (m-plane ( A semiconductor laser device has been proposed in which a light emitting device layer is formed by crystal growth on a 1-100) plane or an a-plane (11-20) plane (see, for example, Patent Document 1 and Non-Patent Document 2).

Japanese Patent Laid-Open No. 8-213692 Japan Journal of Applied Physics Vol. 46, no. 9, 2007, pp. L187-L189

  In the semiconductor laser devices disclosed in Patent Document 1 and Non-Patent Document 2, the crystal growth is performed because the light emitting element layer (semiconductor layer) is formed by crystal growth on the flat main surface of the GaN substrate in the manufacturing process. In the process, a certain flatness is secured on the upper surface (main surface) of the light emitting element layer. However, in consideration of the fact that the flatness of the light emitting element layer is more reliably formed, the flatness of the light emitting element layer is surely ensured in the manufacturing process of the semiconductor laser device disclosed in Patent Document 1 and Non-Patent Document 2. It is thought that it is insufficient to obtain. For this reason, in the manufacturing process of the semiconductor laser device disclosed in Patent Document 1 and Non-Patent Document 2, it is difficult to further improve the flatness of the surface of the semiconductor layer.

  The present invention has been made to solve the above-described problems, and one object of the present invention is to have a nitride-based semiconductor layer capable of further improving the flatness of the surface of the semiconductor layer. It is to provide a method for forming a support substrate.

Means for Solving the Problems and Effects of the Invention

  In order to achieve the above object, a method for forming a support substrate having a nitride-based semiconductor layer according to the first aspect of the present invention includes a step of forming a recess in a main surface of a growth substrate, and a main surface of the growth substrate. In addition, a main surface consisting of {A + B, A, -2A-B, L} plane (an integer in which at least one of A and B is not 0) and one inner side surface of the recess are used as starting points (000-1 ) Plane or a side plane consisting of {A + B, A, −2A−B, 2A + B} plane (where A ≧ 0 and B ≧ 0, and at least one of A and B is not 0). And a step of bonding a support substrate to the nitride-based semiconductor layer, wherein the recess has a main surface of the growth substrate and a (0001) plane of the nitride-based semiconductor layer. Extending in a direction substantially parallel to the.

  In the method for forming a support substrate having a nitride-based semiconductor layer according to the first aspect of the present invention, as described above, the step of forming a recess in the main surface of the growth substrate, and the main surface of the growth substrate include { (000-1) plane starting from the main surface consisting of A + B, A, -2A-B, L} plane and one inner side surface of the recess, or {A + B, A, -2A-B, 2A + B} plane And forming a nitride-based semiconductor layer including a side surface comprising the upper surface (main surface) of the growth layer (the nitride-based semiconductor layer) when the nitride-based semiconductor layer is crystal-grown on the substrate. (A + B, A, −2A−B, L} plane) grows faster than the (000-1) plane starting from one inner surface of the recess, or {A + B, A, −2A−B, Since the growth rate at which the side surface of 2A + B} surface is formed is slow, the upper surface (main surface) of the growth layer is flat. To grow while maintaining the gender. Thereby, the flatness of the surface of the semiconductor layer is compared with the growth layer surface of the nitride-based semiconductor layer when the (000-1) plane or the {A + B, A, -2A-B, 2A + B} plane is not formed. It can be improved further. The reason for this is considered as follows.

  Surfaces with a slow growth rate such as the (000-1) plane and the {A + B, A, -2A-B, 2A + B} plane have a small surface energy, while examples of a surface with a high growth rate include (1-100) Surfaces are considered to have a large surface energy. Since the surface during crystal growth is more stable when the surface energy is small, the surface energy is smaller than that of the (1-100) plane when performing crystal growth with only the (1-100) plane as the growth plane. Surfaces other than the (1-100) surface are likely to appear. As a result, the flatness of the growth surface (main surface) tends to be impaired. On the other hand, in the present invention, for example, the (000-1) plane or {A + B, A, -2A-B, 2A + B} plane having a smaller surface energy than the (1-100) plane grown as the main surface is formed. Since the plane ((1-100) plane) is grown, the surface energy of the growth plane (main surface) can be reduced compared to the case where crystal growth is performed using only the (1-100) plane as the growth plane. it can. This is thought to improve the flatness of the growth surface.

  Moreover, by providing a step of forming a nitride-based semiconductor layer including a side surface composed of a (000-1) plane or a {A + B, A, -2A-B, 2A + B} plane starting from one inner side surface of the recess, Not only the upper surface of the growth layer but also the side surface portion can be formed as a flat side surface composed of (000-1) plane or {A + B, A, -2A-B, 2A + B} plane. Therefore, if the method for forming a support substrate having a nitride semiconductor layer according to the present invention is applied to a method for forming a semiconductor laser device, the (000-1) plane or {A + B, A, -2A is used without using a cleavage step. A nitride-based semiconductor layer (light emitting layer) having a resonator end face made of a -B, 2A + B} plane can be easily formed.

  The method for forming a support substrate having a nitride semiconductor layer according to the first aspect preferably further includes a step of removing the growth substrate after the step of bonding the support substrate to the nitride semiconductor layer. If comprised in this way, by performing surface treatment etc. to the growth substrate after a removal, this growth substrate can be utilized again as a growth substrate at the time of formation of a nitride type semiconductor layer.

  In the method for forming a support substrate having a nitride semiconductor layer according to the first aspect, the growth substrate is preferably made of a nitride semiconductor. If comprised in this way, the (000-1) plane or {A + B, A, -2A-B, 2A + B} will be utilized using the crystal growth of a nitride-type semiconductor layer on the growth substrate which consists of a nitride-type semiconductor. It is possible to easily form a nitride-based semiconductor layer having side surfaces.

  In the method for forming a support substrate having a nitride-based semiconductor layer according to the first aspect, preferably, the main surface of the growth substrate is either the (1-100) plane or the (11-20) plane. In this case, the present invention is directed to a laser element layer (light emission) comprising a nitride-based semiconductor layer on a growth substrate whose main surface is an m-plane ((1-100) plane) or a-plane ((11-20) plane). If it is applied in the case of forming a layer), the light emission efficiency can be improved by suppressing the influence of the piezoelectric field generated in the light emitting layer. Further, when the gain of the semiconductor laser is improved by forming a waveguide along the [0001] direction of the nitride-based semiconductor layer, a pair of resonator end faces ((0001) extending in a direction perpendicular to the [0001] direction. ) Plane and (000-1) plane combination) can be easily formed by utilizing the crystal growth of the nitride-based semiconductor layer.

  In the method for forming a support substrate having a nitride-based semiconductor layer according to the first aspect, the inner surface preferably includes a (000-1) plane, and the step of forming the nitride-based semiconductor layer includes (000-1) ) Including a step of forming a nitride-based semiconductor layer having a side surface made of the (000-1) surface in a region corresponding to the inner side surface made of the surface. If comprised in this way, when forming the nitride-type semiconductor layer which has a side surface which consists of a (000-1) plane on the main surface of a growth substrate, the inner side surface of the recessed part which consists of a (000-1) plane Since the (000-1) end face of the semiconductor layer is formed so as to succeed, the side face made of the (000-1) face can be easily formed on the growth substrate.

  In the method for forming a support substrate having a nitride-based semiconductor layer according to the first aspect, the growth substrate preferably includes a base substrate and a base layer formed on the base substrate. If comprised in this way, the nitride type | system | group which has the side surface which consists of a (000-1) surface or {A + B, A, -2A-B, 2A + B} surface using the inner surface of the recessed part formed in the base layer. A semiconductor layer can be formed easily.

In the method for forming a support substrate having a nitride-based semiconductor layer according to the first aspect, preferably, the underlayer includes AlGaN, and the lattice constants of the undersubstrate and the underlayer are c ₁ and c ₂ , respectively. , C ₁ > c ₂ . With this configuration, when forming the base layer made of AlGaN on the base substrate, the lattice constant c ₂ of the base layer is smaller than the lattice constant c _{1 of the} base substrate (c ₁ > c ₂ ). tensile stress is caused inside the underlayer in response to the lattice constant c ₁ on the substrate side. As a result, when the thickness of the underlayer is equal to or greater than the predetermined thickness, cracks are formed along the (000-1) plane in the underlayer without enduring this tensile stress. Thereby, the side surface (inner side surface of the recess) serving as a reference for forming the (000-1) plane or {A + B, A, -2A-B, 2A + B} plane of the nitride-based semiconductor layer on the base layer, It can be easily formed on the base layer.

  In the method of forming a support substrate having a nitride-based semiconductor layer according to the first aspect, preferably, the step of forming a recess in the main surface of the growth substrate includes the main surface of the growth substrate and the base layer in the base layer. Forming a crack extending in a direction substantially parallel to the (0001) plane. If comprised in this way, it will consist of (000-1) surface or {A + B, A, -2A-B, 2A + B} surface on the basis of the single side | surface (one inner side surface of a crack) of the crack formed in the base layer. A nitride-based semiconductor layer having side surfaces can be easily formed.

  A support substrate having a nitride-based semiconductor layer according to the second aspect of the present invention is mainly composed of {A + B, A, −2A−B, L} planes (an integer in which at least one of A and B is not 0). (000-1) plane starting from the surface and one inner side surface of the recess formed in the growth substrate, or {A + B, A, -2A-B, 2A + B} plane (where A ≧ 0 and B And a nitride-based semiconductor layer including a side surface formed of a side surface formed of at least one of A and B that is not an integer of 0 and a support substrate bonded to the nitride-based semiconductor layer.

  In the support substrate having the nitride-based semiconductor layer according to the second aspect of the present invention, as described above, the support substrate was formed on the main surface composed of the {A + B, A, -2A-B, L} plane and the growth substrate. By providing a nitride-based semiconductor layer including a (000-1) plane starting from one inner side surface of the recess, or a side surface comprising a {A + B, A, -2A-B, 2A + B} plane, a nitride More than the growth rate at which the upper surface (main surface) of the growth layer (the {A + B, A, -2A-B, L} plane of the nitride-based semiconductor layer) grows when the semiconductor layer grows on the substrate. Since the growth rate at which the (000-1) plane starting from one inner side surface of the recess or the side surface comprising the {A + B, A, -2A-B, 2A + B} plane is formed is low, the upper surface (main surface of the growth layer) ) Grows while maintaining flatness. Therefore, if the support substrate having the nitride-based semiconductor layer of the present invention is applied to a semiconductor laser device, the nitride in the case where the (000-1) plane or the {A + B, A, -2A-B, 2A + B} plane is not formed. A semiconductor laser device can be formed in which the flatness of the surface of the semiconductor layer is further improved as compared with the surface of the growth layer of the system semiconductor layer. The nitride-based semiconductor layer has a (000-1) plane starting from one inner side surface of the recess formed in the growth substrate or a side surface composed of a {A + B, A, -2A-B, 2A + B} plane. By including, not only the upper surface of the growth layer but also the side surface portion can be formed as a flat side surface composed of the (000-1) plane or the {A + B, A, -2A-B, 2A + B} plane.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a cross-sectional view for explaining a schematic configuration of a semiconductor element formed by using the method for forming a support substrate having a nitride-based semiconductor layer according to the present invention. Before describing a specific embodiment of the present invention with reference to FIG. 1, a schematic configuration of a semiconductor element formed by using a method for forming a support substrate having a nitride-based semiconductor layer according to the present invention will be described. The LED chip 10 will be described as an example.

  As shown in FIG. 1, the nitride-based semiconductor layer 9 a is bonded to the support substrate 6. The nitride-based semiconductor layer 9a is formed with a side surface 10a and a side surface 10b inclined with respect to the main surface of the nitride-based semiconductor layer 9a. Here, one of the side surface 10a or the side surface 10b is composed of (000-1) planes. Further, the other of the side surface 10a or the side surface 10b is a {A + B, A, −2A−B, 2A + B} plane (where A ≧ 0 and B ≧ 0, and at least one of A and B is 0) Preferably an integer).

  Further, as the support substrate 6, a conductive substrate may be used, or an insulating substrate may be used. As the substrate having conductivity, for example, a metal plate such as Cu-W, Al and Fe-Ni, a semiconductor substrate such as single crystal Si, SiC, GaAs and ZnO, or a polycrystalline AlN substrate is used. May be. Further, a conductive resin film in which conductive fine particles such as metal are dispersed, a composite material of a metal and a metal oxide, or the like, or carbon composed of a graphite particle sintered body impregnated with a metal may be used. Alternatively, a metal composite material may be used. When a conductive substrate is used, an electrode may be formed on the surface (upper surface) opposite to the side where the semiconductor layer is bonded. Further, a semiconductor substrate may be used as the support substrate 6.

  The second electrode 5 may be formed on the nitride-based semiconductor layer 9a on the support substrate 6 side. Moreover, it is preferable that there is a bonding layer between the support substrate 6 and the nitride-based semiconductor layer 9a. As the bonding layer, a layer made of a material such as solder or conductive paste can be used. As the solder, solder made of AuSn, InSn, SnAgCu, SnAgBi, SnAgCuBi, SnAgBiIn, SnZn, SnCu, SnBi, SnZnBi, or the like can be used.

  Here, when the semiconductor element is a light emitting element, generally, in the nitride-based semiconductor layer 9 a, the light emitting layer 2 is formed on the first semiconductor layer 1. A second semiconductor layer 3 is formed on the light emitting layer 2. By forming the double heterostructure by making the band gap of the light emitting layer 2 smaller than the band gap of the first semiconductor layer 1 and the second semiconductor layer 3, it is possible to easily confine carriers in the light emitting layer 2. The luminous efficiency of the LED chip 10 can be improved. Further, by making the light emitting layer 2 have a single quantum well (SQW) or multiple quantum well (MQW) structure, the light emission efficiency can be further improved. In the case of this quantum well structure, since the thickness of the well layer is small, it is possible to suppress deterioration of the crystallinity of the well layer even when the well layer has strain. In addition, even if the well layer has a compressive strain in the in-plane direction of the main surface 2a of the light emitting layer 2 or a tensile strain in the in-plane direction, the deterioration of crystallinity is suppressed. Is done. The light emitting layer 2 may be undoped or doped. The first semiconductor layer 1 is an example of the “growth substrate” and “nitride-based semiconductor layer” of the present invention, and the light-emitting layer 2 and the second semiconductor layer 3 are respectively “nitride-based” of the present invention. It is an example of a “semiconductor layer”.

  In the pn junction type LED chip 10, the first semiconductor layer 1 and the second semiconductor layer 3 have different conductivity. The first semiconductor layer 1 may be p-type and the second semiconductor layer 3 may be n-type, or the first semiconductor layer 1 may be n-type and the second semiconductor layer 3 may be p-type.

  The first semiconductor layer 1 and the second semiconductor layer 3 may include a cladding layer (not shown) having a band gap larger than that of the light emitting layer 2. The first semiconductor layer 1 and the second semiconductor layer 3 may each include a clad layer and a contact layer (not shown) in order from the light emitting layer 2 side. In this case, the contact layer preferably has a smaller band gap than the cladding layer.

  The first semiconductor layer 1, the light emitting layer 2, and the second semiconductor layer 3 are formed of a nitride semiconductor layer having a Wurtz structure made of AlN, InN, BN, TlN, and mixed crystals thereof. For example, as the light emitting layer 2 of the quantum well, GaInN can be used as the well layer, and AlGaN, GaN, and GaInN having a larger band gap than the well layer can be used as the barrier layer. Moreover, GaN and AlGaN can be used for the cladding layer and the contact layer.

  Further, the first electrode 4 may be formed in a partial region on the first semiconductor layer 1. Moreover, it is preferable that the 1st electrode 4 has translucency.

  FIG. 2 shows the range of the normal direction of the main surface of the growth substrate when the semiconductor element is formed using the crystal orientation of the nitride-based semiconductor and the method of forming the support substrate having the nitride-based semiconductor layer in the present invention. FIG. Next, with reference to FIG. 2, the plane orientation of the semiconductor layer and the plane orientation of the growth substrate when a nitride-based semiconductor having a wurtz structure or 2H—SiC is used as the growth substrate will be described. .

  As shown in FIG. 2, the normal direction of the main surface of the semiconductor layer indicated by reference numeral 7a or the surface of the growth substrate 7 is a line connecting the [11-20] direction and the [10-10] direction, respectively. 300 ([C + D, C, −2C−D, 0] direction (C ≧ 0 and D ≧ 0, and at least one of C and D is not 0)) and [11-20 ] Line 400 ([1, 1, -2, -E] direction (0 ≦ E ≦ 5)), and [10-10] direction and substantially [[ 10-1-4] direction line 500 ([1, -1, 0, -F] direction (0≤F≤4)), and substantially [11-2-5] direction and substantially [10- 1-4] direction ([G + H, G, −2G−H, −5G−4H] direction (G ≧ 0 and H ≧ 0, and G and H At least one is in a range (hatched region by hatching) enclosed by an integer)) is not zero.

  Further, when a light-emitting element made of a nitride-based semiconductor layer is formed on a semiconductor layer made of m-plane ((1-100) plane) or a-plane ((11-20) plane) or on the growth substrate 7, light emission Luminous efficiency can be improved by suppressing the influence of the piezoelectric field generated in the layer (active layer). Further, when the gain of the semiconductor laser is improved by forming a waveguide along the [0001] direction of the nitride-based semiconductor layer, a pair of resonator end faces ((0001) extending in a direction perpendicular to the [0001] direction. (000-1) end face side of the (000-1) plane) can be easily formed by utilizing crystal growth of the nitride-based semiconductor layer.

  3-5 is sectional drawing for demonstrating the outline of the formation method of the support substrate which has the nitride type semiconductor layer by this invention. Next, with reference to FIG. 1 and FIGS. 3 to 5, a schematic manufacturing process of the method for forming the support substrate having the nitride-based semiconductor layer according to the present invention will be described while illustrating the manufacturing method of the LED chip 10. To do.

  First, as shown in FIG. 3, after the release layer 8 is formed on the upper surface of the growth substrate 7 in which a plurality of recesses 7a extending in a predetermined direction is formed, the side surface 10a and the side surface 10b are formed. A nitride-based semiconductor layer 9a is formed. At this time, a buffer layer may be formed between the growth substrate 7 and the first semiconductor layer 1.

  More specifically, by setting the main surface of the semiconductor layer or the surface of the growth substrate 7 as the a-plane ((11-20) plane), the side surfaces 10a and (11) composed of the (000-1) plane. −22) a side surface 10b composed of a surface can be formed. Further, by setting the main surface of the semiconductor layer or the surface of the growth substrate 7 to the m plane ((1-100) plane), the side surface 10a consisting of the (000-1) plane and the side plane consisting of the (1-101) plane. 10b can be formed. Further, by setting the main surface of the semiconductor layer or the surface of the growth substrate 7 as the (1-10-4) plane, the side surface 10a composed of the (1-101) plane and the side surface 10b composed of the (000-1) plane Can be formed. Further, by setting the main surface of the semiconductor layer or the surface of the growth substrate 7 as the (11-2-5) plane, the side surface 10a composed of the (11-22) plane and the side surface 10b composed of the (000-1) plane Can be formed. Further, by forming the main surface of the semiconductor layer or the surface of the growth substrate 7 as a (1-10-2) plane, a side surface composed of the (000-1) plane and a side surface composed of the (1-101) plane are formed. can do. Further, by forming the main surface of the semiconductor layer or the surface of the growth substrate 7 as the (11-2-2) plane, a side surface composed of the (000-1) plane and a side surface composed of the (11-22) plane are formed. can do.

  The release layer 8 includes a layer that is easily removed as compared with the semiconductor layers (the first semiconductor layer 1, the light emitting layer 2, and the second semiconductor layer 3) and a layer that is easily separated mechanically. Examples of the layer that is easily removed include, for example, a material having a lower melting point and boiling point than the semiconductor layer, a material that is easily decomposed compared to the semiconductor layer, a material that is easily dissolved compared to the semiconductor layer, and the semiconductor layer. There is a layer made of a material that reacts easily.

Further, when the semiconductor layer is made of a nitride semiconductor having a wurtzite structure, the growth substrate 7 can be a nitride semiconductor substrate or a heterogeneous substrate. The foreign substrate not nitride semiconductor, for example, using alpha-SiC substrate of hexagonal crystal structure and a rhombohedral structure, GaAs substrate, GaP substrate, InP substrate, Si substrate, a sapphire substrate, a spinel substrate and LiAlO ₂ substrate It is possible. In addition, an r-plane ((1-102) plane) sapphire substrate on which a nitride-based semiconductor whose main surface is an a-plane ((11-20) plane), an a-plane or an m-plane ((1-100) It is also possible to use an a-plane SiC substrate, an m-plane SiC substrate, or the like on which a nitride-based semiconductor whose main surface is ()) is previously grown. It is also possible to use a (100) plane substrate such as a LiAlO ₂ or LiGaO ₂ substrate on which a nitride-based semiconductor having an m-plane as a main surface is previously grown. By using a nitride semiconductor substrate, a nitride semiconductor layer having the best crystallinity can be obtained.

  Thereafter, as shown in FIG. 4, the nitride-based semiconductor layer 9 a is bonded to the support substrate 6. Then, as shown in FIG. 5, the nitride-based semiconductor layer 9 a is peeled from the growth substrate 7. At this time, in FIG. 5, laser irradiation is performed from the lower surface side of the growth substrate 7 toward the peeling layer 8 (indicated by a broken line), and the peeling layer 8 is evaporated, whereby the nitride-based semiconductor layer 9 a is grown on the growth substrate 7. The example which peels from is shown. Finally, as shown in FIG. 1, the first electrode 4 is formed on the lower surface of the first semiconductor layer 1. In this manner, a semiconductor element using the method for forming a support substrate having a nitride-based semiconductor layer according to the present invention is formed.

  When the semiconductor element is a light emitting element, the first semiconductor layer 1, the light emitting layer 2, and the second semiconductor layer 3 are sequentially formed as the nitride semiconductor layer 9a. Thereafter, the second electrode 5 is formed on the nitride-based semiconductor layer 9a.

  In the method for forming a support substrate having a nitride-based semiconductor layer according to the present invention, as described above, the step of forming a plurality of recesses 7a on the main surface of the growth substrate 7, and the main surface of the growth substrate 7, The nitride-based semiconductor layer 9a including the (000-1) plane starting from one inner side surface of the recess 7a or the side surface 10a or the side surface 10b composed of the {A + B, A, -2A-B, 2A + B} surface is formed. And the step of performing one of the recesses 7a than the growth rate at which the upper surface (main surface) of the nitride-based semiconductor layer 9a grows when the nitride-based semiconductor layer 9a is crystal-grown on the substrate. Since the growth rate at which the side surface 10a or the side surface 10b composed of the (000-1) plane starting from the side surface or the {A + B, A, -2A-B, 2A + B} plane is formed is low, the top surface of the nitride-based semiconductor layer 9a (Main surface) is not flat Grows up. Thus, the surface of the nitride-based semiconductor layer 9a is compared with the growth layer surface of the nitride-based semiconductor layer when the (000-1) plane or the {A + B, A, -2A-B, 2A + B} plane is not formed. The flatness can be further improved.

  Further, the nitride-based semiconductor layer 9a including the side surface 10a or the side surface 10b including the (000-1) plane or the {A + B, A, −2A−B, 2A + B} plane is formed from one inner side surface of the recess 7a. By providing the process, not only the top surface of the nitride-based semiconductor layer 9a but also the side surface portion is formed as a flat side surface composed of the (000-1) plane or {A + B, A, -2A-B, 2A + B} plane. Can do. Therefore, if the present invention is applied to a method for forming a semiconductor laser device, it has a resonator end face composed of a (000-1) plane or a {A + B, A, -2A-B, 2A + B} plane without using a cleavage step. A nitride-based semiconductor layer (light emitting layer) can be easily formed.

  Further, by providing a step of removing the growth substrate 7 after the step of bonding the support substrate 6 to the nitride-based semiconductor layer 9a, the growth substrate 7 after the removal is subjected to surface treatment or the like, thereby being used for growth. The substrate 7 can be reused as a growth substrate when forming the nitride-based semiconductor layer.

  Further, by using the growth substrate 7 made of a nitride-based semiconductor, the crystal growth of the nitride-based semiconductor layer 9a is utilized on the growth substrate 7 made of the nitride-based semiconductor, so that the (000-1) plane or A nitride-based semiconductor layer having the side surface 10a or the side surface 10b composed of the {A + B, A, -2A-B, 2A + B} plane can be easily formed.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 6 is a cross-sectional view showing the structure of an LED chip formed using the forming method according to the first embodiment of the present invention. 7 to 9 are a plan view and a cross-sectional view for explaining a manufacturing process of the LED chip according to the first embodiment shown in FIG. First, the structure of the LED chip 30 formed using the forming method according to the first embodiment will be described with reference to FIGS.

  The LED chip 30 formed by using the forming method according to the first embodiment is made of a nitride semiconductor having a wurtzite structure whose main surface is the a-plane ((11-20) plane). Moreover, the shape of the LED chip 30 has a shape such as a square shape, a rectangular shape, a rhombus, or a parallelogram when viewed in plan (as viewed from the upper surface side of the LED chip 30).

Further, the LED chip 30 has the light emitting element layer 12 formed as shown in FIG. The light-emitting element layer 12 includes an n-type cladding layer 13 that also serves as an n-type contact layer made of n-type Al _0.03 Ga _0.97 N having a thickness of about 3 μm, and a Ga _{0. A} light emitting layer 14 having an MQW structure in which a well layer (not shown) made of ₇ In _0.3 N and a barrier layer (not shown) made of Ga _0.9 In _0.1 N are stacked is formed. ing. A p-type cladding layer 15 that also serves as a p-type contact layer made of p-type GaN having a thickness of about 0.2 μm is formed on the light emitting layer 14. The light emitting element layer 12, the n-type cladding layer 13, the light emitting layer 14, and the p-type cladding layer 15 are examples of the “nitride-based semiconductor layer” in the present invention.

  Here, in the first embodiment, from the n-type cladding layer 13 to the p-type cladding layer 15, the crystal growth surface 12 a composed of the (000-1) plane of the light emitting element layer 12 and the crystal composed of the (11-22) plane. A plurality of recesses 20 (see FIG. 9) are formed by the growth surface 12b. The crystal growth surface 12a is an example of the “side surface” in the present invention. Further, as shown in FIG. 9, the crystal growth surface 12a takes over the inner side surface 21a composed of the (000-1) plane of the groove portion 21 formed in advance on the main surface of the n-type GaN substrate 11 during the manufacturing process described later. In addition, the n-type GaN substrate 11 is formed to extend in a direction substantially perpendicular to the main surface ([11-20] direction). The n-type GaN substrate 11 is an example of the “growth substrate” in the present invention. As shown in FIG. 9, the crystal growth surface 12 b is an inclined surface starting from the inner surface 21 b made of the (0001) surface of the groove 21, and an obtuse angle with respect to the upper surface (main surface) of the light emitting element layer 12. It is formed to make. The groove portion 21 and the inner side surface 21a are examples of the “recessed portion” and “one inner side surface of the recessed portion” of the present invention, respectively.

Further, as shown in FIG. 6, an n-side translucent electrode 16 made of ITO is formed on the lower surface of the n-type cladding layer 13. A pad electrode 17 made of Au is formed in a partial region on the n-side translucent electrode 16. In addition, in the recess 20 (see FIG. 9), an insulating film 22 such as SiO ₂ that is transparent to the emission wavelength is formed to have a predetermined thickness. Then, a Pt layer having a thickness of about 5 nm and an Ag having a thickness of about 200 nm are arranged in order from the p-type cladding layer 15 so as to cover the upper surface of the substantially V-shaped insulating film 22 and the upper surface of the p-type cladding layer 15. A p-side electrode 18 composed of a layer and a W (tungsten) layer having a thickness of about 100 nm is formed. The p-side electrode 18 has a function of reflecting the light emitted from the light emitting layer 14 to the n-side translucent electrode 16 side by including the Ag layer. Further, a support substrate 32 made of CuW having a thickness of about 100 μm is joined to the p-side electrode 18 via a joining layer 33 made of AuSn.

  Next, a manufacturing process of the LED chip 30 according to the first embodiment will be described with reference to FIGS.

  First, as shown in FIG. 7, a width of about 5 μm in the [0001] direction (A direction) is formed on the main surface composed of the a-plane ((11-20) plane) of the n-type GaN substrate 11 using an etching technique. A plurality of grooves 21 having W1 and a depth of about 2 μm and extending in the [1-100] direction (B direction) are formed. In FIG. 7, a thick hatched portion is a region etched as the groove portion 21. The groove portions 21 are formed in a stripe shape in the A direction at a period of about 50 μm (= W1 + L1 (L1 = about 45 μm)).

  Here, in the manufacturing process of the first embodiment, as shown in FIG. 8, the groove portion 21 is made of a (000-1) plane substantially perpendicular to the (11-20) plane of the n-type GaN substrate 11. An inner side surface 21a and an inner side surface 21b made of a (0001) plane substantially perpendicular to the (11-20) plane of the n-type GaN substrate 11 are formed.

Next, a release layer 31 made of In _0.35 Ga _0.65 N having a thickness of about 20 nm is formed on the n-type GaN substrate 11 having the groove 21 by using a metal organic chemical vapor deposition (MOCVD) method, n The light emitting element layer 12 is formed by sequentially laminating the mold cladding layer 13, the light emitting layer 14, the p-type cladding layer 15, and the like. Here, the release layer 31 is made of a material having a smaller band gap than the MQW active layer of the light emitting layer 14. Specifically, in the first embodiment, the release layer 31 is made of InGaN having a higher In composition than the InGaN of the MQW active layer of the light emitting layer 14.

  At this time, in the first embodiment, as shown in FIG. 9, when the light emitting element layer 12 is grown on the n-type GaN substrate 11, the (000-1) plane of the groove 21 extending in the [1-100] direction. In the inner side surface 21a, the light emitting element layer 12 has a crystal growth surface 12a composed of a (000-1) plane extending in the [11-20] direction (C2 direction) so as to take over the (000-1) plane of the groove 21. The crystal grows while forming.

  Further, on the (0001) plane (inner side surface 21b) side facing the (000-1) plane of the groove portion 21, the light emitting element layer 12 has a predetermined angle with respect to the [11-20] direction (C2 direction) (= The crystal grows while forming a crystal growth surface (facet) 12b composed of a (11-22) plane extending in an inclined direction (about 58 °). That is, the crystal growth surface 12b is formed so as to form an obtuse angle with respect to the upper surface (main surface) of the light emitting element layer 12. Thereby, a region (concave portion 20) where the crystal growth surface 12a and the crystal growth surface 12b of the light emitting element layer 12 face each other is formed so as to spread from the light emitting element layer 12 toward the support substrate 32 (see FIG. 6). Therefore, in addition to extracting LED light from the light emitting layer 14 directly from the lower surface side (n-type cladding layer 13 side) of the light emitting element layer 12 in the C1 direction (see FIG. 6), the main surface of the light emitting element layer 12 The light can be reflected from the crystal growth surface 12b inclined with respect to the light emitting element layer 12 and taken out from the lower surface side in the C1 direction. Thereby, the luminous efficiency of the LED chip 30 can be further improved.

  In addition, by forming the light emitting element layer 12 by the above-described method, the light emitting element layer 12 stacked on a flat substrate having no groove 21 or the like is etched to correspond to the crystal growth surface 12a or the crystal growth surface 12b. Unlike the case where the side surfaces are formed, the etching process is not required for forming the crystal growth surfaces 12a and 12b, so that the manufacturing process of the LED chip 30 is simplified. Further, since the crystal growth surfaces 12a and 12b are not formed by dry etching or the like, the light emitting layer 14 and the like are hardly damaged in the manufacturing process. Thereby, the light extraction efficiency from the light emitting layer 14 can be improved.

  Further, since the light emitting element layer 12 is formed with a plurality of recesses 20 composed of the crystal growth surface 12a and the crystal growth surface 12b, the light emitting element layer 12 is separated in the lateral direction (direction A in FIG. 9) by the recesses 20. The As a result, in the manufacturing process described later, the light emitting element layer 12 is bonded to the light emitting element layer 12 due to stress at the time of bonding the support substrate 32 to the light emitting element layer 12 and peeling the n-type GaN substrate 11 from the light emitting element layer 12. It is possible to suppress the occurrence of cracks.

  Thereafter, as shown in FIG. 6, the crystal growth surface 12 a ((000-1) surface) and the crystal growth surface 12 b ((11-22) surface) of the light emitting element layer 12 are included (including the groove portion 21). An insulating film 22 is formed on the upper surface of the upper portion of the groove portion 21 so as to have a predetermined thickness. And after forming the p side electrode 18 so that the upper surface of the insulating film 22 and the light emitting element layer 12 may be covered, the p side electrode 18 side and the support substrate 32 are joined via the joining layer 33 which consists of AuSn.

Then, similarly to the manufacturing process shown in FIG. 5, laser irradiation is performed from the lower surface side of the n-type GaN substrate 11 toward the release layer 31. At that time, the second harmonic (wavelength: about 532 nm) of the Nd: YAG laser light is adjusted to an energy density of about 500 mJ / cm ² to about 2000 mJ / cm ² , and then from the lower surface side of the n-type GaN substrate 11. Irradiation is intermittently (pulsed) toward the n-type GaN substrate 11. Thereby, the crystal bond of the peeling layer 31 is decomposed and evaporated, and the light emitting element layer 12 side is peeled from the n-type GaN substrate 11. Note that laser light having a wavelength of about 532 nm is absorbed by the release layer 31, but is not absorbed by the substrate (the n-type GaN substrate 11 and the support substrate 32) and the light emitting element layer 12.

  Finally, as shown in FIG. 6, an ITO n-side translucent electrode 16 is formed on the lower surface of the n-type cladding layer 13, and a pad electrode is formed in a predetermined region on the lower surface of the n-side translucent electrode 16. 17 is formed. In this way, the LED chip 30 according to the first embodiment is formed.

  In the manufacturing process of the LED chip 30 according to the first embodiment, as described above, the step of forming the groove portion 21 on the main surface of the n-type GaN substrate 11 and (11-20) on the main surface of the n-type GaN substrate 11 are performed. A crystal growth surface 12a consisting of a (000-1) plane starting from the inner side surface 21a of the groove portion 21, and a (11-22) plane starting from the inner side surface 21b of the groove portion 21. And a step of forming the light emitting element layer 12 including the crystal growth surface 12b. When the light emitting element layer 12 is crystal-grown on the n-type GaN substrate 11, the upper surface of the growth layer ((( 11-20) surface)) than the growth rate at which the inner surface 21a of the groove 21 starts, and the crystal growth surface 12a composed of the (000-1) surface starting from the inner surface 21a of the groove 21 and the inner surface 21b of the groove 21 (starting from 11-22) Because growth rate facets 12b made of is formed is slow, the upper surface of the growth layer (the light emitting element layer 12 (11-20) plane) is grown while maintaining flatness. Thereby, compared with the growth layer surface of the light emitting element layer 12 when the (000-1) plane or the (11-22) plane is not formed, the flatness of the surface of the light emitting element layer 12 can be further improved. .

  In the manufacturing process of the LED chip 30 according to the first embodiment, the crystal growth surface 12a composed of the (000-1) plane starting from the inner surface 21a of the groove 21 and the inner surface 21b of the groove 21 as the starting point (11 By providing the step of forming the light emitting element layer 12 including the crystal growth surface 12b composed of the −22) plane, not only the upper surface (main surface) of the growth layer but also the (000-1) plane and the (11−) 22) It can be formed as a side surface having flatness. Thereby, the LED light emitted from the light emitting layer 14 inside the light emitting element layer 12 is different from the case where it passes through the side surface on which fine irregularities such as etching are formed, and the crystal growth surface 12a ((000-1) surface) and Scattering at the crystal growth surface 12b ((11-22) surface) is suppressed. That is, the light emitted from the light emitting layer 14 is emitted toward the outside of the LED chip 30 in a state where a decrease in the amount of light accompanying scattering or the like is suppressed. As a result, it can suppress that the luminous efficiency of LED chip 30 falls.

  In addition, in the manufacturing process of the LED chip 30 according to the first embodiment, after the step of bonding the support substrate 32 to the light emitting element layer 12, the step of removing the n-type GaN substrate 11 is further provided, thereby removing the n-type after the removal. By performing a surface treatment or the like on the GaN substrate 11, the n-type GaN substrate 11 can be reused as the n-type GaN substrate 11 when the light emitting element layer 12 is formed.

  In the manufacturing process of the LED chip 30 according to the first embodiment, the n-type GaN substrate 11 made of a nitride-based semiconductor such as GaN is used as the growth substrate, so that the n-type GaN substrate 11 made of the nitride-based semiconductor is used. In addition, by utilizing the crystal growth of the light emitting element layer 12, the light emitting element layer 12 having the crystal growth surface 12a composed of the (000-1) plane and the crystal growth surface 12b composed of the (11-22) plane is easily formed. be able to.

  Moreover, in the manufacturing process of the LED chip 30 according to the first embodiment, the step of forming the light emitting element layer 12 corresponds to the inner side surface 21a made of the (000-1) plane of the groove portion 21 formed in the n-type GaN substrate 11. Including a step of forming the light emitting element layer 12 having the crystal growth surface 12a composed of the (000-1) plane in the region to be formed on the main surface of the n-type GaN substrate 11, the side surface composed of the (000-1) plane. When the light emitting element layer 12 having the (crystal growth surface 12a) is formed, the (000-1) end surface of the semiconductor layer is formed so as to take over the inner surface 21a of the groove portion 21 made of the (000-1) surface. Therefore, the crystal growth surface 12a composed of the (000-1) plane can be easily formed on the n-type GaN substrate 11.

  In the manufacturing process of the LED chip 30 according to the first embodiment, the step of forming the light emitting element layer 12 is a region corresponding to the inner side surface 21b made of the (0001) surface of the groove portion 21 formed in the n-type GaN substrate 11. In addition, by including the step of forming the light emitting element layer 12 having the crystal growth surface 12b composed of the (11-22) plane, the side surface composed of the (11-22) plane on the main surface of the n-type GaN substrate 11 (crystal When the light emitting element layer 12 having the growth surface 12b) is formed, the (11-22) end surface of the semiconductor layer is formed starting from the upper end portion of the inner surface 21b of the groove portion 21 made of the (0001) surface. The crystal growth surface 12b made of the 11-22) plane can be easily formed on the n-type GaN substrate 11.

(Second Embodiment)
FIG. 10 is a cross-sectional view showing the structure of an LED chip formed using the forming method according to the second embodiment of the present invention. 11 to 14 are a cross-sectional view and a plan view, respectively, for explaining a manufacturing process of the LED chip according to the second embodiment shown in FIG. With reference to FIGS. 10 to 14, in the manufacturing process of the LED chip 40 according to the second embodiment, unlike the first embodiment, an underlayer 50 made of n-type AlGaN is formed on an n-type GaN substrate 41. The case where the light emitting element layer 42 is formed will be described later. The n-type GaN substrate 41 is an example of the “growth substrate” and the “underlying substrate” in the present invention.

  The LED chip 40 formed by using the forming method according to the second embodiment is made of a nitride semiconductor having a wurtzite structure having a (1-10-2) plane as a main surface. Moreover, the shape of the LED chip 40 has a shape such as a square shape, a rectangular shape, a rhombus, or a parallelogram when viewed in a plan view (viewed from the upper surface side of the LED chip 40).

Here, in the manufacturing process of the LED chip 40 according to the second embodiment, as shown in FIG. 11, on the n-type GaN substrate 41 having a thickness of about 400 μm, In _0.35 Ga _{0. A} peeling layer 31 made of ₆₅ N, an n-type contact layer 60 made of Ge-doped n-type GaN having a thickness of about 3 μm, and an n-type having a thickness on the order of a critical thickness (less than about 3 μm to about 4 μm) An underlayer 50 made of AlGaN is grown in this order. Here, the critical film thickness means the minimum thickness of the semiconductor layer when a semiconductor layer having a different lattice constant is stacked and no cracks are generated in the semiconductor layer due to the difference in lattice constant. In addition, when the underlayer 50 is crystal-grown, the lattice constant c ₂ of the underlayer 50 is smaller than the lattice constant c ₁ of the n-type GaN substrate 41 (c ₁ > c ₂ ), so that the underlayer reaches a predetermined thickness. 50, tension in response to the lattice constant _{c 1} of the n-type GaN substrate 41 in the interior of the base layer 50 stress R (see FIG. 11) is generated.

  Thereafter, as shown in FIG. 12, scribe scratches in the form of broken lines at intervals of about 50 μm in the [11-20] direction (B direction) substantially perpendicular to the A direction on the underlayer 50 by laser light or diamond points. 70 is formed. A plurality of scribe flaws 70 are formed in the A direction at a pitch of an interval L2 (L2 = about 100 μm). As a result, as shown in FIG. 13, the crack progresses in the base layer 50 in the region of the base layer 50 where the scribe scratch 70 is not formed, starting from the broken scribe scratch 70. As a result, a substantially straight (stripe-shaped) crack 51 (see FIG. 13) is formed that divides the base layer 50 in the [11-20] direction (B direction). The crack 51 is an example of the “concave portion” in the present invention.

  Here, the difference in the c-axis lattice constant between GaN and AlGaN is larger than the difference in the a-axis lattice constant between GaN and AlGaN, so that the crack 51 is formed between the (0001) plane of the foundation layer 50 and n. It is easy to form in the [11-20] direction (B direction) parallel to the (1-10-2) plane of the main surface of the type GaN substrate 41. As a result, an inner side surface 51 a (shown by a broken line) reaching the vicinity of the interface between the foundation layer 50 and the n-type contact layer 60 is formed in the crack 51. The inner side surface 51a is an example of the “one inner side surface of the recess” in the present invention.

Thereafter, as shown in FIG. 14, an n-type cladding layer 43 made of n-type GaN having a thickness of about 0.5 μm is formed on the underlayer 50 by a manufacturing process similar to that of the first embodiment, and about 2 nm. A light emitting layer made of MQW in which a well layer (not shown) made of Ga _0.7 In _0.3 N having a thickness and a barrier layer (not shown) made of Ga _0.9 In _0.1 N are stacked. The light emitting element layer 42 is formed by sequentially stacking 44 and a p-type cladding layer 45 serving also as a p-type contact layer made of p-type GaN having a thickness of about 0.2 μm. The light emitting element layer 42, the n-type cladding layer 43, the light emitting layer 44, and the p-type cladding layer 45 are examples of the “nitride-based semiconductor layer” in the present invention.

  At this time, in the second embodiment, when the light emitting element layer 42 is grown on the n-type GaN substrate 41, the light emitting element layer 42 is formed on the inner side surface 51a of the crack 51 extending in a stripe shape in the [11-20] direction. The crystal growth surface (facet) comprising a (000-1) plane extending in a direction inclined by a predetermined angle (= about 47 °) with respect to the [1-10-2] direction (C2 direction) of the n-type GaN substrate 41 Crystals grow while forming 42a. Further, on the inner surface 51b side facing the inner surface 51a of the crack 51, the light emitting element layer 42 has a predetermined angle (= about) with respect to the [1-10-2] direction (C2 direction) of the n-type GaN substrate 41. The crystal grows while forming a crystal growth surface (facet) 42b composed of a (1-101) plane extending in the inclined direction (15 °). The crystal growth surface 42a is an example of the “side surface” in the present invention. The crystal growth surfaces 42a and 42b are formed so as to form an obtuse angle with respect to the upper surface (main surface) of the light emitting element layer 42, respectively.

  Note that by forming the light emitting element layer 42 by the above-described method, the light emitting element layer 42 stacked on a flat substrate having no crack 51 or the like is etched to correspond to the crystal growth surface 42a or the crystal growth surface 42b. Unlike the case where the side surfaces to be formed are formed, no etching process is required to form the crystal growth surfaces 42a and 42b, so that the manufacturing process of the LED chip 40 is simplified. Further, since the crystal growth surfaces 42a and 42b are not formed by dry etching or the like, the light emitting layer 44 and the like are hardly damaged in the manufacturing process. Thereby, the light extraction efficiency from the light emitting layer 14 can be improved.

  Thereafter, the LED chip 40 according to the second embodiment shown in FIG. 10 is formed by a manufacturing process similar to that of the first embodiment.

  In the manufacturing process of the LED chip 40 according to the second embodiment, as described above, the step of forming the crack 51 in the underlayer 50 on the n-type GaN substrate 41 and (1-10-2) on the underlayer 50 are performed. A crystal growth surface 42a consisting of a (000-1) plane starting from the inner side surface 51a of the crack 51, and a (1-101) plane starting from the inner side surface 51b of the crack 51. And the step of forming the light emitting element layer 12 including the crystal growth surface 42b. Thus, when the light emitting element layer 42 is crystal-grown on the base layer 50, the upper surface of the growth layer ((1- 10-2) than the growth rate at which the surface) grows, the crystal growth surface 42a composed of the (000-1) surface starting from the inner surface 51a of the crack 51 and the inner surface 51b of the crack 51 ( 1- 01) Since the growth rate facets 42b is formed slow consisting surface, the upper surface of the growth layer surface ((1-10-2 of the light emitting element layer 42)) is grown while maintaining flatness. Thereby, the flatness of the surface of the light emitting element layer 42 can be further improved as compared with the growth layer surface of the light emitting element layer 42 when the (000-1) plane or the (1-101) plane is not formed. .

  Further, in the manufacturing process of the LED chip 40 according to the second embodiment, the crystal growth surface 42a composed of the (000-1) plane starting from the inner side surface 51a of the crack 51 and the inner side surface 51b of the crack 51 (1 -101) By including the step of forming the light emitting element layer 42 including the crystal growth surface 42b composed of the plane, not only the upper surface of the growth layer but also the side surface portion from the (000-1) plane and the (1-101) plane. It can be formed as a side surface having flatness. As a result, the LED light emitted from the light emitting layer 14 inside the light emitting element layer 42 is different from the case where it passes through the side surface on which fine irregularities such as etching are formed, and the crystal growth surface 42a ((000-1) surface) and Since scattering from the crystal growth surface 42b ((1-101) plane) is suppressed, it is possible to suppress a decrease in the light emission efficiency of the LED chip 40.

  Further, in the manufacturing process of the LED chip 40 according to the second embodiment, the inner side surfaces 51 a and 51 b of the crack 51 formed in the underlayer 50 are formed by providing a step of forming the underlayer 50 on the n-type GaN substrate 41. By utilizing this, it is possible to easily form the light emitting element layer 42 having the crystal growth surface 42a composed of the (000-1) plane and the crystal growth surface 42b composed of the (1-101) plane.

Further, in the manufacturing process of the LED chip 40 according to the second embodiment, when the foundation layer 50 includes AlGaN and the lattice constants of the n-type GaN substrate 41 and the foundation layer 50 are c ₁ and c ₂ , respectively, c ₁ When the base layer 50 made of AlGaN is formed on the n-type GaN substrate 41 by configuring so as to have a relationship of> c ₂ , the lattice constant c ₂ of the base layer 50 is the lattice constant of the n-type GaN substrate 41. Since it is smaller than c ₁ (c ₁ > c ₂ ), a tensile stress R is generated inside the underlayer 50 so as to match the lattice constant c ₁ on the n-type GaN substrate 41 side. As a result, when the thickness of the underlayer 50 is equal to or greater than a predetermined thickness, the crack 51 is formed along the (000-1) plane in the underlayer 50 without enduring the tensile stress R. As a result, the inner side surfaces 51 a and 51 b serving as a reference for forming the (000-1) plane and the (1-101) plane of the light emitting element layer 42 on the base layer 50 can be easily formed on the base layer 50. Can do.

  In addition, in the manufacturing process of the LED chip 40 according to the second embodiment, when the crack 51 is formed, the base layer 50 is formed on the n-type GaN substrate 41 to a thickness about the critical thickness, and then the base layer 50 is formed. Then, a plurality of broken-line-like (about 50 μm intervals) scribe flaws 70 extending in the [11-20] direction (B direction) are formed at a pitch of an interval L2 (= about 100 μm) in the A direction. Are formed with cracks 71 that are parallel to the B direction and that are equally spaced along the A direction, starting from the broken scribe flaw 70. That is, it is possible to form the LED chip 40 (see FIG. 10) having a uniform light emitting area more easily than in the case where the semiconductor layers are stacked using the spontaneously formed cracks due to the difference in lattice constant. it can.

  Further, in the manufacturing process of the LED chip 40 according to the second embodiment, the crystal growth surfaces 42a and 42b of the light emitting element layer 42 are respectively set to the main surface ((1-10-2) surface) of the light emitting element layer 42. As a result, the region where the crystal growth surfaces 42 a and 42 b of the light emitting element layer 42 face each other (the recess 20) extends from the light emitting element layer 42 toward the support substrate 32. Thus, in addition to taking out the LED light from the light emitting layer 44 directly from the lower surface side (n-type cladding layer 43 side) of the light emitting element layer 42 in the C1 direction (see FIG. 10), The light can be reflected from the crystal growth surfaces 42a and 42b inclined with respect to the main surface and taken out from the lower surface side of the light emitting element layer 42 in the C1 direction. Thereby, the luminous efficiency of the LED chip 40 can be further improved. The remaining effects of the second embodiment are similar to those of the aforementioned first embodiment.

(Third embodiment)
FIG. 15 is a cross-sectional view of a nitride-based semiconductor laser device in a plane along the cavity direction for explaining the structure of the nitride-based semiconductor laser device formed by using the forming method according to the third embodiment of the present invention. It is. 16 and 17 are cross-sectional views showing the structure of a nitride-based semiconductor laser device formed by using the formation method according to the third embodiment shown in FIG. First, with reference to FIGS. 15 to 17, the structure of the nitride-based semiconductor laser device 80 formed by using the formation method according to the third embodiment will be described.

  In the nitride-based semiconductor laser device 80 formed by using the forming method according to the third embodiment of the present invention, as shown in FIG. 15, a semiconductor laser having a thickness of about 7 μm is formed on a support substrate 81 having a thickness of about 100 μm. The element part 90 and the reflection part 91 have a structure joined via the joining layer 82. Further, the semiconductor laser element unit 90 is configured by a GaN-based semiconductor layer having an oscillation wavelength of about 400 nm band.

  Further, as shown in FIGS. 15 and 16, the semiconductor laser element portion 90 is a semiconductor laser element having a thickness of about 3.5 μm on a base layer 50 made of Ge-doped AlGaN having a thickness of about 3 μm to about 4 μm. A layer 93 is formed. Here, the foundation layer 50 functions as an n-type contact layer. Further, as shown in FIG. 15, the semiconductor laser element portion 90 has a resonator length (length in the A direction) L1 of about 1560 μm and the semiconductor laser element layer 93 in the [0001] direction (A direction). A light emitting surface 90a and a light reflecting surface 90b that are substantially perpendicular to the main surface are formed. The semiconductor laser element layer 93 is an example of the “nitride-based semiconductor layer” in the present invention, and the light reflecting surface 90b is an example of the “side surface” in the present invention. Further, in the present invention, the light emitting surface 90a and the light reflecting surface 90b are distinguished by the magnitude relationship of the intensity of laser light emitted from the respective resonator surfaces on the light emitting side and the light reflecting side. That is, the side with a relatively high laser beam emission intensity is the light emission surface 90a, and the side with a relatively low laser beam emission intensity is the light reflection surface 90b.

In addition, dielectric multilayer films made of an AlN film, an Al ₂ O ₃ film, or the like are formed on the light emitting surface 90a and the light reflecting surface 90b of the semiconductor laser element portion 90 by an end surface coating process in the manufacturing process. Also good.

  Here, in the third embodiment, the semiconductor laser element layer 93 is mainly composed of an m-plane ((1-100) plane) that is a nonpolar plane of an n-type GaN substrate 41 used as a growth substrate in a manufacturing process described later. On the surface, it is formed via a base layer 50. Further, as shown in FIG. 15, the underlayer 50 is formed with a crack 51 having an inner side surface 51 a composed of a (000-1) plane formed during crystal growth of the underlayer 50. The light reflecting surface 90b of the semiconductor laser element layer 93 is constituted by an end face made of a (000-1) plane crystal-grown so as to take over the inner side surface 51a of the crack 51 of the underlayer 50. Further, the light emitting surface 90a of the semiconductor laser element layer 93 is constituted by an end surface composed of a c-plane ((0001) plane) which is an end surface perpendicular to the [0001] direction (A1 direction in FIG. 15).

In the third embodiment, as shown in FIG. 15, the nitride-based semiconductor laser element 80 is reflected across the groove 83 in a region in the A1 direction facing the light emitting surface 90 a of the semiconductor laser element 90. A portion 91 is formed. The reflecting portion 91 is formed with a reflecting surface 91a extending in a direction inclined by a predetermined angle (= about 62 °) with respect to the light emitting surface 90a of the semiconductor laser element layer 93 (light emitting layer 96). The reflective surface 91a is formed by a facet (growth surface) composed of a (1-101) plane accompanying crystal growth when the semiconductor laser element layer 93 is formed. A reflective film 84 made of an Ag layer having a thickness of about 200 nm is formed on the reflective surface 91a. Thereby, in the nitride-based semiconductor laser element 80, laser light emitted in the A1 direction from a light emitting surface 90a of the light emitting layer 96 described later enters from the end surface 91b facing the light emitting surface 90a and enters the reflecting portion 91 inside. Can be transmitted in the A1 direction, and can be emitted to the outside by changing the emission direction to a substantially C1 direction (a direction inclined by a predetermined angle (= about 34 °) with respect to the light emission surface 90a) by the reflection surface 91a. It is configured. Note that Al or the like may be used as the reflective film 84. Further, the reflective film 84 may be formed of a dielectric multilayer film made of an Al ₂ O ₃ film, an SiO ₂ film, or the like.

The semiconductor laser element layer 93 includes an n-type buffer layer 94, an n-type cladding layer 95, a light emitting layer 96, a p-type cladding layer 97, and a p-type contact layer 98. Specifically, as shown in FIGS. 15 and 16, an n-type buffer layer 94 made of Ge-doped Al _0.01 Ga _0.99 N having a thickness of about 1.0 μm is formed on the upper surface of the base layer 50. An n-type cladding layer 95 made of Ge-doped Al _0.07 Ga _0.93 N having a thickness of about 1.9 μm is formed.

A light emitting layer 96 is formed on the n-type cladding layer 95. As shown in FIG. 17, the light-emitting layer 96 includes an n-side carrier block made of Al _0.2 Ga _0.8 N having a thickness of about 20 nm in order from the side close to the n-type cladding layer 95 (see FIG. 16). A layer 96a, an n-side light guide layer 96b made of undoped In _0.02 Ga _0.98 N having a thickness of about 20 nm, an MQW active layer 96e, and an undoped In _0.01 Ga having a thickness of about 0.08 μm. _The p-side light guide layer 96f made of _0.99 N and the carrier block layer 96g made of Al _0.25 Ga _0.75 N having a thickness of about 20 nm are formed. The MQW active layer 96e includes three quantum well layers 96c made of undoped In _0.15 Ga _0.85 N having a thickness of about 2.5 nm and undoped In _0.02 Ga _0. Three quantum barrier layers 96d made of ₉₈ N are alternately stacked. The n-type cladding layer 95 has a larger band gap than the MQW active layer 96e. Further, a light guide layer having a band gap intermediate between the n-side carrier block layer 96a and the MQW active layer 96e may be formed between the n-side carrier block layer 96a and the MQW active layer 96e. The MQW active layer 96e may be formed with a single layer or an SQW structure.

Further, as shown in FIGS. 15 and 16, a p-type cladding layer 97 made of Mg-doped Al _0.07 Ga _0.93 N having a thickness of about 0.5 μm is formed on the light emitting layer 96. Has been. The p-type cladding layer 97 has a larger band gap than the MQW active layer 96e. A p-type contact layer 98 made of undoped In _0.07 Ga _0.93 N having a thickness of about 3 nm is formed on the p-type cladding layer 97. The n-type buffer layer 94, the n-type cladding layer 95, the light emitting layer 96, the p-type cladding layer 97, and the p-type contact layer 98 are examples of the “nitride-based semiconductor layer” in the present invention.

Further, as shown in FIG. 16, a current blocking layer 99 made of SiO ₂ having a thickness of about 200 nm is formed in a predetermined region on the upper surface of the p-type contact layer 98.

  Further, in a region where the current blocking layer 99 is not formed on the upper surface of the p-type contact layer 98 (near the central portion in the direction B in FIG. 16), the area closer to the upper surface of the p-type contact layer 98 is about 5 nm. The p-side electrode 100 is formed of a Pt layer having a thickness of approximately 100 nm, a Pd layer having a thickness of approximately 100 nm, and an Au layer having a thickness of approximately 150 nm. The p-side electrode 100 is formed so as to cover the upper surface of the current blocking layer 99.

  Further, as shown in FIGS. 15 and 16, on the lower surface of the underlayer 50, in order from the underlayer 50, an Al layer having a thickness of about 10 nm, a Pt layer having a thickness of about 20 nm, and about 300 nm. An n-side electrode 101 made of an Au layer having a thickness of 5 mm is formed. As shown in FIG. 15, the n-side electrode 101 is formed on the entire lower surface of the base layer 50 so as to extend to both sides in the A direction of the semiconductor laser element portion 90.

  18 to 22 are cross-sectional views for explaining a manufacturing process of the nitride-based semiconductor laser device according to the third embodiment shown in FIG. A manufacturing process for the nitride-based semiconductor laser device 80 according to the third embodiment is now described with reference to FIGS.

First, as shown in FIG. 18, a release layer 31 made of In _0.35 Ga _0.65 N having a thickness of about 20 nm and an about 3 μm to about 4 μm thickness are formed on an n-type GaN substrate 41 using MOCVD. A base layer 50 made of AlGaN having a thickness is grown. When the underlayer 50 is crystal-grown, the lattice constant c _{2 in} the [0001] direction of the underlayer 50 made of AlGaN is smaller than the lattice constant c _{1 in} the [0001] direction of the n-type GaN substrate 41 (c ₁ > c ₂ ), the base layer 50 having reached a predetermined thickness generates a tensile stress R inside the base layer 50 in an attempt to match the lattice constant c ₁ of the n-type GaN substrate 41. As a result, a crack 51 as shown in FIG. 18 is formed in the underlayer 50 as the underlayer 50 locally shrinks in the A direction. Here, the difference in the c-axis lattice constant between GaN and AlGaN is larger than the difference in the a-axis lattice constant between GaN and AlGaN, so that the crack 51 is formed between the (0001) plane of the foundation layer 50 and n. The GaN substrate 41 is easily formed to extend in a stripe shape along the [11-20] direction (B direction) parallel to the (1-100) plane of the main surface of the type GaN substrate 41. As shown in FIG. 18, the third embodiment schematically shows a state in which the crack 51 is spontaneously formed in the base layer 50.

  In the third embodiment, when the base layer 50 is crystal-grown, cracks 51 as recesses are formed in the base layer 50 by utilizing the lattice constant difference between the n-type GaN substrate 41 and the base layer 50. However, similar to the manufacturing process in the second embodiment, after the base layer 50 is crystal-grown to a critical film thickness, mechanical scribe, laser scribe, dicing, etching, and the like are performed from the surface side of the base layer 50. You may form the inner surface (inner surface of a recessed part) containing a (000-1) surface. When the recess is formed using the above method, the underlying layer 50 may be GaN having the same lattice constant as that of the n-type GaN substrate 41.

  In the third embodiment, as shown in FIG. 18, when the crack 51 is formed in the foundation layer 50, the crack 51 includes the (000-1) plane of the foundation layer 50. An inner side surface 51 a reaching the vicinity of the interface with the release layer 31 is formed. Further, an inner side surface 51b is formed on the opposite side of the crack 51 with respect to the inner side surface 51a.

  Further, since the crack 51 is formed by using the tensile stress R generated in the underlayer 50, the crack 51 is formed by an external processing technique (for example, mechanical scribe, laser scribe, dicing, etching, etc.). Unlike the case of forming a shape depression, it is possible to easily match the inner side surface 51a with the crystallographic plane index (000-1) plane. As a result, the inner side surface 51a can be formed as an extremely flat (000-1) plane. Therefore, when a light emitting element layer 42 described later is grown on the flat inner side surface 51a, (000− 1) The light emitting element layer 42 having a flat side surface ((000-1) surface) that takes over the surface can be easily grown.

  In the third embodiment, since the crack 51 reaching the upper surface of the release layer 31 is formed inside the underlayer 50, the lattice strain of the underlayer 50 having a lattice constant different from that of the n-type GaN substrate 41 is released. Can do. Therefore, the crystal quality of the underlayer 50 is improved, and the semiconductor laser element layer 93 formed on the underlayer 50 can be in a high-quality crystal state. As a result, the electrical characteristics of the n-type cladding layer 95, the n-side carrier block layer 96a, the carrier block layer 96f, the p-type cladding layer 97, the p-type contact layer 98, and the like formed in the steps described later are improved. It is possible to suppress light absorption in the layer. Furthermore, the internal loss of the light emitting layer 96 (n-side carrier block layer 96a, n-side light guide layer 96b, MQW active layer 96e, p-side light guide layer 96f, and carrier block layer 96g) is reduced, and light emission of the light-emitting layer 96 is achieved. Efficiency can be improved. In the third embodiment, the crack 51 reaching the vicinity of the upper surface of the peeling layer 31 is formed inside the underlayer 50. However, the thickness of the underlayer 50 is set in the thickness direction of the underlayer 50 (the direction of arrow C1 in FIG. 18). You may make it form the groove part (concave part) of the depth corresponded to. Even if comprised in this way, since the internal strain of the foundation layer 50 can be released by the groove portion having a depth corresponding to the thickness of the foundation layer 50, the same effect as in the case of forming the crack 51 can be obtained. .

  Next, as shown in FIG. 19, an n-type buffer layer 94, an n-type cladding layer 95, and a light emitting layer 96 (see FIG. 17 for details) are formed on the base layer 50 in which the cracks 51 are formed using the MOCVD method. Then, the p-type cladding layer 97 and the p-type contact layer 98 are sequentially grown to form the semiconductor laser element layer 93.

In the formation of the semiconductor laser element layer 93, specifically, first, TMGa (trimethylgallium) as a Ga source and TMAl (trimethylaluminum) as an Al source while the substrate temperature is maintained at a growth temperature of about 1000 ° C. A carrier gas composed of H ₂ containing) is supplied into the reactor to grow the n-type buffer layer 94 on the underlayer 50. Next, a carrier gas composed of H ₂ containing TMGa and TMAl and GeH ₄ (monogermane) which is a raw material of Ge impurities for obtaining n-type conductivity is supplied into the reaction furnace, and the n-type buffer is supplied. An n-type cladding layer 95 is grown on the layer 94. Thereafter, an H ₂ gas containing TMGa and TMAl is supplied into the reaction furnace to grow the n-side carrier block layer 96 a on the n-type cladding layer 95.

Next, with the substrate temperature lowered to a growth temperature of about 850 ° C. and maintained in a nitrogen gas atmosphere in which NH ₃ gas is supplied into the reaction furnace, the Ga source TEGa (triethylgallium) and In source A certain TMIn (trimethylindium) is supplied to grow the n-side light guide layer 96b, the MQW active layer 96e, and the p-side light guide layer 96f. Then, TMGa and TMAl are supplied into the reaction furnace to grow the carrier block layer 96g. Thereby, the light emitting layer 96 (refer FIG. 17) is formed.

Next, with the substrate temperature raised to a growth temperature of about 1000 ° C. and maintained in a hydrogen gas and nitrogen gas atmosphere in which NH ₃ gas is supplied into the reaction furnace, the source material of Mg, which is a p-type impurity, is used. A certain Mg (C ₅ H ₅ ) ₂ (cyclopentanedienylmagnesium), TMGa as a Ga raw material, and TMAl as an Al raw material are supplied to grow a p-type cladding layer 97 on the light emitting layer 96. Thereafter, TEGa as the Ga source and TMIn as the In source are supplied in a nitrogen gas atmosphere in which NH ₃ gas is supplied into the reactor while the substrate temperature is again lowered to the growth temperature of about 850 ° C. Then, the p-type contact layer 98 is grown. In this way, the semiconductor laser element layer 93 is formed on the base layer 50.

  Here, in the manufacturing process according to the third embodiment, as shown in FIG. 19, when the semiconductor laser element layer 93 is grown on the underlayer 50, it extends in a stripe shape in the [11-20] direction (B direction). On the inner side surface 51a made of the (000-1) plane of the crack 51, the semiconductor laser element layer 93 extends in the [1-100] direction (C2 direction) so as to take over the (000-1) plane of the crack 51 (000). -1) Crystals are grown while forming a light reflecting surface 90b composed of a plane.

  In the manufacturing process according to the third embodiment, as shown in FIG. 19, on the inner surface 51b side facing the inner surface 51a of the crack 51, the semiconductor laser element layer 93 has a light reflecting surface starting from the inner surface 51b. A reflection surface 91a extending in a direction inclined by a predetermined angle (= about 62 °) with respect to 90b is formed. The reflection surface 91 a is a facet (growth surface) composed of a (1-101) plane accompanying crystal growth of the semiconductor laser element layer 93.

  By forming the semiconductor laser element layer 93 by the above-described method, the light reflecting surface 90b and the reflecting surface 91a that are substantially perpendicular to the main surface of the n-type GaN substrate 41 during crystal growth of the semiconductor laser element layer 93 are provided. Can be formed simultaneously. Therefore, unlike the case where the light reflecting surface 90b or the end surface corresponding to the reflecting surface 91a is formed by etching on the semiconductor laser element layer 93 laminated on the flat substrate without the crack 51 or the like, the light reflecting surface 90b and Since the etching process such as ion beam etching is not required for the formation of the reflecting surface 91a, the manufacturing process of the nitride semiconductor laser element 80 can be simplified.

Then, p-type annealing is performed in a nitrogen gas atmosphere under a temperature condition of about 800 ° C. Further, as shown in FIG. 16, after a resist pattern is formed on the upper surface of the p-type contact layer 98 by photolithography, dry etching or the like is performed using the resist pattern as a mask, whereby a current blocking layer made of SiO _{2 is formed.} 99 is formed. Also, as shown in FIGS. 16 and 20, the p-side electrode 100 is formed on the current blocking layer 99 and the p-type contact layer 98 where the current blocking layer 99 is not formed, using a vacuum deposition method. As shown in FIG. 20, a reflective film 84 made of an Ag layer is formed on the reflective surface 91a by using a vacuum deposition method. Then, the p-side electrode 100 side and the support substrate 81 are bonded via a bonding layer 82 made of AuSn.

  Similarly to the manufacturing process shown in FIG. 5, laser irradiation is performed in the C2 direction from the lower surface side of the n-type GaN substrate 41 toward the release layer 31, so that the semiconductor laser element layer 93 side is separated from the n-type GaN substrate 41. It is peeled off.

  After that, as shown in FIG. 21, dry etching is performed in a direction (arrow C2 direction) where a position where a predetermined resonator surface is to be formed reaches from the back surface side (lower surface side) of the semiconductor laser element layer 93 to the p-side electrode 100. As a result, the groove 83 having a substantially (0001) plane on one side surface of the semiconductor laser element layer 93 is formed. As a result, the substantially (0001) surface, which is one side surface of the groove 83, is easily formed as the light emitting surface 90 a of the pair of resonator surfaces in the semiconductor laser element portion 90. In addition, the substantially (000-1) plane that is the other side surface of the groove 83 is formed as the end surface 91 b of the reflecting portion 91. The groove 83 is formed so as to extend in the [11-20] direction (B direction) substantially parallel to the direction in which the crack 51 extends when viewed in plan.

  Thereafter, as shown in FIG. 21, the n-side electrode 101 is formed on the lower surface of the base layer 50 in a region to be the semiconductor laser element portion 90 (see FIG. 15) using a vacuum deposition method. Then, as shown in FIG. 22, [11] direction orthogonal to the [0001] direction (A1 direction in FIG. 15) of the semiconductor laser element layer 93 by laser scribe or mechanical scribe at a predetermined position on the back side of the foundation layer 50. −20] A linear scribe groove 102 is formed so as to extend in the direction (the B direction in FIG. 15). In this state, as shown in FIG. 22, by applying a load with the upper surface side (upper side) of the support substrate 81 as a fulcrum so that the lower surface side (lower side) of the support substrate 81 is opened, the wafer is removed from the scribe groove 102. Cleave at position (cleavage line 900).

  Finally, the nitride semiconductor laser device 80 according to the third embodiment shown in FIG. 15 is formed by dividing the device along the resonator direction (direction A) into chips.

  In the manufacturing process of the nitride-based semiconductor laser device 80 according to the third embodiment, as described above, the step of forming the crack 51 in the underlayer 50 on the n-type GaN substrate 41 and the m-plane ( (1-100) plane), light reflecting surface 90b consisting of (000-1) plane starting from inner surface 51a of crack 51, and inner surface 51b of crack 51 starting from (1) A step of forming a semiconductor laser element layer 93 including a reflective surface 91a composed of a -101) plane, so that when the semiconductor laser element layer 93 is crystal-grown on the underlayer 50, the upper surface of the growth layer (semiconductor The light reflecting surface 90b composed of the (000-1) plane starting from the inner surface 51a of the crack 51 and the crack 51 rather than the growth rate at which the (1-100) plane of the laser element layer 93 grows. Since the growth rate at which the reflecting surface 91a composed of the (1-101) surface starting from the inner surface 51b is formed is slow, the upper surface of the growth layer (the (1-100) surface of the semiconductor laser element layer 93) is flat. Grow while keeping. Thereby, the flatness of the surface of the semiconductor laser element layer 93 is further improved as compared with the growth layer surface of the semiconductor laser element layer 93 when the (000-1) plane or the (1-101) plane is not formed. Can do.

  Further, it extends at a predetermined angle (= about 62 °) with respect to the resonator surface (the light emitting surface 90a of the semiconductor laser element portion 90) and intersects with the main surface ((1-100) surface) of the light emitting layer 96. By forming the semiconductor laser element layer 93 (reflecting portion 91) including the reflecting surface 91a composed of the (1-101) plane, the reflecting surface 91a (facet) having the above-described plane orientation has flatness. Unlike the case where the laser beam emitted from the emission surface 90a is reflected while being scattered on the side surface having finer unevenness such as etching, the emission direction without causing the reflection on the reflection surface 91a having the above surface orientation. The light is emitted to outside. As a result, it is possible to suppress a decrease in the light emission efficiency of the nitride-based semiconductor laser device 80.

  In the manufacturing process of the nitride-based semiconductor laser device 80 according to the third embodiment, the semiconductor laser device whose main surface is an m-plane ((1-100) plane) on the n-type GaN substrate 41 used as the growth substrate. By forming the layer 93 (light emitting layer 96), the piezoelectric field generated in the semiconductor laser element layer 93 (light emitting layer 96) can be reduced. Thereby, the luminous efficiency of laser light can be improved.

  Further, in the manufacturing process of the nitride-based semiconductor laser device 80 according to the third embodiment, the n-type GaN substrate 41 having the main surface composed of the m-plane ((1-100) plane) is used as the growth substrate. Since the semiconductor laser element layer 93 (light emitting layer 96) is formed on the n-type GaN substrate 41 having a main surface composed of a nonpolar plane, the piezoelectric field generated in the semiconductor laser element layer 93 can be further reduced. it can. Thereby, the luminous efficiency of laser light can be further improved.

  Further, in the manufacturing process of the nitride-based semiconductor laser device 80 according to the third embodiment, the flat light reflecting surface 90b composed of the (000-1) plane is formed by crystal growth, so that the resonance can be achieved without using a cleavage step. The semiconductor laser element portion 90 having the end face (light reflecting surface 90b) can be easily formed. Thereby, the manufacturing process can be simplified.

(Fourth embodiment)
FIG. 23 is a cross-sectional view of a nitride-based semiconductor laser device in a plane along the cavity direction for explaining the structure of the nitride-based semiconductor laser device formed by using the formation method according to the fourth embodiment of the present invention. It is. First, with reference to FIG. 23, the structure of the nitride-based semiconductor laser device 120 formed by using the formation method according to the fourth embodiment will be described.

  In the nitride-based semiconductor laser device 120 formed by using the forming method according to the fourth embodiment of the present invention, as shown in FIG. 23, a semiconductor laser having a thickness of about 7 μm is formed on a support substrate 81 having a thickness of about 100 μm. The element unit 130 has a structure bonded via a bonding layer 82. In addition, the semiconductor laser element unit 130 is composed of a GaN-based semiconductor layer having an oscillation wavelength of about 400 nm band. The semiconductor laser element portion 130 has a resonator length (length in the A direction) L1 of about 1560 μm and is substantially perpendicular to the main surface of the semiconductor laser element layer 93 in the [0001] direction (A direction). A light emitting surface 120a and a light reflecting surface 120b are respectively formed. The light emitting surface 120a is an example of the “side surface” in the present invention.

  Here, in the fourth embodiment, the semiconductor laser element layer 93 is formed on the main surface composed of the (11-2-5) plane of the n-type GaN substrate 41 used as a growth substrate in the manufacturing process described later. Is formed through. The light emitting surface 120a of the semiconductor laser element layer 93 is constituted by a side surface composed of a (11-22) plane crystal-grown so as to take over the inner side surface 51a of the crack 51 of the underlayer 50. Further, the light reflecting surface 120b of the semiconductor laser element layer 93 is constituted by an end surface (-1-12-2) which is a side surface perpendicular to the [-1-12-2] direction (A1 direction in FIG. 23). .

  The other element structures of the nitride semiconductor laser element 120 formed by using the formation method according to the fourth embodiment are the same as those of the semiconductor laser element portion 90 of the nitride semiconductor laser element 80 according to the third embodiment. is there.

  24 to 26 are cross-sectional views for explaining the manufacturing process of the nitride-based semiconductor laser device according to the fourth embodiment shown in FIG. A manufacturing process for the nitride-based semiconductor laser device 120 according to the fourth embodiment is now described with reference to FIGS.

First, as shown in FIG. 24, using an MOCVD method, an underlayer 50 made of AlGaN having a thickness of about 3 μm to about 4 μm and an In _0.35 Ga having a thickness of about 20 nm are formed on an n-type GaN substrate 41. _A release layer 31 made of _0.65 N is formed in this order. Also in this case, the crack 51 reaching the upper surface of the n-type GaN substrate 41 is formed in the underlayer 50 as in the manufacturing process of the third embodiment. Thereafter, the semiconductor laser element layer 93 is crystal-grown on the release layer 31.

  Here, in the manufacturing process according to the fourth embodiment, as shown in FIG. 24, when the semiconductor laser element layer 93 is grown on the underlayer 50, it extends in a stripe shape in the [1-100] direction (B direction). On the inner side surface 51a of the crack 51, the semiconductor laser element layer 93 grows while forming a (11-22) plane extending in the [11-2-5] direction (C2 direction) so as to take over the inner side surface 51a. Thereby, the (11-22) plane of the semiconductor laser element layer 93 is formed as the light emitting surface 120 a of the nitride-based semiconductor laser element 120.

  In the manufacturing process according to the fourth embodiment, on the inner surface 51b side of the crack 51, the semiconductor laser element layer 93 has a predetermined angle (= about 57 °) with respect to the [11-2-5] direction (C2 direction). The crystal grows while forming the crystal growth surface 120c composed of the (000-1) plane extending in the inclined direction.

Then, a current blocking layer 99 (see FIG. 16) made of SiO ₂ and a p-side electrode 100 (see FIG. 24) are formed on the semiconductor laser element layer 93. Thereafter, as shown in FIG. 25, the p-side electrode 100 side and the support substrate 81 are bonded via a bonding layer 82 made of AuSn. Similarly to the manufacturing process shown in FIG. 5, the semiconductor laser element layer 93 side is peeled off from the n-type GaN substrate 41 side by performing laser irradiation from the lower surface side of the n-type GaN substrate 41. In FIG. 25, the n-type GaN substrate 41 and the base layer 50 to be peeled are indicated by broken lines.

  Thereafter, as shown in FIG. 26, a position where a predetermined resonator surface is desired to be formed (near the crystal growth surface 120c shown in FIG. 25) is from the back surface side (lower surface side) of the semiconductor laser element layer 93 to the p-side electrode 100. By performing dry etching in the reaching direction (the direction of arrow C2), a groove 83 having a substantially (−1-12-2) surface on one side of the semiconductor laser element layer 93 is formed. Thereby, the substantially (−1-12-2) surface which is one side surface of the groove portion 83 is easily formed as the light reflecting surface 120b of the pair of resonator surfaces in the semiconductor laser element portion 130 (see FIG. 23). Is done. The groove 83 is formed so as to extend in the [1-100] direction (B direction) substantially parallel to the direction in which the crack 51 extends when viewed in a plan view.

  Thereafter, as shown in FIG. 26, the n-side electrode 101 is formed on the lower surface of the n-type buffer layer 94 in the region to be the semiconductor laser element portion 130 by using a vacuum evaporation method. Then, a linear scribe groove 102 is formed at a predetermined position on the back surface side of the bonding layer 82 by laser scribe or mechanical scribe so as to extend in the [1-100] direction (B direction). In this state, as shown in FIG. 26, by applying a load with the upper surface side (upper side) of the support substrate 81 as a fulcrum so that the lower surface side (lower side) of the support substrate 81 is opened, the wafer is formed in the scribe groove 102. Cleave at position (cleavage line 900).

  Finally, the nitride semiconductor laser device 120 according to the fourth embodiment shown in FIG. 23 is formed by dividing the device along the resonator direction (A direction in FIG. 26) into a chip.

  In the manufacturing process of the nitride-based semiconductor laser device 120 according to the fourth embodiment, as described above, the light emitting surface 120a composed of a substantially (11-22) plane substantially perpendicular to the main surface of the n-type GaN substrate 41 is formed. By forming the light emitting surface composed of the (11-22) surface so as to take over the inner side surface 51a of the crack 51 formed in the n-type GaN substrate 41 simultaneously with the crystal growth of the semiconductor laser element layer 93 in the manufacturing process. 120a can be formed. Thereby, even when the (11-22) surface having no cleavage property is used as the resonator surface, the light emitting surface 120a can be formed without using an etching process. Further, by temporarily forming not only the light emission surface 120a composed of the (11-22) plane but also the crystal growth surface 120c composed of the (000-1) plane by crystal growth, the surface of the semiconductor laser element layer 93 (mainly The flatness of the (surface) can be improved.

  Further, in the manufacturing process of the nitride-based semiconductor laser device 120 according to the fourth embodiment, a cleavage step is used by forming a flat light emitting surface 120a composed of a (000-1) plane using crystal growth. In addition, since the semiconductor laser element portion 130 having the resonator end face (light emitting surface 120a) can be easily formed, the manufacturing process can be simplified. The remaining effects of the fourth embodiment are similar to those of the aforementioned third embodiment.

(Fifth embodiment)
FIG. 27 is a perspective view showing the structure of a field effect transistor (FET) formed by using the forming method according to the fifth embodiment of the present invention. First, with reference to FIG. 27, the structure of the FET 200 formed by using the forming method according to the fifth embodiment will be described.

The FET 200 formed by using the forming method according to the fifth embodiment of the present invention is a HEMT (High Electron Mobility Transistor) having a so-called recess structure. As shown in FIG. 27, the FET 200 is formed on a support substrate 201 with a bonding layer 202 interposed therebetween. The FET 200 includes an insulating film 203, a semiconductor layer 204, and a source electrode 205, a drain electrode 206, and a gate electrode 207 formed on the main surface of the semiconductor layer 204. Here, the support substrate 201 is made of CuW, and the insulating film 203 is made of SiO ₂ having a thickness of about 200 nm.

  The semiconductor layer 204 has a first nitride semiconductor layer 208 made of undoped GaN having a thickness of about 3 μm, a second nitride semiconductor layer 209 made of AlGaN having a thickness of about 25 nm, and a thickness of about 25 nm. And a cap layer 210 made of Si-doped n-type GaN. The cap layer 210 is formed on a region of the second nitride semiconductor layer 209 excluding the vicinity of the gate electrode 207, and the region of the second nitride semiconductor layer 209 where the gate electrode 207 is formed is exposed on the surface. . The semiconductor layer 204, the first nitride semiconductor layer 208, the second nitride semiconductor layer 209, and the cap layer 210 are examples of the “nitride-based semiconductor layer” in the present invention.

  Here, a part of the first nitride semiconductor layer 208 is doped with an n-type impurity such as Si on the interface side with the second nitride semiconductor layer 209. Thereby, the drain current can be increased, and the performance of the FET 200 can be further improved.

  In addition, the gate electrode 207 is formed such that a longitudinal direction orthogonal to the arrangement direction of the source electrode 205 and the drain electrode 206 is parallel to the [11-20] direction of the semiconductor layer 204 (the B direction in FIG. 27).

The second nitride semiconductor layer 209 has a band gap larger than the band gap of the first nitride semiconductor layer 208, and between the second nitride semiconductor layer 209 and the first nitride semiconductor layer 208, A heterojunction is formed. At this time, a part of the second nitride semiconductor layer 209 is doped with an n-type impurity such as Si, and the product of the concentration of the n-type impurity and the thickness of the doping layer is 1 × 10 ¹³ cm ^−2. As described above, impurities are doped with a dose amount of 1 × 10 ¹³ cm ⁻² or more.

  The gate electrode 207 is made of, for example, a Pd layer and an Au layer, and is formed on the second nitride semiconductor layer 209. The source electrode 205 and the drain electrode 206 are made of, for example, a Ti layer and an Al layer, and are formed on the cap layer 210.

  In addition, since the (1-100) plane heterojunction is formed in the semiconductor layer 204, carriers generated by polarization in the heterojunction are reduced, so that the sheet carrier concentration of the heterojunction can be lowered. . That is, originally, a nitride-based material has a large spontaneous polarization in the [0001] direction, and when there is a strain in the [0001] direction, a large polarization is generated due to the piezo effect. Many carriers accumulate in the heterojunction ((0001) plane). In the fifth embodiment, the occurrence of the above phenomenon is avoided by forming a heterojunction of the (1-100) plane of the semiconductor layer 204.

  28 to 33 are cross-sectional views for explaining a manufacturing process of the FET according to the fifth embodiment shown in FIG. A manufacturing process for the FET 200 according to the fifth embodiment is now described with reference to FIGS.

  First, as shown in FIG. 28, the same shape as the manufacturing process of the first embodiment is formed on the main surface composed of the m-plane ((1-100) plane) of the n-type 4H—SiC substrate 221 using an etching technique. The groove part 21 which has is formed. The n-type 4H—SiC substrate 221 is an example of the “growth substrate” in the present invention.

Next, the peeling layer 31 made of In _0.35 Ga _0.65 N having a thickness of about 20 nm is formed on the n-type 4H—SiC substrate 221 having the groove portion 21 by the MOCVD method, and the first nitride semiconductor layer. 208, the second nitride semiconductor layer 209, and the cap layer 210 are sequentially stacked to form the semiconductor layer 204.

  At this time, in the fifth embodiment, as shown in FIG. 28, the semiconductor layer 204 takes over the (000-1) surface of the groove portion 21 on the inner surface 21 a made of the (000-1) surface of the groove portion 21. The crystal grows while forming a (000-1) plane extending in the [1-100] direction (C2 direction). Thereby, the (000-1) plane of the semiconductor layer 204 is formed as the side surface 204a. On the (0001) plane (inner side surface 21b) side facing the (000-1) plane of the groove portion 21, the semiconductor layer 204 has a predetermined angle (= about 62 °) with respect to the side surface 204a starting from the inner side surface 21b. The crystal grows while forming the inclined surface 204b (facet) composed of the (1-101) plane extending in the inclined direction.

Thereafter, as shown in FIG. 29, a temporary support substrate 222 is bonded to the cap layer 210 side of the semiconductor layer 204. As the temporary support substrate 222, for example, a heat-peeling sheet in which a heat-peeling adhesive material is formed on one side of a film such as polyester is used, and the side of the film on which the heat-peeling adhesive material is formed is adhered to the semiconductor layer 204. . Thereafter, the n-type 4H—SiC substrate 221 is peeled from the semiconductor layer 204 by the same manufacturing process as in the first embodiment. Thereafter, as shown in FIG. 30, an insulating film 203 made of SiO ₂ is formed on the exposed lower surface of the first nitride semiconductor layer 208. Further, the support substrate 201 made of CuW is bonded through the AuSn bonding layer 202. Thereafter, as shown in FIG. 31, the temporary support substrate 222 (see FIG. 30) is peeled off from the semiconductor layer 204.

  Thereafter, as shown in FIG. 32, a groove 223 extending in the [11-20] direction (B direction) is formed in the cap layer 210 of the semiconductor layer 204 using an etching technique. Then, as shown in FIG. 33, a Ti layer and an Al layer are deposited on the cap layer 210 in the order from the cap layer 210 side, and a source electrode 205 and a drain electrode 206 are formed using a lift-off method, respectively. Further, a Pd layer and an Au layer are deposited in a predetermined position of the groove portion 223 sandwiched between the cap layers 210 in order from the cap layer 210 side, and the gate electrode 207 is formed by using a lift-off method.

  Finally, by dividing the device into chips, the FET 200 according to the fifth embodiment shown in FIG. 27 is formed.

  In the manufacturing process of the FET 200 according to the fifth embodiment, as described above, the step of forming the groove 21 in the main surface of the n-type 4H—SiC substrate 221 and the main surface of the n-type 4H—SiC substrate 221 include (1- 100) plane, a side surface 204a consisting of the (000-1) plane starting from the inner side surface 21a of the groove 21, and a (1-101) plane starting from the inner side 21b of the groove 21. A step of forming the semiconductor layer 204 including the inclined surface 204b, so that when the semiconductor layer 204 is crystal-grown on the n-type 4H—SiC substrate 221, the upper surface of the growth layer ((1- (100) plane) than the growth rate of growth, the side surface 204a consisting of the (000-1) plane starting from the inner side surface 21a of the groove 21 and the inner side surface 21b of the groove 21 (1) Since the growth rate of the inclined surface 204b formed of 101) surface is formed is slow, the upper surface of the growth layer surface ((1-100 semiconductor layer 204)) is grown while maintaining flatness. Thereby, the flatness of the surface of the semiconductor layer 204 can be further improved.

  Further, by forming the FET 200 according to the fifth embodiment, the high concentration sheet carrier is not accumulated at the hetero interface unlike the conventional FET using the (0001) plane heterojunction. The concentration can be reduced. That is, the pinch-off voltage can be precisely controlled, and a normally-off type FET different from a conventional FET using a (0001) plane heterojunction can be formed. The remaining effects of the fifth embodiment are similar to those of the aforementioned first embodiment.

(Sixth embodiment)
FIG. 34 is a cross-sectional view showing the structure of a solar cell formed using the forming method according to the sixth embodiment of the present invention. 35 to 37 are cross-sectional views for explaining a manufacturing process of the solar cell according to the sixth embodiment shown in FIG. First, with reference to FIG. 34 and FIG. 36, the structure of the solar cell 300 formed using the forming method according to the sixth embodiment will be described.

  A solar cell 300 formed by using the forming method according to the sixth embodiment of the present invention is made of a nitride semiconductor having a wurtzite structure whose main surface is an m-plane ((1-100) plane). Moreover, the shape of the solar cell 300 has a shape such as a square shape, a rectangular shape, a rhombus, or a parallelogram when viewed in plan (viewed from the upper surface side of the solar cell 300).

Moreover, as shown in FIG. 34, the semiconductor layer 310 is formed in the solar cell 300. FIG. The semiconductor layer 310 has a thickness of about 0.05 μm to about 0.2 μm and a Si-doped In _0.5 Ga _{0.5 of} about 1 × 10 ¹⁸ cm ⁻³ to about 1 × 10 ¹⁹ cm ^−3. An n-type layer 311 made of N, and about 1 × 10 ¹⁶ cm ⁻³ to about 1 × 10 ¹⁷ cm ⁻³ Mg-doped In _0.5 Ga _0.5 N having a thickness of about 0.5 μm to about 3 μm. A p-type layer 312 is formed. The semiconductor layer 310, the n-type layer 311 and the p-type layer 312 are examples of the “nitride-based semiconductor layer” in the present invention.

  Here, in the sixth embodiment, from the n-type layer 311 to the p-type layer 312, the crystal growth surface 310 a composed of the (000-1) plane and the crystal growth surface 310 b composed of the (1-101) plane of the semiconductor layer 310. A plurality of recesses 320 are formed. The crystal growth surface 310a is an example of the “side surface” in the present invention. In addition, as shown in FIG. 36, the crystal growth surface 310a is an inner side surface 21a composed of the (000-1) plane of the groove portion 21 formed in advance on the main surface of the GaN layer 303 on the sapphire substrate 301 during the manufacturing process described later. Is formed so as to extend in the [1-100] direction substantially perpendicular to the main surface of the GaN layer 303. The sapphire substrate 301 is an example of the “growth substrate” in the present invention. As shown in FIG. 34, the crystal growth surface 310b is an inclined surface starting from the inner side surface 21b of the groove portion 21, and is formed so as to form an obtuse angle with respect to the upper surface (main surface) of the semiconductor layer 310. Yes.

As shown in FIG. 34, an n-side translucent electrode 313 made of ITO is formed on the lower surface of the n-type layer 311. An n-side pad electrode 314 made of Au is formed in a partial region on the lower surface of the n-side translucent electrode 313. In addition, an insulating film 321 made of transparent SiO ₂ is formed in the recess 320 so as to have a predetermined thickness. A p-side electrode 315 composed of an Ag layer and a Pt layer is formed so as to cover the upper surface of the substantially V-shaped insulating film 321 and the upper surface of the p-type layer 312 in order from the p-type layer 312. In addition, a support substrate 330 made of CuW having a thickness of about 100 μm and a conductive film 331 formed on the lower surface is joined to the p-side electrode 315 via a joining layer 33 made of AuSn. A p-side pad electrode 316 is formed in a predetermined region on the lower surface of the conductive film 331.

  Here, as the support substrate 330, for example, glass, a metal plate, a polyimide resin, or the like can be used. As the metal plate, stainless steel, Ti, Cr, or the like can be used. A substrate in which an insulator such as glass is coated on a metal plate made of stainless steel, Ti, or the like can also be used.

  Further, as the conductive film 331 having the role of the back electrode, for example, a metal film made of Mo, Ta, Cr, Ni, Ti, or an alloy thereof can be used. By using a metal film having a predetermined resistance value for the back electrode, the series resistance of the thin film solar cell can be reduced, so that the conversion efficiency of the solar cell can be improved.

Further, as the n-side translucent electrode 313 that transmits sunlight and collects excited carriers, a thin film made of a material having translucency in the near ultraviolet region to the near infrared region and having conductivity. Can be used. Specifically, for example, translucent IXO (X-added In ₂ O ₃ , X as Sn, Mn, Mo, Ti, Zn, etc.), F-added SnO ₂ , Al-added ZnO, Ga-added ZnO, or the like is used. Can do.

  In addition, as the n-side pad electrode 314 and the p-side pad electrode 316, for example, Al, Mg, Au, or the like can be used. In addition, the n-side pad electrode 314 and the p-side pad electrode 316 are formed of Al and Cr, Al and Ni, and Al, respectively, in order to improve adhesion with the n-side translucent electrode 313 and the conductive film 331. A multilayer metal film made of NiCr or the like may be used.

  Next, with reference to FIG. 5 and FIGS. 34 to 37, a manufacturing process for the solar cell 300 according to the sixth embodiment will be described.

  First, as shown in FIG. 35, the low temperature buffer layer 302 and the GaN layer 303 made of GaN are formed on the main surface made of the r-plane ((1-102) plane) of the sapphire substrate 301 by using the MOCVD method. Form in order. Thereafter, by using an etching technique, the GaN layer 303 has a width of about 1 μm in the [0001] direction (A direction), a depth of about 5 μm in the C1 direction, and a [11-20] direction (B A plurality of groove portions 21 extending in the direction) are formed. At this time, in the groove portion 21, an inner side surface 21 a composed of a (000-1) plane substantially perpendicular to the (1-100) plane of the GaN layer 303 and an inner side surface 21 b composed of a (0001) plane are formed. The

Next, as shown in FIG. 36, a peeling layer 31 made of In _0.9 Ga _0.1 N is formed on the GaN layer 303 having the groove 21 and about 0.05 μm to about 0.00 μm by MOCVD. About 1 × 10 ¹⁸ cm ⁻³ to about 1 × 10 ¹⁹ cm ⁻³ of Si-doped In _0.5 Ga _0.5 N having a thickness of 2 μm and an n-type layer 311, and about 0.5 μm to about 3 μm A p-type layer 312 made of Mg-doped In _0.5 Ga _0.5 N of about 1 × 10 ¹⁶ cm ⁻³ to about 1 × 10 ¹⁷ cm ⁻³ having a thickness of 310 is formed.

  At this time, in the sixth embodiment, as shown in FIG. 36, the semiconductor layer 310 takes over the (000-1) surface of the groove portion 21 on the inner surface 21 a made of the (000-1) surface of the groove portion 21. The crystal grows while forming a (000-1) plane extending in the [1-100] direction (C2 direction). As a result, the (000-1) plane of the semiconductor layer 310 is formed as the crystal growth plane 310a. Further, on the (0001) plane (inner side surface 21b) side facing the (000-1) plane of the groove portion 21, the semiconductor layer 310 has a predetermined angle (= about) with respect to the crystal growth surface 310a starting from the inner side surface 21b. The crystal grows while forming a crystal growth surface 310b (facet) composed of a (1-101) plane extending in an inclined direction (62 °).

Thereafter, as shown in FIG. 37, a predetermined thickness is formed on the upper surface of the groove 21 and the recess 320 (the region above the groove 21 including the groove 21 shown in FIG. 35) sandwiched between the crystal growth surface 310a and the crystal growth surface 310b. An insulating film 321 made of SiO ₂ is formed so as to have.

  Thereafter, as shown in FIG. 37, a p-side electrode 315 is formed so as to cover predetermined regions on the upper surfaces of the insulating film 321 and the p-type layer 312. Then, the p-side electrode 315 side and the conductive film 331 formed on the lower surface of the support substrate 330 are bonded via the bonding layer 33 made of AuSn.

  Thereafter, as in the manufacturing process shown in FIG. 5, the semiconductor layer is irradiated by irradiating a YAG laser having a wavelength of about 1065 nm in the C2 direction from the lower surface side of the sapphire substrate 301 toward the peeling layer 31 (see FIG. 37). The 310 side is peeled off from the sapphire substrate 301 side. Thus, the insulating film 321a and the semiconductor layer 310 on the A2 direction side of the insulating film 321a shown in FIG. 37 are also removed together with the sapphire substrate 301.

  Then, as shown in FIG. 34, after the surface of the n-type layer 311 is cleaned, an n-side translucent electrode 313 made of ITO is formed on the lower surface of the n-type layer 311 and the n-side translucent electrode is formed. An n-side pad electrode 314 is formed in a predetermined region on the lower surface of 313. In addition, a p-side pad electrode 316 is formed in a predetermined region on the lower surface of the conductive film 331. Thus, the solar cell 300 formed using the method for forming the support substrate having the nitride-based semiconductor layer according to the sixth embodiment shown in FIG. 34 is formed.

  In the manufacturing process of the solar cell 300 according to the sixth embodiment, as described above, the step of forming the groove 21 on the main surface of the GaN layer 303 on the sapphire substrate 301 and the (1-100) ) From the main surface, the crystal growth surface 310a from the (000-1) plane starting from the inner side 21a of the groove 21, and the (1-101) plane from the inner side 21b of the groove 21 Forming a semiconductor layer 310 including a crystal growth surface 310b to be formed, so that when the semiconductor layer 310 is crystal-grown on the GaN layer 303, an upper surface of the growth layer ((1-100) of the semiconductor layer 310). The crystal growth surface 310a composed of the (000-1) plane starting from the inner side surface 21a of the groove portion 21 and the inner side surface 21b of the groove portion 21 as the starting point. (1-101) The growth rate crystal growth surface 310b is formed slow consisting surface, the upper surface of the growth layer ((1-100) plane of the semiconductor layer 310) is grown while maintaining flatness. Thereby, the flatness of the surface of the semiconductor layer 310 can be further improved. The remaining effects of the sixth embodiment are similar to those of the aforementioned first embodiment.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the manufacturing process of the LED chip 30 according to the first embodiment, nitriding is performed on the main surface composed of the a-plane ((11-20) plane) of the growth substrate (n-type GaN substrate 11) in which the groove 21 is formed. An example in which a physical semiconductor layer (light emitting element layer 12) was grown to form side surfaces (crystal growth surface 12a and crystal growth surface 12b) composed of (000-1) plane and (11-22) plane was shown. However, the present invention is not limited to this, and an LED chip may be formed by growing a nitride-based semiconductor layer on a growth substrate having an m-plane ((1-100) plane) as a main surface. In this case, the light emitting element layer 12 has a (000-1) end surface extending substantially perpendicular to the m-plane of the growth substrate and a predetermined plane with respect to the m-plane ((1-100) plane) of the growth substrate. An end surface (1-101) extending in an inclined direction with an angle (= about 62 °) is formed. Even when configured as in this modification, the growth rate of the m-plane of the light emitting element layer 12 is (000-1) as in the LED chip 30 formed using the forming method according to the first embodiment. ) Since the growth rate at which the end face and the (1-101) end face grow is slow, the upper surface of the growth layer (m-plane of the light emitting element layer 12) grows while maintaining flatness. As a result, the flatness of the surface of the light emitting element layer 12 can be further improved.

  In the manufacturing process of the LED chip 40 according to the second embodiment, a nitride-based material is formed on the main surface made of the (1-10-2) plane of the growth substrate (n-type GaN substrate 41) on which the crack 51 is formed. Although an example in which the semiconductor layer (light emitting element layer 42) was grown to form side surfaces (crystal growth surface 42a and crystal growth surface 42b) composed of the (000-1) plane and the (1-101) plane was shown, The present invention is not limited to this, and an LED chip may be formed by growing a nitride-based semiconductor layer on a growth substrate having a (11-2-2) plane as a main surface. In this case, the (000-1) end face and the (11-22) end face extending at a predetermined angle with respect to the (11-2-2) face of the growth substrate are formed on the light emitting element layer 42. Is done. Even when configured as in this modification, the growth rate at which the (11-2-2) plane of the light emitting element layer 42 grows is the same as in the LED chip 40 formed by using the forming method according to the second embodiment. However, since the growth rate at which the (000-1) end face and the (11-22) end face grow is slow, the upper surface of the growth layer (m-plane of the light emitting element layer 42) grows while maintaining flatness. As a result, the flatness of the surface of the light emitting element layer 42 can be further improved.

  In the nitride-based semiconductor laser device 80 formed by using the formation method according to the third embodiment, a nitride-based semiconductor layer is formed on the main surface composed of the m-plane ((1-100) plane) of the growth substrate. Although an example in which one resonator surface (light emitting surface) and a reflecting surface that reflects laser light to the outside are formed by growth is shown, the present invention is not limited to this, and from the plane orientation exemplified below The nitride-based semiconductor layer may be grown using a growth substrate having a main surface.

  For example, a growth substrate having a main surface composed of a-plane ((11-20) plane) may be used. In this case, the light emitting side resonator surface (light emitting surface) of the nitride-based semiconductor layer and the reflecting surface for reflecting the laser light to the outside are the (000-1) surface and the (11-22) surface, respectively. Configured as follows. Further, the reflecting surface ((11-22) surface) is formed to extend in a direction inclined by about 58 ° with respect to the light emitting surface ((000-1) surface). For the resonator surface (light reflecting surface) on the light reflecting side, a light reflecting surface composed of a (0001) surface is formed by etching, as in the manufacturing process of the first embodiment.

  Further, a growth substrate having a main surface made of a (1-10-4) plane may be used. In this case, the resonator surface (light emitting surface) on the light emitting side of the nitride-based semiconductor layer and the reflecting surface that reflects the laser light to the outside are the (1-101) plane and the (000-1) plane, respectively. Configured as follows. The reflection surface ((000-1) surface) is formed to extend in a direction inclined by about 65 ° with respect to the light emission surface ((1-101) surface). In addition, about the light reflection surface, the light reflection surface which consists of (-110-1) surface is formed by an etching similarly to the manufacturing process of the said 1st Embodiment.

  Further, a growth substrate having a main surface composed of (11-2-5) plane may be used. In this case, the resonator surface on the light emitting side of the nitride-based semiconductor layer and the reflecting surface that reflects the laser light to the outside are configured to include (11-22) plane and (000-1) plane, respectively. . Further, the reflecting surface ((000-1) surface) is formed to extend in a direction inclined by about 57 ° with respect to the light emitting surface ((11-22) surface). In addition, about the light reflection surface, the light reflection surface which consists of a (-1-12-2) surface is formed by an etching.

  Further, a growth substrate having a main surface composed of a (1-10-2) plane may be used. In this case, the reflection surface for reflecting the laser beam to the outside is configured to be a (000-1) plane. Further, the reflection surface ((000-1) surface) is formed to extend in a direction inclined by about 47 ° with respect to a direction ([1-10-2] direction) perpendicular to the main surface of the growth substrate. . Therefore, laser light can be emitted in a direction ([1-10-2] direction) substantially perpendicular to the main surface of the semiconductor layer. The resonator surface (light emitting surface and light reflecting surface) is formed as a side surface extending in the [1-10-2] direction by etching the semiconductor layer.

  Further, a growth substrate having a main surface composed of (11-2-3) plane may be used. Also in this case, the reflection surface for reflecting the laser beam to the outside is configured to be a (000-1) plane. The reflection surface ((000-1) surface) is formed to extend in a direction inclined by about 43 ° with respect to a direction ([11-2-3] direction) perpendicular to the main surface of the growth substrate. . Therefore, laser light can be emitted in a direction ([11-2-3] direction) substantially perpendicular to the main surface of the semiconductor layer. The resonator surface (light emitting surface and light reflecting surface) is formed as a side surface extending in the [11-2-3] direction by etching the semiconductor layer.

  In the nitride-based semiconductor laser device 120 formed by using the formation method according to the fourth embodiment, a nitride-based semiconductor layer is grown on the main surface made of the (11-2-5) plane of the growth substrate. Although an example in which one resonator surface (light emitting surface) is formed is shown, the present invention is not limited to this, and a nitride system is used by using a growth substrate having a main surface having a plane orientation exemplified below. A semiconductor layer may be grown.

  For example, a growth substrate having a main surface composed of an m-plane ((1-100) plane) may be used. In this case, the light emitting surface of the nitride-based semiconductor layer is configured to be a (000-1) plane. As for the resonator surface (light reflection surface) on the light reflection side, a light reflection surface composed of a (0001) surface is formed by etching, as in the manufacturing process of the fourth embodiment.

  Further, a growth substrate having a main surface composed of a-plane ((11-20) plane) may be used. In this case, the light emitting surface of the nitride-based semiconductor layer is configured to be a (000-1) plane. As for the resonator surface (light reflection surface) on the light reflection side, a light reflection surface composed of a (0001) surface is formed by etching, as in the manufacturing process of the fourth embodiment.

  Further, a growth substrate having a main surface made of a (1-10-4) plane may be used. In this case, the light emitting surface of the nitride-based semiconductor layer is configured to be a (1-101) plane. In addition, about the light reflection surface, the light reflection surface which consists of (-110-1) surface is formed by an etching similarly to the manufacturing process of the said 4th Embodiment.

  In the nitride-based semiconductor laser device 120 formed by using the forming method according to the fourth embodiment, the (11-22) plane due to crystal growth of the semiconductor laser device layer 93 is used as the light emitting surface 120a and etched. Although an example in which the light reflecting surface 120b composed of a substantially (-1-12-2) surface is formed is shown, the present invention is not limited to this, and the (11-22) surface is a light reflecting surface, and substantially (- The 1-12-2) surface may be configured to be a light emitting surface.

  Further, in the manufacturing process of the LED chip 40 according to the second embodiment, the example in which the scribe scratches 70 for introducing cracks are formed in the underlayer 50 in a broken line shape (at intervals of about 50 μm) is shown, but the present invention is not limited thereto. Instead, scribe scratches may be formed at both ends of the base layer 50 in the B direction (see FIG. 12) (regions corresponding to the ends of the n-type GaN substrate 41). Even if comprised in this way, the crack 51 extended in a B direction can be introduce | transduced easily from the scribe flaw of both ends.

  In the manufacturing process of the nitride-based semiconductor laser device 80 according to the third embodiment, the crack 51 is spontaneously formed in the underlayer 50 using the lattice constant difference between the n-type GaN substrate 41 and the underlayer 50. However, the present invention is not limited to this, and, similarly to the manufacturing process of the second embodiment, by forming scribe scratches in the form of broken lines on the underlying layer on the n-type GaN substrate. You may make it form the crack by which the crack generation position was controlled.

  In the manufacturing process of the nitride-based semiconductor laser device 80 according to the third embodiment, the crack 51 is spontaneously formed in the underlayer 50 due to the lattice constant difference between the n-type GaN substrate 41 and the underlayer 50. Although an example of use is shown, the present invention is not limited to this, and scribe scratches may be formed only at both end portions of the base layer 50 (regions corresponding to the end portions in the B direction of the n-type GaN substrate 41). Even if comprised in this way, the crack 51 extended in a B direction can be introduce | transduced easily from the scribe flaw of both ends.

  Further, in the manufacturing processes of the second to fourth embodiments, an example in which an n-type GaN substrate is used as a base substrate and a base layer made of AlGaN is formed on the n-type GaN substrate has been described. In addition to using an InGaN substrate as a base substrate, a base layer made of GaN or AlGaN may be formed on the InGaN substrate.

In the manufacturing processes of the third and fourth embodiments, an example of forming a nitride-based semiconductor laser element having a gain-guided oxide stripe structure has been described. However, the present invention is not limited to this, and the ridge portion The present invention may also be applied to the case where a nitride-based semiconductor laser device having a refractive index guided ridge waveguide structure embedded with a current blocking layer made of SiO ₂ or AlGaN is used.

  Moreover, although the example in which the solar cell 300 is formed is shown in the sixth embodiment, the present invention is not limited to this, and the method for forming a support substrate having a nitride-based semiconductor layer according to the present invention can be used, for example, A conversion film, a photoelectric conversion element, an imaging element, or the like may be formed.

It is sectional drawing for demonstrating the schematic structure of the semiconductor element formed using the formation method of the support substrate which has the nitride type semiconductor layer by this invention. The figure which showed the range of the normal direction of the main surface of the growth board | substrate in the case of forming a semiconductor element using the crystal orientation of nitride type semiconductor, and the formation method of the support substrate which has the nitride type semiconductor layer in this invention It is. It is sectional drawing for demonstrating the outline of the formation method of the support substrate which has the nitride type semiconductor layer by this invention. It is sectional drawing for demonstrating the outline of the formation method of the support substrate which has the nitride type semiconductor layer by this invention. It is sectional drawing for demonstrating the outline of the formation method of the support substrate which has the nitride type semiconductor layer by this invention. It is sectional drawing which showed the structure of the LED chip formed using the formation method by 1st Embodiment of this invention. FIG. 7 is a plan view for explaining a manufacturing process of the LED chip according to the first embodiment shown in FIG. 6. FIG. 7 is a cross-sectional view for explaining a manufacturing process of the LED chip according to the first embodiment shown in FIG. 6. FIG. 7 is a cross-sectional view for explaining a manufacturing process of the LED chip according to the first embodiment shown in FIG. 6. It is sectional drawing which showed the structure of the LED chip formed using the formation method by 2nd Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the LED chip by 2nd Embodiment shown in FIG. It is a top view for demonstrating the manufacturing process of the LED chip by 2nd Embodiment shown in FIG. It is a top view for demonstrating the manufacturing process of the LED chip by 2nd Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the LED chip by 2nd Embodiment shown in FIG. It is sectional drawing in the surface along the resonator direction of the nitride type semiconductor laser element for demonstrating the structure of the nitride type semiconductor laser element formed using the formation method by 3rd Embodiment of this invention. FIG. 16 is a cross-sectional view showing the structure of a nitride-based semiconductor laser device formed using the formation method according to the third embodiment shown in FIG. FIG. 16 is a cross-sectional view showing the structure of a nitride-based semiconductor laser device formed using the formation method according to the third embodiment shown in FIG. FIG. 16 is a cross-sectional view for explaining a manufacturing process for the nitride-based semiconductor laser device according to the third embodiment shown in FIG. 15. FIG. 16 is a cross-sectional view for explaining a manufacturing process for the nitride-based semiconductor laser device according to the third embodiment shown in FIG. 15. FIG. 16 is a cross-sectional view for explaining a manufacturing process for the nitride-based semiconductor laser device according to the third embodiment shown in FIG. 15. FIG. 16 is a cross-sectional view for explaining a manufacturing process for the nitride-based semiconductor laser device according to the third embodiment shown in FIG. 15. FIG. 16 is a cross-sectional view for explaining a manufacturing process for the nitride-based semiconductor laser device according to the third embodiment shown in FIG. 15. It is sectional drawing in the surface along the resonator direction of the nitride type semiconductor laser element for demonstrating the structure of the nitride type semiconductor laser element formed using the formation method by 4th Embodiment of this invention. FIG. 24 is a cross-sectional view for explaining the manufacturing process for the nitride-based semiconductor laser device according to the fourth embodiment shown in FIG. FIG. 24 is a cross-sectional view for explaining the manufacturing process for the nitride-based semiconductor laser device according to the fourth embodiment shown in FIG. FIG. 24 is a cross-sectional view for explaining the manufacturing process for the nitride-based semiconductor laser device according to the fourth embodiment shown in FIG. It is the perspective view which showed the structure of the field effect transistor (FET) formed using the formation method by 5th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of FET by 5th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of FET by 5th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of FET by 5th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of FET by 5th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of FET by 5th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of FET by 5th Embodiment shown in FIG. It is sectional drawing which showed the structure of the solar cell formed using the formation method by 6th Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the solar cell by 6th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the solar cell by 6th Embodiment shown in FIG. It is sectional drawing for demonstrating the manufacturing process of the solar cell by 6th Embodiment shown in FIG.

Explanation of symbols

1 First semiconductor layer (growth substrate, nitride semiconductor layer)
2 Light emitting layer (nitride semiconductor layer)
3 Second semiconductor layer (nitride-based semiconductor layer)
7 Growth substrate 9a Nitride semiconductor layer 10a, 10b Side surface 11 n-type GaN substrate (growth substrate)
12, 42 Light emitting element layer (nitride semiconductor layer)
12a, 42a, 310a Crystal growth surface (side surface)
13, 43 n-type cladding layer (nitride semiconductor layer)
14, 44 Light emitting layer (nitride semiconductor layer)
15, 45 p-type cladding layer (nitride semiconductor layer)
21 Groove (recess)
21a, 51a Inner surface (one inner surface of the recess)
41 n-type GaN substrate (growth substrate, base substrate)
32, 81, 201, 330 Support substrate 50 Underlayer 51 Crack (recess)
90b Light reflecting surface (side)
93 Semiconductor laser element layer (nitride-based semiconductor layer)
94 n-type buffer layer (nitride semiconductor layer)
95 n-type cladding layer (nitride semiconductor layer)
96 Light emitting layer (nitride semiconductor layer)
97 p-type cladding layer (nitride-based semiconductor layer)
98 p-type contact layer (nitride semiconductor layer)
120a Light exit surface (side surface)
204, 310 Semiconductor layer (nitride semiconductor layer)
204a Side surface 208 First nitride semiconductor layer (nitride-based semiconductor layer)
209 Second nitride semiconductor layer (nitride semiconductor layer)
210 Cap layer (nitride semiconductor layer)
221 n-type 4H-SiC substrate (growth substrate)
301 Sapphire substrate (growth substrate)
311 n-type layer (nitride semiconductor layer)
312 p-type layer (nitride semiconductor layer)

Claims (9)

Forming a recess in the main surface of the growth substrate;
A main surface comprising {A + B, A, -2A-B, L} planes (an integer in which at least one of A and B is not 0) and one inner surface of the recess; (000-1) plane starting from the above, or {A + B, A, -2A-B, 2A + B} plane (where A ≧ 0 and B ≧ 0, and at least one of A and B is Forming a nitride-based semiconductor layer including a side surface made of an integer other than 0),
Bonding a support substrate to the nitride-based semiconductor layer,
A method for forming a support substrate having a nitride semiconductor layer, wherein the recess extends in a direction substantially parallel to a main surface of the growth substrate and a (0001) plane of the nitride semiconductor layer.   The method for forming a support substrate having a nitride-based semiconductor layer according to claim 2, further comprising a step of removing the growth substrate after the step of bonding the support substrate to the nitride-based semiconductor layer.   The method for forming a support substrate having a nitride-based semiconductor layer according to claim 1, wherein the growth substrate is made of a nitride-based semiconductor.   The support substrate having a nitride-based semiconductor layer according to claim 1, wherein a main surface of the growth substrate is either a (1-100) plane or a (11-20) plane. Forming method. The inner surface includes a (000-1) surface,
The step of forming the nitride-based semiconductor layer forms the nitride-based semiconductor layer having the side surface made of the (000-1) plane in a region corresponding to the inner side surface made of the (000-1) plane. The formation method of the support substrate which has a nitride type semiconductor layer of any one of Claims 1-4 including a process.   The method for forming a support substrate having a nitride-based semiconductor layer according to claim 1, wherein the growth substrate includes a base substrate and a base layer formed on the base substrate. The underlayer includes AlGaN;
The lattice constant of the underlying substrate and the undercoat layer, respectively, when the c ₁ and c _2, c _1> c having _two relationships, nitride semiconductor according to any one of claims 1 to 6 A method for forming a support substrate having a layer. The step of forming a recess in the main surface of the growth substrate includes:
8. The method according to claim 1, further comprising forming a crack extending in a direction substantially parallel to a main surface of the growth substrate and a (0001) plane of the base layer in the base layer. A method for forming a support substrate having the nitride-based semiconductor layer described in 1. Starting from a main surface consisting of {A + B, A, -2A-B, L} plane (an integer in which at least one of A and B is not 0) and one inner surface of a recess formed in the growth substrate (000-1) plane or {A + B, A, -2A-B, 2A + B} plane (where A ≧ 0 and B ≧ 0, and at least one of A and B is not 0) A nitride-based semiconductor layer including a side surface made of an integer),
A support substrate having a nitride-based semiconductor layer, comprising a support substrate bonded to the nitride-based semiconductor layer.

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