JP2009231898A - Error correction device and error correction method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To predict an error position with a high probability. <P>SOLUTION: An error correction device 1 detects positions of error data of block data 5 for each line using an error data position detection section 2. Then a burst error prediction section 3 refers to positions of error data of other lines, and predicts whether error data at a position detected by the error data position detection section 2 is a burst error. A correction execution section 4 makes erasure correction for error data predicted as a burst error by the burst error prediction section 3, and detects and corrects error data other than the error data predicted as the burst error. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an error correction apparatus and an error correction method, and more particularly, to an error correction apparatus and an error correction method for correcting error data included in block data of an optical disk taken in block units.

In general, when reading data from an optical disk, it is known that continuous data errors (burst errors) occur due to tracking errors, circumferential scratches, and dirt.
As a countermeasure, there is known a method in which an ECC (Error Check and Correct) parity such as a Reed-Solomon code is added and recorded for each line interleaved in the orthogonal direction, and corrected at the time of reproduction.

  In recent years, due to the increase in the density of optical disc data, the number of error data has increased, the position where error data exists (hereinafter simply referred to as “error position”) and the numerical value of error data (hereinafter simply referred to as “error value”). ) Since the number of correctable data reaches the limit only by detection correction that corrects data by obtaining both, in addition to detection correction, erasure correction that predicts the error position in advance and corrects the data is combined. An attempt is made to deal with more errors (see, for example, Patent Document 1).

FIG. 16 is a diagram illustrating an example of a block code.
Error data correction is performed sequentially for each line (shaded portion in FIG. 16) from the left to the right for a total of 208 bytes of main data 192 bytes + ECC parity 16 bytes for one line. At this time, there is no mutual relationship with other lines. Generally, the ECC parity is 2t (t = 1, 2,... N) bytes, the number of bytes that can be detected and corrected is k bytes (k pieces), and the number of bytes that can be lost and corrected is s bytes (s pieces). Then, there is a relationship of the following formula (1).

2k + s ≦ 2t (1)
Accordingly, if only detection and correction are performed, an error of up to 8 bytes, which is half of the ECC parity (16 bytes), can be corrected in one line.

Furthermore, when erasure correction is combined, the number of errors that can be corrected can be increased. For example, if 8 error positions are known in advance, a total of 12 errors can be corrected by 8 erasure corrections + 4 detection corrections. Further, if all 16 error positions are known in advance, 16 errors can be corrected only by erasure correction. However, in this case, since detection and correction cannot be performed, if there is an unexpected error, correction becomes impossible.
JP-A-5-74066

  In order to perform erasure correction, a flag (erasure flag) is set at the position of data that seems to have an error. The number of flags is s determined by the above-described equation (1). However, even if there is no error at the position where the flag is set, the flag is used. On the contrary, the correction limit will be lowered.

  As described above, when the error position is not predicted, the ECC parity byte for correcting the correct data is wasted, and it is necessary to predict the error position with high probability.

  The present invention has been made in view of these points, and an object thereof is to provide an error correction apparatus and an error correction method capable of correcting more errors.

  In order to achieve the above object, an error correction apparatus and an error correction method are provided. This error correction apparatus and error correction method corrects error data included in block data of an optical disk taken in block units, and includes an error data position detection unit, a burst error prediction unit, and a correction execution unit. ing.

The error data position detection unit detects the position of the error data of the block data for each line.
The burst error prediction unit refers to the position of the error data on another line, and predicts whether or not the error data at the position detected by the error data position detection unit is a burst error.

  The correction execution unit performs erasure correction on the error data predicted by the burst error prediction unit of each line as a burst error, and performs detection correction on the other error data.

  According to such an error correction apparatus and error correction method, the error data position detection unit detects the position of the error data of the block data for each line. The burst error prediction unit refers to the position of error data on another line, and predicts whether or not the error data at the position detected by the error data position detection unit is a burst error. Then, the correction execution unit performs erasure correction on the error data predicted by the burst error prediction unit of each line as a burst error, and performs detection correction on the other error data.

  According to the disclosed error correction apparatus and error correction method, more errors can be corrected.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
First, an outline of the present invention will be described, and then an embodiment will be described.
FIG. 1 is a diagram showing an outline of the present invention.

  An error correction apparatus 1 shown in FIG. 1 corrects error data included in block data 5 of an optical disk taken in block units. An error data position detection unit 2, a burst error prediction unit 3, and a correction execution unit 4 And have.

The type of optical disc is not particularly limited as long as it has parity bits for error correction.
The block data 5 is composed of a main data area and a parity area.

The error data position detector 2 detects the position of the error data of the block data 5 for each line.
In FIG. 1, as an example, the direction orthogonal to the recording direction on the disc is set as the detection direction, and one line of data arranged in the detection direction is detected sequentially from the left side to the right side of the drawing.

The burst error prediction unit 3 refers to the position of error data on another line and predicts whether or not the error data at the position detected by the error data position detection unit 2 is a burst error.
Here, the error data indicated by “x” in FIG. 1 indicates error data that has been found to be a burst error, and the error data indicated by “●” is actually a burst error, but an error data position detection unit. 2 indicates data that has not yet been found to be a burst error, and error data marked with “Δ” is not actually a burst error, but at the time the error data position detection unit 2 detects it. Shows data that is not yet known to be a burst error.

  For the error data marked with “●”, the burst error prediction unit 3 predicts that the error data at the position detected this time is a burst error because there is a burst error on the left side of the page. For the error data marked with “Δ”, for example, since there is no burst error on the left side of the page, it is predicted that the error data at the position detected this time is not a burst error.

  The correction execution unit 4 performs erasure correction on the error data predicted by the burst error prediction unit 3 in each line as a burst error, and performs detection correction on the other error data.

In FIG. 1, erasure correction is performed for error data marked with “●”, and detection correction is performed for error data marked with “Δ”. Thereby, the correction limit can be increased.
Embodiments of the present invention will be described below.

FIG. 2 is a diagram illustrating a hardware configuration example of the optical disc recording / reproducing apparatus.
The entire optical disc recording / reproducing apparatus 10 is controlled by a CPU (Central Processing Unit) 11. A dynamic random access memory (DRAM) 12, a hard disk drive (HDD) 13, a graphic processing device 14, an input interface 15, and a disk controller 16 are connected to the CPU 11 via a bus 17.

  The DRAM 12 temporarily stores at least part of an OS (Operating System) program and application programs to be executed by the CPU 11. The DRAM 12 stores various data necessary for processing by the CPU 11. The HDD 13 stores an OS and application programs. A program file is stored in the HDD 13.

  A monitor 14 a is connected to the graphic processing device 14. The graphic processing device 14 displays an image on the screen of the monitor 14 a in accordance with a command from the CPU 11. A keyboard 15 a and a mouse 15 b are connected to the input interface 15. The input interface 15 transmits signals sent from the keyboard 15 a and the mouse 15 b to the CPU 11 via the bus 17.

The disk controller 16 performs reproduction of an optical disk (described later).
Examples of the optical disc include a CD (Compact Disc).
FIG. 3 is a block diagram showing functions of the disk controller.

  The disk controller 16 includes a DSP (Digital Signal Processor) 161, a CRC (Cyclic Redundancy Check) check unit 162, a DRAM controller 163, an ECC 164, an encoder 165, a decoder 166, and an interface unit 167. .

The DSP 161 controls the entire disk controller 16.
The CRC check unit 162 performs a CRC check on the data of the DRAM controller 163.

The DRAM controller 163 sends the received data to the DRAM 12. Further, data is taken out from the DRAM 12 as necessary and sent to the ECC 164 or the like.
When the DRAM controller 163 receives the memory address and the numerical value from the ECC 164, the DRAM controller 163 performs detection correction and erasure correction as necessary.

  The ECC 164 calculates an error position and a numerical value for the data sent from the DRAM controller 163, converts the error position into a memory address, and then sends the converted memory address and the numerical value to the DRAM controller 163. In addition, when data is written to the optical disc 100, write data is sent to the encoder 165.

The encoder 165 encodes the data supplied from the ECC 164 and writes it on the optical disc 100.
The decoder 166 decodes the data supplied from the optical disc 100 and sends it to the DRAM controller 163.

  The interface unit 167 is connected to the bus 17 according to the SATA (Serial ATA) standard. The interface unit 167 transmits a signal from the DRAM controller 163 to the CPU 11 via the bus 17.

  With the hardware configuration as described above, the processing functions of the present embodiment can be realized. In order to perform error correction in a system having such a hardware configuration, the ECC 164 has the following functions.

FIG. 4 is a block diagram showing ECC functions.
The block data memories 12a, 12a,... Are constituted by one area of the DRAM 12, and block data read from the optical disc 100 is stored in units of ECC blocks for error correction. The DRAM controller 163 sends these block data to the ECC 164.

  The ECC 164 includes a syndrome generation unit 164a, a syndrome polynomial correction unit 164b, an Euclidean mutual division unit 164c, a chain search unit 164d, a burst error memory 164e, and an address conversion unit 164f.

  The syndrome generation unit 164a calculates a syndrome that is uniquely determined only by the error pattern from the data for each line stored in the block data memories 12a, 12a,.

  The syndrome polynomial correction unit 164b corrects the syndrome based on the burst error position information indicating the position of the data where the burst error is generated, obtained from the burst error memory 164e.

The Euclidean mutual division unit 164c calculates an error position polynomial and an error numerical polynomial from the corrected syndrome and erasure positions.
The chain search unit 164d calculates an error position and an error value from the error position polynomial and the error value polynomial. Then, the error position data is output to the burst error memory 164e, and the error position data and the error value data are output to the address conversion unit 164f.

  The burst error memory 164e determines whether or not the input error position data is a burst error, creates burst error position information, and outputs the burst error position information to the syndrome polynomial correction unit 164b.

  The address conversion unit 164f converts the data at the error position into a memory address and sends it to the DRAM controller 163 together with the error value data. The DRAM controller 163 reads the data at the received address position from the DRAM 12, performs exclusive OR (EOR) with the data at the error position numerical value, and corrects it by writing it back to the same address position in the DRAM 12.

Next, block data stored in the block data memories 12a, 12a,... Will be described.
FIG. 5 is a diagram showing block data.

In the following, the upward direction on the page is referred to as “up”, the downward direction as “down”, the left direction as “left”, the right direction as “right”, the vertical direction as “row direction”, and the horizontal direction as “column direction”.
The block data BD1 is composed of 208 bytes in the row direction and 172 bytes (lines) in the column direction.

Of the 208 bytes in the row direction, 192 bytes from the top are main data, and the remaining 16 bytes are ECC parity.
In the block data BD1, data is written in the direction from the left side to the right side (recording direction) in FIG. 5, and when reaching the rightmost column, the data is written in the recording direction from the left side one row below.

Here, in FIG. 5, the part indicated by “x” indicates a burst error (occurrence of occurrence).
Next, the error correction operation of the disk controller 16 will be described.

FIG. 6 is a flowchart showing the error correction operation of the disk controller.
First, the DRAM controller 163 sets one line in the row direction to be processed for the block data BD1 (step S1).

  Next, the DRAM controller 163 performs detection and correction of the corresponding line in the row direction based on the memory address and error value output by the ECC 164 (step S2). More specifically, the exclusive OR of the error position data and the error numerical value is calculated, and the result (that is, correct data) is written back to the error position of the block data BD1.

Further, the chain search unit 164d outputs the data at the error position to the burst error memory 164e (step S3).
Next, the DRAM controller 163 sets the line to be processed next as one line right next (step S4).

Next, the burst error memory 164e determines whether or not there is a burst error in the line to be processed (step S5).
If there is no burst error (No in step S5), the process proceeds to step S2, and the operation after step S2 is continued.

  On the other hand, when there is a burst error (Yes in step S5), the burst error memory 164e outputs the burst error position to the syndrome polynomial correction unit 164b, and the syndrome polynomial correction unit 164b obtains the burst error obtained from the burst error memory 164e. Based on the position information, the syndrome is corrected.

  Further, the DRAM controller 163 performs line-direction line detection correction and erasure correction based on the processing results of the syndrome polynomial correction unit 164b, the Euclidean mutual division unit 164c, the chain search unit 164d, and the address conversion unit 164f (step S6). . Thereafter, the process proceeds to step S3, and the operations after step S3 are continued.

Such processing is performed until the final line is reached.
FIG. 7 is a block diagram showing the internal configuration of the burst error memory.
The burst error memory 164e is provided corresponding to each of the error position input control circuit 1641, 32 position holding registers reg0 to reg31 that hold (store) error position data for one line in the row direction. , Counters C0 to C31 for counting how many of the same error positions continue in the column direction, and a burst error position output control circuit 1642.

  The error position input control circuit 1641 reads error position data output from the chain search unit 164d every time correction of one line in the row direction of the block data BD1 is completed.

  The error position input control circuit 1641 grasps whether or not each position holding register reg0 to reg31 holds data at an error position, and when holding data, which error position data is held. When data at an error position adjacent to the already held data in the column direction is input, the counter corresponding to the register is incremented (+1 counted up). Further, when error position data not held in the position holding registers reg0 to reg31 is inputted, the read error position data is outputted to the position holding register not holding data.

  The number of position holding registers and counters is not particularly limited, but in this embodiment, it is twice the ECC parity (32 including 16 bytes for holding and 16 bytes for margin).

  The burst error position output control circuit 1642 obtains the position of the burst error based on the information in the counters C0 to C31 and the position holding registers reg0 to reg31, and outputs the burst error position information.

Next, the burst error position detection operation of the burst error memory 164e will be described.
The error position input control circuit 1641 compares the input error position data with the error position data held in the position holding registers reg0 to reg31 every time the error position data of one line in the row direction is read. If the data at the error position adjacent in the column direction is already held in one of the position holding registers reg0 to reg31, the counter value of the corresponding counter C0 to C31 is incremented. The error position data is saved in an empty position holding register and the counter value of the counter is incremented.

  For the position holding register in which the error position data has not been input a predetermined number of times (no error at the byte position), the error position data stored in the position holding register is deleted, and the corresponding The counter value is set to “0”.

  Then, the burst error position output control circuit 1642 determines that there is a burst error in (in the vicinity of) the error position data stored in the corresponding position holding register if the count value is equal to or greater than a preset value. When the data of the error position of the next line in the first line is read, the erasure flag indicating that it is the object of erasure correction is displayed at the error position regardless of the actual burst error of the next line. Stand up. Thereafter, if the count value is equal to or greater than a preset value, the disappearance flag is continuously set. In this manner, the presence / absence of erasure correction for the next line is determined based on the current counter value and the value of the position holding register.

FIG. 8 is a diagram illustrating a specific example of block data according to the first embodiment.
In this specific example, the information on the error position is deleted for the position holding register in which the information on the same error position is not continuously input.

  In block data BD1a, a burst error has occurred in byte m and byte n. The row direction line No. Since 9 has 9 errors, the ECC parity of 16 bytes cannot be corrected only by detection and correction.

FIG. 9 is a diagram schematically showing a processing result obtained by processing the block data shown in FIG. 8 with the burst error memory. Here, “B” in FIG. 9 indicates a disappearance flag.
As indicated by the thick frame in FIG. The byte m of 9 indicates the row direction line No. 4 to row direction line No. As a result of the burst error continuing to 8, the erasure flag is set on the assumption that a burst error still exists, and the erasure correction is performed. Byte n is a row direction line No. 6 to the row direction line No. As a result of the burst error continuing to 8, the erasure flag is set on the assumption that a burst error still exists, and the erasure correction is performed.

  Therefore, the row direction line No. In No. 9, erasure correction is performed for a total of 2 bytes of byte m and byte n, and detection correction is performed for the remaining 7 bytes. As a result, 2k + s = 2 × (9−2) + 2 = 16. Even if the ECC parity is 16 bytes, nine errors can be corrected.

  As described above, according to the optical disc recording / reproducing apparatus 10 of the present embodiment, the disc controller 16 performs error correction by setting a highly accurate erasure flag, so that more errors can be corrected. Can do.

Next, an optical disk recording / reproducing apparatus according to the second embodiment will be described.
Hereinafter, the optical disc recording / reproducing apparatus according to the second embodiment will be described with a focus on differences from the first embodiment described above, and description of similar matters will be omitted.

The optical disc recording / reproducing apparatus of the second embodiment differs in the type of optical disc and its control method.
FIG. 10 is a diagram illustrating block data of the optical disc recording / reproducing apparatus according to the second embodiment.

  The optical disk of the second embodiment is provided with ECC parity on the right side and the lower side of the main data like DVD (Digital Versatile Disk) and HDDVD (High Definition DVD).

The right ECC parity (PI) of the block data BD2 shown in FIG. 10 is 10 bytes, and the lower ECC parity (PO) is 16 bytes.
Next, the error correction operation of the disk controller 16 of the second embodiment will be described.

FIG. 11 is a flowchart showing the error correction operation of the disk controller.
First, the DRAM controller 163 performs detection and correction for each line in the column direction using ECC parity (PI) (step S11).

  After completion of detection and correction, the DRAM controller 163 determines whether or not all the lines in the column direction have been corrected, that is, whether or not the number of errors in each line in the column direction is 5 or less (step) S12).

If all the lines have been corrected (Yes in step S12), that is, if the number of errors in each line is 5 or less, the process is terminated.
On the other hand, if all lines could not be corrected (No in step S12), that is, if there are lines with more than 5 errors, the DRAM controller 163 has 16 lines that could not be corrected by detection correction. It is determined whether or not there are more lines (2t) (whether or not erasure correction is possible) (step S13).

  If the number of lines that could not be corrected is greater than 16, that is, if erasure correction cannot be performed (Yes in step S13), the detection and correction of lines in the row direction are performed while setting the erasure flag only at the error position detected as a burst error. Erasure correction is performed (step S14). Thereafter, the process proceeds to step S17.

  On the other hand, if the number of lines that could not be corrected is 16 or less (No in step S13), that is, if erasure correction is possible, an erasure flag is set for all bytes of the line that could not be corrected by detection correction (step S15).

Thereafter, detection correction and disappearance correction of the line in the row direction are performed (step S16).
It is determined whether or not all the lines in the row direction have been corrected (step S17).
If all the lines in the row direction have been corrected (Yes in step S17), the process ends.

On the other hand, if all the lines in the row direction could not be corrected (No in step S17), an erasure flag is set for all bytes in the line in the row direction that could not be corrected (step S18).
Next, detection correction and erasure correction are performed on the line in the column direction (step S19).

It is determined whether or not all the lines in the column direction have been corrected (step S20).
If all the lines in the column direction have been corrected (Yes in step S20), the process ends.

On the other hand, if all the lines in the column direction could not be corrected (No in step S20), the process proceeds to step S13, and the operations after step S13 are continued.
Next, a specific example will be described.

FIG. 12 is a diagram illustrating a specific example of block data according to the second embodiment.
In the figure, the “+” mark, the “x” mark, and the “△” mark all indicate byte error positions. “+” Indicates a burst error, “×” indicates an error position of a line that is not a burst error but has six or more errors in the column direction, and “Δ” indicates The error position of the row | line | column whose number of errors is five or less is shown. In addition, columns indicated by diagonal lines indicate columns in which “+” mark or “×” mark errors exist.

  Since the ECC parity (PI) in the column direction is 10 bytes, the DRAM controller 163 detects and corrects each line in the column direction up to five errors, that is, a line having an error position marked with “Δ”. Only can correct the error.

  However, as shown in the shaded portion, there are six or more errors of the “+” mark or the “x” mark per line, so the error cannot be corrected. Also, the error position cannot be specified.

  In the block data BD2a, the ECC parity (PO) in the column direction is 16 bytes, but there are 18 columns in the column direction that could not be corrected by detection correction, and errors can be corrected even if erasure correction is performed. I can't.

  Therefore, detection and correction is first performed for the line in the row direction. At this time, detection and correction are performed while detecting a burst error using the burst error memory 164e as in the first embodiment. Specifically, the row direction line No. When detection correction is performed in order from 0 and a burst error of “+” is detected, erasure correction is performed using the erasure flag as in the first embodiment.

  In the block data BD2a, the line No. 0 to line no. Up to 7, even if the “x” mark and the “+” mark are combined, the error position is within 8 so that the error can be corrected only by the detection correction. In FIG. 8, since there are nine error positions for the “x” mark and the “+” mark, the error cannot be corrected only by detection and correction.

  Therefore, the error can be corrected by performing the erasure correction using the erasure flag set by the burst error memory 164e, that is, by performing the erasure correction on the “+” mark.

Line No. 14 is line No. Similarly to 8, the error can be corrected by performing the erasure correction using the erasure flag set by the burst error memory 164e.
Conventionally, no erasure correction is used, and the row direction line No. 8, no. Even if 14 errors remain, the row direction line no. 8, no. Since it is necessary to set a flag at 14 bytes and perform erasure correction in the column direction again for the shaded columns, the correction time is greatly increased, and the double speed performance of the disk is deteriorated.

According to the optical disc recording / reproducing apparatus of the second embodiment, the same effect as that of the optical disc recording / reproducing apparatus of the first embodiment can be obtained.
According to the optical disk recording / reproducing apparatus of the second embodiment, the erasure flag set by the burst error memory 164e is set even in the case of a product code having ECC parity in both rows and columns, such as DVD and HDDVD. It is possible to correct an error easily and reliably by using it and performing erasure correction.

Next, an optical disk recording / reproducing apparatus according to a third embodiment will be described.
Hereinafter, the optical disk recording / reproducing apparatus of the third embodiment will be described focusing on the differences from the first embodiment described above, and the description of the same matters will be omitted.

The optical disc recording / reproducing apparatus of the third embodiment differs in the type of optical disc and its control method.
FIG. 13 is a diagram illustrating block data of the optical disc recording / reproducing apparatus according to the third embodiment.

  The optical disc according to the third embodiment is provided with a Picket code for each column and an ECC parity for each line in the row direction, like Blu-ray Disc (registered trademark).

One block data BD3 has 64K bytes of data.
This data is protected by a code called LDC (Long Distance Code). The LDC is composed of 304 code words in the row direction, and each code word is composed of 216 bytes of main data and 32 bytes of ECC parity.

These code words are interleaved every 2 × 2 of the ECC parity, and formed as a block of 152 bytes in the column direction and 496 bytes in the row direction.
Also, four Picket codes are provided at equal intervals in the block data BD3. The Picket code marked “S” on the left is a synchronization pattern indicating the start of each line.

  The Picket code is protected by being error-corrected by BIS (Burst Indicator Subcode). This BIS has an error check code having a higher error correction capability than an LDC that adds a 32-byte ECC parity to 216-byte data, such as adding a 32-byte ECC parity to 30-byte data. Yes. Therefore, the Picket code can correct an error only by detection and correction. However, errors can be corrected more efficiently by performing error correction according to the present embodiment.

Next, the error correction operation of the disk controller of the third embodiment will be described.
FIG. 14 is a flowchart illustrating an error correction operation of the disk controller according to the third embodiment.

First, the Picket code is detected and corrected by BIS (step S31).
Next, a burst alarm different from the erasure flag is set on the byte between the error positions of the Picket code obtained by detection and correction (step S32).

  Next, the LDC line is detected and corrected and corrected while the erasure flag is set only for the byte where the burst error is detected or the byte where the burst error is detected at the position where the burst alarm is present (step S33).

This completes the operation.
Hereinafter, a specific example will be described.
FIG. 15 is a diagram illustrating a specific example of processing of the optical disc recording / reproducing apparatus according to the third embodiment.

The error position of the Picket code is used as the setting of the erasure flag when LDC correction is performed in the row direction, assuming that the range expanded by the designated bytes on both sides is incorrect.
When such a process is performed, it is efficient to some extent if a burst error occurs as in area 41, but if no burst error occurs as in area 42, the lost flag is wasted. On the contrary, there is a possibility that the correction limit of the LDC is dropped.

  Therefore, erasure correction is performed only with the Picket code up to several bytes (for example, 2 bytes) on both sides of the Picket code, but erasure correction is performed using the burst error memory 164e at a distance of 3 bytes or more. Alternatively, when the error is included in the Picket code as in the area 43, the erasure flag is set only when the burst error position information by the burst error memory 164e overlaps, and the erasure correction is performed. Thereby, the accuracy of the disappearance flag can be increased.

According to the optical disc recording / reproducing apparatus of the third embodiment, the same effects as those of the optical disc recording / reproducing apparatus of the first embodiment can be obtained.
The error correction apparatus and the error correction method of the present invention have been described based on the illustrated embodiment. However, the present invention is not limited to this, and the configuration of each unit is an arbitrary function having the same function. It can be replaced with that of the configuration. Moreover, other arbitrary structures and processes may be added to the present invention.

  Further, the present invention may be a combination of any two or more configurations (features) of the above-described embodiments.

It is a figure which shows the outline | summary of this invention. It is a figure which shows the hardware structural example of an optical disk recording / reproducing apparatus. It is a block diagram which shows the function of a disk controller. It is a block diagram which shows the function of ECC. It is a figure which shows block data. It is a flowchart which shows the operation | movement of an error correction of a disk controller. It is a block diagram which shows the internal structure of a burst error memory. It is a figure which shows the specific example of the block data of 1st Embodiment. It is a figure which shows typically the process result which processed the block data shown in FIG. 8 with the burst error memory. It is a figure which shows the block data of the optical disk recording / reproducing apparatus of 2nd Embodiment. It is a flowchart which shows the operation | movement of an error correction of a disk controller. It is a figure which shows the specific example of the block data of 2nd Embodiment. It is a figure which shows the block data of the optical disk recording / reproducing apparatus of 3rd Embodiment. 10 is a flowchart illustrating an error correction operation of the disk controller according to the third embodiment. It is a figure which shows the specific example of a process of the optical disk recording / reproducing apparatus of 3rd Embodiment. It is a figure which shows an example of a block code.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Error correction apparatus 2 Error data position detection part 3 Burst error prediction part 4 Correction execution part 10 Optical disk recording / reproducing apparatus 12 DRAM
12a block data memory 16 disk controller 41 to 43 area 161 DSP
162 CRC check unit 163 DRAM controller 164 ECC
1641 Error position input control circuit 1642 Burst error position output control circuit 164a Syndrome generation unit 164b Syndrome polynomial correction unit 164c Euclidean mutual division unit 164d Chain search unit 164e Burst error memory 164f Address conversion unit 165 Encoder 166 Decoder 167 Interface unit C0-C31 Counter reg0 ~ Reg31 Position holding register

Claims (6)

In an error correction apparatus that corrects error data included in block data of an optical disc captured in block units,
An error data position detector for detecting the position of the error data of the block data for each line;
A burst error prediction unit that refers to the position of error data in another line and predicts whether or not the error data at the position detected by the error data position detection unit is a burst error;
A correction execution unit that performs erasure correction on error data that is predicted to be a burst error by the burst error prediction unit of each line, and performs detection correction on other error data;
An error correction apparatus comprising: The burst error prediction unit
Each time a position of error data in the line is detected, a plurality of registers for storing the position;
A plurality of counters which are provided corresponding to the respective registers and which are incremented when the position of the detected error data coincides with the position of the error data already stored in the register in a direction orthogonal to the detection direction; ,
When the counter is equal to or greater than a predetermined value, a determination unit that determines that the position of the detected error data is a position where a burst error exists;
The error correction apparatus according to claim 1, further comprising:   3. The error correction apparatus according to claim 2, wherein the counter is cleared when the position of error data is not continuously stored in the corresponding register. When the optical disc has a parity bit in each of the recording direction of the optical disc and the direction orthogonal to the recording direction,
The error data position detection unit detects the position of error data for each line in the recording direction,
The correction execution unit predicts a burst error by the burst error prediction unit when the number of lines in the recording direction that could not be detected and corrected exceeds the number of parity bits in the direction orthogonal to the recording direction. 2. The error correction apparatus according to claim 1, wherein erasure correction is performed on the error data and detection correction is performed on other error data. When the optical disc has a Picket code,
The correction execution unit performs erasure correction using only the Picket code up to a predetermined byte on both sides of the Picket code, and performs erasure correction using a prediction result of the burst error prediction unit for bytes farther away. The error correction apparatus according to claim 1, wherein: In an error correction method for correcting error data included in block data of an optical disc captured in block units,
The error data position detection unit detects the position of the error data of the block data for each line,
A burst error prediction unit refers to the position of error data on another line, predicts whether or not the error data at the position detected by the error data position detection unit is a burst error,
The correction execution unit performs erasure correction for the error data predicted to be a burst error by the burst error prediction unit for each line, and performs detection correction for the other error data.
An error correction method characterized by the above.

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