JP2009231093A5 - - Google Patents

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Publication number
JP2009231093A5
JP2009231093A5 JP2008075871A JP2008075871A JP2009231093A5 JP 2009231093 A5 JP2009231093 A5 JP 2009231093A5 JP 2008075871 A JP2008075871 A JP 2008075871A JP 2008075871 A JP2008075871 A JP 2008075871A JP 2009231093 A5 JP2009231093 A5 JP 2009231093A5
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JP
Japan
Prior art keywords
electrode
substrate
pixel
light shielding
shielding layer
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JP2008075871A
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Japanese (ja)
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JP5286865B2 (en
JP2009231093A (en
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Priority to JP2008075871A priority Critical patent/JP5286865B2/en
Priority claimed from JP2008075871A external-priority patent/JP5286865B2/en
Publication of JP2009231093A publication Critical patent/JP2009231093A/en
Publication of JP2009231093A5 publication Critical patent/JP2009231093A5/ja
Application granted granted Critical
Publication of JP5286865B2 publication Critical patent/JP5286865B2/en
Expired - Fee Related legal-status Critical Current
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Claims (6)

透明な基板と、A transparent substrate,
前記基板に設けられた画素電極と、A pixel electrode provided on the substrate;
画素電極に接続された画素トランジスタと、A pixel transistor connected to the pixel electrode;
前記画素電極の上部に形成された有機化合物層と、An organic compound layer formed on the pixel electrode;
前記有機化合物層の上部に形成された対向電極と、A counter electrode formed on the organic compound layer;
前記基板を介して前記画素トランジスタに向けて入射される光を遮光する遮光層と、A light shielding layer for shielding light incident on the pixel transistor through the substrate;
を備えることを特徴とするエレクトロルミネッセンスパネル。An electroluminescence panel comprising:
前記画素トランジスタは半導体膜、ゲート電極、ソース電極及びドレイン電極を有し、前記ソース電極及び前記ドレイン電極が配列する方向における前記半導体膜の幅が前記ゲート電極の幅よりも長く、前記ソース電極及び前記ドレイン電極が配列する方向における前記遮光層の幅が前記ゲート電極の幅よりも長いことを特徴とする請求項1に記載のエレクトロルミネッセンスパネル。The pixel transistor includes a semiconductor film, a gate electrode, a source electrode, and a drain electrode, and a width of the semiconductor film in a direction in which the source electrode and the drain electrode are arranged is longer than a width of the gate electrode, 2. The electroluminescence panel according to claim 1, wherein the width of the light shielding layer in the direction in which the drain electrodes are arranged is longer than the width of the gate electrode. 前記遮光層は前記ゲート電極に接していることを特徴とする請求項1又は2に記載のエレクトロルミネッセンスパネル。The electroluminescence panel according to claim 1, wherein the light shielding layer is in contact with the gate electrode. 前記遮光層は絶縁性であることを特徴とする請求項1から3の何れか一項に記載のエレクトロルミネッセンスパネル。The electroluminescence panel according to any one of claims 1 to 3, wherein the light shielding layer is insulative. 前記基板には、信号線が前記遮光層と同一面に設けられていることを特徴とする請求項1から3の何れか一項に記載のエレクトロルミネッセンスパネル。4. The electroluminescence panel according to claim 1, wherein the substrate is provided with a signal line on the same surface as the light shielding layer. 画素電極と、対向電極と、前記画素電極と前記対向電極との間に介在する有機化合物層と、前記画素電極に接続された画素トランジスタと、を有する基板を備えたエレクトロルミネッセンスパネルの製造方法であって、A method for manufacturing an electroluminescence panel comprising a substrate having a pixel electrode, a counter electrode, an organic compound layer interposed between the pixel electrode and the counter electrode, and a pixel transistor connected to the pixel electrode. There,
前記基板上に、前記基板を介して前記画素トランジスタに向けて入射される光を遮光する遮光層を形成し、On the substrate, a light shielding layer that shields light incident on the pixel transistor through the substrate is formed,
前記遮光層の上部に前記画素トランジスタを形成することを特徴とするエレクトロルミネッセンスパネルの製造方法。A method of manufacturing an electroluminescence panel, wherein the pixel transistor is formed on the light shielding layer.
JP2008075871A 2008-03-24 2008-03-24 Electroluminescent panel manufacturing method and electroluminescent panel Expired - Fee Related JP5286865B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008075871A JP5286865B2 (en) 2008-03-24 2008-03-24 Electroluminescent panel manufacturing method and electroluminescent panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008075871A JP5286865B2 (en) 2008-03-24 2008-03-24 Electroluminescent panel manufacturing method and electroluminescent panel

Publications (3)

Publication Number Publication Date
JP2009231093A JP2009231093A (en) 2009-10-08
JP2009231093A5 true JP2009231093A5 (en) 2011-05-06
JP5286865B2 JP5286865B2 (en) 2013-09-11

Family

ID=41246257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008075871A Expired - Fee Related JP5286865B2 (en) 2008-03-24 2008-03-24 Electroluminescent panel manufacturing method and electroluminescent panel

Country Status (1)

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JP (1) JP5286865B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117581637A (en) * 2021-07-08 2024-02-20 株式会社半导体能源研究所 Display device, method for manufacturing display device, display module, and electronic apparatus
JPWO2023002297A1 (en) * 2021-07-21 2023-01-26

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001125510A (en) * 1995-11-17 2001-05-11 Semiconductor Energy Lab Co Ltd Active matrix type el display device
JP2001109404A (en) * 1999-10-01 2001-04-20 Sanyo Electric Co Ltd El display device
JP3695308B2 (en) * 2000-10-27 2005-09-14 日本電気株式会社 Active matrix organic EL display device and manufacturing method thereof
JP3705264B2 (en) * 2001-12-18 2005-10-12 セイコーエプソン株式会社 Display device and electronic device
JP4239873B2 (en) * 2003-05-19 2009-03-18 セイコーエプソン株式会社 Electro-optical device and electronic apparatus
JP4497881B2 (en) * 2003-09-30 2010-07-07 三洋電機株式会社 Organic EL device and organic EL panel
JP2007114726A (en) * 2005-09-26 2007-05-10 Sanyo Electric Co Ltd Organic electroluminescence display device
JP4939919B2 (en) * 2006-01-10 2012-05-30 株式会社半導体エネルギー研究所 Display device
JP2007234391A (en) * 2006-03-01 2007-09-13 Seiko Epson Corp Electroluminescence display device and electronic apparatus

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