JP2009212702A - Light receiving amplifier circuit, optical pickup apparatus, and optical disk drive - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a light receiving amplifier circuit which can reduce noise and establish desirable offset voltage characteristics. <P>SOLUTION: The light receiving amplifier circuit 1 is provided with a curretn-voltage converting circuit 2 which converts photoelectric current Ib generating in a photodiode PD into voltage, a reference circuit 3 which is not connected with the photodiode PD and has the same circuit structure as the current-voltage converting circuit 2, and a differential circuit 4 to amplify a difference between output voltage of the current-voltage converting circuit 2 and output voltage of the reference circuit 3. The light receiving amplifier circuit 1 is provided with a compensation circuit 5 to compensate a difference between output voltage of the current-voltage converting circuit 2 and output voltage of the reference circuit 3 during no signal. The resistance value of a reference resistance Rref 21 in the reference circuit 3 is set smaller than that of a feedback resistance Rf in the current-voltage converting circuit 2, and the bias current of an input transistor in the reference circuit 3 is set smaller than that of an input transistor in the current-voltage converting circuit 2. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a light receiving amplification circuit added to a light receiving element mounted on an optical pickup device used for reproducing or recording an optical disk, and more particularly, to receive light that amplifies a photocurrent signal of the light receiving element and converts it into a voltage. The present invention relates to an amplifier circuit, and an optical pickup device and an optical disk device including the amplifier circuit.

  Optical discs such as DVD and CD are widely used as media for recording music, video, data information, and the like. The reproduction of information recorded on the medium or the recording of information on the medium is performed by an optical pickup. Optical pickups are being developed for miniaturization and high performance.

  Such an optical pickup is provided with a light receiving element for receiving reflected light from the optical disk. In the light receiving element, in order to reduce the number of parts for the purpose of cost reduction and to increase the speed of the transmission signal, the amount of light that can be received is decreasing. For this reason, in the development of a light receiving element, noise reduction of the light receiving element is an important and indispensable issue.

  In recent years, pickups corresponding to blue laser diodes have been developed, and high-speed signal processing of 200 MHz or more in the frequency band is required.

  FIG. 8 shows a configuration of photodiodes PDA to PDF as light receiving elements used in the optical pickup. FIG. 9 shows a configuration of the light receiving amplification circuits 101a to 101f by a one-stage differential circuit including the photodiodes PDA to PDF. Further, FIG. 10 shows a detailed configuration of a conventional light receiving amplification circuit 101a.

  Based on FIGS. 8 and 9, the basic operation principle and main characteristics of the light receiving and amplifying circuits 101a to 101f, the offset voltage characteristics and the noise reduction technique of the amplifier circuit will be described below.

  As shown in FIG. 10, the photodiodes PDA to PDF form a square divided into six in order to generate an RF signal and a focus error signal, and are arranged adjacent to each other. The rectangular photodiodes PDE and PDF are arranged on both sides of the photodiodes PDA to PDD in order to generate a tracking error signal. The photodiodes PDA to PDF output signal voltages Va to Vf, respectively.

  Each of the photodiodes PDA to PDF is connected to a differential amplifier circuit AMP101 in each of the light receiving amplifier circuits 101a to 101f. The signal voltages VA to VF output from the respective light receiving amplification circuits 101a to 101f are subjected to the following arithmetic processing by an arithmetic processing IC provided in the subsequent stage, and an RF signal, a focus error signal, and a tracking error signal are obtained. For this reason, the voltage accuracy between the outputs of the respective light receiving and amplifying circuits 101a to 101f is important. Further, since the signal voltages VA to VD are used for generating an RF signal, the S / N characteristic is an important factor.

RF signal = Va + Vb + Vc + Vd (1)
Focus error signal = Va + Vc− (Vb + Vd) (2)
Tracking error signal = Ve−Vf (3)
The operation principle of signal photocurrent-voltage conversion will be described using the light receiving amplification circuit 101a including the photodiode PDA as an example.

Photocurrent Ia is generated in the photodiode PDA by the irradiation of the signal light. This photocurrent Ia is converted into a voltage by the feedback resistor R1 of the light receiving amplification circuit 101a, and appears at the output terminal as an output voltage Von at the time of signal light irradiation. Here, when the output voltage appearing at the output terminal during no signal light is Vod, the signal voltage Vsig generated by the signal light incident on the photodiode PDA is:
Vsig = Von−Vod (4)
It is expressed. Here, when the photocurrent is Ia and the value of the feedback resistance (gain resistance) is R1, the output voltage Von is
Von = R1 × Ia + Vref (5)
It is expressed. Here, Vref is a reference power supply potential given from the outside.

When the base currents of the transistors Tr101 and Tr102 in the no-signal state are Ib1 and Ib2, respectively, the voltages between the base emitters of the transistors Tr101 and Tr102 are VBE1 and VBE2, respectively, and the resistance value of the reference resistor R2 is R2, Vod is
Vod = Vref−R2 × Ib2−VBE2 + VBE1 + R1 × Ib1 (6)
It is expressed. Thereby, the signal voltage Vsig is
Vsig = R1 * Ia-(-R2 * Ib2-VBE2 + VBE1 + R1 * Ib1) (7)
It is expressed. The second and subsequent terms in equation (7) are errors. In the photoreceiver / amplifier circuit, since it is important that the accuracy of the calculation signal with the focus signal as shown in the equation (2) is high, there is a problem that the accuracy of the calculation signal is lowered due to the above error (offset voltage). . In other words, it is an important condition that Vod≈Vref. To satisfy this condition,
R1 × Ib1 = R2 × Ib2 (8)
VBE1 = VBE2 (9)
It is necessary to satisfy this condition.

If the deviation from the external reference voltage Vref of the output voltage Vod during no signal light is the offset voltage Voff, the offset voltage Voff is:
Voff = Vod−Vref (10)
It is expressed. The offset voltage in the light receiving amplifier circuit is required to have an accuracy of ± 15 mV or less.

  In general, suppression of noise characteristics is an important issue in a light receiving amplifier circuit. The noise is noise in a no-signal state, and is generated by elements constituting the circuit, mainly transistors and resistors. When the voltage signal obtained by the signal light in the light receiving amplifier circuit is sufficiently large, the difference between the signal voltage and the noise level is large, that is, the S / N characteristic is good and does not cause a problem. However, as described above, in recent years, noise reduction in the light receiving circuit has become an essential issue due to a decrease in the amount of signal light.

  Here, the noise characteristics, which are important items in the light receiving amplifier circuit, will be described below by taking the light receiving amplifier circuit 101a shown in FIG. 10 as an example.

The output noise value Vn at the light receiving amplification circuit 101a is
Vn = √ (Ni1 ² + Ni2 ² + Nr1 ² + Nr2 ² ) (11)
It is expressed. Here, Ni1 and Ni2 represent noise due to shot noise generated from the transistors Tr101 and Tr102, and Nr1 and Nr2 represent noise due to thermal noise generated from the resistors R1 and R2. Each of these noises is a mean square of noise caused by the element.

  Here, with respect to the transistor shot noise of Ni1 and Ni2, if the bias current of the transistors Tr101 and Tr102 can be significantly reduced, the noise can be reduced. However, in order to obtain the response characteristics of the light receiving amplifier circuit 101a, it is impossible to reduce the driving current extremely. Also, since the feedback resistor R1 needs to be set to a predetermined resistance value, it cannot be reduced. If only the resistance value of the reference resistor R2 is set to a small value and the relationship R1> R2 can be set, noise can be reduced. However, as described above, in the configuration of the conventional light receiving and amplifying circuit 101a, the offset voltage characteristic is deteriorated, so that R1 = R2 is an essential condition.

  Moreover, it is described in the light receiving element circuit 101a that extra thermal noise is generated by the reference resistor R2 (for example, Patent Document 1). Thermal noise is represented as √ (4kTR2Δf). Here, k is a Boltzmann constant, T is an absolute temperature, and Δf is a noise bandwidth.

  Patent Document 1 discloses a technique for integrating noise due to thermal noise with a resistor and a capacitor in order to reduce such thermal noise. In the photoreceiver / amplifier circuit 101a, in order to realize this method, the capacitor C1 is connected between the connection point between the reference resistor R2 and the base of the transistor Tr102 and GND, and the reference resistor R2 has a fixed potential (GND potential). ). By providing such a capacitor C1, the reference resistor R2 and the capacitor C1 form a filter that integrates noise, so that high-frequency noise can be reduced.

  However, in the configuration of Patent Document 1, although it is possible to reduce high-frequency noise, in order to sufficiently reduce noise in the low-frequency region, the capacitor C1 needs to have a maximum capacitance value. It is not advantageous. Therefore, there is a need for a noise reduction method that can sufficiently reduce noise in a low frequency region as well as high frequency noise while suppressing cost.

  Next, FIG. 11 shows a configuration of light receiving amplification element circuits 201a to 201f in a light receiving amplification element for an optical pickup that enables conventional high-speed signal processing. FIG. 12 shows a detailed configuration of the light receiving amplification circuit 201a.

  Based on FIG. 11 and FIG. 12, the basic operation principle of the light-receiving amplifier circuit 201a for high-speed pickup, the offset voltage characteristic which is the main characteristic, and the noise reduction technique of the amplifier circuit will be described below.

  As shown in FIG. 11, in the high-speed light receiving and amplifying element, the light receiving and amplifying circuits 201a to 201d have the same configurations as the current voltage converting circuits 202a to 202d and the current voltage converting circuits 202a to 202d, respectively, which are the first stage circuits. Reference circuits 203a to 203d, and current / voltage conversion circuits 202a to 202d and differential circuits 204a to 204d that amplify the output voltage difference between the reference circuits 203a to 203d. Here, the light receiving elements PDA to PDD are connected only to the current-voltage conversion circuits 202a to 202d, the resistance value of the feedback resistor Rf of the current-voltage conversion circuits 202a to 202d, and the resistance value of the feedback resistor Rref of the reference circuits 203a to 203d. Is the same.

  In general, the amplification circuit can be increased in speed as the gain resistance value is smaller. For this reason, in the case of a light receiving amplification circuit having a two-stage amplification configuration corresponding to high-speed signal amplification, the gain resistance in the first stage can be reduced by distributing the gain to the differential circuit in the subsequent stage. The light receiving amplifier circuit having the two-stage amplification configuration can make the amplifier wider in bandwidth than the light receiving amplifier circuit having the one-stage amplification configuration, and enables high-speed amplification. However, the noise characteristic and the offset voltage characteristic are deteriorated.

In the case of the post-stage amplification factor double amplifier, the output voltage difference between the current-voltage conversion circuit and the reference circuit generated in the first-stage amplifier is doubled by the post-stage amplifier to become an offset voltage.
In addition, in the case of a double amplification factor in the latter stage, 3 dB noise is improved by halving the gain resistance in the first stage amplifier, but 6 dB worsens by amplification in the second stage amplifier, resulting in a total of 3 dB. It gets worse. In other words, in order to increase the speed of the amplifier, this suppression is necessary with the deterioration of noise.

  Hereinafter, a specific operation of the light receiving amplification circuit 201a will be described. Here, each value of Rf, Rs1, Rs2, Rrefs, Rfs, V1, V2, and Vs2 used in the following description is defined as follows.

Rf: feedback resistance (gain resistance) of current-voltage conversion circuit
Rs1: Resistance between the output of the current-voltage conversion circuit 202a and the non-inverting input of the differential circuit 204a Rs2: Resistance between the output of the reference circuit 203a and the inverting input of the differential circuit 204a Rrefs: Non-resistance of the differential circuit 204a Resistance between inverting input and external reference voltage Vref Rfs: Feedback resistance of differential circuit V1: Output voltage of current-voltage conversion circuit 202a V2: Reference circuit output Vs1: Non-inverting input potential of differential circuit 204a Vs2: Inverted input potential Vo of differential circuit 204a: Output terminal voltage of differential circuit 204a In a no-signal state, non-inverted input potential Vs1 and output terminal voltage Vo (VA) of differential circuit 204a are:
Vs1 = (Vref−V1) × Rs1 / (Rs1 + Rrefs) + V1 (12)
Vo = (Vs2−V2) × (Rfs + Rs2) / Rs2 + V2 (13)
It is expressed. Here, when Vs1 = Vs2, Rs1 = Rs2, and Rrefs = Rfs, the output terminal voltage Vo is
Vo = (V1−V2) × Rf / Rs2 + Vref (14)
It is expressed. Thus, the voltage difference between V1 and V2 is amplified at the output of the differential circuit 204a. That is, (V1−V2) × Rf / Rs2 is an offset voltage, and an ideal state is V1 = V2.

When a signal is input to the current-voltage conversion circuit 202a, the voltage difference between V1 and V2 is the signal voltage, the photocurrent in the signal light incident state is Ipd, and the differential circuit output in the signal light incident state Since Von is V1-V2 = Rf × Ipd,
Von = Rfp × Rf / Rs2 × Ipd + Vref (15)
It is expressed.

Here, when the emitter-base voltage of the input transistor Tr1 of the current-voltage conversion circuit 202a in the no-signal state is VBE1, and the base current is Ib1, the output voltage V1 is
V1 = VBE1 + Rf × Ib1 (16)
It is expressed. Similarly, when the emitter-base voltage of the input transistor Tr2 of the reference circuit 203a is VBE2, and the base current is Ib2, the output voltage V2 is
V2 = VBE2 + Rref × Ib2 (17)
It is expressed. Therefore, it is necessary that V1 = V2 when there is no signal.

  For this reason, it is important that the first-stage current-voltage conversion circuit 202a and the reference circuit 203a have the same configuration. In addition, it is important that the feedback resistors Rf and Rref of the current-voltage conversion circuit 202a and the reference circuit 203a have the same resistance value and the voltage drops generated in the feedback resistors Rf and Rref are the same. Along with this, the emitter-base voltages of the input transistors Tr1 and Tr2 of the current-voltage conversion circuit 202a and the reference circuit 203a need to be the same. That is, the resistance values of the feedback resistors Rf and Rref need to be the same, and since VBE1 = VBE2, the bias currents of the input transistors Tr1 and Tr2 need to be the same.

The noise characteristics in the two-stage circuit configuration are
Vnp = √ (Nip1 ² + Nip2 ² + Nrf1 ² + Nrf2 ² ) × latter stage amplification factor (18)
It is expressed. Here, Nip1 and Nip2 represent noise caused by shot noise generated by the current-voltage conversion circuit 202a and the reference circuit 203a by the input transistors Tr1 and Tr2 of the current-voltage conversion circuit 202a and the reference circuit 203a. Nrf1 and Nrf2 represent noise due to thermal noise generated by the feedback resistors Rf and Rref of the current-voltage conversion circuit 202a and the reference circuit 203a. Each of these noises is a mean square of noise caused by the element. Furthermore, the noise increases by a factor of amplification in the differential circuit 204a.

The output noise in the differential circuit 204a is
Vns = √ (Nis1 ² + Nis2 ² + Nrfs1 ² + Nrfs2 ² ) (19)
It is expressed. Here, Nis1 and Nis2 represent noise caused by shot noise generated from the differential transistor pair in the differential circuit 204a. Nrfs1 and Nrfs2 represent noise caused by thermal noise generated from the feedback resistor Rfs and the reference resistor Rrefs. Each of these noises is a mean square of noise caused by the element.

  Normally, in the case of a two-stage circuit configuration, the noise generated in the first stage circuit is amplified in the subsequent stage, so that the noise generated in the first stage circuit is dominant among the noises generated in the entire circuit. For this reason, in the conventional circuit, a circuit band is suppressed and noise is reduced by adding a capacitor C1 between the base and the collector of the input transistor Tr2 of the reference circuit 203a as shown in FIG.

  In Patent Document 2, in addition to the conventional band limitation (noise reduction), it is possible to shorten the settling time while performing the band limitation by providing a capacitor between the collector and the ground of the input transistor of the reference circuit. Is described (see FIG. 1). Patent Document 2 describes that the current flowing in the feedback resistor and the reference resistor is set to 0 by compensating the base current of the input transistor flowing in the feedback resistor and the reference resistor, thereby suppressing the charging current of the band-limiting capacitor. (See FIG. 3 of Patent Document 2).

  Patent Document 3 discloses a light receiving amplifier circuit capable of reducing noise and obtaining good offset voltage characteristics. Specifically, this photoreceiver / amplifier circuit includes a differential circuit composed of a differential transistor pair (first and second transistors) in which emitters are connected to each other and a bias circuit thereof, and an emitter at the base of the first transistor. A third transistor comprising a first emitter follower circuit comprising a third transistor to be connected and a bias circuit thereof; a fourth transistor having an emitter connected to the base of the second transistor; and a second emitter follower circuit comprising the bias circuit. The base of the fourth transistor is connected to a photodiode and a gain resistor that converts the photocurrent of the photodiode into voltage, and the base of the fourth transistor is connected to a reference voltage power source provided from the outside through an offset adjusting resistor. It is configured. In this photoreceiver / amplifier circuit, the resistance value of the gain resistor (feedback resistor) is set larger than the resistance value of the offset adjusting resistor (reference resistor), thereby obtaining low noise circuit characteristics.

In Patent Document 4, as an offset voltage suppression method, a difference is obtained by inverting the output of a second current-voltage conversion circuit having the same DC and AC circuit characteristics as the first current-voltage conversion circuit by an inverting amplifier having a gain of 1. It is described that the offset voltage is suppressed by using the reference voltage of the dynamic amplifier.
JP 11-296892 A (published October 29, 1999) JP 2006-262410 A (published September 28, 2006) JP 2007-287286 A (published November 1, 2007) Japanese Patent Laid-Open No. 2002-9560 (published on January 11, 2002)

  Although the method of Patent Document 1 can reduce high-frequency noise, in order to sufficiently reduce noise in the low-frequency region, the capacitance value of the capacitor C1 in the light receiving amplification circuit 101a shown in FIG. 10 is maximized. This is not advantageous from the cost aspect. Therefore, there is a need for a noise reduction method that replaces the conventional method described above.

  In the method of Patent Document 2, although noise reduction in the high frequency region can be realized by the conventional band limitation, noise in the low frequency region cannot be sufficiently reduced.

  In Patent Document 3, an emitter follower circuit is used to suppress a current flowing through a feedback resistor and a reference resistor, thereby suppressing a voltage difference between the feedback resistor and the reference resistor, thereby suppressing an offset voltage characteristic and an amplification for pickup. It is described that the necessary characteristics for the circuit are obtained. However, since the light receiving amplifier circuit described in Patent Document 3 has a differential circuit configuration, it is difficult to reduce the bias current of the differential amplifier transistor, and it is difficult to reduce shot noise.

  Patent Document 4 describes that the offset voltage is suppressed by inverting the output of a current-voltage conversion circuit having the same feedback resistance as that of the current-voltage conversion circuit to obtain a reference voltage. However, in such a method, since the reference voltage generation circuit is configured by a current-voltage conversion circuit and an inverting circuit, there is a possibility that an offset voltage may be generated due to mismatching of elements of the reference voltage generation circuit.

  Further, in a light receiving amplifier circuit used in an optical pickup device, speeding up of the amplifier circuit and low noise characteristics have become important conditions. In order to realize high-speed signal processing, an amplifier circuit having a two-stage configuration is required. As a noise reduction method, it is conceivable to reduce the feedback resistance value of the reference circuit. However, in the two-stage amplifier circuit, the noise of the first stage circuit is amplified by the subsequent differential circuit, so that the noise is worse than that of the differential one-stage amplifier circuit. Therefore, in a two-stage amplifier circuit that enables high-speed band signal processing, a method that can further reduce noise is required.

  In addition, in order to suppress shot noise, the feedback resistance of the reference circuit is set to a resistance value smaller than that of the current-voltage conversion circuit, and in addition, the bias current of the input transistor of the current-voltage conversion circuit is necessary for high-speed signal processing. It is conceivable that the bias current of the input transistor of the reference circuit that does not require capability is set to a small value with a predetermined amount of current that can be driven. However, this method has a problem that good offset characteristics cannot be obtained.

  The present invention has been made in view of the above problems, and an object of the present invention is to improve offset voltage characteristics while further reducing noise in a light receiving amplifier circuit capable of high-speed signal processing.

  In order to solve the above-described problem, a light-receiving amplifier circuit according to the present invention includes a light-receiving element that converts received light into a photocurrent, a first feedback resistor, and a first input transistor. A current-voltage conversion circuit that converts a photocurrent flowing through the light-receiving element into a voltage, a second feedback resistor and a second input transistor, and the same circuit as the current-voltage conversion circuit except that the light-receiving element is not connected In a light receiving amplifier circuit comprising a configured reference circuit, and a differential circuit for amplifying a difference between output voltages of the current-voltage conversion circuit and the reference circuit, the output voltage of the current-voltage conversion circuit when there is no signal, Compensating means for compensating for a difference from the output voltage of the reference circuit is provided, and a resistance value of the second feedback resistor is set smaller than a resistance value of the first feedback resistor, Bias current of the power transistor, is characterized in that it is set in the small current value than the bias current of the first input transistor.

  In order to reduce shot noise, it is desirable to reduce the thermal noise by reducing the reference resistance and the bias current of the second input transistor that does not require high-speed amplification in the reference circuit that is not related to the amplification action. For this reason, the resistance value of the second feedback resistor is set to be smaller than the resistance value of the first feedback resistor, and the bias current of the second input transistor is set to be smaller than the bias current of the first input transistor. Thus, it is possible to suppress shot noise, which is impossible with a differential one-stage circuit, and also to suppress feedback resistor thermal noise of the reference circuit. Further, the compensation means compensates for the output voltage difference between the current-voltage conversion circuit and the reference circuit when there is no signal, so that it is possible to eliminate the offset voltage caused by the unequal output voltages.

A differential circuit that amplifies the output voltage difference between the current-voltage converter circuit and the reference circuit by connecting the light-receiving element, the current-voltage converter circuit to which the feedback resistor is connected, and the reference circuit that has the same configuration as the current-voltage converter circuit and that connects only the feedback resistor In a photoreceiver / amplifier circuit comprising:
Compensating means for compensating for the output potential difference between the output of the current-voltage conversion circuit and the reference circuit when there is no signal,
The resistance value of the feedback resistance of the reference circuit is set to a small value without being equal to the feedback resistance feedback resistance value of the current-voltage conversion circuit set according to necessary characteristics, and
The bias current of the input transistor of the reference circuit can be made small without making it the same as the bias current of the input transistor of the current-voltage conversion circuit required for obtaining a predetermined characteristic.

  In the light receiving amplification circuit disclosed in Patent Document 1, it is possible to reduce noise by having an offset adjustment function circuit having a differential circuit configuration in which gain resistance = offset adjustment resistance / n and controlled by a drive current of n times. Is described. On the other hand, in the photoreceiver / amplifier circuit of the present invention, noise is suppressed by providing a compensation current for the voltage difference between the feedback resistor and the reference resistor. Thereby, the bias current flowing through the differential transistor pair of the differential circuit is constant, and no additional noise is generated. On the other hand, in the photoreceiver / amplifier circuit of Patent Document 1, transistor shot noise is increased by increasing the bias current flowing through the differential circuit for offset adjustment by n times, and noise deterioration is expected. Therefore, also in this respect, the light receiving amplifier circuit of the present invention can obtain better noise characteristics than the conventional light receiving amplifier circuit.

  Preferably, the compensation means is a current source that supplies a compensation current for compensating the output voltage difference to a connection portion where the second feedback resistor and a base of the second input transistor are connected. Further, the compensation current has a resistance value of the first feedback resistor as Rf, a resistance value of the second feedback resistor as Rref, a base current Ib of the first input transistor, and a base current of the second input transistor. As Ibref, it is preferably expressed as Rf / Rref × Ib−Ibref + Vt × ln (Ib / Ibref) / Rref.

  More specifically, the compensation means includes a first current mirror circuit, a second current mirror circuit that receives an output of the first current mirror circuit, and a bias current that drives the first input transistor. A first transistor for supplying a bias current having a magnitude multiplied by a resistance ratio between the first feedback resistor and the second feedback resistor; an emitter connected to the collector of the first transistor; and a base connected to the first current A second transistor connected to one output of the mirror circuit, and a third transistor connected to the other output of the first current mirror circuit, driven by the same current as the bias current for driving the second input transistor. A first compensator for supplying a first compensation current from the second current mirror circuit; and driving the first input transistor. A first voltage generation circuit that is driven by the same current as the bias current to generate the same voltage as the base-emitter voltage of the first input transistor, and a first resistor connected to the output of the first voltage generation circuit A second voltage generation circuit that is driven with the same current as the bias current for driving the second input transistor and generates the same voltage as the base-emitter voltage of the second input transistor, and an output of the second voltage generation circuit A second resistor for supplying a second compensation current from the third current mirror circuit, and a second current mirror circuit for outputting a difference between currents flowing through the first and second resistors. It is preferable that the compensation current is provided by combining the first and second compensation currents. With this configuration, the first compensation unit supplies Rf / Rref × Ib−Ibref as the first compensation current, and the second compensation unit uses Vt × ln (Ib / Ibref) / Rref as the second compensation current. Grant.

  Alternatively, the compensation means is preferably a current source that supplies a compensation current for compensating the output voltage difference to a connection portion where the first feedback resistor and the base of the first input transistor are connected. Further, the compensation current has a resistance value of the first feedback resistor as Rf, a resistance value of the second feedback resistor as Rref, a base current Ib of the first input transistor, and a base current of the second input transistor. As Ibref, it is preferably expressed as Ib−Rref / Rf × Ibref + Vt × ln (Ib / Ibref) / Rf.

  More specifically, the compensation means includes a first current mirror circuit, a first transistor that supplies the same bias current as the bias current that drives the first input transistor, and an emitter connected to the collector of the first transistor. And a resistance ratio between the second feedback resistor and the first feedback resistor is applied to a bias current for driving the second input transistor, and a second transistor whose base is connected to the output of the first current mirror circuit. A first compensator for supplying a bias current of a multiplied magnitude, and having a base connected to the output of the first current mirror circuit, and supplying a first compensation current from the first current mirror circuit And a base-emitter of the first input transistor driven by the same current as a bias current for driving the first input transistor. A first voltage generating circuit for generating the same voltage as the voltage between the two transistors, a first resistor connected to the output of the first voltage generating circuit, and a bias current for driving the second input transistor; A second voltage generating circuit that generates the same voltage as the base-emitter voltage of the second input transistor, a second resistor connected to the output of the second voltage generating circuit, and the first and second resistors flow. A second current mirror circuit that outputs a current difference, and a second compensation unit that supplies a second compensation current from the second current mirror circuit, and combining the first and second compensation currents It is preferable to provide a compensation current. With this configuration, the first compensation unit provides Ib−Rref / Rf × Ibref as the first compensation current, and the second compensation unit uses Vt × ln (Ib / Ibref) / Rf as the second compensation current. Grant.

  The optical pickup device according to the present invention includes the respective light receiving amplifier circuits configured as described above, thereby reducing noise and improving offset voltage characteristics in the light receiving amplifier circuit. Therefore, the quality of the output signal of the optical pickup device can be improved particularly when the light receiving and amplifying circuit is used for converting the light reflected from the optical disk into a signal voltage. Further, the optical disk apparatus of the present invention can improve the quality of the output signal of the optical pickup apparatus by including the optical pickup apparatus.

As described above, the light receiving amplification circuit according to the present invention includes a light receiving element that converts received light into a photocurrent, a first feedback resistor, and a first input transistor, and the photocurrent flowing through the light receiving element is converted into a voltage. A reference circuit configured to be the same circuit as the current-voltage conversion circuit except that the current-voltage conversion circuit to convert, a second feedback resistor and a second input transistor, and the light receiving element is not connected; and the current-voltage conversion In a light receiving amplifier circuit comprising a circuit and a differential circuit for amplifying the output voltage difference of the reference circuit,
Compensating means for compensating for the difference between the output voltage of the current-voltage conversion circuit and the output voltage of the reference circuit when there is no signal,
The resistance value of the second feedback resistor is set smaller than the resistance value of the first feedback resistor, and the bias current of the second input transistor is set to a current value smaller than the bias current of the first input transistor. Therefore, it is possible to reduce noise from a lower frequency region compared to the conventional configuration that adds a noise reduction capacitor, and in addition, good offset voltage characteristics that are indispensable for a light receiving amplification circuit for pickup There is an effect that can be obtained. In addition, the reliability of the optical pickup device provided with such a light receiving amplification circuit and the optical disc device provided with the optical pickup device can also be improved.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to FIGS. 1, 2, 8 and 11. FIG.

  FIG. 1 shows a schematic configuration of a light receiving amplifier circuit 1 according to the present embodiment. FIG. 2 shows a detailed circuit configuration of the light receiving amplification circuit 1.

  The photoreceiver / amplifier circuit 1 is used as each of the photoreceiver / amplifier circuits 201a to 201d shown in FIG. 11, and converts the photocurrent generated in the photodiodes PDA to PDD shown in FIG. The light receiving amplifier circuit 11 (see FIG. 3) of the second embodiment described later is similarly used as each of the light receiving amplifier circuits 201a to 201d.

  As shown in FIG. 1, the photoreceiver / amplifier circuit 1 includes a photodiode PD, a current-voltage conversion circuit 2, a reference circuit 3, a differential circuit 4, and a compensation circuit 5.

  The photodiode PD is a light receiving element that generates a photocurrent Ib having a current amount corresponding to the received light.

  The current-voltage conversion circuit 2 is a circuit that converts the photocurrent Ib flowing through the photodiode PD into a voltage and amplifies it. The current-voltage conversion circuit 2 includes an amplifier AMP1 and a feedback resistor Rf connected between the input and output terminals of the amplifier AMP1. The cathode of the photodiode PD is connected to the input terminal of the amplifier AMP1.

  The reference circuit 3 includes an amplifier AMP2 and a reference resistor Rref21 (feedback resistor) connected between the input and output terminals of the amplifier AMP2. As will be described later, the reference circuit 3 has the same circuit configuration as the current-voltage conversion circuit 2 except that the photodiode PD is not connected.

  The differential circuit 4 is a differential amplifier circuit that amplifies the difference between the output voltage of the current-voltage conversion circuit 2 and the output voltage of the reference circuit 3. The differential circuit 4 includes a differential amplifier AMP3, a feedback resistor Rfs2, input resistors Rs21 and Rs22, and a reference resistor Rrefs21.

  The input resistor Rs21 is connected between the output terminal of the current-voltage conversion circuit 2 and the non-inverting input terminal of the differential amplifier AMP3. On the other hand, the input resistor Rs22 is connected between the output terminal of the reference circuit 3 and the inverting input terminal of the differential amplifier AMP3. The reference resistor Rrefs21 has one end supplied with a reference voltage Vref given from the outside and the other end connected to the non-inverting input terminal of the differential amplifier AMP3. The feedback resistor Rfs2 is connected between the inverting input terminal and the output terminal of the differential amplifier AMP3. The differential circuit 4 outputs the output voltage Vo from the output terminal as a voltage obtained by amplifying the above difference.

  The compensation circuit 5 draws a compensation current Is21 described later from the input terminal of the amplifier AMP2 in the reference circuit 3 in order to compensate for the difference between the output voltage of the current-voltage conversion circuit 2 and the output voltage of the reference circuit 3.

  Next, a detailed configuration of the light receiving amplification circuit 1 will be described.

  As shown in FIG. 2, the amplifier AMP1 of the current-voltage conversion circuit 2 includes an input transistor Tr21 and transistors Tr211 to Tr215.

  The transistors Tr211 and Tr212 have their emitters connected to the power supply line (power supply voltage Vcc) and their bases connected to each other. The base and emitter of the transistor Tr211 are connected. Thus, since the transistors Tr211 and Tr212 constitute a current mirror circuit, the transistor Tr212 functions as a constant current source for supplying the bias current I21. The input transistor Tr21 has a base connected to the cathode of the photodiode PD, a collector connected to the collector of the transistor Tr212, and an emitter grounded. The base of the input transistor Tr21 is an input point (input terminal) of the current-voltage conversion circuit 2. The input transistor Tr21 and the transistor Tr212 constitute an amplifying unit in the current-voltage conversion circuit 2.

  The transistor Tr213 has a collector connected to the collector of the transistor Tr211 and an emitter grounded. A bias voltage supplied from a bias circuit (not shown) is applied to the base of the transistor Tr213.

  The collector of the transistor Tr214 is connected to the power supply line, and the base is connected to the collector of the transistor Tr212. The emitter of the transistor Tr214 serves as an output point (output terminal) of the current-voltage conversion circuit 2. A feedback resistor Rf21 is connected between the emitter of the transistor Tr214 and the base of the transistor Tr21. In the transistor Tr215, the collector is connected to the emitter of the transistor Tr214, the emitter is grounded, and the bias voltage is applied to the base. Since the transistor Tr215 constitutes an emitter follower, it constitutes an output unit in the current-voltage conversion circuit 2 together with the transistor Tr214.

  The amplifier AMP2 of the reference circuit 3 includes an input transistor Tr22 and transistors Tr221 to Tr225.

  The transistors Tr221 and Tr222 have emitters connected to the power supply line and bases connected to each other. In the transistor Tr221, the base and the emitter are connected. Thus, since the transistors Tr221 and Tr222 form a current mirror circuit, the transistor Tr222 functions as a constant current source for supplying the bias current I22. The input transistor Tr22 has a collector connected to the collector of the transistor Tr222 and an emitter grounded. The base of the input transistor Tr22 is an input point (input terminal) of the reference circuit 3. The input transistor Tr22 and the transistor Tr222 constitute an amplifying unit in the reference circuit 3.

  The transistor Tr223 has a collector connected to the collector of the transistor Tr221 and an emitter grounded. The bias voltage is applied to the base of the transistor Tr223.

  The collector of the transistor Tr224 is connected to the power supply line, and the base is connected to the collector of the transistor Tr222. The emitter of the transistor Tr224 serves as an output point (output terminal) of the reference circuit 3. A reference Rref21 is connected between the emitter of the transistor Tr224 and the base of the transistor Tr22. The collector of the transistor Tr225 is connected to the emitter of the transistor Tr224, the emitter is grounded, and the bias voltage is applied to the base. Since the transistor Tr225 constitutes an emitter follower, it constitutes an output section in the reference circuit 3 together with the transistor Tr224.

  The compensation circuit 5 includes a first compensation unit 6 and a second compensation unit 7. The first compensation unit 6 includes current mirror circuits 61 and 62, transistors Tr63 to Tr66, and a capacitor C1. The second compensation unit 7 includes current mirror circuits 7a and 7b, voltage generation circuits 8 and 9, capacitors C22 to C24, and resistors Rref23 and Rref24.

  First, the configuration of the first compensation unit 6 will be described.

  The current mirror circuit 61 includes transistors Tr61a and Tr61b. The transistors Tr61a and Tr61b have emitters connected to the power supply line and bases connected to each other. The base and emitter of the transistor Tr61a are connected. The current mirror circuit 62 includes transistors Tr62a and Tr62b. The bases of the transistors Tr62a and Tr62b are connected to each other. The transistor Tr62a has a collector connected to the collector of the transistor Tr61b and an emitter grounded. A capacitor C21 is connected between the base of the transistor Tr62a and the ground line (GND). The transistor Tr62b has an emitter grounded and a collector connected to the base of the input transistor Tr22 in the reference circuit 3.

  The transistor Tr64 has a collector connected to the power supply line and an emitter connected to the collector of the transistor Tr65. The transistor Tr66 has a collector connected to the power supply line, an emitter connected to the collector of the transistor Tr65, and a base connected to the collectors (common connection point) of the transistors Tr61b and Tr62a. The emitter of the transistor Tr65 is grounded, and the bias voltage is applied to the base.

  Next, the configuration of the second compensation unit 7 will be described.

  The voltage generation circuit 8 includes transistors Tr81 to Tr85 and diodes D81 and D82.

  Transistors Tr81 and Tr82 have emitters connected to the power supply line and bases connected to each other. The base and the emitter of the transistor Tr81 are connected. Thus, the transistors Tr81 and Tr82 constitute a current mirror circuit. The transistor Tr83 has a collector connected to the collector of the transistor Tr81, an emitter grounded, and the bias voltage applied to the base. The diodes D81 and D82 are formed by diode-connecting transistors, and are connected in series between the collector of the transistor Tr82 and the ground line.

  The collector of the transistor Tr85 is connected to the power supply line, and the base is connected to the collector of the transistor Tr82. The emitter of the transistor Tr85 serves as an output point (output terminal) of the voltage generation circuit 8. In the transistor Tr84, the collector is connected to the emitter of the transistor Tr85, the emitter is grounded, and the bias voltage is applied to the base.

  In addition, a circuit in which a resistor Rref23 and a capacitor C24 are connected in parallel is connected between the emitter of the transistor Tr85 and the ground line.

  In the voltage generation circuit 8, the bias current I22 is supplied from the transistor Tr83 to the diodes D81 and D82 through the current mirror circuit including the transistors Tr81 and Tr82. The potential generated thereby is output by the emitter follower circuit (transistors Tr84 and Tr85) driven by the bias current I21.

  The voltage generation circuit 9 includes a current mirror circuit 91, transistors Tr92 to Tr94, and diodes D91 and D92. The voltage generation circuit 9 has the same circuit configuration as the voltage generation circuit 8 described above.

  The current mirror circuit 91 includes transistors Tr91a and Tr91b. The transistors Tr91a and Tr91b have emitters connected to the power supply line and bases connected to each other. In the transistor Tr91a, the base and the emitter are connected. The transistor Tr92 has a collector connected to the collector of the transistor Tr91a, an emitter grounded, and the bias voltage applied to the base. The diodes D91 and D92 are formed by diode-connecting transistors, and are connected in series between the collector of the transistor Tr91b and the ground line.

  The collector of the transistor Tr94 is connected to the power supply line, and the base is connected to the collector of the transistor Tr91b. The emitter of the transistor Tr94 serves as an output point (output terminal) of the voltage generation circuit 9. In the transistor Tr93, the collector is connected to the emitter of the transistor Tr94, the emitter is grounded, and the bias voltage is applied to the base.

  Further, a circuit in which a resistor Rref22 and a capacitor C23 are connected in parallel is connected between the emitter of the transistor Tr94 and the ground line.

  The current mirror circuit 7a includes transistors Tr7aa and Tr7ab. The transistors Tr7aa and Tr7ab have their emitters connected to the power supply line and their bases connected to each other. In the transistor Tr7aa, the base and the emitter are connected. The collector of the transistor Tr7aa is connected to the emitter of the transistor Tr94.

  The current mirror circuit 7b includes transistors Tr7ba and Tr7bb. The transistor Tr7ba has a collector connected to the collector of the transistor Tr7ab and an emitter grounded. A capacitor C22 is connected between the base of the transistor Tr7be and the ground line. The transistor Tr7bb has an emitter grounded and a collector connected to the base of the input transistor Tr22 in the reference circuit 3.

  In the voltage generation circuit 9, the bias current I21 is supplied to the diodes D91 and D92 by the transistor Tr92 via the current mirror circuit 91. The potential generated thereby is output by an emitter follower circuit (transistors Tr93 and Tr94) driven by a bias current I22.

  In the photoreceiver / amplifier circuit 1 configured as described above, the magnitude of the bias current I21 of the input transistor Tr21 of the current-voltage conversion circuit 2 and the bias current I22 of the input transistor Tr22 of the reference circuit 2 is I21> I22. Satisfies the relationship. Further, the feedback resistance Rf21 and the feedback resistance Rref21 satisfy the relationship of Rf21 ≧ Rref21. However, hereinafter, the operation when the relationship of Rf21> Rref21 is satisfied and resistance thermal noise and shot noise are reduced will be described.

  The compensation circuit 5 extracts the compensation current Is21 set by the following relational expression from the base of the input transistor Tr22.

When the base current of the input transistor Tr21 of the current-voltage conversion circuit 2 and the base current of the input transistor Tr22 of the reference circuit 3 are Ib and Ibref, the compensation current Is21 is
Is21 = Rf21 / Rref21 × Ib
−Ibref + Vt × ln (Ib / Ibref21) / Rref21 (20)
It is expressed.

  Specifically, calculation of the compensation current Is21 will be described based on the circuit configuration shown in FIG. Here, each value of Ib21, VBE21, Ib22, VBE22, V21 and V22 used in the following description is defined as follows.

Ib21: Base current of the input transistor Tr21 VBE21: Base-emitter voltage of the input transistor Tr21 Ib22: Base current of the input transistor Tr22 VBE22: Base-emitter voltage of the input transistor Tr22 V21: Output voltage of the current-voltage conversion circuit 2 V22: When there is no output voltage correction current Is21 of the reference circuit 3, the output voltages V21 and V22 are
V21 = Rf21 × Ib21 + VBE21 (21)
V22 = Rref21 × Ib22 + VBE22 (22)
It is expressed. In this case, Ib21≈Ib22, VBE21≈VBE22, and the voltage difference between the output voltages V21 and V22 is
V21−V22 = Rf21 × Ib21 + VBE21
− (Rref21 × Ib22 + VBE22) (23)
It is expressed. When the correction current Is21 flows, the voltage difference is
V21−V22 = Rf21 × Ib21 + VBE21
− (Rref21 × (Ib22 + Is21) + VBE22) (24)
It is expressed.

In order for V21−V22 = 0,
Rref21 × (Ib22 + Is21) = Rf21 × Ib21 + VBE21−VBE22
…(twenty five)
and,
Is21 = Rf21 / Rref21 × Ib21−Ib22
+ (VBE21−VBE22) / Rref21 (26)
It is necessary to satisfy. The base-emitter voltage difference is
VBE21−VBE22 = Vt × ln (I21 / Is) −Vt × ln (I22 / Is)
= Vt × ln (I21 / I22)
= Vt × ln (Ib21 / Ib22) (27)
It is expressed. Therefore, the compensation current Is21 is
Is21 = Rf21 / Rref21 × Ib21−Ib22
+ Vt × ln (Ib21 / Ib22) / Rref21 (28)
It becomes.

  In this way, by causing the correction current Is21 to flow, resistance noise and shot noise can be reduced, and more favorable offset voltage characteristics can be obtained.

  Here, the above Vt is expressed as Vt = (k × T) / q. Each value in this equation is defined as follows.

k: Boltzmann constant q: Charge amount of electrons T: Absolute temperature Is: Saturation current of PN junction Specific numerical examples of the above values are shown below. However, this numerical example is a general example and varies depending on the process used.

Rf21 = 5kΩ
Rref21 = 5kΩ
I21 = 100 μA
I22 = 100 μA
The amplification factor of the differential circuit 4 is twice. The thermal noise spectrum due to the resistance of 1 kΩ is v = 4 nV / √Hz (effective value). This corresponds to shot noise generated by a direct current of 50 μA. In this case, the first stage output noise is
First stage output noise (Vnp1) ²
= ((20nV / √Hz) ² + (20nV / √Hz) ² + (8nV / √Hz) ² + (8nV / √Hz) ² )
= 928 (nV / √Hz) ²
Therefore, the subsequent output noise Vnout1 doubled by the subsequent differential circuit 4 is
Vnout1 = 60.9 nV / √Hz.
It becomes.

Here, when the reference resistance Rref21 is reduced from the above case, Rref21 = 1 kΩ, the bias current I22 is made smaller than the above case, and I22 = 10 μA, the output noise is
Output noise (Vnp2) ²
= ((20nV / √Hz) ² + (4nV / √Hz) ² + (8nV / √Hz) ² + (0.8nV / √Hz) ² )
= 480.64 (nV / √Hz) ²
The post-stage output noise Vnout2 doubled by the post-stage differential circuit 4 is
Vnout2 = 43.8nV / √Hz
It becomes.

  Therefore, 20 × log (Vnout1 / Vnout2) = 2.86 dB, which is a noise improvement of 2 dB or more.

  Further, the compensation current Is21 includes a first compensation current (Rf / Rref × Ib−Ibref) based on the first half of the left side of Equation 28 and a second compensation current Vt × ln ((Ib / Ibref) / Rref). The first compensation current is used for voltage difference correction by a feedback resistor, and the second compensation current is used for correction of the base-emitter voltage difference.

  The first compensation current is supplied by the first compensation unit 6 through the current mirror circuit 62. Here, unlike the configuration of the comparative example described later, the first current generated based on two types of currents, that is, the bias current I21 of the input transistor Tr21 in the current-voltage conversion circuit 2 and the bias current I22 of the input transistor Tr22 in the reference circuit 3. The compensation current is synthesized and supplied by the second compensation current.

  Specifically, the transistor Tr63 supplies a bias current having a magnitude obtained by multiplying the bias current I21 by a resistance ratio (Rf21 / Rref21) between the feedback resistor Rf21 and the reference resistor Rref21. The transistor Tr64 is driven with this current. On the other hand, the transistor Tr66 is driven by the bias current I22 provided by the transistor Tr65. The current mirror circuit 61 outputs the difference between the base current flowing through the transistor Tr64 and the base current flowing through the transistor Tr66 to the current mirror circuit 62. Thereby, the current mirror circuit 62 flows the difference current as the first compensation current. Further, the current mirror circuit 62 performs noise suppression of the first compensation current by connecting a noise reducing capacitor C21 as necessary.

  Specifically, the current mirror circuit 61 can output the difference current to the current mirror circuit 62 as follows.

  First, the transistors Tr223 and Tr65 pass the same bias current I22 (collector current), and the transistor Tr63 is assumed to flow a bias current (collector current) that is (Rf21 / Rref21) times the bias current I21 of the transistor Tr213. Yes. Here, errors due to the base currents of the transistors Tr221 and 222 are ignored, and errors due to the base currents of the transistors Tr211 and 212 are ignored. The current flowing through the transistors Tr66 and Tr64 can be adjusted by making the emitter areas of the transistors Tr223 and Tr65 the same and making the emitter areas of the transistors Tr213 and Tr63 the same.

  By setting the current value as described above, it is possible to supply a desired first correction current obtained by subtracting the base current of the transistor Tr66 from the base current of the transistor Tr64 in accordance with the equation 28 described above.

  However, here, errors due to the base currents of the transistors Tr61a and Tr61b are ignored, and errors due to the base currents of the transistors Tr62a and Tr62b are ignored.

  The second compensation current is supplied by the second compensation unit 7 through the current mirror circuit 7b.

  Specifically, in the voltage generation circuit 8, a bias current I22 is generated by the transistors Tr83 and Tr84, and the bias current I22 also flows through the diodes D81 and D82 by the current mirror circuit composed of Tr81 and Tr82. At this time, the voltage generated at the base of the transistor Tr85 is output from the emitter follower circuit including the transistors Tr84 and Tr85. This voltage is the same value as the base-emitter voltage VBE22 of the input transistor Tr22. By applying this voltage, a current flows through the resistor Rref23 having the same resistance value as that of the reference resistor Rref21.

  On the other hand, in the voltage generation circuit 9, a bias current I21 is generated by the transistors Tr92 and Tr93, and the bias current I21 also flows through the diodes D91 and D92 by the current mirror circuit 91. At this time, the voltage generated at the base of the transistor Tr94 is output from the emitter follower circuit including the transistors Tr94 and Tr94. This voltage is the same value as the base-emitter voltage VBE21 of the input transistor Tr21. By applying this voltage, a current flows through the resistor Rref22 having the same resistance value as that of the reference resistor Rref21.

  In the current mirror circuit 7a, the same current flows through the transistor Tr7ab when the transistor Tr7aa flows the current through the resistor Rref22. However, since the current flows from the transistor Tr7ab to the resistor Rref23, the transistor Tr7ba of the current mirror circuit 7b. The difference between the current flowing through the resistor Rref22 and the current flowing through the resistor Rref23 flows. This differential current corresponds to the second compensation current and flows through the transistor Tr7bb.

  Moreover, in the 2nd compensation part 7, the capacitor | condensers C22-C24 for noise reduction are connected as needed, and noise suppression of a 2nd compensation current is performed.

  In order to reduce shot noise, it is desirable to reduce the thermal noise by reducing the reference resistance and the bias current of the second input transistor that does not require high-speed amplification in a reference circuit that is not related to the amplification action. Therefore, in the light receiving amplification circuit 1, the resistance value of the reference resistor Rref21 is set to be smaller than the resistance value of the feedback resistor Rf21, and the bias current of the input transistor Tr22 is set to be smaller than the bias current of the input transistor Tr21. Yes. This makes it possible to suppress shot noise, which was impossible with a differential one-stage circuit, and also to suppress feedback resistor thermal noise in the reference circuit.

  However, the amplification input transistor Tr21 to which the feedback resistor Rf is connected to the base needs to set the bias current I21 to a predetermined value in order to obtain a signal amplification band.

  In addition, since the light receiving amplification circuit 1 includes the compensation circuit 5, the difference between the output voltages of the current-voltage conversion circuit 2 and the reference circuit 3 when there is no signal is compensated for, so that the offset generated when the output voltages are not equal. The voltage can be eliminated. Therefore, good offset voltage characteristics can be realized. Further, by compensating the base current of the input transistor Tr22 of the reference circuit 3, good characteristics can be obtained without affecting the differential circuit 4.

[Embodiment 2]
An embodiment of the present invention will be described with reference to FIGS. 3 and 4 as follows. Note that components in the present embodiment having functions equivalent to those of the components in the first embodiment are denoted by the same reference numerals and description thereof is omitted.

  FIG. 3 shows a schematic configuration of the light receiving amplification circuit 11 according to the present embodiment. FIG. 4 shows a detailed circuit configuration of the light receiving amplification circuit 11.

  Similarly to the above-described light receiving and amplifying circuit 1, the light receiving and amplifying circuit 11 also includes a photodiode PD, a current-voltage conversion circuit 12, a reference circuit 13, a differential circuit 14, and a compensation circuit 15, as shown in FIGS. Yes. The current-voltage conversion circuit 12, the reference circuit 13, and the differential circuit 14 have the same functions as the current-voltage conversion circuit 2, the reference circuit 3, and the differential circuit 4, respectively, and have the same circuit configuration. Yes.

  The amplifier AMP12 of the current-voltage conversion circuit 12 includes an input transistor Tr31 and transistors Tr311 to Tr315. Since the connection configuration of the input transistor Tr31 and the transistors Tr311 to Tr315 in the amplifier AMP12 corresponds to the connection configuration of the input transistor Tr21 and the transistors Tr211 to Tr215 in the amplifier AMP1 of the current-voltage conversion circuit 2, description thereof is omitted here. .

  The amplifier AMP12 of the reference circuit 13 includes an input transistor Tr32 and transistors Tr321 to Tr325. Since the connection configuration of the input transistor Tr32 and the transistors Tr321 to Tr325 in the amplifier AMP12 corresponds to the connection configuration of the input transistor Tr22 and the transistors Tr221 to Tr225 in the amplifier AMP2 of the reference circuit 3, description thereof is omitted here.

  The differential circuit 14 includes a differential amplifier AMP13, a feedback resistor Rfs3, input resistors Rs31 and Rs32, and a reference resistor Rrefs31. Since these connection configurations correspond to the differential amplifier AMP3, the feedback resistor Rfs2, the input resistors Rs21 and Rs22, and the reference resistor Rrefs21 in the differential circuit 4 described above, description thereof is omitted here.

  Unlike the compensation circuit 5 described above, the compensation circuit 15 uses a compensation current Is22 described later as an amplifier in the current-voltage conversion circuit 2 in order to compensate for the difference between the output voltage of the current-voltage conversion circuit 12 and the output voltage of the reference circuit 13. Flow into the input terminal of AMP12.

  The compensation circuit 15 includes a first compensation unit 16 and a second compensation unit 17. The first compensation unit 16 includes a current mirror circuit 161 and transistors Tr162 to Tr165. The second compensation unit 17 includes a current mirror circuit 171, voltage generation circuits 18 and 19, capacitors C33 and C34, and resistors Rf32 and Rf33.

  First, the configuration of the first compensation unit 16 will be described.

  The current mirror circuit 161 includes transistors Tr161a and Tr161b. The transistors Tr161a and Tr161b have emitters connected to the power supply line and bases connected to each other. The transistor Tr161a has a base and an emitter connected to each other.

  The transistor Tr165 has a collector connected to the power supply line and an emitter connected to the collector of the transistor Tr164. The transistor Tr163 has a collector connected to the power supply line, an emitter connected to the collector of the transistor Tr162, and a base connected to the collectors (common connection point) of the transistors Tr161b and Tr162a. The emitters of the transistors Tr162 and Tr164 are grounded, and the bias voltage is applied to the base.

  Next, the configuration of the second compensation unit 17 will be described.

  The voltage generation circuit 18 includes transistors Tr181 to Tr185 and diodes D181 and D182. The connection configuration of the transistors Tr181 to Tr185 and the diodes D181 and D182 in the voltage generation circuit 18 corresponds to the connection configuration of the transistors Tr81 to Tr85 and the diodes D81 and D82 in the voltage generation circuit 8 described above. The description is omitted.

  In the voltage generation circuit 18, the bias current I32 is supplied from the transistor Tr183 to the diodes D181 and D182 via the current mirror circuit including the transistors Tr181 and Tr182. The voltage generated thereby is output by an emitter follower circuit (transistors Tr184 and Tr185) driven by a bias current I32.

  The voltage generation circuit 19 includes a current mirror circuit 191, transistors Tr192 to Tr194, and diodes D191 and D192. The voltage generation circuit 19 has the same circuit configuration as the voltage generation circuit 18 described above. Further, the connection configuration of the current mirror circuit 91 and the transistors Tr92 to Tr94 and the diodes D91 and D92 in the voltage generation circuit 19 is the same as that of the current mirror circuit 91 and the transistors Tr92 to Tr94 and the diodes D91 and D92 in the voltage generation circuit 9 described above. And the description thereof is omitted here.

  The current mirror circuit 171 includes transistors Tr171a and Tr171b. Transistors Tr171a and 171b have both emitters connected to the power supply line and bases connected to each other. The base and emitter of the transistor Tr171a are connected. The collector of the transistor Tr171a is connected to the emitter of the transistor Tr194. The collector of the transistor Tr171b is connected to the collector of the transistor Tr161b and the base of the input transistor Tr31.

  In the voltage generation circuit 19, the bias current I31 is supplied to the diodes D191 and D192 by the transistor Tr192 via the current mirror circuit 191. The voltage generated thereby is output from an emitter follower circuit (transistors Tr193 and Tr194) driven by a bias current I31.

  In the light receiving amplification circuit 11 configured as described above, the magnitude of the bias current I31 of the input transistor Tr31 of the current-voltage conversion circuit 12 and the bias current I32 of the input transistor Tr32 of the reference circuit 13 is I31> I32. Meet. Further, the feedback resistance Rf31 and the reference Rref31 satisfy the relationship of Rf31 ≧ Rref31.

  The compensation circuit 15 flows the compensation current Is31 set by the following relational expression into the base of the input transistor Tr31.

When the base current of the input transistor Tr31 of the current-voltage conversion circuit 12 and the base current of the input transistor Tr32 of the reference circuit 13 are Ib and Ibref, respectively, the compensation current Is31 is
Is31 = Ib−Rref / Rf × Ibref + Vt × ln (Ib / Ibref) / Rf (29)
It is expressed.

  Specifically, calculation of the compensation current Is31 will be described based on the circuit configuration shown in FIG. Here, each value of Ib31, VBE31, Ib32, VBE32, V31 and V32 used in the following description is defined as follows.

Ib31: Base current of the input transistor Tr31 VBE31: Base-emitter voltage of the input transistor Tr31 Ib32: Base current of the input transistor Tr32 VBE32: Base-emitter voltage of the input transistor Tr32 V31: Output voltage of the current-voltage conversion circuit 2 V32: When there is no output voltage correction current Is31 of the reference circuit 3, the output voltages V31 and V32 are
V31 = Rf31 × Ib31 + VBE31 (30)
V32 = Rref31 × Ib32 + VBE32 (31)
It is expressed. In this case, Ib31≈Ib32, VBE31≈VBE32, and the voltage difference between the output voltages V31 and V32 is
V31-V32 =
Rf31 × Ib31 + VBE31− (Rref31 × Ib32 + VBE32) (32)
When the correction current Is31 flows, the output voltages V31 and V32 are
V31−V32 = Rf31 × (Ib31−Is32) + VBE31
− (Rref31 × Ib32 + VBE32) (33)
In order to be V31−V32 = 0,
Rf31 × (Ib31−Is32) + VBE31 = Rref31 × Ib32 + VBE32 (34)
Is32 = Ib31−Rref31 / Rf31 × Ib32
+ (VBE31-VBE32) / Rf31 (35)
It is necessary to satisfy. The base-emitter voltage difference is
VBE31−VBE32 = Vt × ln (I31 / Is) −Vt × ln (I32 / Is)
= Vt × ln (I31 / I32)
= Vt × ln (Ib31 / Ib32) (36)
It is expressed. Therefore, the compensation current Is32 is
Is32 = Ib31−Rref31 / Rf31 × Ib32
+ Vt × ln (Ib31 / Ib32) / Rf31 (37)
It becomes.

  In this way, by causing the correction current Is31 to flow, resistance noise and shot noise can be reduced, and more favorable offset voltage characteristics can be obtained.

  Here, the compensation current Is31 includes a first compensation current (Ib−Rref / Rf × Ibref) based on the first half of the left side of Expression 36 and a second compensation current Vt × ln (Ib) based on the latter half of the left side of Expression 36. / Ibref) / Rf. The first compensation current is used for voltage difference correction by a feedback resistor, and the second compensation current is used for correction of the base-emitter voltage difference.

  The first compensation current is supplied by the first compensation unit 16 through the current mirror circuit 161. On the other hand, the second compensation current is supplied by the second compensation unit 17 via the current mirror circuit 171.

  Specifically, the transistor Tr163 is driven by a bias current I31 provided by the transistor Tr162. On the other hand, the transistor Tr164 generates a bias current having a magnitude obtained by multiplying the bias current I31 by the resistance ratio (Rref31 / Rf31) between the reference resistor Rref31 and the feedback resistor Rf31. The transistor Tr163 is driven with this current. The current mirror circuit 161 outputs a difference between the current flowing through the transistor Tr163 and the current flowing through the transistor Tr165 from the transistor Tr161b. Thereby, the current mirror circuit 161 flows the difference current as the first compensation current.

  The second compensation current is supplied by the second compensation unit 7 through the current mirror circuit 7b.

  Specifically, in the voltage generation circuit 18, a bias current I32 is generated by the transistors Tr183 and Tr184, and the bias current I32 also flows through the diodes D181 and D182 by the current mirror circuit composed of Tr181 and Tr182. At this time, the voltage generated at the base of the transistor Tr185 is output from the emitter follower circuit including the transistors Tr184 and Tr185. This voltage is the same value as the base-emitter voltage VBE32 of the input transistor Tr32. By applying this voltage, a current flows through the resistor Rf33 having the same resistance value as that of the feedback resistor Rf31.

  On the other hand, in the voltage generation circuit 19, a bias current I31 is generated in the transistors Tr192 and Tr193, and the bias current I31 also flows in the diodes D191 and D192 by the current mirror circuit 191. At this time, the voltage generated at the base of the transistor Tr194 is output from the emitter follower circuit including the transistors Tr194 and Tr194. This voltage is the same value as the base-emitter voltage VBE31 of the input transistor Tr31. By applying this voltage, a current flows through the resistor Rf32 having the same resistance value as that of the feedback resistor Rf31.

  In the current mirror circuit 171, the same current flows through the transistor Tr171b when the transistor Tr171a flows the current through the resistor Rf33. However, since the current flows from the transistor Tr171b into the resistor Rf33, the transistor Tr171a of the current mirror circuit 171 is used. The difference between the current flowing through the resistor Rf32 and the current flowing through the resistor Rf33 flows as the second compensation current.

  In the second compensation unit 17, noise reduction capacitors C33 and C34 are connected as necessary to suppress noise of the second compensation current.

  As described above, the photoreceiver / amplifier circuit 11 includes the compensation circuit 15 so that the compensation current Is31 flows into the connection portion between the base of the input transistor Tr31 of the current-voltage conversion circuit 12 and the feedback resistor Rf31 of the current-voltage conversion circuit 12. . As a result, the bias current I31 is made larger than the bias current I32, and it is possible to suppress shot noise, which is impossible with the differential one-stage circuit, and also to suppress the feedback resistor thermal noise of the reference circuit 3. As a result, a good offset voltage characteristic can be realized. Further, by compensating the base current of the input transistor Tr22 of the reference circuit 3, good characteristics can be obtained without affecting the differential circuit 4.

[Comparative example]
A comparative example of the present invention will be described with reference to FIGS. 5 and 6 as follows.

  5 and 6 show circuit configurations of the light receiving amplifier circuits 51 and 61 according to this comparative example, respectively. The photoreceiver / amplifier circuits 51 and 61 are described in Japanese Patent Application No. 2007-181433 filed by the applicant of the present application.

  In order to reduce noise and obtain good offset voltage characteristics, the light receiving amplifier circuit 51 is a differential amplifier circuit AMP1, and a feedback resistor connected between the output terminal and the inverting input terminal of the differential amplifier circuit AMP1. The difference between the reference resistor Rref and the reference resistor Rref so as to compensate for the difference between the Rf, the reference resistor Rref connected to the non-inverting input terminal of the differential amplifier circuit AMP1, and the voltage between the terminals of the feedback resistor and the terminal of the reference resistor. And a compensation circuit 52 that draws the compensation current Is1 from a connection point with the non-inverting input terminal of the dynamic amplifier circuit AMP1. In this photoreceiver / amplifier circuit 51, the feedback resistor Rf (gain resistor) and the reference resistor Rref satisfy the relationship Rf> Rref.

  In addition, the light receiving amplifier circuit 61 reduces noise and compensates for the difference between the voltage across the feedback resistor and the voltage across the reference resistor in order to obtain good offset voltage characteristics. In place of the compensation circuit 52 in 51, a circuit 62 for supplying the compensation current Is11 to the connection point between the feedback resistor Rf and the inverting input terminal of the differential amplifier circuit AMP1 is provided.

  According to the photoreceiver / amplifier circuits 51 and 61, noise from the low frequency region can be surely reduced due to the relationship Rf> Rref, and the difference between the voltage across the feedback resistor Rf and the voltage across the reference resistor Rref. Good offset voltage characteristics can be obtained by the compensation circuits 52 and 62 that compensate for the above.

  The compensation circuit 52 compensates the base current of one (non-inverting input terminal side) of the differential transistor pair of the differential amplifier circuit AMP1 to which the reference resistor Rref is connected. The compensation circuit 62 compensates for the base current of the other (inverting input terminal side) of the differential transistor pair of the differential amplifier circuit AMP1 to which the feedback resistor Rf is connected.

  However, although the photoreceiver / amplifier circuits 51 and 61 can suppress thermal noise due to resistance, since they have a differential circuit configuration, shot noise of the input transistors Tr21 and Tr22 in the photoreceiver / amplifier circuits 1 and 11 of the present embodiment. It has not yet been reduced.

  As described above, it is desirable to reduce the reference resistance Rref21 unrelated to the amplification action and to reduce the bias current of the input transistor that does not require high-speed amplification. However, in the light receiving amplification circuits 51 and 61, since the differential transistor pair in the differential amplifier circuit AMP1 is an emitter coupled type, the bias current of one transistor is set to a predetermined value, and the bias current of only the other transistor is set. It is difficult to suppress.

  On the other hand, the light receiving amplifier circuits 1 and 11 have a two-stage amplifier circuit configuration corresponding to high-speed signal amplification. In the first stage circuit (reference circuit 3), together with the reduction of the reference resistor Rref21, the input transistor Tr22 The bias current I22 is reduced to suppress shot noise.

[Embodiment 3]
An embodiment of the present invention will be described with reference to FIG.

  FIG. 7 is a perspective view showing the configuration of the optical disc apparatus 71 according to the embodiment of the present invention.

  As shown in FIG. 7, the optical disk device 71 includes an optical pickup device 72, a spindle motor 73, and the like.

  The optical pickup device 72 includes a laser diode 74, a signal light receiving IC 75, a laser power monitor light receiving IC 75, a collimator lens 77, a spot lens 78, a beam splitter 79, a collimator lens 80, and an objective lens 81.

  A laser diode 74 as a laser light source emits a laser beam that irradiates the optical disc 70. The drive current supplied to the laser diode 12 is generated by a laser driver (not shown).

  The laser diode 74 emits a laser beam having a single wavelength if the optical disc device 71 is a device that reproduces one type of optical disc 70. The laser diode 74 emits two types of laser beams having different laser powers at the time of signal reproduction and at the time of signal recording if the optical disk device 71 is a device that performs signal reproduction and signal recording.

  The signal light receiving IC 75 is an IC for receiving the laser beam reflected from the optical disc 70 and converting it into an electric signal as a detection signal, the photodiode PD described above being arranged on the light receiving surface. This signal light receiving IC 75 incorporates the aforementioned light receiving amplifier circuit 1 or 11.

  The light receiving IC 75 for laser power monitoring is an IC for arranging a photodiode on the light receiving surface, receiving a part of the laser beam emitted from the laser diode 74, and converting it into an electric signal as a detection signal. The light receiving IC 75 for laser power monitoring incorporates a light receiving amplification circuit, but the light receiving amplification circuit may be the light receiving amplification circuit 1 or 11. Further, the position of the laser power monitoring light-receiving IC is not limited to the illustrated position as long as it can receive an amount necessary for detecting the laser beam.

  In the optical pickup device 72 configured as described above, the laser beam emitted from the laser diode 74 is converted into a parallel light beam by the collimator lens 77 and deflected by the beam splitter 79. The laser beam from the beam splitter 79 passes through the collimator lens 80 and is focused on the optical disk 70 by the objective lens 81. The laser beam reflected from the optical disk 70 passes through the objective lens 81 and the collimator lens 80, passes through the beam splitter 79, and is then focused on the signal light receiving IC 75 by the spot lens 78. In the signal light receiving IC 75, the laser beam is converted into an electric signal, and an RF signal, a tracking error signal, and the like are generated from the electric signal.

  As described above, in the optical pickup device 72, the signal light receiving IC 74 includes the light receiving amplifier circuit 1 or 11, whereby the light receiving amplifier circuit 1 or 11 can reduce noise and improve the offset voltage characteristic. . Therefore, since the quality of the output signal of the optical pickup device 72 is improved, the reliability of the optical pickup device 72 is improved.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims. That is, embodiments obtained by combining technical means appropriately modified within the scope of the claims are also included in the technical scope of the present invention.

  Since the light receiving and amplifying circuit of the present invention is designed to reduce noise from the low frequency region and improve the offset voltage characteristics, it can be suitably used for an optical pickup device for recording or reproducing information with respect to an optical disc.

It is a circuit diagram which shows schematic structure of the light reception amplifier circuit which concerns on Embodiment 1 of this invention. FIG. 2 is a circuit diagram showing a more detailed configuration of the light receiving amplification circuit of FIG. 1. It is a circuit diagram which shows schematic structure of the light reception amplifier circuit which concerns on Embodiment 2 of this invention. FIG. 3 is a circuit diagram showing a more detailed configuration of the light receiving amplification circuit of FIG. 2. It is a circuit diagram which shows schematic structure of the light reception amplifier circuit which concerns on the comparative example of this invention. It is a circuit diagram which shows schematic structure of the other light reception amplifier circuit which concerns on the comparative example of this invention. It is a perspective view which shows schematic structure of the optical disk apparatus based on Embodiment 3 of this invention. It is a top view which shows the structure of the photodiode connected to the light reception amplifier circuit which concerns on this Embodiment 1, 2, and a general light reception amplifier circuit. It is a circuit diagram which shows the structure of the light reception amplifier circuit to which each photodiode of FIG. 8 is connected. FIG. 10 is a circuit diagram showing a detailed configuration of the light receiving amplification circuit of FIG. 9. FIG. 3 is a circuit diagram showing configurations of a high-speed signal processing type light receiving amplification circuit and a general high speed signal processing type light receiving amplification circuit according to the first and second embodiments. FIG. 12 is a circuit diagram illustrating a detailed configuration of the light receiving amplification circuit of FIG. 11.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,11 Light reception amplifier circuit 2,12 Current voltage conversion circuit 3,13 Reference circuit 4,14 Differential circuit 5,15 Compensation circuit (compensation means)
6, 16 First compensation unit 7, 17 Second compensation unit 7b Current mirror circuit (third current mirror circuit)
8 Voltage generation circuit (second voltage generation circuit)
9 Voltage generation circuit (first voltage generation circuit)
61 Current mirror circuit (first current mirror circuit)
62 Current mirror circuit (second current mirror circuit)
161 Current mirror circuit (first current mirror circuit)
171 Current mirror circuit (second current mirror circuit)
Ib Photocurrent I21, I31 Bias current I22, I32 Bias current Is21, Is31 Compensation current PD Photodiode (light receiving element)
Rf21, Rf32 Feedback resistor (first feedback resistor)
Rf22 resistance (first resistance)
Rf32 resistance (first resistance)
Rref21, Rref31 Reference resistor (second feedback resistor)
Rref23 resistance (second resistance)
Rref33 resistance (second resistance)
Tr21, Tr31 input transistor (first input transistor)
Tr22, Tr32 Input transistor (second input transistor)
Tr63 transistor (first transistor)
Tr64 transistor (second transistor)
Tr66 transistor (third transistor)
Tr162 transistor (first transistor)
Tr163 transistor (second transistor)

Claims (9)

A light-receiving element that converts received light into a photocurrent, a first feedback resistor and a first input transistor, a current-voltage conversion circuit that converts a photocurrent flowing through the light-receiving element into a voltage, a second feedback resistor, A reference circuit having a two-input transistor, except that the light receiving element is not connected, and a differential circuit that amplifies an output voltage difference between the current-voltage conversion circuit and the reference circuit In a light receiving amplification circuit comprising a circuit,
Compensating means for compensating for the difference between the output voltage of the current-voltage conversion circuit and the output voltage of the reference circuit when there is no signal,
The resistance value of the second feedback resistor is set smaller than the resistance value of the first feedback resistor, and the bias current of the second input transistor is set to a current value smaller than the bias current of the first input transistor. A light receiving amplification circuit characterized by that.   The compensation means is a current source for supplying a compensation current for compensating the output voltage difference to a connection portion where the second feedback resistor and a base of the second input transistor are connected. Item 4. The light receiving amplifier circuit according to Item 1.   The compensation means is a current source for supplying a compensation current for compensating the output voltage difference to a connection portion to which the first feedback resistor and a base of the first input transistor are connected. The light receiving amplification circuit described. The compensation current has a resistance value of the first feedback resistor as Rf, a resistance value of the second feedback resistor as Rref, a base current Ib of the first input transistor, and a base current Ibref of the second input transistor. Then
Rf / Rref * Ib-Ibref + Vt * ln (Ib / Ibref) / Rref
The light receiving amplifier circuit according to claim 1, wherein the light receiving amplifier circuit is expressed as follows. The compensation current has a resistance value of the first feedback resistor as Rf, a resistance value of the second feedback resistor as Rref, a base current Ib of the first input transistor, and a base current Ibref of the second input transistor. Then
Ib-Rref / Rf * Ibref + Vt * ln (Ib / Ibref) / Rf
The light-receiving amplifier circuit according to claim 1 or 3, wherein The compensation means includes
A first current mirror circuit;
A second current mirror circuit having the output of the first current mirror circuit as an input;
A first transistor for supplying a bias current having a magnitude obtained by multiplying a bias current for driving the first input transistor by a resistance ratio between the first feedback resistor and the second feedback resistor;
A second transistor having an emitter connected to the collector of the first transistor and a base connected to one output of the first current mirror circuit;
A third transistor driven by the same current as a bias current for driving the second input transistor and having a base connected to the other output of the first current mirror circuit;
A first compensation unit for providing a first compensation current from the second current mirror circuit;
A first voltage generation circuit that is driven with the same current as a bias current for driving the first input transistor and generates the same voltage as a base-emitter voltage of the first input transistor;
A first resistor connected to the output of the first voltage generation circuit;
A second voltage generation circuit that is driven with the same current as a bias current for driving the second input transistor and generates the same voltage as a base-emitter voltage of the second input transistor;
A second resistor connected to the output of the second voltage generating circuit;
A third current mirror circuit that outputs a difference between currents flowing through the first and second resistors,
A second compensation unit for providing a second compensation current from the third current mirror circuit,
5. The photoreceiver / amplifier circuit according to claim 1, wherein the first and second compensation currents are combined to provide the compensation current. The compensation means includes
A first current mirror circuit;
A first transistor providing the same bias current as the bias current driving the first input transistor;
A second transistor having an emitter connected to the collector of the first transistor and a base connected to the output of the first current mirror circuit;
A bias current having a magnitude obtained by multiplying a bias current for driving the second input transistor by a resistance ratio between the second feedback resistor and the first feedback resistor is provided, and a base is connected to an output of the first current mirror circuit. A third transistor to be
A first compensation unit for providing a first compensation current from the first current mirror circuit;
A first voltage generation circuit that is driven with the same current as a bias current for driving the first input transistor and generates the same voltage as a base-emitter voltage of the first input transistor;
A first resistor connected to the output of the first voltage generation circuit;
A second voltage generation circuit that is driven with the same current as the bias current for driving the second input transistor and generates the same voltage as the base-emitter voltage of the second input transistor;
A second resistor connected to the output of the second voltage generating circuit;
A second current mirror circuit that outputs a difference between currents flowing through the first and second resistors,
A second compensation unit for providing a second compensation current from the second current mirror circuit,
6. The photoreceiver / amplifier circuit according to claim 1, wherein the first and second compensation currents are combined to provide the compensation current.   An optical pickup device comprising the light receiving amplification circuit according to claim 1.   An optical disc apparatus comprising the optical pickup device according to claim 8.

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