JP2009204932A - Dot matrix type display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a dot matrix type display device in which the number of signal wiring lines are reduced. <P>SOLUTION: The display device includes: dot matrix type display devices 10R, 10G and 10B which include a plurality of scan lines and a plurality of data lines, and in which the plurality of data lines are divided into a plurality of groups; a common driver 28 for driving the plurality of scan lines; a plurality of segment drivers 29R, 29G and 29B for driving the respective data lines of the plurality of groups; and a control circuit 27 for controlling a common driver and the plurality of segment drivers. A supply line for supplying display data to the plurality of segment drivers is common, and the control circuit performs control so that the display data are supplied to each segment driver by time sharing. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a dot matrix display device, and more particularly to a dot matrix display device using a memory-type display element and a general-purpose driver IC.

  A dot matrix type display element such as a liquid crystal display element is widely used as a monitor of a television receiver or a computer system. The dot matrix display device has a plurality of scan lines arranged in parallel and a plurality of data lines (segment lines) arranged so as to intersect the scan lines perpendicularly. Pixels are formed at the intersections of the segment lines. Writing of an image to be displayed is performed by sequentially applying scan pulses to the scan lines and outputting data for one line to a plurality of segment lines in synchronization with the application of the scan pulses. There are various types of dot matrix type display elements such as PDP, EL, liquid crystal display elements, etc., but particularly liquid crystal display elements are widely used.

  In recent years, electronic paper has been actively developed at companies and universities as rewritable display devices that can retain display contents even when the power is turned off. As application fields in which electronic paper is expected to be used, various application forms such as electronic books, sub-displays for mobile terminal devices, and display units for IC cards have been proposed. One of the leading methods for electronic paper is cholesteric liquid crystal. Cholesteric liquid crystal has excellent characteristics such as semi-permanent display retention (memory property), vivid color display, high contrast, and high resolution.

  Patent Document 1 describes the configuration of a cholesteric liquid crystal display device. In this application, the description of Patent Document 1 is referred to.

  Cholesteric liquid crystals are sometimes referred to as chiral nematic liquid crystals, and by adding a relatively large amount (several tens of percent) of chiral additives (chiral materials) to nematic liquid crystals, the molecules of nematic liquid crystals are helical. It is a liquid crystal that forms a cholesteric phase.

  FIG. 1 is a diagram for explaining a state of a cholesteric liquid crystal. As shown in FIGS. 1A and 1B, the display element 10 using cholesteric liquid crystal has an upper substrate 11, a cholesteric liquid crystal layer 12, and a lower substrate 13. A cholesteric liquid crystal has a planar state that reflects incident light as shown in FIG. 1A and a focal conic state that transmits incident light as shown in FIG. The state is stably maintained even in the absence of an electric field.

  In the planar state, light having a wavelength corresponding to the helical pitch of the liquid crystal molecules is reflected. The wavelength λ at which the reflection is maximum is expressed by the following formula from the average refractive index n of the liquid crystal and the helical pitch p.

λ = n · p
On the other hand, the reflection band Δλ varies greatly depending on the refractive index anisotropy Δn of the liquid crystal.

  In the planar state, incident light is reflected, so that a “bright” state, that is, white can be displayed. On the other hand, in the focal conic state, by providing a light absorption layer under the lower substrate 13, light transmitted through the liquid crystal layer is absorbed, so that a "dark" state, that is, black can be displayed.

  As described above, in the planar state, light of a wavelength corresponding to the helical pitch of the liquid crystal molecules is reflected. Therefore, when the liquid crystal material and the chiral material are selected and the content of the chiral material is determined, blue (blue), green When a three-layer panel that selectively reflects each wavelength of (green) and red (red) is obtained and these are laminated, a color display element is obtained.

  FIG. 2 is a diagram for explaining the principle of color display of the color cholesteric liquid crystal display device. As shown in the figure, a blue cholesteric liquid crystal layer 10B that reflects a blue wavelength, a green cholesteric liquid crystal layer 10G that reflects a green wavelength, and a red cholesteric liquid crystal layer 10R that reflects a red wavelength are stacked, and a light absorbing layer on the back surface. 17 is provided. As shown in FIG. 2A, when all of the three layers 10B, 10G, and 10R are in a transmissive state, light incident from the surface is transmitted through the three layers 10B, 10G, and 10R and absorbed by the light absorption layer 17. Will be displayed in black. As shown in FIG. 2B, when the blue layer 10B is in the reflecting state and the green layer 10G and the red layer 10R are in the transmitting state, the blue component of the light incident from the surface is reflected, and the remaining green and red colors Since the component is transmitted and absorbed by the light absorption layer 17, a blue display is obtained. As shown in FIG. 2C, when the green layer 10G is in the reflective state and the blue layer 10B and the red layer 10R are in the transmissive state, the green component of the light incident from the surface is reflected, and the remaining blue and red colors Since the component is transmitted and absorbed by the light absorption layer 17, it is displayed in green. As shown in FIG. 2D, when the red layer 10R is in the reflecting state and the blue layer 10B and the green layer 10G are in the transmitting state, the red component of the light incident from the surface is reflected, and the remaining blue and green Since the component is transmitted and absorbed by the light absorption layer 17, a red display is obtained. Further, as shown in FIG. 2E, when the blue layer 10B, the green layer 10G, and the red layer 10R are all reflected, the blue component, the green component, and the red component of the light incident from the surface are all reflected. White display.

  A cholesteric liquid crystal display device used for electronic paper is generally driven by a passive matrix driving method using a general-purpose STN driver.

  FIG. 3 is a block diagram showing an overall configuration of a cholesteric liquid crystal display device using a general-purpose STN driver. The display element 10 is a cholesteric liquid crystal panel and has, for example, 1024 × 768 pixels. The power source 21 outputs a voltage of 3V to 5V, for example. The boosting unit 22 boosts the input voltage from the power source 21 to 36V to 40V by a regulator such as a DC-DC converter. As this boost regulator, a dedicated IC is widely used, and the IC has a function of adjusting the boost voltage by setting a feedback voltage. Therefore, it is possible to change the boosted voltage by selecting a plurality of voltages generated by voltage division by a resistor and supplying the selected voltages to the feedback terminal.

  The voltage switching unit 23 generates various voltages by resistance division or the like. For switching between the reset voltage and the gradation write voltage in the voltage switching unit 23, an analog switch having a high withstand voltage may be used, but a simple switching circuit using a transistor may be used. The voltage stabilizing unit 24 desirably uses an operational amplifier voltage follower circuit in order to stabilize various voltages supplied from the voltage switching unit 23. It is desirable to use an operational amplifier having a strong characteristic against a capacitive load. In addition, the structure which switches an amplification factor by switching the resistance connected to an operational amplifier is widely known, and if this structure is used, the voltage output from the voltage stabilization part 24 can be switched easily.

  The original oscillation clock unit 25 generates a basic clock that is a basic operation. The frequency divider 26 divides the basic clock to generate various clocks necessary for the operation described later.

  The control circuit 27 generates a control signal based on the basic clock, various clocks, and the image data D, and supplies the control signal to the common driver 28 and the segment driver 29. The control circuit 27 is realized by a microcomputer or FPGA.

  The common driver 28 drives 1024 scan lines of each panel independently, and the segment driver 29 drives 768 data lines independently. Since the image data given to each pixel of the three panels 10B, 10G, and 10R is different, the segment driver 29 needs to be provided so as to drive each panel independently. On the other hand, the common driver 28 of the conventional example shown here drives the three panels independently, but can be shared if the three panels are rewritten simultaneously. That is, one common driver can be configured to drive the scan lines of the three panels in common.

  In this conventional example, the driver IC is composed of a general-purpose binary output STN driver. Various general-purpose STN drivers can be used.

  The image data input to the segment driver 29 is data obtained by converting a full-color original image into data of 4096 colors of 16 gradations of RGB using an error diffusion method. The gradation conversion is preferably performed by a method capable of obtaining high display quality, and a blue noise mask method or the like can be used in addition to the error diffusion method.

  FIG. 4 is a circuit diagram when the common driver 28 and the segment driver 29 for driving the three panels 10B, 10G, and 10R are configured using general-purpose STN drivers. As shown, the common driver 28B that drives the scan line of the blue panel 10B is composed of two driver ICs 28B-1 and 28B-2, and the segment driver 29B that drives the data line is a single driver IC 29B. Composed. The same applies to the other panels. Red (R), green (G), and blue (B) image data is supplied as 4-bit or 8-bit data (here, 4 bits), and RGB image data is 4 bits (4 bits) for each segment driver. Main) through a data supply line. Since a drive circuit using a general-purpose STN driver IC is widely known, further explanation is omitted. Display data writing processing is also widely known, and the disclosed technique is not limited to the writing processing method, and therefore description of the writing processing is also omitted.

  FIG. 5 is a time chart showing the data transfer operation in the conventional example. “Data capture clock XSCL” is a clock for transferring image data, “Frame start signal DIO” is a display start signal, “Pulse polarity control signal FR” is a polarity inversion signal of applied voltage, “Data latch” (Segment) LP-SEG "is a display line update signal that latches the data for one line transferred by the segment driver and updates the data of one display line." Data latch (common) LP-COM "is common The driver advances the line to which the scan signal is applied by one line, and “/ DSPOF” is a forced OFF signal of the output voltage.

  As shown in FIG. 5, red image data (red data), green image data (green data), and blue image data (blue data) for the first line are output to each supply line group by 4 bits, in accordance with XSCL. Segment driver. In other words, four pieces of 1-bit image data to be applied to four adjacent data lines are simultaneously acquired, and this is simultaneously performed for RGB. The captured image data is shifted according to XSCL. Therefore, if this operation is performed a number of times corresponding to the value obtained by dividing the data line by 4, data for one line is set in the segment driver. Therefore, the data is latched by LP-SEG and the voltage is set according to / DSPOF. Output. At this time, the common driver outputs a scan voltage to the scan line indicated by the signal indicating the scan position. Thereby, writing of one display line to which the scan voltage is applied is performed. In order to prevent polarization, the polarity of the voltage applied between the scan line and the data line is reversed by changing FR.

  Similarly, the image data of the next display line is transferred while writing for one display line, and when the transfer is completed, it is latched by LP-SEG as described above, and according to LP-COM. After the scan position is shifted by one line, a voltage is output according to / DSPOF.

  Since the data transfer operation by the general-purpose driver IC is widely known, further explanation is omitted.

  As described above, if the three panels are rewritten at the same time, the common driver 28 can be shared. FIG. 6 shows a configuration example in the case where the scan lines of three panels are simultaneously driven by one common driver 28. Again, red (R), green (G) and blue (B) image data are transferred in parallel via three sets of d-multiple supply lines. Therefore, the data transfer operation of the configuration of FIG. 6 is also the same as the example shown in FIG.

  The general-purpose STN driver has been developed to drive a simple matrix type liquid crystal display element for displaying moving images. For this reason, 1-bit image data is captured simultaneously with 4 bits or 8 bits. For example, when a 640 × 1000 panel is driven at 30 screens / s, the display time for one screen is 33.3 ms, and the display time for one scan line is 52 μm. When data transfer is performed with 1 bit, XSCL becomes 0.05 μs, which causes a problem that the operation of the segment driver becomes very fast and the cost is increased accordingly. On the other hand, in the case of 8-bit data transfer, XSCL is 0.4 μs, and the segment driver can be made relatively inexpensive.

  However, in the case of full-color display, it is necessary to drive three groups of RGB data lines, and the control circuit 27 has 3 × 8 = 24 lines for 8-bit data transfer and 3 for 4-bit data transfer. It is necessary to have outputs corresponding to x4 = 12 data supply lines, which causes a problem that the number of wirings is increased. The conventional full-color cholesteric liquid crystal display device also uses a general-purpose STN driver IC, and as shown in FIGS. 4 and 6, a 4-bit (or 8-bit) data supply line is supplied from the control circuit to each of the three segment drivers. There is a problem that the image data is transferred via the network and the number of wirings is large.

  In Patent Document 2, when a plurality of segment driver ICs are used, data is transferred to a driver IC connected to a subsequent stage by transferring data of an image using a shift register in the segment driver IC. It describes reducing the number of supply lines. However, the number of data supply lines extending from the control device (timing controller) is the same as the conventional one, and there is still a problem that the number of wirings is large.

  In addition, when driving a cholesteric liquid crystal by a passive matrix driving method, it is known that rewriting requires several tens to several hundred times as long as a nematic liquid crystal. For this reason, in electronic paper using a cholesteric liquid crystal display device, it takes time to rewrite the display so that the movement of line scanning can be seen in matrix display. Therefore, it is conceivable that the rewriting direction (scanning direction) of drawing is variable in the vertical / horizontal direction, and the display content can be recognized as soon as possible by selecting the rewriting direction according to the drawing content.

  7A and 7B are diagrams for explaining the case where the rewriting direction is variable. FIG. 7A shows an example of vertical scanning, and FIG. 7B shows an example of horizontal scanning. If the drawing content is in horizontal writing such as English, the vertical scanning of (A) can recognize the display content at an earlier stage, and if the drawing content is vertical writing display in Japanese, the horizontal scanning of (B) The display contents can be recognized at an earlier stage. When performing the vertical scan of FIG. 7A, the long side driver 31 operates as a common driver, and the short side driver 32 operates as a segment driver. Further, when performing the horizontal scan of FIG. 7B, the long side driver 31 operates as a segment driver, and the short side driver 32 operates as a common driver. The currently used general-purpose STN driver can switch between the segment mode and the common mode by changing the signal applied to the switching terminal.

  In order to enable the switching operation as shown in FIG. 7, a vertical scan buffer 33 and a horizontal scan buffer 34 are provided as shown in FIG. It is conceivable to switch all signals supplied to the side driver 31 and the short side driver 32. Specifically, as shown in FIG. 8, the image data D, the segment driver control signal SEG, and the common driver control signal COM are supplied to the vertical scan buffer 33 and the horizontal scan buffer 34, respectively. During vertical scanning, the vertical scanning buffer 33 supplies the common driver control signal COM to the long side driver 31 and the image data D and the segment driver control signal SEG to the short side driver 32. At this time, the horizontal scanning buffer 34 sets the output to a high impedance (Hi-Z) state. During the horizontal scan, the horizontal scan buffer 33 supplies the long side driver 31 with the image data D and the segment driver control signal SEG, and supplies the short side driver 32 with the common driver control signal COM. At this time, the vertical scanning buffer 33 sets the output to a high impedance (Hi-Z) state.

  However, as is clear from FIG. 8, it is necessary to provide the vertical scan buffer 33 and the horizontal scan buffer 34, and the wiring is complicated. In particular, the data supply line is composed of a plurality of lines. The wiring becomes very complicated, and the area required for the wiring increases.

  The problem that the wiring is complicated is not limited to the stacked cholesteric liquid crystal display device, and similarly exists in any device that supplies image data in parallel to a plurality of segment drivers. For example, in a full-color display device in which RGB band-shaped color filters are provided corresponding to the data lines of one panel, it is common to drive the data lines corresponding to the RGB filters as a group with a plurality of common drivers. Also in this case, since the RGB image data is transferred in parallel via a group of a plurality of data supply lines, there is a problem that the wiring becomes complicated and the area required for the wiring increases.

International Publication WO2007 / 110949A1 JP 2006-154835 A

  An object of the present invention is to realize a dot matrix display device with reduced signal wiring.

  The dot matrix type display device disclosed herein has a plurality of scan lines and a plurality of data lines, the plurality of data lines have dot matrix type display elements divided into a plurality of groups, and a plurality of common drivers. The plurality of segment drivers are devices for driving a plurality of groups of data lines, and the supply lines for supplying display data to the plurality of segment drivers are common. Supply in time division.

  In an apparatus that requires a long time for rewriting such as a cholesteric liquid crystal display apparatus, the transfer rate of image data need not be high. However, when a general-purpose STN driver is used, the number of bits of image data is 4 bits or 8 bits, and the number of data supply lines cannot be reduced. Therefore, supply lines for supplying display data to a plurality of segment drivers are integrated, and image data is transferred in a time division manner. Thereby, the total number of supply lines can be reduced. However, the present invention is effective even when the number of bits of the image data is 1 bit (one data supply line).

  The disclosed configuration is suitable for application to a device using a cholesteric liquid crystal display element that requires a long time for rewriting, particularly a full-color cholesteric liquid crystal display device having a laminated structure in which three layers of cholesteric liquid crystal display elements having different reflection wavelengths are stacked. ing. However, this configuration is not limited to a full-color cholesteric liquid crystal display device, and is a device in which data lines are divided into a plurality of groups and a plurality of segment drivers are provided to drive the data lines of each group. Applicable when the speed is slow.

  The common driver may drive the scan lines of the three-layer display elements in common or independently.

  As described above, the general-purpose STN driver can be switched between a common mode that operates as a common driver and a segment mode that operates as a segment driver. Such a driver IC is used as a common driver and a segment driver (long side driver and short side driver), and supply lines for supplying display data to all the drivers are connected in common, and image data is time-shared. With the transfer configuration, the drawing rewrite direction (scan direction) as shown in FIG. 7 can be easily changed in the vertical / horizontal directions.

  In this case, it is necessary for a plurality of driver ICs operating in the common mode to simultaneously apply a scan signal to the scan line at the same position. Therefore, after setting the scan position to the scan start position, the scan operation is started. In order to set the scan position of a plurality of driver ICs operating in the common mode as the scan start position, it is necessary to input and shift the signal indicating the scan position. During this shift operation, the shift used during the scan operation is required. Use a shift clock that is faster than the clock. It is not necessary to transfer image data during the scan position setting operation of a plurality of driver ICs that operate in the common mode, and a high-speed operation can be performed as long as a shift operation of a signal that indicates the scan position. Thereby, the time for the setting operation can be reduced.

  Hereinafter, an embodiment will be described by taking a full-color cholesteric liquid crystal display device in which cholesteric liquid crystal display panels are stacked as an example, but the present invention is not limited to this, and has a plurality of segment drivers for driving data lines of a display element. Any configuration is applicable.

  FIG. 9 is a diagram illustrating a basic configuration of the full-color cholesteric liquid crystal display device according to the embodiment. As shown in FIG. 9, the three-color panels 10R, 10G, and 10B, the red segment driver 29R that drives the data lines of the panel 10R, the green segment driver 29G that drives the data lines of the panel 10G, and the data of the panel 10B The blue segment driver 29B for driving the line is provided as in the conventional example. Here, the data supply lines for supplying the image data D [3: 0] to the segment drivers 29R, 29G, and 29B are shared, and the driver data input / output enable signal terminals EIO (EIO1, EIO2) are cascaded (in a chain). )Connecting. Specifically, the 29R EIO2 is connected to the 29G EIO1, and the 29G EIO2 is connected to the 29B EIO1. The input / output enable signal terminal EIO is a control signal terminal for driving a panel having a number of electrodes larger than the number of electrodes that can be driven by the driver IC by a plurality of driver ICs, and is cascade-connected as described above. A plurality of driver ICs can operate like a single driver IC.

  FIG. 10 is a diagram showing the configuration of the driver portion of the full color cholesteric liquid crystal display device of the first embodiment in which the present invention is applied to the conventional example shown in FIG. In the conventional example shown in FIG. 4, three groups of data supply lines D [3: 0] Red, D [3: 0] Green, D [that supply image data to the three segment drivers 29R, 29G, and 29B, respectively. 3: 0] Blue is provided, and EIO1 of each segment driver is set to “L”. On the other hand, in the first embodiment shown in FIG. 10, one group of data supply lines D [3: 0] for supplying image data is connected in common to the three segment drivers 29R, 29G, and 29B. The EIO1 of the segment driver 29R is connected to the EIO1 of the segment driver 29G, and the EIO2 of the segment driver 29G is connected to the EIO1 of the segment driver 29B. The other parts are the same as in the conventional example.

  FIG. 11 is a time chart showing the data transfer operation in the first embodiment. As shown in FIG. 5, in the conventional example, image data of three colors of RGB are simultaneously transferred. On the other hand, in the first embodiment, the three colors of image data are transferred in a time division order of red (R) image data, green (G) image data, and blue (B) image data.

  Specifically, first, red image data is transferred, and image data is set in the segment driver 29R. At this time, the EOI2 of the segment drivers 29R and 29G is “H”, and the segment drivers 29G and 29B do not perform the shift operation. When the setting of the red image data in the segment driver 29R is completed, the EIO2 of the segment driver 29R changes to “L”, so that the segment driver 29R does not perform any further shift operation, and the segment driver 29G has the EIO1 of “L”. Therefore, the shift operation is started. In response, the green image data is transferred. Thereafter, the same operation is performed, and when the setting of the blue image data in the segment driver 29B is completed, the RGB image data for one display line of the three panels 10R, 10G, 10B is transferred to the segment drivers 29R, 29G, 29R. Since it is set, it is latched and held according to the LP-SEG signal. At the same time, the scan positions of the common drivers 28R, 28G, and 28B are advanced by one by LP-COM. When / DSPOF is set to “H”, the common drivers 28R, 28G, and 28B output a scan pulse to the scan line at the scan position, and the segment drivers 29R, 29G, and 29R are voltages corresponding to the held image data of one display line. Output pulses to all data lines. During this output operation, the image data of the next display line is transferred to the segment drivers 29R, 29G, and 29R.

  Since the R image data, the G image data, and the B image data are transferred in a time division manner, the image data is transferred three times as long as the same shift clock XSCL. However, since the response speed of the cholesteric liquid crystal is slow, there is no particular problem even if the writing time for one display line is long and the time is tripled.

  FIG. 12 is a diagram showing the configuration of the driver portion of the full-color cholesteric liquid crystal display device according to the second embodiment in which the present invention is applied to the conventional example shown in FIG. In other words, in the full color cholesteric liquid crystal display device of the second embodiment, the common drivers 28-1 and 28-2 drive the scan lines of the three panels 10R, 10G, and 10B in common. And different. In the conventional example shown in FIG. 5, three groups of data supply lines D [3: 0] Red, D [3: 0] Green, D [that supply image data to the three segment drivers 29R, 29G, and 29B, respectively. 3: 0] Blue is provided, and EIO1 of each segment driver is set to “L”. On the other hand, in the second embodiment shown in FIG. 12, one group of data supply lines D [3: 0] for supplying image data is connected in common to the three segment drivers 29R, 29G, and 29B. The EIO1 of the segment driver 29R is connected to the EIO1 of the segment driver 29G, and the EIO2 of the segment driver 29G is connected to the EIO1 of the segment driver 29B. The other parts are the same as in the conventional example.

  The data transfer operation of the apparatus of the second embodiment is the same as that of the first embodiment shown in FIG.

  In the first embodiment, the scanning direction is fixed (in FIG. 10, scanning in the vertical direction (long side direction)). In other words, the driver ICs 28R-1, 28R-2, 28G-1, 28G-2, 28B-1, 28B-2, 29R-1, 29R-2, 29G-1, 29G-2, 29B-1, 29B- Reference numeral 2 denotes a general-purpose driver IC that can operate in either a common mode that operates as a common driver or a segment mode that also operates as a segment driver. However, the driver ICs 28R-1, 28R-2, 28G-1, 28G-2, 28B-1, 28B-2 operate only in the common mode, and the driver ICs 29R-1, 29R-2, 29G-1, 29G- 2, 29B-1 and 29B-2 operate only in the segment mode. Therefore, the signal terminal S / C for switching between the common mode and the segment mode is connected to the ground ("L") by the driver ICs 28R-1, 28R-2, 28G-1, 28G-2, 28B-1, and 28B-2. The driver ICs 29R, 29G, and 29B are connected to Vcc (“H”).

  FIG. 13 is a diagram illustrating a configuration of a driver portion of the full-color cholesteric liquid crystal display device according to the third embodiment. In the third embodiment, the scan direction can be switched. Therefore, here, two driver ICs that drive the long-side line of the panel 10R are long-side driver ICs 31R-1 and 31R-2, and one driver IC that drives the short-side line is short. This is indicated by the side driver IC 32R. Similarly, the two driver ICs that drive the long-side line of the panel 10G are the long-side driver ICs 31G-1 and 31G-2, and the single driver IC that drives the short-side line is the short-side side. This is represented by a driver IC 32G. Similarly, the two driver ICs that drive the long-side line of the panel 10B are the long-side driver ICs 31B-1 and 31B-2, and the single driver IC that drives the short-side line is the short-side side. This is represented by a driver IC 32B.

  A switching signal S / C is input to the signal terminal S / C for switching the common mode and the segment mode of the three driver ICs 32R, 32G, and 32B, and the six driver ICs 31R-1, 31R-2, 31G-1, An inverted signal of S / C is input to signal terminals S / C of 31G-2, 31B-1, and 31B-2. By signal S / C, three driver ICs 32R, 32G, 32B are in segment mode, and six driver ICs 31R-1, 31R-2, 31G-1, 31G-2, 31B-1, 31B-2 are in common mode And the three driver ICs 32R, 32G, and 32B are in the common mode, and the six driver ICs 31R-1, 31R-2, 31G-1, 31G-2, 31B-1, and 31B-2 are in the common mode. Horizontal scan driving that operates in the segment mode can be selected.

  Further, the image data supply line D [3: 0] includes six driver ICs 31R-1, 31R-2, 31G-1, 31G-2, 31B-1, 31B-2, three driver ICs 32R, 32G, 32B is commonly connected. In other words, the image data supply lines D [3: 0] are connected to all the driver ICs. Further, the short side direction start signal DIO-column is input to EIO1 of the driver IC 32R, and EIO2 of IC32R is cascade-connected to EIO1 of IC32G, and EIO2 of IC32G is cascade-connected to EIO1 of IC32B. In addition, the EIO1 of the driver IC31R-1 receives a start signal DIO-row in the long side direction. EIO2 of IC31G-1 is cascade-connected to EIO1 of IC31G-2, EIO2 of IC31G-2 is connected to EIO1 of IC31B-1, and EIO2 of IC31B-1 is cascade-connected to EIO1 of IC31B-2. As a result, the six driver ICs 31R-1, 31R-2, 31G-1, 31G-2, 31B-1, and 31B-2 operate like one continuous driver IC, and three driver ICs 32R. , 32G, 32B operate like a single continuous driver IC.

  During vertical scanning, the three driver ICs 32R, 32G, and 32B operate as segment drivers. The image data transfer operation in this case is the same as in the first embodiment. During horizontal scanning, the six driver ICs 31R-1, 31R-2, 31G-1, 31G-2, 31B-1, and 31B-2 operate as segment drivers. The image data transfer operation in this case is the same as that in the first embodiment except that the number of drivers is six. The first half of the R image data is transferred to the driver IC 31R-1, the second half of the R image data is transferred to the driver IC 31R-2, the first half of the G image data is transferred to the driver IC 31G-1, and the second half of the G image data. The portion is transferred to the driver IC 31G-2, the first half of the B image data is transferred to the driver IC 31B-1, and the second half of the B image data is transferred to the driver IC 31B-2. When the transfer of one display line of RGB image data is completed, it is latched and held, and the corresponding voltage is output. While outputting voltage, the RGB image data of the next display line is transferred.

  During vertical scanning, six driver ICs 31R-1, 31R-2, 31G-1, 31G-2, 31B-1, and 31B-2 operate as common drivers, and during horizontal scanning, three driver ICs 32R, 32G, 32B operates as a common driver. The operation in this case will be described as an example of scanning. In the description, the driver ICs 31R-1 and 31R-2 are referred to as a common driver 31R, the driver ICs 31G-1 and 31G-2 are referred to as a common driver 31G, and the driver ICs 31B-1 and 31B-2 are referred to as a common driver 31B.

  In order to perform writing in parallel on the three panels 10R, 10G, and 10B, the common drivers 31R, 31G, and 31B simultaneously apply scan pulses to the scan lines at the same position on the panel. Therefore, when writing is started, a signal RSPS indicating the scan position of the common driver 31R, a signal GSPS indicating the scan position of the common driver 31G, and a signal BSPS indicating the scan position of the common driver 31B are started as shown in FIG. It is necessary to be in a state indicating a position.

  FIG. 15 is a diagram for explaining an initialization scan operation for setting RSPS, GSPS, and BSPS to the state shown in FIG. At the initial stage or before starting the scanning operation, / DSPOF is asserted to turn off the voltage sign to the panel. Next, as shown in FIG. 15A, after EIO1 of the common driver 31R is turned on and one pulse of LP-row is input, EIO1 is returned to the off state. As a result, the first signal indicating the scan position is input to the common driver 31R. When LP-row is sequentially input, the first signal indicating the scan position is sequentially shifted as shown in FIG. Then, as shown in FIG. 15C, when the first signal indicating the scan position reaches the position indicating the final scan position of the common driver 31R, the EIO1 of the common driver 31R is turned on and the LP-row is turned on. After one pulse is input, EIO1 is returned to the OFF state. Since the EIO2 of the common driver 31R is connected to the EIO1 of the common driver 31G, the first signal indicating the scan position is shifted to the start position of the common driver 31G and the first signal indicating the scan position to the common driver 31R. 2 signal is input. As a result, the state shown in FIG. Thereafter, when LP-row is sequentially input, the first signal and the second signal indicating the scan position are sequentially shifted as shown in FIG. Then, as shown in FIG. 15F, when the first signal reaches the position indicating the final scan position of the common driver 31G and the second signal reaches the position indicating the final scan position of the common driver 31R, After EIO1 of the driver 31R is turned on and one pulse of LP-row is input, EIO1 is returned to the off state. As a result, the state shown in FIG. 14 is obtained.

  The operations of the common drivers 31R, 31G, and 31B during the initialization scan operation shown in FIG. 15 are empty scan operations that change only the internal signals without performing voltage output. The empty scan operation is completed in a short time if a high-speed clock is input as Lp-row.

  FIG. 16 is a diagram illustrating a scan operation at the time of image writing after the initialization scan. As shown in FIG. 16A, the common drivers 31R, 31G, and 31B output a scan pulse to a scan line corresponding to a signal indicating a scan position. In synchronization with this, the driver ICs 32R, 32G and 31B output voltage pulses corresponding to the image data for one display line transferred as described above. Thereby, writing of one display line is performed. Thereafter, as shown in FIGS. 16B and 16C, writing is performed while sequentially changing the scan position.

  Switching to the horizontal scanning operation is performed by switching the signal S / C. The horizontal scanning operation is similar to the vertical scanning operation and can be easily understood by those skilled in the art, and thus the description thereof is omitted.

  As described above, according to the present invention, the number of signal wirings of the dot matrix display device can be reduced, and the scan direction (rewrite direction) can be changed with a simple circuit configuration.

  As described above, the embodiment of the present invention has been described by taking the full-color display device in which the cholesteric liquid crystal display elements (panels) are stacked as an example, but it goes without saying that various modifications are possible. For example, the example in which the transfer of image data to the driver IC is performed in parallel in a plurality of bits (here, 4 bits) has been described, but 1 bit (one data transfer line) is also effective. Although an example of a full-color display device has been described, the present invention can also be applied to a color display device of two colors or four colors or more, and can also be applied to a monochrome display device in which a segment driver is configured by a plurality of driver ICs.

FIG. 1 is a diagram illustrating a bistable state (planar state and focal conic state) of a cholesteric liquid crystal. FIG. 2 is a diagram for explaining the principle of color display of a full-color display device in which three cholesteric liquid crystal panels having different reflection wavelengths are stacked. FIG. 3 is a diagram showing a schematic configuration of a conventional color display device. FIG. 4 is a diagram showing a configuration of a drive circuit configured with a general-purpose STN driver. FIG. 5 is a time chart showing an image data transfer operation in the conventional example of FIG. FIG. 6 is a diagram showing the configuration of another conventional example of the drive circuit. FIG. 7 is a diagram illustrating a configuration in which the rewriting direction is variable (vertical scan and horizontal scan switching). FIG. 18 is a diagram illustrating a configuration example when the rewriting direction is variable using a conventional configuration. FIG. 9 is a diagram showing a basic configuration of the embodiment of the present invention. FIG. 10 is a diagram illustrating the drive circuit according to the first embodiment. FIG. 11 is a time chart showing the image data point layer operation of the drive circuit of the first embodiment. FIG. 12 is a diagram illustrating a drive circuit according to the second embodiment. FIG. 13 is a diagram illustrating a drive circuit according to the third embodiment. FIG. 14 is a diagram for explaining the scan position at the start of the write operation in the third embodiment. FIG. 15 is a diagram for explaining the operation for setting the scan position at the start of the write operation in the third embodiment. FIG. 16 is a diagram for explaining a write operation in the third embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Display element 11 Upper substrate 12 Liquid crystal layer 13 Lower substrate 14 Upper electrode layer 15 Lower electrode layer 17 Light absorption layer 21 Power source 22 Booster part 23 Voltage switching part 24 Voltage stabilization part 27 Control circuit 28 Common driver 29 Segment driver

Claims (5)

A dot matrix type display element having a plurality of scan lines and a plurality of data lines, wherein the plurality of data lines are divided into a plurality of groups;
A common driver for driving the plurality of scan lines;
A plurality of segment drivers that respectively drive the data lines of the plurality of groups;
A control circuit for controlling the common driver and the plurality of segment drivers,
A supply line for supplying display data to the plurality of segment drivers is common.
The dot matrix display device characterized in that the control circuit controls display data to be supplied to each segment driver in a time-sharing manner. The dot matrix type display element has a laminated structure in which three layers of cholesteric liquid crystal display elements having different reflection wavelengths are laminated, and each layer of the cholesteric liquid crystal display element has a plurality of scan lines and a plurality of data lines,
The dot matrix display device according to claim 1, wherein the data line of each layer corresponds to each group of the data lines.   The dot matrix type display device according to claim 1, wherein the common driver drives a scan line of the three layers of cholesteric liquid crystal display elements in common.   3. The dot matrix display device according to claim 1, wherein the common driver includes a plurality of sub-common drivers that respectively drive scan lines of the three layers of cholesteric liquid crystal display elements. The plurality of sub-common drivers and the plurality of segment drivers are configured by a driver IC capable of selecting a common mode that operates as a common driver and a segment mode that operates as a segment driver,
The plurality of driver ICs constituting the plurality of sub-common drivers are cascade-connected,
The plurality of driver ICs constituting the plurality of segment drivers are cascade-connected,
The supply line for supplying display data is commonly connected to the plurality of sub-common drivers and the plurality of segment drivers,
5. The dot matrix display device according to claim 4, wherein the control circuit switches operation modes of the plurality of sub-common drivers and the plurality of segment drivers, switches a control signal to be supplied, and switches a scan direction.

Images