JP2009200108A - Wiring board - Google Patents

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JP2009200108A
JP2009200108A JP2008037606A JP2008037606A JP2009200108A JP 2009200108 A JP2009200108 A JP 2009200108A JP 2008037606 A JP2008037606 A JP 2008037606A JP 2008037606 A JP2008037606 A JP 2008037606A JP 2009200108 A JP2009200108 A JP 2009200108A
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signal
layer
insulating layer
pad
signal line
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Junichi Tsuchida
純一 土田
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NEC Corp
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NEC Corp
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<P>PROBLEM TO BE SOLVED: To provide a wiring board equipped with a capacitor for AC coupling available for high speed transmission of several tens of bps. <P>SOLUTION: A wiring board 1 is equipped with an insulating layer 6 of a prescribed thickness, a first signal layer 7 formed on one surface of the insulating layer 6, and a second signal layer 8 formed on the other surface of the insulating layer 6. The first signal layer 7 is equipped with a first signal line 4 and a first signal pad 2. The first signal pad 2 is electrically connected to the end of the first signal line 4 and has a prescribed area. The second signal layer 8 is equipped with a second signal line 5 and a second signal pad 3. The second signal pad 3 is electrically connected to the end of the second signal line 5 and has a prescribed area. The first signal pad 2 is disposed opposite to the second signal pad 3 with an insulating layer 6 between them to form a capacitor. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、交流結合(ACカップリング)に用いる配線基板に関する。   The present invention relates to a wiring board used for AC coupling (AC coupling).

コンピュータ等の電子機器の性能向上に伴い、電子機器内部の信号伝送の周波数は年々上昇している。例えば、10Gbpsから数10Gbpsクラスの伝送速度を要求する電子機器も存在する。このような高速伝送では直流成分をカットし、信号成分の高周波信号のみを通過させる交流結合(ACカップリング)が一般的に行われている。交流結合は、信号配線上に直列にコンデンサを挿入することで実現される。   As the performance of electronic equipment such as computers improves, the frequency of signal transmission inside the electronic equipment has been increasing year by year. For example, there are electronic devices that require transmission speeds ranging from 10 Gbps to several tens of Gbps. In such high-speed transmission, AC coupling (AC coupling) is generally performed in which a DC component is cut and only a high-frequency signal of a signal component is allowed to pass. AC coupling is realized by inserting a capacitor in series on the signal wiring.

例えば、特許文献1には、高周波信号に含まれるノイズを排除するためのバイパスコンデンサを内蔵した配線回路基板が開示されている。特許文献1に記載の、コンデンサが内蔵された配線回路基板は、強誘電体層が第1低誘電体層と第2低誘電体層とで挟まれ、強誘電体層と第1低誘電体層との境界面、及び強誘電体層と第2低誘電体層との境界面には、導体パッドが強誘電体層を挟んで対向させて配置されて、その対向させて配置された一対の導体パッドと、該一対の導体パッドに挟まれた強誘電体層部分とによりコンデンサが形成され、強誘電体層と第1低誘電体層又は/及び第2低誘電体層との境界面の導体パッドとは異なる部分には、高周波信号を伝える信号線路が形成され、その信号線路の特性インピーダンスが、該信号線路に対して強誘電体層側とは反対側の第1低誘電体層又は/及び第2低誘電体層の外側面に備えられたグランド層により所定値にマッチングされてなる。   For example, Patent Document 1 discloses a printed circuit board having a built-in bypass capacitor for eliminating noise included in a high-frequency signal. In the printed circuit board having a built-in capacitor described in Patent Document 1, the ferroelectric layer is sandwiched between the first low dielectric layer and the second low dielectric layer, and the ferroelectric layer and the first low dielectric are Conductor pads are disposed on the boundary surface between the ferroelectric layer and the second low dielectric layer so as to face each other with the ferroelectric layer interposed therebetween, and a pair disposed so as to face each other. And a ferroelectric layer portion sandwiched between the pair of conductor pads to form a capacitor, and a boundary surface between the ferroelectric layer and the first low dielectric layer and / or the second low dielectric layer A signal line for transmitting a high-frequency signal is formed at a portion different from the conductor pad of the first low dielectric layer on the side opposite to the ferroelectric layer side with respect to the signal line. Or / and matched to a predetermined value by the ground layer provided on the outer surface of the second low dielectric layer. It becomes Te.

特許第3625394号公報Japanese Patent No. 3625394

以下の分析は、本発明の観点から与えられる。   The following analysis is given from the perspective of the present invention.

コンデンサの周波数特性は、理想的には図5に示すように周波数が上昇するほどインピーダンスが小さくなる。しかしながら、実際には、コンデンサ自身が持つリード線や電極パタンによるインダクタ成分(ESL)により、ある周波数以上になると図6に示すようにインピーダンスが増加する。この周波数は一般的なコンデンサでは数100MHzから数GHz程度である。そのため、シリアル伝送で一般的に用いられている交流結合において、伝送周波数が数10Gbpsクラスの高速信号の交流結合のためにこのようなコンデンサを信号ラインに直列に挿入すると、インピーダンスの増加により、信号成分が減衰し、信号伝送が困難となる。周波数特性の優れた特殊なコンデンサも存在するがそれは高価である。   The ideal frequency characteristic of the capacitor is such that the impedance decreases as the frequency increases as shown in FIG. However, in practice, the impedance increases as shown in FIG. 6 when the frequency exceeds a certain frequency due to the inductor component (ESL) due to the lead wire or electrode pattern of the capacitor itself. This frequency is about several hundred MHz to several GHz for a general capacitor. Therefore, in the AC coupling generally used in serial transmission, when such a capacitor is inserted in series in the signal line for AC coupling of a high-speed signal having a transmission frequency of several tens of Gbps, the signal increases due to an increase in impedance. The component is attenuated and signal transmission becomes difficult. There are also special capacitors with excellent frequency characteristics, but they are expensive.

また、コンデンサを基板上に実装する場合には、信号配線を表面層に出す必要があるため、ビアホールやスルーホールのインピーダンスミスマッチにより信号伝送にその影響が及ぶと共に、部品点数の増加にもつながる。   Further, when the capacitor is mounted on the substrate, it is necessary to provide the signal wiring on the surface layer. Therefore, the impedance mismatch of the via hole or the through hole affects the signal transmission, and also increases the number of parts.

特許文献1に記載の、コンデンサが内蔵された配線回路基板においては、導体パッドと信号線路とは異なる部分に形成されているので、該コンデンサは伝送信号を効率的に交流結合させることができない。   In the printed circuit board in which the capacitor is built in Patent Document 1, since the conductor pad and the signal line are formed in different portions, the capacitor cannot efficiently AC-couple the transmission signal.

本発明の目的は、数10bpsクラスの高速伝送において利用可能な交流結合用のコンデンサを備える配線基板を提供することである。   An object of the present invention is to provide a wiring board including a capacitor for AC coupling that can be used in high-speed transmission of several tens of bps class.

本発明の第1視点によれば、本発明の配線基板は、所定の厚さを有する絶縁層と、絶縁層の一方の面に形成された第1信号層と、絶縁層の他方の面に形成された第2信号層と、を備える。第1信号層は、第1信号線と、第1信号線の端部に電気的に接続され、所定の面積を有する第1信号パッドと、を有する。第2信号層は、第2信号線と、第2信号線の端部に電気的に接続され、所定の面積を有する第2信号パッドと、を有する。第1信号パッドと第2信号パッドとはコンデンサを形成するように絶縁層を介して対向している。   According to the first aspect of the present invention, the wiring board of the present invention includes an insulating layer having a predetermined thickness, a first signal layer formed on one surface of the insulating layer, and a second surface of the insulating layer. And a formed second signal layer. The first signal layer includes a first signal line and a first signal pad that is electrically connected to an end of the first signal line and has a predetermined area. The second signal layer includes a second signal line and a second signal pad that is electrically connected to an end of the second signal line and has a predetermined area. The first signal pad and the second signal pad are opposed to each other through an insulating layer so as to form a capacitor.

本発明の第2視点によれば、本発明の配線基板は、所定の厚さを有する第1絶縁層と、第1絶縁層の一方の面側と一方の面が対向するように形成された第2絶縁層と、第1絶縁層と第2絶縁層間に形成された第1信号層と、第1絶縁層の他方の面に形成された第2信号層と、第2絶縁層の他方の面に形成された電源層又はグランド層と、を備える。第1信号層は、第1信号線と、第1信号線の端部に電気的に接続され、所定の面積を有する第1信号パッドと、を有する。第2信号層は、第2信号線と、第2信号線の端部に電気的に接続され、所定の面積を有する第2信号パッドと、を有する。第1信号パッドと第2信号パッドとはコンデンサを形成するように第1絶縁層を介して対向している。電源層又はグランド層は、少なくとも第1信号パッドと対向する領域には導体層を有していない。   According to the second aspect of the present invention, the wiring board of the present invention is formed such that a first insulating layer having a predetermined thickness and one surface side of the first insulating layer face each other. A second insulating layer; a first signal layer formed between the first insulating layer and the second insulating layer; a second signal layer formed on the other surface of the first insulating layer; and the other of the second insulating layer. And a power supply layer or a ground layer formed on the surface. The first signal layer includes a first signal line and a first signal pad that is electrically connected to an end of the first signal line and has a predetermined area. The second signal layer includes a second signal line and a second signal pad that is electrically connected to an end of the second signal line and has a predetermined area. The first signal pad and the second signal pad are opposed to each other through the first insulating layer so as to form a capacitor. The power supply layer or the ground layer does not have a conductor layer at least in a region facing the first signal pad.

本発明は、以下の効果のうち少なくとも1つを有する。   The present invention has at least one of the following effects.

本発明によれば、数10Gbpsの高周波信号であってもコンデンサによるインダクタ成分の影響を受けることなく交流結合させることができる。   According to the present invention, even a high frequency signal of several tens of Gbps can be AC-coupled without being affected by the inductor component due to the capacitor.

本発明によれば、コンデンサ容量の調節によりイコライザ機能を付与することもできる。   According to the present invention, the equalizer function can be provided by adjusting the capacitor capacity.

本発明によれば、実装面積の削減、部品数の削減、及びコストの削減のうち少なくとも1つに寄与することができる。   According to the present invention, it is possible to contribute to at least one of a reduction in mounting area, a reduction in the number of components, and a reduction in cost.

本発明によれば、スルーホールやビアホールが不要であるので、信号伝送はこれらの影響を受けることがない。   According to the present invention, since a through hole or a via hole is unnecessary, signal transmission is not affected by these effects.

本発明の第1実施形態に係る配線基板について説明する。図1に、本発明の第1実施形態に係る配線基板の概略斜視図を示す。図2に、本発明の第1実施形態に係る配線基板の電気的概念図を示す。配線基板1は、所定の厚さを有する絶縁層6と、絶縁層6の一方の面に形成された第1信号層7と、絶縁層6の他方の面に形成された第2信号層8とを有する。   A wiring board according to a first embodiment of the present invention will be described. FIG. 1 shows a schematic perspective view of a wiring board according to the first embodiment of the present invention. FIG. 2 shows an electrical conceptual diagram of the wiring board according to the first embodiment of the present invention. The wiring substrate 1 includes an insulating layer 6 having a predetermined thickness, a first signal layer 7 formed on one surface of the insulating layer 6, and a second signal layer 8 formed on the other surface of the insulating layer 6. And have.

第1信号層7には、第1信号線4と、第1信号線4の端部に電気的に接続され、所定の面積を有する第1信号パッド2とが配線されている。他方、第2信号層8にも同様にして、第2信号線5と、第2信号線5の端部に電気的に接続され、所定の面積を有する第2信号パッド3とが配線されている。第1信号パッド2と第2信号パッド3とは、コンデンサ9を形成するように絶縁層6を介して対向させて配設されている。これにより、第1信号パッド2、第2信号パッド3及び絶縁層6は、図2に示すように、第1信号線4の伝送信号と第2信号線5の伝送信号とを交流結合するコンデンサ9として動作することになる。   The first signal layer 7 is wired with a first signal line 4 and a first signal pad 2 electrically connected to an end of the first signal line 4 and having a predetermined area. On the other hand, the second signal layer 8 is similarly wired with the second signal line 5 and the second signal pad 3 electrically connected to the end of the second signal line 5 and having a predetermined area. Yes. The first signal pad 2 and the second signal pad 3 are disposed to face each other with an insulating layer 6 therebetween so as to form a capacitor 9. Accordingly, the first signal pad 2, the second signal pad 3, and the insulating layer 6 are capacitors that AC-couple the transmission signal of the first signal line 4 and the transmission signal of the second signal line 5, as shown in FIG. 9 will be operated.

図3に、本発明の配線基板の利用例を示す電気回路図を示す。送信回路10には、伝送線路として第1信号線4が接続され、受信回路11には伝送線路として第2信号線5が接続されている。送信回路10と受信回路11との間を伝送する信号は、第1信号パッド2、第2信号パッド3及び絶縁層6で形成されるコンデンサ9によって交流結合される。   FIG. 3 is an electric circuit diagram showing an example of use of the wiring board of the present invention. A first signal line 4 is connected to the transmission circuit 10 as a transmission line, and a second signal line 5 is connected to the reception circuit 11 as a transmission line. A signal transmitted between the transmission circuit 10 and the reception circuit 11 is AC-coupled by a capacitor 9 formed by the first signal pad 2, the second signal pad 3, and the insulating layer 6.

コンデンサ容量Cは、下記式1の通り、絶縁層6の比誘電率ε、第1信号パッド2及び第2信号パッド3の面積S、第1信号パッド2と第2信号パッド3間の距離(絶縁層6の厚さ)dによって決まる。なお、式1において、εは、真空の誘電率(8.85×10−12F/m)である。
[式1]
C=ε×ε×(S/d)
Capacitor capacitance C is expressed by the following equation 1, relative permittivity ε r of insulating layer 6, area S of first signal pad 2 and second signal pad 3, distance between first signal pad 2 and second signal pad 3. (Thickness of the insulating layer 6) d is determined. In Expression 1, ε 0 is a vacuum dielectric constant (8.85 × 10 −12 F / m).
[Formula 1]
C = ε 0 × ε r × (S / d)

例えば、第1信号パッド2と第2信号パッド3のパッド面積Sをそれぞれ4mm(1辺2mmの正方形)、絶縁層6の厚さdを35μm、絶縁層6の比誘電率εを3.46とした場合のコンデンサ容量Cは3.5pF程度となり、40Gbps伝送ではインピーダンス2Ω程度となる。インピーダンスが高くなる低い周波数成分は、イコライズの効果を発揮する。 For example, the pad area S of the first signal pad 2 and the second signal pad 3 is 4 mm 2 (2 mm square), the thickness d of the insulating layer 6 is 35 μm, and the relative dielectric constant ε r of the insulating layer 6 is 3 The capacitor capacitance C when .46 is set is about 3.5 pF, and the impedance is about 2Ω in 40 Gbps transmission. The low frequency component that increases the impedance exhibits the effect of equalization.

次に、本発明の第2実施形態に係る配線基板について説明する。図4に、本発明の第2実施形態に係る配線基板の概略斜視図を示す。配線基板21は、第1実施形態に係る配線基板1に相当する構成をその一部に有する。また、配線基板21は、さらに、第1信号層7を介して第1絶縁層6の一方の面側と一方の面が対向するように形成された第2絶縁層26と、第2絶縁層26の他方の面に形成されたベタパターンの電源層又はグランド層28を有する。これにより、第1信号層7は、第1絶縁層6と第2絶縁層26との間に配設されると共に、第2絶縁層26を介して電源層又はグランド層28と対向することになる。   Next, a wiring board according to a second embodiment of the present invention will be described. FIG. 4 is a schematic perspective view of a wiring board according to the second embodiment of the present invention. The wiring board 21 has in its part a configuration corresponding to the wiring board 1 according to the first embodiment. Further, the wiring substrate 21 further includes a second insulating layer 26 formed so that one surface side and one surface of the first insulating layer 6 face each other with the first signal layer 7 interposed therebetween, and a second insulating layer. 26 has a solid pattern power supply layer or ground layer 28 formed on the other surface. Thus, the first signal layer 7 is disposed between the first insulating layer 6 and the second insulating layer 26 and faces the power supply layer or the ground layer 28 via the second insulating layer 26. Become.

電源層又はグランド層28は、少なくとも第1信号パッド2と対向する領域のベタパターン(導体層)を削除したクリアランス部23を有する。これにより、第1信号パッド2と電源層又はグランド層28とのコンデンサの形成、すなわち電源層又はグランド層28との交流結合を防止することができる。   The power supply layer or the ground layer 28 has a clearance portion 23 from which at least a solid pattern (conductor layer) in a region facing the first signal pad 2 is deleted. Thereby, formation of a capacitor between the first signal pad 2 and the power supply layer or the ground layer 28, that is, AC coupling with the power supply layer or the ground layer 28 can be prevented.

また、本実施形態においては、電源層又はグランド層28が一方の信号層(第1信号層7)のみと対向していたが、電源層が一方の信号層(第1信号層7)と対向し、グランド層が他方の信号層(第2信号層8)と対向している形態においては、電源層及びグランド層の双方にクリアランス部を形成することができる。   In the present embodiment, the power supply layer or ground layer 28 faces only one signal layer (first signal layer 7), but the power supply layer faces one signal layer (first signal layer 7). However, in the form in which the ground layer is opposed to the other signal layer (second signal layer 8), a clearance portion can be formed in both the power supply layer and the ground layer.

本発明の配線基板は、上記実施形態に基づいて説明されているが、上記実施形態に限定されることなく、本発明の範囲内において、かつ本発明の基本的技術思想に基づいて、上記実施形態に対し種々の変形、変更及び改良を含むことができることはいうまでもない。また、本発明の請求の範囲の枠内において、種々の開示要素の多様な組み合わせ・置換ないし選択が可能である。   The wiring board of the present invention has been described based on the above-described embodiment, but is not limited to the above-described embodiment, and is within the scope of the present invention and based on the basic technical idea of the present invention. It cannot be overemphasized that various deformation | transformation, a change, and improvement with respect to a form can be included. Further, various combinations, substitutions, or selections of various disclosed elements are possible within the scope of the claims of the present invention.

本発明のさらなる課題、目的及び展開形態は、請求の範囲を含む本発明の全開示事項からも明らかにされる。   Further problems, objects, and developments of the present invention will become apparent from the entire disclosure of the present invention including the claims.

本発明の第1実施形態に係る配線基板の概略斜視図。1 is a schematic perspective view of a wiring board according to a first embodiment of the present invention. 本発明の第1実施形態に係る配線基板の電気的概念図。The electrical conceptual diagram of the wiring board which concerns on 1st Embodiment of this invention. 本発明の第1実施形態に係る配線基板の利用例を示す電気回路図。The electric circuit diagram which shows the utilization example of the wiring board which concerns on 1st Embodiment of this invention. 本発明の第2実施形態に係る配線基板の概略斜視図。The schematic perspective view of the wiring board which concerns on 2nd Embodiment of this invention. 一般的なコンデンサの理想的な周波数特性概略図。Schematic of ideal frequency characteristics of a general capacitor. 一般的なコンデンサの実際上の周波数特性概略図。Schematic diagram of actual frequency characteristics of a general capacitor.

符号の説明Explanation of symbols

1,21 配線基板
2 第1信号パッド
3 第2信号パッド
4 第1信号線
5 第2信号線
6 (第1)絶縁層
7 第1信号層
8 第2信号層
9 コンデンサ
10 送信回路
11 受信回路
23 クリアランス部
26 第2絶縁層
28 電源層又はグランド層
DESCRIPTION OF SYMBOLS 1,21 Wiring board 2 1st signal pad 3 2nd signal pad 4 1st signal line 5 2nd signal line 6 (1st) Insulation layer 7 1st signal layer 8 2nd signal layer 9 Capacitor 10 Transmission circuit 11 Reception circuit 23 Clearance part 26 Second insulating layer 28 Power supply layer or ground layer

Claims (2)

所定の厚さを有する絶縁層と、
前記絶縁層の一方の面に形成された第1信号層と、
前記絶縁層の他方の面に形成された第2信号層と、を備える配線基板であって、
前記第1信号層は、第1信号線と、前記第1信号線の端部に電気的に接続され、所定の面積を有する第1信号パッドと、を有し、
前記第2信号層は、第2信号線と、前記第2信号線の端部に電気的に接続され、所定の面積を有する第2信号パッドと、を有し、
前記第1信号パッドと前記第2信号パッドとはコンデンサを形成するように前記絶縁層を介して対向していることを特徴とする配線基板。
An insulating layer having a predetermined thickness;
A first signal layer formed on one surface of the insulating layer;
A second signal layer formed on the other surface of the insulating layer, and a wiring board comprising:
The first signal layer includes a first signal line and a first signal pad electrically connected to an end of the first signal line and having a predetermined area;
The second signal layer includes a second signal line, and a second signal pad that is electrically connected to an end of the second signal line and has a predetermined area.
The wiring board according to claim 1, wherein the first signal pad and the second signal pad are opposed to each other through the insulating layer so as to form a capacitor.
所定の厚さを有する第1絶縁層と、
前記第1絶縁層の一方の面側と一方の面が対向するように形成された第2絶縁層と、
前記第1絶縁層と前記第2絶縁層間に形成された第1信号層と、
前記第1絶縁層の他方の面に形成された第2信号層と、
前記第2絶縁層の他方の面に形成された電源層又はグランド層と、を備える配線基板であって、
前記第1信号層は、第1信号線と、前記第1信号線の端部に電気的に接続され、所定の面積を有する第1信号パッドと、を有し、
前記第2信号層は、第2信号線と、前記第2信号線の端部に電気的に接続され、所定の面積を有する第2信号パッドと、を有し、
前記第1信号パッドと前記第2信号パッドとはコンデンサを形成するように前記第1絶縁層を介して対向し、
前記電源層又はグランド層は、少なくとも前記第1信号パッドと対向する領域には導体層を有しないことを特徴とする配線基板。
A first insulating layer having a predetermined thickness;
A second insulating layer formed so that one surface side and one surface of the first insulating layer face each other;
A first signal layer formed between the first insulating layer and the second insulating layer;
A second signal layer formed on the other surface of the first insulating layer;
A power supply layer or a ground layer formed on the other surface of the second insulating layer,
The first signal layer includes a first signal line and a first signal pad electrically connected to an end of the first signal line and having a predetermined area;
The second signal layer includes a second signal line, and a second signal pad that is electrically connected to an end of the second signal line and has a predetermined area.
The first signal pad and the second signal pad are opposed to each other through the first insulating layer so as to form a capacitor,
The wiring board according to claim 1, wherein the power supply layer or the ground layer does not have a conductor layer at least in a region facing the first signal pad.
JP2008037606A 2008-02-19 2008-02-19 Wiring board Pending JP2009200108A (en)

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Cited By (1)

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EP2822365A1 (en) 2013-07-01 2015-01-07 Fujitsu Limited Wiring board and electronic apparatus

Citations (7)

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Publication number Priority date Publication date Assignee Title
JPH057063A (en) * 1990-11-22 1993-01-14 Juichiro Ozawa Wiring board with built-in capacitor and manufacture thereof
JPH0529772A (en) * 1991-07-19 1993-02-05 Oki Electric Ind Co Ltd Circuit substrate for high-speed signal transmission
JP2001339167A (en) * 2000-05-27 2001-12-07 Karentekku:Kk Multilayer printed wiring board partially having both sided circuit formed of heat resistant film
JP2002111230A (en) * 2000-09-28 2002-04-12 Toshiba Corp Circuit board for transmitting high-frequency signal, its manufacturing method, and electronic equipment using the same
JP2002204073A (en) * 2001-01-05 2002-07-19 Karentekku:Kk Film-core multilayer printed wiring board
JP2004193501A (en) * 2002-12-13 2004-07-08 Sony Corp Capacitor element
JP2004200263A (en) * 2002-12-17 2004-07-15 Ube Ind Ltd Multilayer substrate with built-in capacitor and capacitance adjustment method

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH057063A (en) * 1990-11-22 1993-01-14 Juichiro Ozawa Wiring board with built-in capacitor and manufacture thereof
JPH0529772A (en) * 1991-07-19 1993-02-05 Oki Electric Ind Co Ltd Circuit substrate for high-speed signal transmission
JP2001339167A (en) * 2000-05-27 2001-12-07 Karentekku:Kk Multilayer printed wiring board partially having both sided circuit formed of heat resistant film
JP2002111230A (en) * 2000-09-28 2002-04-12 Toshiba Corp Circuit board for transmitting high-frequency signal, its manufacturing method, and electronic equipment using the same
JP2002204073A (en) * 2001-01-05 2002-07-19 Karentekku:Kk Film-core multilayer printed wiring board
JP2004193501A (en) * 2002-12-13 2004-07-08 Sony Corp Capacitor element
JP2004200263A (en) * 2002-12-17 2004-07-15 Ube Ind Ltd Multilayer substrate with built-in capacitor and capacitance adjustment method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2822365A1 (en) 2013-07-01 2015-01-07 Fujitsu Limited Wiring board and electronic apparatus
US9491860B2 (en) 2013-07-01 2016-11-08 Fujitsu Limited Wiring board and electronic apparatus

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