JP2009199243A - Reference voltage circuit and semiconductor integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reference voltage circuit and a semiconductor integrated circuit device that use no operational amplifiers. <P>SOLUTION: The reference voltage circuit includes a bias circuit part 10 for supplying a reference current having a positive temperature characteristic as a constant current to a reference voltage generation circuit part 20, and the reference voltage generation circuit part 20 for outputting an output voltage Vreg by means of MOS transistors MP4 and MP5 having a negative temperature characteristic. The output voltage Vreg from the reference voltage circuit can thus have a temperature-independent reference voltage. The resistance value of a resistor R4 can be set freely for a high degree of freedom of the output voltage Vreg. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a reference voltage circuit and a semiconductor integrated circuit device for generating a temperature independent reference voltage, and more particularly to a reference voltage circuit that generates a temperature independent reference voltage signal based on a constant current having temperature dependent characteristics. And a semiconductor integrated circuit device.

  Conventionally, a reference voltage circuit that generates a stable reference voltage against voltage fluctuations of an external power supply has been considered (for example, see Patent Document 1). In this type of reference voltage circuit, the diode or bipolar transistor has a negative temperature coefficient (about −2 [mV / ° C.]) for the forward voltage and the base-emitter voltage (Vbe). Alternatively, a pair of diodes or transistors having different emitter areas is used to cancel the positive temperature-dependent characteristic of the resistor that determines the current value of the constant current circuit, thereby generating a reference voltage signal that does not depend on temperature.

  FIG. 2 is a diagram illustrating an example of a conventional reference voltage circuit. The reference voltage circuit includes an operational amplifier (Oamp: hereinafter referred to as an operational amplifier) 101, a first reference voltage generation circuit 100 including a pair of npn transistors QN1 and QN2, and resistors R10 to R30, an operational amplifier 201, and a resistor. And a second reference voltage generation circuit 200 including R40 and R50. The first reference voltage generation circuit (Vref circuit) 100 generates a reference voltage signal Vref (Vref = about 1.2 V) having no temperature dependency, and the second reference voltage generation circuit (Vreg circuit) 200 generates the reference voltage signal Vref. By amplifying, the reference voltage signal Vreg having a necessary magnitude (for example, 5V) is output as a signal independent of temperature.

Next, the basic operation of the conventional reference voltage circuit will be specifically described.
In the first reference voltage generation circuit 100, it is assumed that the emitter area of the transistor QN1 is four times that of the transistor QN2, and the resistors R10 to R30 are resistance elements having the same temperature characteristics. Here, assuming that the resistance values of the resistors R20 and R30 are equal and the currents flowing through the transistors QN1 and QN2 are I10 and I20, respectively, since the two inputs of the operational amplifier 101 are virtually shorted, these current values are equal ( I10 = I20). The magnitudes of the current values I10 and I20 and the reference voltage Vref in the first reference voltage generation circuit 100 are expressed as the following relational expressions (1) and (2), respectively. Hereinafter, the resistance value of the resistor R10～R50, respectively expressed as _R 10 _{to R 50,} and R 10 = 5 [kΩ].

I10 = (1 / R ₁₀ ) × (kT / q) ln (4) (1)
= 7μA (at 25 ° C)
Vref = R ₃₀ × I20 + Vbe ₂₀ (2)
Here, k is the Boltzmann constant, T is the absolute temperature, q is the elementary charge, ln () is the natural logarithm, and Vbe ₂₀ is the base-emitter voltage of the transistor QN2.

From equations (1), (2) and I10 = I20,
Vref = (R ₃₀ / R ₁₀ ) × (kT / q) ln (4) + Vbe ₂₀ (3)
It becomes. Here, when partial differentiation of both sides of the equation _{(3), ∂Vref / ∂T =} (R 30 / R 10) × (k / q) ln (4) becomes -2 [mV / ℃].

At this time, since (k / q) ln (4) is about 1.2 × 10 ⁻⁴ , in order to make the temperature dependence of the reference voltage Vref zero, R ₃₀ / R ₁₀ is 16. 7 may be sufficient. For example, when the resistance value _{R 10} of the resistor R10 and the like described above 5 [kΩ], with the resistor R10, resistor R20, R30 becomes necessary to set the resistance ratio 16.7 times. That is, R ₂₀ = R ₃₀ = 16.7 × R ₁₀ = 83.5 [kΩ].

On the other hand, regarding the output voltage Vreg of the second reference voltage generation circuit 200,
Vreg = {(R ₄₀ + R ₅₀ ) / R ₅₀ } × Vref (4)
It becomes. The reference voltage Vref at a temperature of 25 ° C. is obtained as 1.2 [V] from the equation (3). Therefore, in order to obtain 5 [V] as the output voltage Vreg, the resistance values of the resistors R40 and R50 are
(R ₄₀ + R ₅₀ ) / R ₅₀ = 5 / 1.2 = 4.17
It is sufficient to design so that At this time, by partially differentiating both sides of the equation (4) with respect to the temperature T,
∂Vreg / ∂T = {(R ₄₀ + R ₅₀ ) / R ₅₀ } × ∂Vref / ∂T (5)
It becomes. That is, if the voltage value of the reference voltage Vref is not temperature-dependent (∂Vref / ∂T = 0), the magnitude of the output voltage Vreg can be determined regardless of the temperature.

  Thus, the conventional reference voltage circuit eliminates the temperature dependence of the reference voltage Vref by determining the resistance ratio of the resistors R10 and R20 (= R30) that determines the magnitude of the reference voltage Vref in the equation (3). The output voltage Vreg shown in Expression (4) is also configured to eliminate temperature dependency.

  In such a reference voltage circuit, if the resistance value or the saturation current of the bipolar transistor varies due to manufacturing variations of the semiconductor device, not only the absolute value of the output voltage but also the temperature dependency changes. Temperature dependence remains. Therefore, a reference voltage generating circuit has been proposed that can minimize not only the absolute value of the output voltage but also its temperature dependency by trimming (see, for example, Patent Document 2).

A constant current circuit that generates a constant current having a positive temperature coefficient using a band gap voltage; a current mirror circuit that receives a constant current from the constant current circuit as a reference current and outputs a plurality of driven currents proportional thereto; A plurality of constant voltage circuits including a characteristic compensation element having a voltage drop with a negative temperature coefficient and receiving a driven current from each of the current mirror circuits to generate a constant voltage based thereon, and the constant voltage by each constant voltage circuit, There has been proposed a stabilized power supply circuit in which an output voltage with compensated temperature characteristics is individually taken out and supplied to a load (see, for example, Patent Document 3).
JP 2003-7837 A JP-A-11-121694 Japanese Patent Laid-Open No. 08-16265

  The conventional reference voltage circuit includes a first reference voltage generation circuit 100 for generating a reference voltage signal Vref having no temperature dependence, and amplifies the reference voltage signal Vref to a reference voltage signal Vreg having a required magnitude at a subsequent stage. The second reference voltage generating circuit 200 is required, and the circuits 100 and 200 must be configured by using the operational amplifiers 101 and 201, respectively.

  3 and 4 are circuit diagrams showing examples of the operational amplifiers 101 and 201, respectively. FIG. 5 is a circuit diagram showing an example of a bias circuit used in the operational amplifiers 101 and 201 shown in FIGS. That is, in order to generate a voltage Bias for supplying a stable bias current to these operational amplifiers 101 and 201, a bias circuit including a large number of circuit elements as shown in FIG.

  As described above, since the number of circuit components is increased in the conventional reference voltage circuit, when a semiconductor circuit that generates and uses the reference voltage is integrated, the area of the reference voltage circuit on the IC chip increases. There was a problem.

  Further, in the stabilized power source disclosed in Patent Document 3, the constant of the characteristic compensation element is uniquely determined to compensate the temperature characteristic, and there is no degree of freedom with respect to the magnitude of the generated constant voltage (for example, constant power supply). The magnitude of the voltage is determined to be about 1.3V). Therefore, in order to freely set the constant voltage value, there is a problem that it is necessary to add a circuit such as the second reference voltage generation circuit 200 described above.

  The present invention has been made in view of these points, and an object thereof is to provide a reference voltage circuit and a semiconductor integrated circuit device which are configured without using an operational amplifier.

  In the present invention, in order to solve the above problem, a reference voltage circuit that generates a reference voltage having no temperature dependence based on a constant current having temperature dependence is provided. It has a pair of transistors having different emitter areas, and a first resistor is connected to the emitter side of one of the transistors, and a second and a third resistor are connected in parallel with each of the transistors, thereby providing a positive temperature characteristic. A reference current is generated. In the reference voltage generation circuit unit, a constant current corresponding to the reference current generated by the bias circuit unit is caused to flow through the MOS transistor so that a reference voltage having a voltage component having a magnitude corresponding to the threshold voltage is generated. It is trying to generate.

  Thus, a reference voltage circuit that does not use an operational amplifier can be configured by using a threshold voltage (threshold voltage) of a diode-connected MOS transistor for supplying a constant current to generate a reference voltage that does not depend on temperature. .

  In order to obtain a reference voltage independent of temperature, a constant current having a temperature dependency that cancels the temperature dependency of the threshold voltage of the PMOS transistor (P-channel MOS transistor) is caused to flow through the PMOS transistor. Yes.

  According to the present invention, a reference voltage having characteristics equivalent to those of the prior art can be configured as a reference voltage circuit having a smaller number of elements without using an operational amplifier. Therefore, it is possible to realize a semiconductor integrated circuit device in which the area of the reference voltage circuit in the IC chip is reduced.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of a reference voltage circuit according to the present invention.
The reference voltage circuit outputs an output voltage Vreg by a bias circuit unit 10 that supplies a reference current having a positive temperature characteristic to the reference voltage generation circuit unit 20 as a constant current, and MOS transistors MP4 and MP5 having a negative temperature characteristic. And a reference voltage generation circuit unit 20. As a result, the output voltage Vreg from the reference voltage circuit can have a reference voltage without temperature dependency.

  The bias circuit unit 10 includes mirror-connected P-channel MOS transistors MP1 and MP2, N-channel MOS transistors MN1 and MN2, and a pair of pnp transistors QP1 and QP2 having different emitter areas. A first resistor R1 is connected to the emitter side of the transistor QP1, and a second resistor R2 is provided in parallel with the series circuit of the transistor QP1 and the resistor R1. The third resistor R3 is also connected in parallel to the other transistor QP2.

  The reference voltage generation circuit unit 20 includes mirror-connected P-channel MOS transistors MP3 and MP6, two P-channel MOS transistors MP4 and MP5 connected in series, and an output transistor QP3 (pnp transistor) constituting an output circuit. ), QN1 (npn transistor). The MOS transistors MP3 and MP6 are mirror-connected to the MOS transistors MP1 and MP2, and their sources are connected to one power supply Vcc. The source of the MOS transistor MP4 is connected to the drain of the MOS transistor MP3 and the base of the output transistor QP3 via the resistor R4. The gate of the MOS transistor MP4 is connected to the drain, and the drain is connected to the source of the MOS transistor MP5. The gate of the MOS transistor MP5 is connected to the drain, and the drain is grounded. The emitter terminal of the output transistor QP3 is connected to the drain of the MOS transistor MP6 and the base terminal of the output transistor QN1, and its collector terminal is grounded. Further, the collector terminal of the output transistor QN1 is connected to the power supply Vcc, and the output voltage Vreg is output from the emitter terminal thereof. Further, resistance elements of a type having no temperature characteristic are applied to the resistors R1 to R4.

Next, the operation of the reference voltage circuit configured as shown in FIG. 1 will be specifically described.
Now, it is assumed that the transistors MP1 to MP3 constituting the mirror circuit have a mirror ratio of 1: 1: 1 and the bias currents I flowing through them are equal. Here, when the bias current I flows through the reference voltage generation circuit unit 20, the output voltage Vreg has a magnitude as shown in the following equation (6).

Vreg = Vth ₄ + Vth ₅ + I × R ₄ + Vbe ₃ −Vbe ₁ (6)
Here, Vth ₄ and Vth ₅ are threshold voltages of the P-channel MOS transistors MP4 and MP5, respectively, and Vbe ₃ and Vbe ₁ are base-emitter voltages of the output transistors QP3 and QN1, respectively. Further, the sizes (gate length and gate width) of the two P-channel MOS transistors MP4 and MP5 of the reference voltage generation circuit unit 20 are made equal, and their threshold voltages Vth are equal (Vth ₄ = Vth ₅ = Vth). ) Furthermore, the base-emitter voltage Vbe of output transistors QP3, QN1 since almost equal _{(Vbe 3 = Vbe 1 = Vbe} ), the output voltage Vreg is equal to 2Vth + I × _{R 4.} That is,
Vreg = 2Vth + I × R ₄ (7)
It becomes. At this time, the threshold voltage Vth has a negative characteristic (negative derivative is negative) with respect to a temperature change, and has a positive characteristic (differential coefficient is positive) with respect to a current change. Therefore, in order to obtain a condition for eliminating the temperature dependence of the output voltage Vreg, both sides of the equation (7) are partially differentiated with respect to the temperature T.

∂Vreg / ∂T = 2 × ∂Vth / ∂T + R ₄ × ∂I / ∂T
= 2 (∂Vth / ∂T + ∂Vth / ∂I × ∂I / ∂T) + R ₄ × ∂I / ∂T (8)
In order to eliminate the temperature dependence of the output voltage Vreg, 式 Vreg / ∂T = 0 in the equation (8). That is,
2 (∂Vth / ∂T + ∂Vth / ∂I × ∂I / ∂T) + R ₄ × ∂I / ∂T = 0 (9)
If it is. Solving this equation (9) for ∂I / ∂T,
∂I / ∂T = −2 (∂Vth / ∂T) / (R ₄ + 2∂Vth / ∂I) (10)
It becomes. At this time, the threshold voltage Vth has a negative characteristic (∂Vth / ∂T <0) with respect to a temperature change and a positive characteristic (∂Vth / ∂I> 0) with respect to a current change. From the above, it can be seen that the positive temperature characteristic of the bias current I expressed by the equation (10) is a condition for eliminating the temperature dependence of the output voltage Vreg.

Next, the bias circuit unit 10 of the reference voltage circuit shown in FIG. 1 will be described.
Now, it is assumed that the same bias current I is output from the mirror circuits of the transistors MP1 to MP3. The N-channel MOS transistors MN1 and MN2 are also configured with a mirror ratio of 1: 1, and their size is set to a size that becomes a saturation region with the current I. Further, the pair of transistors QP1 and QP2 has an emitter area ratio m set to 8 times, and currents flowing from the MOS transistors MN1 and MN2 into the resistors R1, R2, and R3 and the transistor QP2 are I1, I2, I3, and I4, respectively. Regarding the source voltages Vs1 and Vs2 of the MOS transistors MN1 and MN2 and the currents I1, I2, I3, and I4, the following expressions (11) to (14) are satisfied.

Vs1 = I2 × _{R 2}
= Vbe ₁ + I1 × R ₁
= (KT / q) ln {I1 / (8 × Is)} + I1 × R ₁ (11)
Vs2 = I3 × _{R 3}
= Vbe ₂
= (KT / q) ln (I4 / Is) (12)
I = I1 + I2 = I3 + I4 (13)
Vs1 = Vs2 (14)
Here, the expression (14) is derived from the fact that the MOS transistors MN1 and MN2 have the same size and characteristics, the flowing current and the gate voltage, and the current flowing through the MOS transistor is determined by the gate-source voltage.

Vbe ₁ and Vbe ₂ are the base-emitter voltages of the transistors QP1 and QP2, Is is a positive constant, and the resistance values R ₂ and R ₃ of the second and third resistors R2 and R3 are changed to the first resistance. When the resistance value (R ₂ = R ₃ = nR ₁ ) is set to n times (n is a positive constant) with respect to the resistance value R _{1 of} R1, I2 × R ₂ = I3 × R ₃ from Equation (14) Therefore, I2 = I3, and the relationship of I1 = I-I2 = I-I3 = I4 is required. From the relationship of I1 = I4 and formulas (11), (12), and (14), the following formula (15) is established.

I1 = (1 / R ₁ ) × (kT / q) ln (8) (15)
And from the equations (13) to (15), I = I1 + I2
= I1 + Vbe ₂ / R2
= (1 / R ₁ ) × (kT / q) ln (8) + (Vbe ₂ / nR ₁ ) (16)
It becomes.

Therefore, in order to know the temperature characteristics of the bias current I, both sides of the equation (16) are partially differentiated with respect to the temperature T.
∂I / ∂T = (1 / R ₁ ) × (k / q) ln (8) + (1 / nR ₁ ) × (∂Vbe / ∂T)
= (1 / R ₁ ) × {0.18 [mV / ° C.] + (1 / n) × (−2 [mV / ° C.])}
... (17)
As shown in this equation (17), the temperature characteristics of the bias current I can be set by the resistance value R ₁ of the first resistor R1 and the resistor ratio and n. If n = 11, the right side of the equation (17) becomes zero. Therefore, in order to make the temperature characteristic of the bias current I positive, the resistance ratio n may be 11 or more.

Next, the resistance ratio n for eliminating the temperature dependence of the output voltage Vreg is determined.
With respect to the threshold voltage Vth, its temperature dependency characteristic (∂Vth / ∂T) is set to −2 [mV / ° C.], and its current dependency property (∂Vth / ∂I) is 50 [mV / μA] (however, actually measured values) ), The temperature dependence characteristic (∂I / ∂T) required for the bias current I is obtained from the equation (10), and is 14.3 [nA / ° C.]. Then, it is possible again by substituting the required values into Equation (17) Equation (16), by solving the simultaneous equations, for calculating a resistance value R ₁ of the resistance ratio n and the resistor R1. That is,

10 [μA] = (1 / R ₁ ) × (kT / q) ln (8) + (Vbe ₂ / nR ₁ )
... (18)
14.3 [nA / ° C.] = (1 / R ₁ ) × {0.18 [mV / ° C.] + (1 / n) × (−2 [mV / ° C.])}
... (19)
By substituting Vbe ₂ = 0.7 V and kT / q = 26 mV (T = 300 K) into the simultaneous equations, the resistance ratio n = 29, the resistance value R ₁ of the resistor R ₁ = 7.8 kΩ (therefore, The resistance values R ₂ and R ₃ of the second and third resistors R2 and R3 can be determined as 29 × 7.8 kΩ).

When the output voltage Vreg of the reference voltage circuit of FIG. 1 is set to 5 V, for example, assuming that the bias current I is 10 μA and the threshold voltage Vth is 1.6 V, these numerical values are substituted into the equation (7). , R ₄ = 180 kΩ. Here, the resistor R4 so irrelevant to temperature dependency of the output voltage Vreg (eliminating), free to set the R _4. That is, by adjusting the resistance value R _4, it is possible to set the output voltage Vreg freely.

  As described above, in the reference voltage circuit shown in FIG. 1, the threshold voltage of the MOS transistors MP4 and MP5 of the reference voltage generation circuit unit 20 is adjusted by adjusting the resistance ratio of the three resistors R1 to R3 in the bias circuit unit 10. By supplying a bias current having a temperature characteristic that cancels the temperature characteristic, a reference voltage having no temperature dependency can be configured with the output voltage Vreg having an appropriate voltage value.

  Since the bias circuit unit 10 may vary in element characteristics, the resistance ratio n is adjusted in advance with a resistor circuit of resistors R1 to R3 in order to reliably output a reference voltage having no temperature dependency. It is preferable to provide an adjustment circuit for this purpose.

  In addition, the reference voltage generation circuit unit 20 may be provided with a circuit for adjusting the resistance value of the resistor R4 in advance to adjust the variation occurring in the threshold voltage Vth of the P-channel MOS transistors MP4 and MP5. .

  The reference voltage generation circuit 20 is provided with two P-channel MOS transistors MP4 and MP5 having the same threshold voltage Vth connected in series. The number of P-channel MOS transistors having the same threshold voltage Vth is as follows. There may be one, or three or more. In this case, the subsequent analysis can be similarly developed only by rewriting the coefficient 2 of the first term on the right side of Expression (7) to 1 or 3 or more.

It is a circuit diagram which shows the structure of the reference voltage circuit by this invention. It is a figure which shows an example of the conventional reference voltage circuit. It is a circuit diagram which shows an example of the operational amplifier (op amp) of the 1st reference voltage generation circuit in the conventional reference voltage circuit. It is a circuit diagram which shows an example of the operational amplifier of the 2nd reference voltage generation circuit in the conventional reference voltage circuit. FIG. 5 is a circuit diagram showing an example of a bias circuit used in the operational amplifiers of FIGS. 3 and 4.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Bias circuit part 20 Reference voltage generation circuit part MP1-MP6 P channel MOS transistor MN1-MN2 N channel MOS transistor QP1-QP3 pnp transistor QN1 npn transistor R1-R4 Resistance I Bias current

Claims (6)

In a reference voltage circuit that generates a reference voltage having no temperature dependence based on a constant current having temperature dependence,
A pair of transistors having different emitter areas, a first resistor connected to the emitter side of one of the transistors, and a second and a third resistor connected in parallel with the pair of transistors, respectively, and positive temperature characteristics A bias circuit section for generating a reference current having
A reference voltage generation circuit unit that generates a reference voltage having a voltage component having a magnitude corresponding to the threshold voltage by passing a constant current corresponding to the reference current generated in the bias circuit unit through a MOS transistor;
A reference voltage circuit comprising:   The reference voltage generation circuit section includes one or more P-channel MOS transistors connected in diodes, and a fourth resistor and the one or more P-channel MOS transistors are connected in series to connect the constant current. The reference voltage circuit according to claim 1, wherein the reference voltage is generated by flowing a current.   3. The reference voltage circuit according to claim 2, wherein the fourth resistor includes adjusting means for adjusting a resistance value thereof according to variation in the threshold voltage.   In the bias circuit section, the resistance values of the second and third resistors are set to be equal, and the resistance ratio between the resistance value and the resistance value of the first resistor is adjusted to thereby adjust the reference voltage. 2. The reference voltage circuit according to claim 1, wherein the temperature dependence is canceled out.   5. The reference voltage circuit according to claim 4, wherein the bias circuit section includes changing means for changing a resistance ratio between the first resistor and the second and third resistors. In a semiconductor integrated circuit device that generates a reference voltage having no temperature dependence based on a constant current having temperature dependence,
It has a pair of transistors having different emitter areas, and a first resistor is connected to the emitter side of one of the transistors, and a second and a third resistor are connected in parallel with each of the transistors, thereby providing a positive temperature characteristic. A bias circuit section for generating a reference current having;
A reference voltage generation circuit unit that generates a reference voltage having a voltage component having a magnitude corresponding to the threshold voltage by passing a constant current corresponding to the reference current generated in the bias circuit unit through a MOS transistor;
A semiconductor integrated circuit device comprising:

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