JP2009198846A - Method of driving plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To stabilize an initialization of a PDP and high-speed writing thereof, to display an image with excellent quality, and to reduce power consumption. <P>SOLUTION: A method of driving a display panel executes, in an initialization period, all-cell initialization for generating initialization discharge for all the discharge cells, or selective initialization for generating initialization discharge only in the discharge cell with a maintenance discharge generated in a previous sub-field (SF). In a maintenance period, at least two maintenance pulses different in rise time are generated. In an SF just before the SF for executing the all-cell initialization, a period for generating consecutively the plurality of maintenance pulses having a prescribed rise time is arranged to include the end of the maintenance period. In the SF just before the SF for executing the selective initialization, a period for generating consecutively the plurality of maintenance pulses having a rise time shorter than a predetermined rise time is arranged to include the end of the maintenance period. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for driving a plasma display panel.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front plate and a back plate arranged to face each other. In the front plate, a plurality of pairs of display electrodes made up of a pair of scan electrodes and sustain electrodes are formed on the front glass substrate in parallel with each other, and a dielectric layer and a protective layer are formed so as to cover the display electrodes. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of partition walls formed in parallel to the data electrodes on each of the dielectric layers. A phosphor layer is formed on the side surface of the partition wall. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode and the data electrode are three-dimensionally crossed and sealed, and a discharge gas is sealed in the internal discharge space. Here, a discharge cell is formed at a portion where the display electrode and the data electrode face each other. In the panel having such a configuration, ultraviolet light is generated by gas discharge in each discharge cell, and the phosphor layers of RGB colors are excited and emitted by this ultraviolet light to perform color display.

  As a method for driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields. In addition, among the subfield methods, a driving method is disclosed in which light emission not related to gradation display is reduced as much as possible to suppress an increase in black luminance and the contrast ratio is improved (see, for example, Patent Document 1).

  The driving method will be briefly described below. Each subfield has an initialization period, an address period, and a sustain period. The initializing period is an all-cell initializing period in which an initializing discharge is performed on all discharge cells that perform image display, or a discharge cell that has undergone a sustain discharge in the immediately preceding subfield. A selective initializing period for performing a selective initializing operation for selectively performing initializing discharge.

  First, during the all-cell initialization period, all discharge cells perform an initializing discharge all at once, erasing the wall charge history for each previous discharge cell, and forming the wall charge necessary for the subsequent address operation. To do. In addition, it has a function of generating priming (priming for discharge = excited particles) for reducing the discharge delay and stably generating the address discharge.

  In the selective initializing period, a weak initializing discharge is generated only in the discharge cells in which the sustain discharge has been performed in the sustain period of the immediately preceding subfield, and the wall charge history is erased and the wall charge necessary for the subsequent address operation is removed. Form. On the other hand, the discharge cells that did not perform the sustain discharge in the immediately preceding subfield are not discharged, and the wall charge state at the end of the initializing period of the immediately preceding subfield is maintained as it is. As described above, the initializing operation in the selective initializing period is a selective initializing operation in which initializing discharge is performed only in the discharge cells in which the sustain discharge has been performed in the immediately preceding subfield.

  In the subsequent address period, a scan pulse is sequentially applied to the scan electrodes, and an address pulse corresponding to an image signal to be displayed is applied to the data electrodes, thereby selectively causing an address discharge between the scan electrodes and the data electrodes. , Selective wall charge formation. In the sustain period, a predetermined number of sustain pulses corresponding to the luminance weight are applied between the scan electrodes and the sustain electrodes, and the discharge cells in which the wall charges are formed by the address discharge are selectively discharged to emit light.

  As described above, in order to display an image correctly, it is important to surely perform selective address discharge in the address period. To that end, it is necessary to reliably perform an initialization operation to prepare for the address operation. Is important.

  However, since the selective initialization operation depends on the wall charges formed in the second half of the sustain period of the previous subfield, the initialization operation is performed when a weak sustain discharge or a sustain discharge with a large variation occurs. Therefore, there is a problem that the address discharge becomes unstable. In a panel with high definition and large screen, the pulse width of the address pulse voltage is shortened, so that a margin for discharge delay and discharge variation is lost, and the address discharge tends to become more unstable.

For this reason, a method has been proposed in which the sustain pulse of the last pulse group in the sustain period is sharply raised. This is because if discharge is generated in a state where the voltage change is steep, the variation in the discharge start voltage is absorbed, and the variation in the timing at which discharge occurs between the discharge cells can be reduced. Further, since the sustain discharge generated in a state where the voltage changes sharply becomes a strong discharge, it not only reduces the variation in the timing at which the discharge occurs, but also has a function of forming sufficient wall charges in the discharge cells.
JP 2000-242224 A

  However, if the rise time of the sustain pulse of the last pulse group in the sustain period is set short as described above and the voltage change rises sharply, the initialization discharge and the address discharge are stabilized, but the power recovery efficiency decreases. Thus, there is a problem that reactive power that does not contribute to discharge increases.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a panel driving method that stabilizes address discharge and reduces power consumption.

  In order to solve the above problems, a plasma display panel driving method according to the present invention is a plasma display panel driving method in which discharge cells are formed at intersections of scan electrodes, sustain electrodes, and data electrodes. It is composed of a plurality of subfields having an initializing period, an address period, and a sustaining period. In the initializing period, all-cell initializing operation for generating initializing discharge for all discharge cells, or in the immediately preceding subfield A selective initializing operation for generating an initializing discharge is performed only in the discharge cells in which the sustaining discharge has occurred, and at least two types of sustaining pulses having different rising times are generated in the sustaining period, and the all-cell initializing operation is performed. The subfield immediately before the subfield to be performed has a predetermined rise time. A period in which a plurality of sustain pulses are continuously generated is arranged so as to include a period at the end of the sustain period, and in a subfield immediately before the subfield in which the selective initialization operation is performed, a rise time shorter than the predetermined rise time The present invention is characterized in that a period in which a plurality of sustain pulses having time are continuously generated is arranged to include a period at the end of the sustain period.

  According to the present invention, by stabilizing the sustain discharge according to the initialization operation, it is possible to stabilize the initialization operation and high-speed writing, display an image with good quality, and reduce power consumption. it can.

  Hereinafter, a method for driving a plasma display panel according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a perspective view showing a main part of a panel used in the embodiment of the present invention. The panel 1 is configured such that a glass front substrate 2 and a back substrate 3 are disposed to face each other and a discharge space is formed therebetween. On the front substrate 2, a plurality of scanning electrodes 4 and sustaining electrodes 5 constituting display electrodes are formed in parallel with each other. A dielectric layer 6 is formed so as to cover the scan electrode 4 and the sustain electrode 5, and a protective layer 7 is formed on the dielectric layer 6. The protective layer 7 is preferably made of a material having a large secondary electron emission coefficient and high sputtering resistance in order to generate a stable discharge. In this embodiment, an MgO (magnesium oxide) thin film is used.

  A plurality of data electrodes 9 covered with a dielectric layer 8 are provided on the back substrate 3, and partition walls 10 are provided on the dielectric layer 8 between the data electrodes 9 in parallel with the data electrodes 9. A phosphor layer 11 is provided on the surface of the dielectric layer 8 and the side surfaces of the partition walls 10. The front substrate 2 and the rear substrate 3 are arranged to face each other in the direction in which the scan electrode 4 and the sustain electrode 5 and the data electrode 9 intersect, and in the discharge space formed between them, for example, neon is used as a discharge gas. A mixed gas of xenon is enclosed. In the present embodiment, in order to improve the light emission efficiency of the panel, the partial pressure of xenon of the discharge gas sealed in the panel is increased to 10%.

  FIG. 2 is an electrode array diagram of the panel according to the embodiment of the present invention. N scan electrodes SCN1 to SCNn (scan electrode 4 in FIG. 1) and n sustain electrodes SUS1 to SUSn (sustain electrode 5 in FIG. 1) are alternately arranged in the row direction, and m data electrodes in the column direction. D1 to Dm (data electrodes 9 in FIG. 1) are arranged. A discharge cell is formed at a portion where a pair of scan electrode SCNi and sustain electrode SUSi (i = 1 to n) and one data electrode Dj (j = 1 to m) intersect, and the discharge cell is in the discharge space. M × n are formed.

  FIG. 3 is a configuration diagram of the plasma display device according to the embodiment of the present invention. The plasma display device includes a panel 1, a data electrode drive circuit 12, a scan electrode drive circuit 13, a sustain electrode drive circuit 14, a timing generation circuit 15, an AD (analog / digital) converter 16, a scan number conversion unit 17, a subfield. A conversion unit 18, an APL (Average Picture Level) detection unit 19, and a power supply circuit (not shown) are provided.

  In FIG. 3, the image signal sig is input to the AD converter 16. The horizontal synchronization signal H and the vertical synchronization signal V are input to the timing generation circuit 15, the AD converter 16, the scanning number conversion unit 17, and the subfield conversion unit 18. The AD converter 16 converts the image signal sig into image data of a digital signal, and outputs the image data to the scanning number conversion unit 17 and the APL detection unit 19. The APL detection unit 19 detects the average luminance level (APL) of the image data. The scanning number conversion unit 17 converts the image data into image data corresponding to the number of pixels of the panel 1 and outputs the image data to the subfield conversion unit 18. The subfield conversion unit 18 divides the image data of each pixel into a plurality of bits corresponding to a plurality of subfields, and outputs the image data for each subfield to the data electrode driving circuit 12. The data electrode drive circuit 12 converts the image data for each subfield into signals corresponding to the data electrodes D1 to Dm, and drives the data electrodes.

  Timing generating circuit 15 generates a timing signal based on horizontal synchronizing signal H and vertical synchronizing signal V, and outputs the timing signal to scan electrode driving circuit 13 and sustain electrode driving circuit 14, respectively. Scan electrode drive circuit 13 supplies a drive waveform to scan electrodes SCN1 to SCNn based on the timing signal, and sustain electrode drive circuit 14 supplies a drive waveform to sustain electrodes SUS1 to SUSn based on the timing signal. Here, the timing generation circuit 15 controls the drive waveform based on the APL output from the APL detection unit 19. Specifically, based on APL, the initialization operation of each subfield constituting one field is determined as either all-cell initialization operation or selective initialization operation, and all-cell initialization within one field is performed. Control the number of actions.

  FIG. 4 is a diagram showing a subfield configuration in the embodiment of the present invention. FIG. 4 shows an outline of the drive waveform of one field in the subfield method, and details of the drive voltage waveform will be described later.

  In this embodiment, one field is composed of 10 subfields (first SF, second SF,..., 10th SF), and each subfield is, for example, (1, 2, 3, 6, 11, 18). , 30, 44, 60, 80). Then, the all-cell initialization operation is performed in the initialization period of the first SF, the fourth SF, and the seventh SF, and the selective initialization operation is performed in the initialization periods of the other subfields. In this way, the all-cell initialization period is arranged in a balanced manner in the subfields within one field, thereby stabilizing discharge by increasing priming due to the all-cell initialization operation. In the sustain period of each subfield, the number of sustain pulses obtained by multiplying the luminance weight of each subfield by a predetermined luminance magnification is applied to each of sustain electrodes SUS1 to SUSn and scan electrodes SCN1 to SCNn.

  The number of subfields and the luminance weight of each subfield are not limited to the above values, and the subfield configuration may be switched based on an image signal or the like.

  FIG. 5 is a drive voltage waveform diagram applied to each electrode of panel 1 in the embodiment of the present invention. FIG. 5 shows driving voltage waveforms of two subfields, that is, a subfield that performs an all-cell initializing operation (hereinafter referred to as “all-cell initializing subfield”) and a subfield that performs a selective initializing operation ( Hereinafter, it is referred to as “selective initialization subfield”), but the driving voltage waveforms in the other subfields are substantially the same.

  First, the first SF, which is an all-cell initialization subfield, will be described.

  In the first half of the initializing period of the first SF, 0 (V) is applied to the data electrodes D1 to Dm and the sustain electrodes SUS1 to SUSn, respectively, and the discharge start voltage for the sustain electrodes SUS1 to SUSn is applied to the scan electrodes SCN1 to SCNn. A ramp waveform voltage (hereinafter referred to as “up-ramp waveform voltage”) that gradually rises from the voltage Vi1 below toward the voltage Vi2 that exceeds the discharge start voltage is applied.

  While the rising ramp waveform voltage rises, weak initializing discharges are continuously generated between scan electrodes SCN1 to SCNn, sustain electrodes SUS1 to SUSn, and data electrodes D1 to Dm. Negative wall voltage is accumulated on scan electrodes SCN1 to SCNn, and positive wall voltage is accumulated on data electrodes D1 to Dm and sustain electrodes SUS1 to SUSn. Here, the wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the latter half of the initialization period, positive voltage Ve1 is applied to sustain electrodes SUS1 to SUSn, 0 (V) is applied to data electrodes D1 to Dm, and scan electrodes SCN1 to SCNn are applied to sustain electrodes SUS1 to SUSn. Then, a ramp waveform voltage (hereinafter referred to as “down-ramp waveform voltage”) that gently falls from a voltage Vi3 that is equal to or lower than the discharge start voltage to a voltage Vi4 that exceeds the discharge start voltage is applied. During this time, weak initializing discharges are continuously generated between scan electrodes SCN1 to SCNn, sustain electrodes SUS1 to SUSn, and data electrodes D1 to Dm. Then, the negative wall voltage above scan electrodes SCN1 to SCNn and the positive wall voltage above sustain electrodes SUS1 to SUSn are weakened, and the positive wall voltage above data electrodes D1 to Dm is adjusted to a value suitable for the write operation. The Thus, the all-cell initializing operation for performing the initializing discharge on all the discharge cells is completed.

  In the selective initialization subfield, as shown in the initialization period of the second SF in FIG. 5, a drive voltage waveform in which the first half of the initialization period is omitted is applied to each electrode. That is, voltage Ve1 is applied to sustain electrodes SUS1 to SUSn, 0 (V) is applied to data electrodes D1 to Dm, and a ramp waveform voltage that gradually decreases from voltage Vi3 ′ to voltage Vi4 is applied to scan electrodes SCN1 to SCNn. Apply. As a result, a weak initializing discharge is generated in the discharge cell that has generated the sustain discharge in the sustain period of the previous subfield, and the wall voltage on the scan electrode SCNi and the sustain electrode SUSi is weakened. Further, in a discharge cell in which a sufficient positive wall voltage is accumulated on the data electrode Dk (k = 1 to m) by the last sustain discharge, an excessive portion of the wall voltage is discharged, and the wall voltage suitable for the address operation is obtained. Adjusted to On the other hand, the discharge cells that did not cause the sustain discharge in the previous subfield are not discharged, and the wall charges at the end of the initialization period of the previous subfield are maintained as they are. Thus, the initializing operation in which the first half is omitted is a selective initializing operation in which initializing discharge is performed on the discharge cells in which the sustaining operation has been performed in the sustain period of the immediately preceding subfield.

  In the subsequent address period, voltage Ve2 is applied to sustain electrodes SUS1 to SUSn, and voltage Vc is applied to scan electrodes SCN1 to SCNn.

  Then, a negative scan pulse voltage Va is applied to the scan electrode SCN1 in the first row, and the data electrode Dk (k = 1 to m) of the discharge cell that should emit light in the first row among the data electrodes D1 to Dm is positive. The write pulse voltage Vd is applied. At this time, the voltage difference at the intersection between the data electrode Dk and the scan electrode SCN1 is the difference between the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SCN1 due to the difference in externally applied voltage (Vd−Va). It becomes the sum and exceeds the discharge start voltage. As a result, a discharge is generated between data electrode Dk and scan electrode SCN1. Further, since voltage Ve2 is applied to sustain electrodes SUS1 to SUSn, the voltage difference between sustain electrode SUS1 and scan electrode SCN1 is the difference between externally applied voltages (Ve2−Va) on sustain electrode SUS1. The difference between the wall voltage and the wall voltage on scan electrode SCN1 is added. At this time, by setting the voltage Ve2 to a voltage value that is slightly lower than the discharge start voltage, the sustain electrode SUS1 and the scan electrode SCN1 are not easily discharged but are likely to be discharged. be able to. As a result, a discharge is generated between sustain electrode SUS1 and scan electrode SCN1 in a region intersecting data electrode Dk, triggered by a discharge generated between data electrode Dk and scan electrode SCN1. Thus, an address discharge occurs in the discharge cell to emit light, a positive wall voltage is accumulated on the scan electrode SCN1, a negative wall voltage is accumulated on the sustain electrode SUS1, and a negative wall voltage is also accumulated on the data electrode Dk. Accumulated.

  In this manner, an address operation is performed in which an address discharge is caused in the discharge cells to be lit in the first row and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of the data electrodes D1 to Dm to which the address pulse voltage Vd is not applied and the scan electrode SCN1 does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, first, positive sustain pulse voltage Vs is applied to scan electrodes SCN1 to SCNn, and a ground potential serving as a base potential, that is, 0 (V) is applied to sustain electrodes SUS1 to SUSn. Then, in the discharge cell in which the address discharge has occurred, the voltage difference between scan electrode SCNi and sustain electrode SUSi is the difference between the wall voltage on scan electrode SCNi and the wall voltage on sustain electrode SUSi added to sustain pulse voltage Vs. Exceeding the discharge start voltage.

  Then, a sustain discharge occurs between scan electrode SCNi and sustain electrode SUSi, and phosphor layer 11 emits light by the ultraviolet rays generated at this time. Negative wall voltage is accumulated on scan electrode SCNi, and positive wall voltage is accumulated on sustain electrode SUSi. Further, a positive wall voltage is accumulated on the data electrode Dk. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

  Subsequently, 0 (V) as a base potential is applied to scan electrodes SCN1 to SCNn, and sustain pulse voltage Vs is applied to sustain electrodes SUS1 to SUSn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage difference between the sustain electrode SUSi and the scan electrode SCNi exceeds the discharge start voltage, so that the sustain discharge occurs again between the sustain electrode SUSi and the scan electrode SCNi. Negative wall voltage is accumulated on SUSi, and positive wall voltage is accumulated on scan electrode SCNi. Thereafter, similarly, sustain electrodes of the number obtained by multiplying the luminance weight by the luminance magnification are applied alternately to scan electrodes SCN1 to SCNn and sustain electrodes SUS1 to SUSn, and the scan electrodes SCN1 to SCNn and sustain electrodes SUS1 to SUSn are interposed between the electrodes. By applying the potential difference, the sustain discharge is continuously generated in the discharge cells that have caused the address discharge in the address period.

  At the end of the sustain period, the voltage Ve1 for generating the last sustain discharge is applied to the scan electrodes SCN1 to SCNn and the voltage Ve1 for weakening the discharge after a predetermined time (t1) is applied to the sustain electrodes SUS1 to SUSn. Is applied to the scan electrodes SCN1 to SCNn and the sustain electrodes SUS1 to SUSn to give a so-called narrow pulse voltage difference, leaving the positive wall voltage on the data electrode Dk while leaving the scan electrode SCNi. And part or all of the wall voltage on the sustain electrode SUSi is erased. Specifically, after sustain electrodes SUS1 to SUSn are once returned to 0 (V), sustain pulse voltage Vs is applied to scan electrodes SCN1 to SCNn. Then, a sustain discharge occurs between sustain electrode SUSi and scan electrode SCNi of the discharge cell in which the sustain discharge has occurred. The voltage Ve1 is applied to the sustain electrodes SUS1 to SUSn before the discharge converges, that is, while charged particles generated by the discharge remain sufficiently in the discharge space. As a result, the voltage difference between sustain electrode SUSi and scan electrode SCNi is weakened to the extent of (Vs−Ve1). Then, the wall voltage between scan electrodes SCN1 to SCNn and sustain electrodes SUS1 to SUSn is the difference between the voltages applied to the respective electrodes (Vs−Ve1) while leaving the positive wall charges on data electrode Dk. It is weakened to the extent of. Hereinafter, this discharge is referred to as “erase discharge”, and the sustain pulse generated at the end of the sustain period in order to generate the erase discharge is referred to as “erase pulse”.

  Subsequent subfield operations are substantially the same as those described above except for the number of sustain pulses in the sustain period, and thus description thereof is omitted. The above is the outline of the drive voltage waveform applied to each electrode of panel 1 in the present embodiment.

  In the present embodiment, two types of sustain pulses having different rising times are switched and generated in the sustain period excluding the last sustain pulse (erase pulse) of the sustain period. As an example, a reference sustain pulse (first sustain pulse) having a predetermined rise time and a sustain pulse (second sustain pulse) having a shorter rise time than the first sustain pulse are used. The rise of the second sustain pulse is steeper than that of the first sustain pulse. Then, at the end of the sustain period excluding the erase pulse, the subfield immediately before the selective initialization operation is performed (in the present embodiment, the first SF, the second SF, the fourth SF, the fifth SF, the seventh SF, the eighth SF, and the ninth SF). Then, the second sustain pulse having a sharp rise is continuously generated a plurality of times, and in the subfield immediately before the all-cell initialization operation is performed (in the present embodiment, the third SF, the sixth SF, and the tenth SF), The first sustain pulse, which rises more slowly than the second sustain pulse, is continuously generated a plurality of times. As described above, in this embodiment, in the subfield immediately before the subfield in which the all-cell initializing operation is performed, the period in which a plurality of first sustain pulses are continuously generated includes the period of the end of the sustain period. In the subfield immediately before the subfield in which the selective initializing operation is performed, a period in which a plurality of second sustain pulses are generated continuously is included so as to include a period at the end of the sustain period. .

  With such a configuration, by stabilizing the sustain discharge according to the initialization operation, it is possible to stabilize the initialization operation and high-speed writing, display an image with good quality, and increase the power recovery efficiency and consumption. Power is being reduced.

  Since the above-described erase pulse is a pulse for generating an erase discharge, it may be set to an optimum pulse waveform for generating an erase discharge in accordance with the characteristics of the panel, the specifications of the plasma display device, and the like. In the present embodiment, the slope of the erasing pulse is not limited in any way. For example, it may be a pulse whose rising edge is steeper than that of the second sustain pulse, or is equal to or slower than the second sustain pulse. It may be a pulse with a very high rise.

  FIG. 6 is a waveform diagram showing the first sustain pulse and the second sustain pulse in the embodiment of the present invention. In the present embodiment, the rising time of the first sustain pulse as a reference is about 550 nsec, and the rising time of the second sustain pulse is about 300 nsec. In this way, the second sustain pulse has a steeper rise than the first sustain pulse. Further, the fall time is equal to each other between the first sustain pulse and the second sustain pulse, and both are about 700 nsec. The rise time is the time from 0 (V) as GND to the sustain pulse voltage Vs, and the fall time is the time from the sustain pulse voltage Vs to 0 (V) as GND.

  Here, each of scan electrode driving circuit 13 and sustain electrode driving circuit 14 includes a power recovery unit configured by a switching element, an inductor, a power recovery capacitor, and the like, a switching element for clamping to sustain pulse voltage Vs, and GND And a sustaining pulse is applied to scan electrodes SCN1 to SCNn and sustaining electrodes SUS1 to SUSn by the power recovery unit and the clamping unit. The rise and fall of the sustain pulse are performed using LC resonance between the inductor of the power recovery unit and the interelectrode capacitance of panel 1. Scan electrodes SCN1 to SCNn and sustain electrodes SUS1 to SUSn are fixed at 0 (V) or sustain pulse voltage Vs by the clamp portion. The second sustain pulse has a shorter rise time than the first sustain pulse and is forcibly fixed to the sustain pulse voltage Vs in the middle of power recovery, resulting in poor power recovery efficiency.

  FIG. 7 is a schematic diagram showing a state in which the second sustain pulse corresponding to the initialization operation subsequent to the end of the sustain period in the embodiment of the present invention is continuously generated. FIG. 7A shows a state in which ten steep second sustain pulses are continuously generated in the last sustain pulse group in the subfield immediately before the selective initialization subfield. FIG. 7B shows a state in which the first sustain pulse whose rise is more gradual than the second sustain pulse is continuously generated in the last sustain pulse group in the subfield immediately before the all-cell initializing subfield. ing. Here, the reason why the steep second sustain pulse is continuously generated only in the final sustain pulse group before the selective initialization operation will be described.

  In order to display an image correctly, it is important to reliably perform selective address discharge in the address period, but to that end, it is important to perform initialization operation that is prepared for the address operation. .

  In the all-cell initializing period, initializing discharge is simultaneously performed in all the discharge cells to erase the wall charge history of individual previous discharge cells and to form wall charges necessary for the subsequent address operation. The sustain discharge in the immediately preceding subfield has little effect on the initialization operation. Therefore, it is not necessary to accumulate charges in the sustain discharge in the subfields (third SF, sixth SF, and tenth SF in this embodiment) immediately before the all-cell initialization period, and it is only necessary to generate the sustain discharge. Therefore, since there is a range of selection with respect to the sustain pulse waveform, in this embodiment, the first sustain pulse that rises slowly is selected to increase power recovery efficiency and reduce power consumption.

  On the other hand, the selective initializing operation depends on the wall charges formed in the second half of the sustain period of the immediately preceding subfield, so that the initializing operation is performed when a weak sustain discharge or a sustain discharge with a large variation occurs. Becomes unstable, and as a result, the address discharge tends to become unstable. Further, in a panel with a high definition and a large screen, the pulse width of the address pulse voltage is shortened, so that a margin for discharge delay and discharge variation is lost, and the address discharge tends to become more unstable.

  For this reason, in this embodiment, the sustain period of the subfield immediately before the selective initialization operation (in this embodiment, the first SF, the second SF, the fourth SF, the fifth SF, the seventh SF, the eighth SF, and the ninth SF) is maintained. In the last pulse group, 10 steep second sustain pulses are continuously generated.

  This is because if discharge is generated in a state where the voltage change is steep, the variation in the discharge start voltage is absorbed, and the variation in the timing at which discharge occurs between the discharge cells can be reduced. Furthermore, since the sustain discharge that occurs when the voltage changes sharply becomes a strong discharge, it not only reduces the variation in the timing at which the discharge occurs, but also forms sufficient wall charges in the discharge cell to selectively initialize the operation. Therefore, the address discharge can be stabilized.

  In the present embodiment, the reason why the ten second sustain pulses are continued is that a strong wall discharge cannot be accumulated by changing the intensity of the sustain discharge once, and a strong sustain discharge is continuously generated. Because it is necessary.

  As described above, according to the present embodiment, at the end of the sustain period excluding the erase pulse, in the subfield immediately before performing the selective initialization operation, the second sustain pulse having a sharp rise is continuously applied a plurality of times. Thus, the selective initialization operation and the subsequent write operation are surely performed, and at the end of the subfield immediately before the all-cell initialization operation is performed, the subfield immediately before the selective initialization operation is performed. By generating the first sustain pulse, which rises more slowly than the rise of the sustain pulse generated at the end of the sustain period, a plurality of times, the power recovery efficiency is increased and the power consumption is reduced.

  With such a configuration, by stabilizing the sustain discharge according to the initialization operation, it is possible to stabilize the initialization operation and high-speed writing, display an image with good quality, and reduce power consumption. It becomes possible.

  Furthermore, in the embodiment of the present invention, the rise time of the sustain last pulse group of the subfield before all-cell initialization is set to be slower than the second sustain pulse, for example, about 700 ns, depending on the quality of the panel. It may be set to the third sustain pulse of time. With such a configuration, the power recovery efficiency can be further increased and the power consumption can be reduced.

  Note that the specific numerical values such as the sustain pulse rising period used in the present embodiment are merely examples, and are optimal values as appropriate in accordance with the panel characteristics and the specifications of the plasma display device. It is desirable to set to.

  In this embodiment, the configuration in which the number of continuous application of the second sustain pulse is 10 has been described. However, the number of continuous application of the second sustain pulse is not limited to this value. What is necessary is just to set optimally according to the characteristic of this, the specification of a plasma display apparatus, etc.

  The other specific numerical values used in this embodiment are merely examples, and should be set to optimal values as appropriate according to the panel characteristics, the specifications of the plasma display device, and the like. Is desirable.

  According to the present invention, by stabilizing the sustain discharge in accordance with the initialization operation, the initialization operation and high-speed writing can be stabilized, an image can be displayed with good quality, and the power consumption can be reduced. The panel can be driven and is useful as an image display device using a plasma display panel.

The perspective view which shows the principal part of the plasma display panel in one embodiment of this invention Electrode arrangement of the panel Configuration diagram of plasma display device using the panel The figure which shows the outline of the drive waveform of 1 field in one embodiment of this invention Drive voltage waveform diagram applied to each electrode of panel in one embodiment of the present invention Waveform diagram showing an outline of the first sustain pulse and the second sustain pulse in one embodiment of the present invention (A), (b) is schematic which shows a mode that the 2nd sustain pulse according to the initialization operation | movement which follows at the end of the sustain period in one embodiment of this invention is generated continuously.

Explanation of symbols

1 Panel 2 Front substrate 3 Rear substrate 4 Scan electrode 5 Sustain electrode 9 Data electrode

Claims (1)

In a plasma display panel driving method in which discharge cells are formed at intersections of scan electrodes, sustain electrodes, and data electrodes, one field period is composed of a plurality of subfields having an initialization period, an address period, and a sustain period. In the initializing period, all-cell initializing operation for generating initializing discharge for all discharge cells, or selective initializing for generating initializing discharge only in the discharge cells in which the sustain discharge has occurred in the immediately preceding subfield In the sustain period, at least two types of sustain pulses having different rising times are generated, and a sustain pulse having a predetermined rising time is generated in a subfield immediately before the subfield in which the all-cell initializing operation is performed. The period for generating a plurality of consecutive times includes the period at the end of the maintenance period. In the subfield immediately before the subfield in which the selective initialization operation is performed, a period in which a plurality of sustain pulses having a rise time shorter than the predetermined rise time is continuously generated is a period at the end of the sustain period A method for driving a plasma display panel, comprising:

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