JP2009177036A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten the peeling time of a plating resist film for columnar electrode formation in a method for manufacturing a semiconductor device called CSP. <P>SOLUTION: An exposure mask 26 for columnar electrode formation is configured of a light shielding section 26a as a section corresponding to a columnar electrode formation region, a transparent section 26b as the periphery of the light shielding section 26a, and a semi-transparent section 26c as the other region. When exposure is carried out, the region corresponding to the light shielding section 26a in the plating resist film 25 for columnar electrode formation is turned to be a non-exposure section, the periphery is turned to be an exposure section, and the other region is turned to be a semi-exposure section. When development is carried out, the section corresponding to the columnar electrode formation region as the non-exposure section in the plating resist film 25 for columnar electrode formation is formed with an opening, and the thickness of the region as the semi-exposure section other than the peripheral section of the opening is turned to be almost the half of the thickness of the peripheral section of the opening. Thus, it is possible to shorten the peeling time of the plating resist film 25 for columnar electrode formation. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  Some conventional semiconductor devices called CSP (chip size package) have columnar electrodes formed on the upper surface of connection pad portions of wiring formed on a semiconductor substrate (see, for example, Patent Document 1).

JP 2004-349611 A

  In the above conventional semiconductor device manufacturing method, first, the upper metal layer for wiring is connected to the upper surface of the lower metal layer including the upper metal layer for wiring formed on the lower metal layer formed on the entire surface of the semiconductor substrate. A columnar electrode forming plating resist film having an opening in a portion corresponding to the pad portion, that is, the columnar electrode formation region is formed. Next, the columnar electrode is formed on the upper surface of the connection pad portion of the upper metal layer for wiring in the opening of the plating resist film for columnar electrode formation by performing electrolytic plating using the base metal layer as a plating current path.

  Next, the columnar electrode forming plating resist film is stripped using a resist stripping solution. Next, using the upper metal layer for wiring as a mask, the underlying metal layer in the region other than the region under the upper metal layer for wiring is removed by etching. In this state, a wiring having a two-layer structure is formed by the upper metal layer for wiring and the underlying metal layer remaining therebelow.

  By the way, when forming an opening in the columnar electrode forming plating resist film in the above-described conventional semiconductor device manufacturing method, first, an unexposed negative type plating resist is formed on the upper surface of the base metal layer including the upper metal layer for wiring. Since a film (dry film resist) is formed and exposure is performed using a columnar electrode forming exposure mask having a circular light-shielding portion in a portion corresponding to the columnar electrode formation region (for example, Patent Document 1 No. 17). (See paragraphs 20 and 20), and the thickness in the region other than the opening of the plating resist film for columnar electrode formation after development is substantially uniform.

  On the other hand, when the height of the columnar electrode is, for example, about 100 μm, the thickness of the columnar electrode forming plating resist film is relatively thick. If the plating resist film for forming a columnar electrode having a substantially uniform thickness is peeled off using a resist stripping solution, the stripping time becomes relatively long, and the resist stripping solution deteriorates relatively quickly. There was a problem.

  Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device that can shorten the peeling time of the columnar electrode forming plating resist film and can prevent the resist stripping solution from being deteriorated. .

According to the first aspect of the present invention, the connection pad of the upper metal layer for wiring is formed on the lower metal layer including the upper metal layer for wiring formed on the lower metal layer formed on the entire surface of the semiconductor substrate. Forming a columnar electrode forming plating resist film having an opening in a corresponding portion and having a thickness in a region other than the periphery of the opening made thinner than the thickness of the periphery of the opening; Forming a columnar electrode on the connection pad of the upper metal layer for wiring within the opening of the plating resist film for columnar electrode formation by performing electrolytic plating using the base metal layer as a plating current path; and A step of stripping the columnar electrode forming plating resist film using a resist stripping solution; and a step of removing the base metal layer in a region other than under the upper metal layer for wiring. .
According to a second aspect of the present invention, in the first aspect of the present invention, the step of forming the columnar electrode forming plating resist film is a non-exposed negative on the base metal layer including the upper metal layer for wiring. Forming a columnar electrode forming plating resist film made of a dry film resist of a mold, and a region corresponding to the connection pad of the wiring upper metal layer as a light shielding portion, and a peripheral portion of the light shielding portion as a transmission portion And exposing the unexposed columnar electrode forming plating resist film using a columnar electrode forming exposure mask in which the other region is a semi-transmissive portion, and developing the columnar electrode forming exposure by performing development. An opening is formed in the columnar electrode forming plating resist film in a portion corresponding to the light shielding portion of the mask, and the portion in front of the portion corresponding to the semi-transmissive portion of the columnar electrode forming exposure mask is formed. A step of reducing the thickness of the columnar electrode forming the plating resist film and is characterized in that it comprises a.
According to a third aspect of the present invention, in the first aspect of the present invention, the step of forming the columnar electrode forming plating resist film may include an unexposed positive electrode on the base metal layer including the upper metal layer for wiring. A step of forming a columnar electrode forming plating resist film made of a resist of a mold, and a region corresponding to the connection pad of the upper metal layer for wiring as a transmissive portion, and a periphery of the transmissive portion as a light shielding portion; A step of exposing the unexposed columnar electrode forming plating resist film using a columnar electrode forming exposure mask having a semi-transparent portion as a region and a development to perform transmission of the columnar electrode forming exposure mask. Forming an opening in the columnar electrode forming plating resist film in a portion corresponding to the portion, and forming the columnar electrode in a portion corresponding to the semi-transmissive portion of the exposure mask for columnar electrode formation A step of reducing the thickness of the Kkirejisuto film and is characterized in that it comprises.
According to a fourth aspect of the present invention, in the second aspect of the present invention, the diameter of the peripheral portion of the opening of the columnar electrode forming plating resist film is 50 to 100 μm larger than the diameter of the opening. It is characterized by this.
According to a fifth aspect of the present invention, in the second aspect of the present invention, the width of the peripheral portion of the opening of the columnar electrode forming plating resist film is set to 20 to 40% of the distance between the openings. It is a feature.
The invention according to claim 6 is the invention according to claim 2, wherein the transmission amount of the semi-transmissive portion of the columnar electrode forming exposure mask is 40 to 60% of the transmission amount of the transmissive portion. To do.
The invention according to claim 7 is the invention according to claim 2, further comprising a step of forming a sealing film around the columnar electrode.
The invention according to claim 8 is the invention according to claim 7, further comprising a step of forming a solder ball on the columnar electrode.

  According to the present invention, the base metal layer including the wiring upper metal layer has the opening in the portion corresponding to the connection pad of the wiring upper metal layer, and in the region other than the peripheral portion of the opening. Since the columnar electrode forming plating resist film having a thickness smaller than the thickness of the peripheral portion of the opening is formed, the volume of the columnar electrode forming plating resist film is reduced, and the columnar electrode forming plating is performed. The surface area of the resist film is increased, whereby the peeling time of the columnar electrode forming plating resist film can be shortened, and the resist stripping solution can be made difficult to deteriorate.

  FIG. 1 is a sectional view showing an example of a semiconductor device manufactured by the manufacturing method of the present invention. This semiconductor device is called a CSP and includes a silicon substrate (semiconductor substrate) 1. An integrated circuit (not shown) is provided on the upper surface of the silicon substrate 1, and a plurality of connection pads 2 made of aluminum-based metal or the like are provided on the periphery of the upper surface connected to the integrated circuit.

  An insulating film 3 made of silicon oxide or the like is provided on the upper surface of the silicon substrate 1 excluding the central portion of the connection pad 2, and the central portion of the connection pad 2 is exposed through an opening 4 provided in the insulating film 3. Yes. A protective film 5 made of polyimide resin or the like is provided on the upper surface of the insulating film 3. An opening 6 is provided in the protective film 5 at a portion corresponding to the opening 4 of the insulating film 3.

  A wiring 7 is provided on the upper surface of the protective film 5. The wiring 7 has a two-layer structure of a base metal layer 8 made of copper or the like provided on the upper surface of the protective film 5 and an upper metal layer 9 made of copper provided on the upper surface of the base metal layer 8. One end of the wiring 7 is connected to the connection pad 2 through the openings 4 and 6 of the insulating film 3 and the protective film 5.

  A columnar electrode 10 made of copper is provided on the upper surface of the connection pad portion of the wiring 7. A sealing film 11 made of an epoxy resin or the like is provided on the upper surface of the protective film 5 including the wiring 7 so that the upper surface thereof is flush with the upper surface of the columnar electrode 10. A solder ball 12 is provided on the upper surface of the columnar electrode 10.

  Next, an embodiment of a method for manufacturing this semiconductor device will be described. First, as shown in FIG. 2, the upper surface of a silicon substrate in a wafer state (hereinafter referred to as a semiconductor wafer 21) is formed of a connection pad 2 made of aluminum metal, an insulating film 3 made of silicon oxide, and a polyimide resin. The protective film 5 is formed, and the connection pad 2 is exposed through the openings 4 and 6 formed in the insulating film 3 and the protective film 5.

  In this case, an integrated circuit (not shown) having a predetermined function is formed in a region where each semiconductor device is formed on the upper surface of the semiconductor wafer 21, and the connection pads 2 are electrically connected to the integrated circuits formed in the corresponding portions. Connected. In FIG. 2, an area indicated by reference numeral 22 is an area corresponding to dicing street.

  Next, as shown in FIG. 3, a base metal layer 8 is formed on the entire upper surface of the protective film 5 including the upper surface of the connection pad 2 exposed through the openings 4 and 6 of the insulating film 3 and the protective film 5. . In this case, the base metal layer 8 may be only a copper layer formed by electroless plating, or may be only a copper layer formed by sputtering, and a thin film such as titanium formed by sputtering. A copper layer may be formed on the layer by sputtering.

  Next, a positive type liquid resist is applied to the upper surface of the base metal layer 8 by a spin coating method or the like to form an unexposed wiring forming plating resist film 23. Next, a wiring forming exposure mask 24 is prepared. In this case, the wiring forming exposure mask 24 is configured such that a region corresponding to the upper metal layer 9 shown in FIG. 1 is a transmissive portion 24a and the other region is a light shielding portion 24b. Specifically, as an example, the transmission portion 24a is made of only a glass plate, and the light shielding portion 24b is made of a chrome film provided on the upper surface of the glass plate in a solid shape.

  Next, a wiring forming exposure mask 24 is positioned and arranged above the unexposed wiring forming plating resist film 23, and exposure is performed by irradiating ultraviolet rays from above the wiring forming exposure mask 24. Then, in the wiring forming plating resist film 23, a region corresponding to the transmission portion 24a of the wiring forming exposure mask 24 becomes an exposed portion, and the other region becomes a non-exposed portion.

  Next, as shown in FIG. 4, when development is performed, an opening 23a is formed in a portion of the wiring forming plating resist film 23 corresponding to the upper metal layer 9 formation region that is the exposed portion. In this case, since the wiring forming plating resist film 23 is a positive type, the exposed portion is dissolved and the non-exposed portion remains.

  Next, as shown in FIG. 5, by performing copper electroplating using the base metal layer 8 as a plating current path, the upper surface of the base metal layer 8 in the opening 23a of the wiring formation plating resist film 23 is formed. A metal layer 9 is formed. Next, the plating resist film 23 for wiring formation is stripped using a resist stripping solution.

  Next, as shown in FIG. 6, a negative dry film resist is laminated on the upper surface of the base metal layer 8 including the upper metal layer 9 to form an unexposed columnar electrode forming plating resist film 25. Next, a columnar electrode forming exposure mask 26 is prepared. In this case, in the columnar electrode forming exposure mask 26, a region corresponding to the connection pad portion (columnar electrode 10 formation region) of the upper metal layer 9 is a circular light shielding portion 26a, and the periphery of the light shielding portion 26a is a ring shape. The transmission part 26b is used, and the other area is a semi-transmission part 26c.

  Specifically, as an example, the light-shielding portion 26a is made of a glass plate having a solid chrome film on the top surface of the glass plate, the transmission portion 26b is made only of a glass plate, and the semi-transmission portion 26c is made on the top surface of the glass plate. The chromium film is made of a mesh or dot. Here, as an example, the transmission amount of the semi-transmission portion 26c is 40 to 60%, for example, 50% of the transmission amount of the transmission portion 26b. The diameter of the transmission part 26b including the light shielding part 26a on the inside is 50 to 100 μm larger than the diameter of the light shielding part 26a. The width of the ring-shaped transmission portion 26b around the light shielding portion 26a corresponding to the columnar electrode 10 formation region is 20 to 40% of the distance between the light shielding portions 26b corresponding to the columnar electrode 10 formation region.

  Next, the columnar electrode forming exposure mask 26 is positioned and arranged above the unexposed columnar electrode forming plating resist film 25, and exposure is performed by irradiating ultraviolet rays from above the columnar electrode forming exposure mask 26. Then, in the columnar electrode forming plating resist film 25, the region corresponding to the light shielding portion 26a of the columnar electrode forming exposure mask 26 becomes a circular non-exposed portion, and the periphery thereof becomes a ring-shaped exposed portion. The area becomes a half-exposure part.

  Next, as shown in FIG. 7, when development is performed, a portion of the columnar electrode forming plating resist film 25 corresponding to the connection pad portion (columnar electrode 10 formation region) of the upper metal layer 9 which is a non-exposed portion. A circular opening 25a is formed in the region, and the thickness of the region other than the ring-shaped peripheral portion 25b around the opening 25a, which is a half-exposure portion, is approximately half the thickness of the peripheral portion 25b of the opening 25a. It becomes thin with the degree. In this state, the diameter of the peripheral portion 25b including the opening 25a inside is 50 to 100 μm larger than the diameter of the opening 25a. The width of the ring-shaped peripheral portion 25b around the opening 25a corresponding to the columnar electrode 10 formation region is 20 to 40% of the distance between the openings 25a.

  Next, as shown in FIG. 8, when copper is electroplated using the base metal layer 8 as a plating current path, the connection pad portion of the upper metal layer 9 in the opening 25a of the columnar electrode forming plating resist film 25 is obtained. A columnar electrode 10 is formed on the upper surface. Next, the columnar electrode forming plating resist film 25 is stripped using a resist stripping solution.

  In this case, in the columnar electrode forming plating resist film 25, the thickness in the region other than the peripheral portion 25b of the opening 25a is as thin as about half of the thickness of the peripheral portion 25b of the opening 25a. The volume of the columnar electrode forming plating resist film 25 is reduced, and the surface area of the columnar electrode forming plating resist film 25 is increased, whereby the peeling time of the columnar electrode forming plating resist film 25 can be shortened. Further, the resist stripping solution can be made difficult to deteriorate.

  By the way, the thickness of the columnar electrode forming plating resist film 25 in the region other than the peripheral portion 25b of the opening portion 25a is set to be as thin as about half of the thickness of the peripheral portion 25b of the opening portion 25a. When developing the columnar electrode forming plating resist film 25, an increase in development time and early deterioration of the developer are expected. However, since the development time is faster than the stripping time, and the developer is less expensive than the resist stripper, the overall throughput can be improved and the cost can be reduced.

  Now, after the columnar electrode forming plating resist film 25 is peeled off, when the base metal layer 8 is removed by etching using the upper metal layer 9 as a mask in a region other than under the upper metal layer 9, as shown in FIG. The underlying metal layer 8 remains only under the upper metal layer 9. In this state, the upper metal layer 9 and the underlying metal layer 8 remaining below the upper metal layer 9 form a two-layer wiring 7.

  Next, as shown in FIG. 10, the sealing film 11 made of epoxy resin or the like is formed on the upper surface of the protective film 5 including the wiring 7 and the columnar electrode 10 by a spin coating method or the like so that the thickness thereof is higher than the columnar electrode 10. It is formed to be a little thicker. Therefore, in this state, the upper surface of the columnar electrode 10 is covered with the sealing film 11.

  Next, the upper surface side of the sealing film 11 is appropriately polished so that the upper surface of the columnar electrode 10 is exposed and the sealing film 11 including the exposed upper surface of the columnar electrode 10 is exposed as shown in FIG. Flatten the top surface. Next, as shown in FIG. 12, solder balls 12 are formed on the upper surface of the columnar electrode 10. Next, as shown in FIG. 13, when the sealing film 11, the protective film 5, the insulating film 3, and the semiconductor wafer 21 are cut along the dicing street 22, a plurality of semiconductor devices shown in FIG. 1 are obtained.

  In this embodiment, the columnar electrode forming plating resist film is formed using a dry film resist, but a wet sensitive material may be used. Further, the columnar electrode forming exposure mask 26 is exposed with the region corresponding to the connection pad portion (columnar electrode 10 forming region) of the upper metal layer 9 as a circular transmissive portion and the periphery of the transmissive portion as a ring-shaped light shielding portion. Alternatively, the non-exposed portion may be reversed and a positive photoresist may be used instead of a negative photoresist.

Sectional drawing of an example of the semiconductor device manufactured by the manufacturing method of this invention. Sectional drawing of what was initially prepared in one Embodiment of the manufacturing method of the semiconductor device shown in FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. FIG. 9 is a cross-sectional view of the process following FIG. 8. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Connection pad 3 Insulating film 5 Protective film 7 Wiring 8 Base metal layer 9 Upper metal layer 10 Columnar electrode 11 Sealing film 12 Solder ball 21 Semiconductor wafer 22 Dicing street 23 Wiring forming resist resist 24 Wiring forming exposure Mask 25 Plating resist film for columnar electrode formation 26 Exposure mask for columnar electrode formation

Claims (8)

On the base metal layer including the upper metal layer for wiring formed on the base metal layer formed on the entire surface of the semiconductor substrate, an opening is provided in a portion corresponding to the connection pad of the upper metal layer for wiring. And forming a columnar electrode forming plating resist film in which the thickness in the region other than the periphery of the opening is made thinner than the thickness of the periphery of the opening;
Forming a columnar electrode on the connection pad of the upper metal layer for wiring in the opening of the plating resist film for columnar electrode formation by performing electrolytic plating using the base metal layer as a plating current path;
Peeling the columnar electrode forming plating resist film using a resist stripping solution;
Removing the base metal layer in a region other than under the upper metal layer for wiring;
A method for manufacturing a semiconductor device, comprising: In the invention of claim 1,
The step of forming the columnar electrode forming plating resist film includes:
Forming a columnar electrode forming plating resist film made of an unexposed negative-type dry film resist on the base metal layer including the upper metal layer for wiring; and
Using a columnar electrode forming exposure mask in which the region corresponding to the connection pad of the upper metal layer for wiring is a light shielding portion, the periphery of the light shielding portion is a transmission portion, and the other region is a semi-transmission portion Exposing the unexposed columnar electrode forming plating resist film;
By performing development, an opening is formed in the columnar electrode forming plating resist film in a portion corresponding to the light shielding portion of the columnar electrode forming exposure mask, and the semitransparent portion of the columnar electrode forming exposure mask is formed. Reducing the thickness of the columnar electrode forming plating resist film in the corresponding part;
A method for manufacturing a semiconductor device, comprising: In the invention of claim 1,
The step of forming the columnar electrode forming plating resist film includes:
Forming a columnar electrode forming plating resist film made of an unexposed positive resist on the underlying metal layer including the upper metal layer for wiring;
Using a columnar electrode forming exposure mask in which the region corresponding to the connection pad of the upper metal layer for wiring is a transmissive portion, the periphery of the transmissive portion is a light-shielding portion, and the other region is a semi-transmissive portion Exposing the unexposed columnar electrode forming plating resist film;
By performing development, an opening is formed in the columnar electrode forming plating resist film in a portion corresponding to the transmissive portion of the columnar electrode forming exposure mask, and the semitransparent portion of the columnar electrode forming exposure mask is formed. Reducing the thickness of the columnar electrode forming plating resist film in the corresponding part;
A method for manufacturing a semiconductor device, comprising:   3. The semiconductor device according to claim 2, wherein the diameter of the peripheral portion of the opening of the columnar electrode forming plating resist film is 50 to 100 μm larger than the diameter of the opening. Method.   3. The method of manufacturing a semiconductor device according to claim 2, wherein the width of the periphery of the opening of the columnar electrode forming plating resist film is 20 to 40% of the distance between the openings.   3. The method of manufacturing a semiconductor device according to claim 2, wherein a transmission amount of the semi-transmissive portion of the columnar electrode forming exposure mask is 40 to 60% of a transmission amount of the transmissive portion.   3. The method of manufacturing a semiconductor device according to claim 2, further comprising a step of forming a sealing film around the columnar electrode.   8. The method of manufacturing a semiconductor device according to claim 7, further comprising a step of forming a solder ball on the columnar electrode.

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