JP2009170706A - Multilayer electronic component - Google Patents

Multilayer electronic component Download PDF

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JP2009170706A
JP2009170706A JP2008008069A JP2008008069A JP2009170706A JP 2009170706 A JP2009170706 A JP 2009170706A JP 2008008069 A JP2008008069 A JP 2008008069A JP 2008008069 A JP2008008069 A JP 2008008069A JP 2009170706 A JP2009170706 A JP 2009170706A
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electronic component
metal layer
internal electrode
internal electrodes
base body
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Tomoaki Nakamura
智彰 中村
Masami Kurabayashi
正美 倉林
Mikio Tawara
幹夫 田原
Jun Nishikawa
潤 西川
Kenji Saito
賢二 斉藤
Shoji Shibazaki
正二 柴崎
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Taiyo Yuden Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To prevent the decrease of the capacitance of a multilayer electronic component caused by the breakage of joints of an external electrode and internal electrodes by relaxing stress caused by a difference between a wiring substrate and an electronic component base body. <P>SOLUTION: A multilayer ceramic capacitor 1 has a structure having the electronic component base body 2 in which the internal electrodes 4 are alternately stacked through ceramic dielectrics 3 composed mainly of barium titanate, and the external electrode 5 formed on the surface of the base body where leading terminals 4a of the internal electrodes 4 are exposed. The external electrode 5 has an underlying metal layer 5a which closely contacts with the base body 2 and electrically connected with the leading terminals 4a, a first plated metal layer 5b to protect the underlying metal layer, and a second plated metal layer 5c to improve solder wettability with the first plated metal layer to protect the underlying metal layer 5a. Grooves 6 which extend vertically against the internal electrodes 4 and contact with the internal electrodes 4 are formed in the vicinity of the leading terminals 4a of the base body 2. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、積層セラミックコンデンサ、積層コンデンサアレイまたは積層LCR複合部品等の積層電子部品に関するもので、応力に対する耐性が良好な積層電子部品に関するものである。   The present invention relates to a multilayer electronic component such as a multilayer ceramic capacitor, a multilayer capacitor array, or a multilayer LCR composite component, and more particularly to a multilayer electronic component having good resistance to stress.

積層セラミックコンデンサをはじめとする積層セラミック電子部品は、略直方体形状の電子部品素体と、前記電子部品素体内部に埋め込まれかつ前記電子部品素体の表面に露出する引出端部を有する内部電極と、前記電子部品素体の前記引出端部が露出している表面に形成されかつ前記内部電極と電気的に接続する少なくとも一対の外部電極とを有しており、外部電極は内部電極と接続する下地金属層のほか、下地金属層の保護や半田濡れ性を向上するためのメッキ金属層など、複数の導電層で構成されている。   A multilayer ceramic electronic component such as a multilayer ceramic capacitor has a substantially rectangular parallelepiped-shaped electronic component element body and an internal electrode that is embedded in the electronic component element body and exposed at the surface of the electronic component element body. And at least a pair of external electrodes formed on the exposed surface of the electronic component element body and electrically connected to the internal electrodes, and the external electrodes are connected to the internal electrodes. In addition to the underlying metal layer to be formed, it is composed of a plurality of conductive layers such as a plated metal layer for protecting the underlying metal layer and improving solder wettability.

このような積層電子部品は、半田付けによって配線基板上に実装され、電子回路を構成する。配線基板上に実装された積層電子部品は、様々な応力を受ける。例えば半田付け時にはリフロー炉等の熱による熱応力が積層電子部品にかかる。また、積層電子部品を配線基板上に実装した後には、配線基板のたわみ等による機械的な応力がかかる。このような応力は、特に外部電極にかかるので、外部電極と内部電極との接合が切れてしまうことがあった。そのため、積層電子部品の静電容量の低下が発生することがあった。   Such a laminated electronic component is mounted on a wiring board by soldering to constitute an electronic circuit. A laminated electronic component mounted on a wiring board is subjected to various stresses. For example, during soldering, thermal stress due to heat from a reflow furnace or the like is applied to the laminated electronic component. Further, after mounting the laminated electronic component on the wiring board, mechanical stress due to the deflection of the wiring board is applied. Since such stress is applied particularly to the external electrode, the connection between the external electrode and the internal electrode may be broken. Therefore, the capacitance of the laminated electronic component may be reduced.

このような問題を解決する手段の一つとして、特開2002−203737号公報に開示されている手段が挙げられる。この方法では、ガラス含有率の高い緻密な第一電極層と、ガラス含有率の低いポーラスな第二電極層を備えることにより、配線基板のたわみ等による機械的な応力に対する耐久性を向上させるものである。 As one means for solving such a problem, there is a means disclosed in Japanese Patent Application Laid-Open No. 2002-203737. In this method, by providing a dense first electrode layer having a high glass content and a porous second electrode layer having a low glass content, the durability against mechanical stress due to the deflection of the wiring board is improved. It is.

特開2002−203737号公報JP 2002-203737 A

しかしながら、上記特許文献1の手段では、熱応力に対しては耐久性の向上が困難であった。配線基板のたわみ等による機械的な応力は主に外部電極にかかる応力であるため、外部電極に応力を緩和する構造を持たせる上記手段は有効である。しかし、熱応力は配線基板と電子部品素体との熱膨張の差によって発生する応力であるため、熱応力を緩和するには配線基板と電子部品素体との熱膨張の差を緩和する必要がある。上記特許文献1の手段には、このような配線基板と電子部品素体との熱膨張の差を緩和する手段が開示されていない。 However, with the means of the above-mentioned Patent Document 1, it is difficult to improve durability against thermal stress. Since the mechanical stress due to the deflection of the wiring board is mainly the stress applied to the external electrode, the above means for providing the external electrode with a structure for relaxing the stress is effective. However, since the thermal stress is the stress generated by the difference in thermal expansion between the wiring board and the electronic component body, it is necessary to reduce the difference in thermal expansion between the wiring board and the electronic component body in order to reduce the thermal stress. There is. The means of Patent Document 1 does not disclose means for reducing the difference in thermal expansion between the wiring board and the electronic component element body.

本発明は、配線基板と電子部品素体との熱膨張の差による応力を緩和して、外部電極と内部電極との接合が切れることによる積層電子部品の静電容量の低下を防止するものである。 The present invention relieves the stress due to the difference in thermal expansion between the wiring board and the electronic component body, and prevents a decrease in the capacitance of the laminated electronic component due to the disconnection between the external electrode and the internal electrode. is there.

本発明では、略直方体形状の電子部品素体と、前記電子部品素体内部に埋め込まれかつ前記電子部品素体の表面に露出する引出端部を有する内部電極と、前記電子部品素体の前記引出端部が露出している表面に形成されかつ前記内部電極と電気的に接続する外部電極と、を有する積層電子部品において、前記外部電極は、導電性金属とガラス成分を含む下地金属層を有しており、前記電子部品素体の前記引出端部付近に、前記内部電極に対して垂直方向に延びておりかつ前記内部電極と接する溝が形成されており、前記溝にはガラス成分が充填されている積層電子部品を提案する。 In the present invention, a substantially rectangular parallelepiped-shaped electronic component element, an internal electrode embedded in the electronic component element and having a lead-out end exposed on the surface of the electronic component element, and the electronic component element In the laminated electronic component having an external electrode formed on the surface where the leading end is exposed and electrically connected to the internal electrode, the external electrode includes a base metal layer containing a conductive metal and a glass component. A groove extending in a direction perpendicular to the internal electrode and in contact with the internal electrode is formed in the vicinity of the leading end portion of the electronic component element body, and the glass component is formed in the groove. Proposed multilayer electronic components are filled.

ガラス成分のヤング率は電子部品素体に用いられるチタン酸バリウムのヤング率よりも低いので、上記の解決手段の構造であれば、ガラス成分が充填された溝によって配線基板と電子部品素体との熱膨張の差による応力を緩和することができる。   Since the Young's modulus of the glass component is lower than the Young's modulus of barium titanate used for the electronic component element body, the wiring board and the electronic component element body are formed by the groove filled with the glass component if the above-described solution structure is used. The stress due to the difference in thermal expansion can be relaxed.

本発明によれば、配線基板と電子部品素体との熱膨張の差による応力を緩和して、外部電極と内部電極との接合が切れることによる積層電子部品の静電容量の低下を防止することができる。   According to the present invention, the stress due to the difference in thermal expansion between the wiring board and the electronic component body is relieved, and the capacitance of the laminated electronic component is prevented from being lowered due to the disconnection between the external electrode and the internal electrode. be able to.

本発明に係る積層電子部品の実施形態を、積層セラミックコンデンサを例にとって説明する。なお、本発明は積層セラミックコンデンサの他、積層コンデンサアレイや積層LCフィルタ等の、積層型の複合電子部品に適用可能である。 An embodiment of a multilayer electronic component according to the present invention will be described by taking a multilayer ceramic capacitor as an example. The present invention is applicable to multilayer composite electronic components such as multilayer capacitor arrays and multilayer LC filters in addition to multilayer ceramic capacitors.

図1は、本発明に係る積層セラミックコンデンサを示す模式的な縦断面図である。この積層セラミックコンデンサ1は、チタン酸バリウムを主成分とするセラミック誘電体3を介して内部電極4が交互に積み重ねられている電子部品素体2を有しており、内部電極4の引出端部4aが露出している表面に外部電極5が形成された構造を有する。この外部電極5は、電子部品素体2に密着し引出端部4aと電気的に接続する下地金属層5aと、該下地金属層5aを保護する第一のメッキ金属層5bと半田濡れ性を向上させる第二のメッキ金属層5cとを有する。また、電子部品素体2の引出端部4a付近に、内部電極4に対して垂直方向に延びておりかつ内部電極4と接する溝6が形成されている。   FIG. 1 is a schematic longitudinal sectional view showing a multilayer ceramic capacitor according to the present invention. The multilayer ceramic capacitor 1 has an electronic component body 2 in which internal electrodes 4 are alternately stacked via a ceramic dielectric 3 mainly composed of barium titanate, and a lead end portion of the internal electrode 4 The external electrode 5 is formed on the surface where the 4a is exposed. The external electrode 5 has a solder metal wettability with a base metal layer 5a that is in close contact with the electronic component body 2 and is electrically connected to the lead end 4a, and a first plated metal layer 5b that protects the base metal layer 5a. A second plated metal layer 5c to be improved. Further, a groove 6 extending in a direction perpendicular to the internal electrode 4 and in contact with the internal electrode 4 is formed in the vicinity of the leading end 4 a of the electronic component body 2.

下地金属層5aは、内部電極4の引出端部4aと電気的に接続する役目を持っている。この下地導電層5aは、焼成後の電子部品素体2に導電ペーストを塗布して焼きつける方法で形成される。下地金属層5aに用いられる導電ペーストは、導電材料となる導電性金属と、電子部品素体2に密着させるための結合助剤となるガラス成分とを含んでいる。導電材料としては、Ni、Cu、Ag等が挙げられる。ガラス成分としては、Li−Si系ガラス、B−Si系ガラス等が用いられる。 The base metal layer 5 a has a role of being electrically connected to the lead end 4 a of the internal electrode 4. The underlying conductive layer 5a is formed by a method in which a conductive paste is applied and baked on the electronic component body 2 after baking. The conductive paste used for the base metal layer 5a includes a conductive metal serving as a conductive material and a glass component serving as a binding aid for closely contacting the electronic component body 2. Examples of the conductive material include Ni, Cu, and Ag. As the glass component, Li—Si glass, B—Si glass, or the like is used.

第一のメッキ金属層5bは、下地金属層5a全体を覆い、下地金属層5aを保護する役目を持っている。この第一のメッキ金属層5bに用いられる金属としては、Ni、Cu等が挙げられる。また、第二のメッキ金属層5cは、第一のメッキ金属層5b全体を覆い、半田濡れ性を向上させる役目を持っている。第二のメッキ金属層5cに用いられる金属としては、SnまたはSn合金が挙げられる。 The first plated metal layer 5b covers the entire base metal layer 5a and serves to protect the base metal layer 5a. Examples of the metal used for the first plated metal layer 5b include Ni and Cu. The second plated metal layer 5c covers the entire first plated metal layer 5b and has a role of improving solder wettability. Examples of the metal used for the second plated metal layer 5c include Sn or Sn alloy.

内部電極4は、電子部品素体2に埋め込まれており、セラミック誘電体3を介して対向する内部電極4は、各々の一方の端が互いに電子部品素体2の異なる表面に露出している。この露出している部分が引出端部4aとなる。内部電極4を構成する金属としては、Ni、Cu等の卑金属やAg、Pd等の貴金属が挙げられる。近年は大容量化により内部電極の枚数が増えているので、コストの面からNi、Cu等の卑金属が多く用いられる。 The internal electrodes 4 are embedded in the electronic component body 2, and the internal electrodes 4 facing each other through the ceramic dielectric 3 are exposed at different ends of the electronic component body 2 at one end of each. . This exposed portion becomes the extraction end 4a. Examples of the metal constituting the internal electrode 4 include base metals such as Ni and Cu, and noble metals such as Ag and Pd. In recent years, since the number of internal electrodes has increased due to the increase in capacity, base metals such as Ni and Cu are often used from the viewpoint of cost.

内部電極4の金属と、下地金属層5aの金属の組み合わせはセラミック誘電体3の材質等によって決定されるが、特に内部電極4をNi、下地金属層5aをCuとするのが好ましい。この組み合わせでは、内部電極4のNiと下地金属層5aのCuとの間で固相拡散が起こり、Ni−Cu合金を生成して、良好な接合状態を得ることができる。   The combination of the metal of the internal electrode 4 and the metal of the base metal layer 5a is determined by the material of the ceramic dielectric 3, etc., but it is particularly preferable that the internal electrode 4 is Ni and the base metal layer 5a is Cu. In this combination, solid phase diffusion occurs between Ni of the internal electrode 4 and Cu of the underlying metal layer 5a, and a Ni—Cu alloy can be generated to obtain a good bonded state.

溝6は、電子部品素体2の引出端部4a付近に、内部電極4に対して垂直方向に延びており、さらに内部電極4と接するように形成されている。この溝6にはガラス成分が充填されている。溝6に充填されているガラス成分は、下地金属層5aを形成するための導電ペーストに含まれているガラス成分と略同じである。また、溝6にはガラス成分の他、内部電極4の金属の一部が入り込んでいることもある。   The groove 6 extends in the direction perpendicular to the internal electrode 4 in the vicinity of the lead-out end portion 4 a of the electronic component element body 2, and is further formed in contact with the internal electrode 4. The groove 6 is filled with a glass component. The glass component filled in the groove 6 is substantially the same as the glass component contained in the conductive paste for forming the base metal layer 5a. Further, in addition to the glass component, a part of the metal of the internal electrode 4 may enter the groove 6.

溝6は、内部電極4から伸びる楔状になって電子部品素体2に食い込んでいる状態になっている。また、溝6に充填されているガラス成分は下地金属層5aを構成する導電ペーストから拡散してきたものなので、下地金属層5aと電子部品素体2とを強固に接合する。また、溝6に充填されているガラス成分は、例えばホウケイ酸亜鉛系ガラスでヤング率が6〜8GPa程度で、電子部品素体に用いられるチタン酸バリウムのヤング率40GPaよりも低い。これにより、積層セラミックコンデンサ1を配線基板上に実装したときに、配線基板と電子部品素体との熱膨張の差によって応力が発生しても、ヤング率の低いガラス成分によって応力が緩和される。この応力緩和の作用により、熱応力に対する耐久性を向上させることができる。   The groove 6 is in a state of being wedged extending from the internal electrode 4 and biting into the electronic component body 2. Further, since the glass component filled in the groove 6 is diffused from the conductive paste constituting the base metal layer 5a, the base metal layer 5a and the electronic component body 2 are firmly bonded. The glass component filled in the groove 6 is, for example, zinc borosilicate glass having a Young's modulus of about 6 to 8 GPa and lower than the Young's modulus of 40 GPa of barium titanate used for the electronic component body. Thereby, when the multilayer ceramic capacitor 1 is mounted on the wiring board, even if stress is generated due to a difference in thermal expansion between the wiring board and the electronic component body, the stress is relieved by the glass component having a low Young's modulus. . Due to this stress relaxation action, durability against thermal stress can be improved.

なお、ここで引出端部付近とは、図1に示すように、引出端部4aが露出している表面から溝6までの深さDに相当する。この深さDについては、特に制限はないが、8μm以上であれば内部電極4と下地金属層5aとの接合がより良好になる。   Here, the vicinity of the extraction end corresponds to the depth D from the surface where the extraction end 4a is exposed to the groove 6 as shown in FIG. Although there is no restriction | limiting in particular about this depth D, if it is 8 micrometers or more, joining of the internal electrode 4 and the base metal layer 5a will become more favorable.

次に本発明の積層セラミックコンデンサの製造方法について説明する。まず下地導電層5aを形成する前の、焼成済みの電子部品素体2を用意する。   Next, the manufacturing method of the multilayer ceramic capacitor of this invention is demonstrated. First, the baked electronic component body 2 is prepared before the base conductive layer 5a is formed.

この電子部品素体2は次のようにして得られる。まずチタン酸バリウムを主成分とする耐還元性を有するセラミック粉末を有機バインダーと混練してスラリーを形成し、これをドクターブレード等でシート状に形成してセラミックグリーンシートを得る。このセラミックグリーンシートにスクリーン印刷によってNi導電ペーストを所定のパターンで塗布して内部電極パターンを形成する。内部電極パターンを形成したセラミックグリーンシートを所定の形状に打ち抜いて、この打ち抜いたセラミックグリーンシートを、静電容量を形成できるように所定枚数積み重ねて熱圧着して積層体を得る。この積層体を、所定の個別チップサイズ(例えば4.0mm×2.0mm)に切断分割して電子部品素体2の未焼成体を得る。この未焼成体を1100〜1300℃の窒素−水素雰囲気で焼成して、所定サイズ(例えば3.2mm×1.6mmサイズ)の電子部品素体2が得られる。   This electronic component body 2 is obtained as follows. First, a reduction-resistant ceramic powder mainly composed of barium titanate is kneaded with an organic binder to form a slurry, which is formed into a sheet with a doctor blade or the like to obtain a ceramic green sheet. An Ni conductive paste is applied in a predetermined pattern to the ceramic green sheet by screen printing to form an internal electrode pattern. The ceramic green sheets on which the internal electrode patterns are formed are punched into a predetermined shape, and a predetermined number of the punched ceramic green sheets are stacked and thermocompression bonded to form a laminate. This laminate is cut and divided into a predetermined individual chip size (for example, 4.0 mm × 2.0 mm) to obtain an unfired body of the electronic component body 2. The green body is fired in a nitrogen-hydrogen atmosphere at 1100 to 1300 ° C. to obtain the electronic component body 2 having a predetermined size (for example, 3.2 mm × 1.6 mm size).

続いて、得られた電子部品素体2の、引出端部4aが露出している表面に、導電ペーストをディップ法により塗布する。この導電ペーストは、導電性金属としてCu、ガラス成分としてホウケイ酸亜鉛系ガラスを含んでいる。この導電ペーストを塗布した電子部品素体2を窒素雰囲気中で加熱して、下地金属層5aを形成する。このときの加熱温度は、用いる導電ペーストのガラス成分の軟化点よりも高い温度に設定する。例えば、ホウケイ酸亜鉛系ガラスの通常の焼付け温度が軟化点の約600℃よりも100〜300℃高い温度である場合、さらに20〜60℃高い温度で焼付けを行う。これにより導電ペースト中のガラス成分が電子部品素体2中に拡散する。   Subsequently, a conductive paste is applied by dipping on the surface of the obtained electronic component element body 2 where the leading end 4a is exposed. This conductive paste contains Cu as a conductive metal and zinc borosilicate glass as a glass component. The electronic component body 2 coated with the conductive paste is heated in a nitrogen atmosphere to form the base metal layer 5a. The heating temperature at this time is set to a temperature higher than the softening point of the glass component of the conductive paste to be used. For example, when the normal baking temperature of zinc borosilicate glass is 100 to 300 ° C. higher than the softening point of about 600 ° C., baking is performed at a temperature 20 to 60 ° C. higher. As a result, the glass component in the conductive paste diffuses into the electronic component body 2.

電子部品素体2中にガラス成分が拡散すると、ガラスが拡散している部分とガラスが拡散していない部分との境目に溝6が形成される。このメカニズムについては不明であるが、ガラス成分が拡散する深さによって溝6が形成される深さが決定される。なお、ガラスの拡散する深さは、導電ペーストの焼付け温度の他、セラミック誘電体3の材質や導電ペーストの導電性金属の種類によって調整が可能である。そして形成された溝6に、拡散したガラス成分の一部が充填される。   When the glass component diffuses into the electronic component body 2, the groove 6 is formed at the boundary between the portion where the glass is diffused and the portion where the glass is not diffused. Although the mechanism is unknown, the depth at which the groove 6 is formed is determined by the depth at which the glass component diffuses. Note that the diffusion depth of the glass can be adjusted by the material of the ceramic dielectric 3 and the type of conductive metal of the conductive paste, in addition to the baking temperature of the conductive paste. The formed groove 6 is filled with a part of the diffused glass component.

続いて、下地金属層5a上に、電解メッキ法によってメッキ金属層を形成する。メッキ金属層は一層でも良いが、下地の保護を目的としたCu、Ni等で構成される第一のメッキ金属層5b及び半田ぬれ性の向上を目的としたSn等で構成される第二のメッキ金属層5cの複数層のメッキ金属を形成しても良い。   Subsequently, a plated metal layer is formed on the base metal layer 5a by an electrolytic plating method. The plated metal layer may be a single layer, but the first plated metal layer 5b made of Cu, Ni or the like for the purpose of protecting the base and the second made of Sn or the like for improving solder wettability. A plurality of plated metal layers of the plated metal layer 5c may be formed.

次に、このようにして得られた積層セラミックコンデンサ1について、ヒートサイクル試験を行い、本発明の効果を検証する。焼付け温度を変えて溝6の深さを0μm(比較例)、3μm及び8μmにした試料を各々100個ずつ用意した。各試料をガラス−エポキシ樹脂基板に半田付けし、初期の静電容量を測定した。次いで1時間で−55℃〜+125℃の温度変化を1サイクルとして、各試料をヒートサイクル試験に投入した。初期の静電容量の10%以下になったものを静電容量NGとし、その個数を発生率とした。なお、溝6の深さDは、各試料5個ずつ抜き取り、側面から研磨して、下地金属層5aと電子部品素体2との境目から、溝6と内部電極4との接触部分までの距離を測定して、1個につき5箇所、計25点の平均値から求めた。その結果を図2のグラフに示す。   Next, a heat cycle test is performed on the multilayer ceramic capacitor 1 thus obtained to verify the effect of the present invention. 100 samples each having a baking temperature of 0 μm (comparative example), 3 μm, and 8 μm were prepared by changing the baking temperature. Each sample was soldered to a glass-epoxy resin substrate, and the initial capacitance was measured. Next, each sample was put into a heat cycle test with a temperature change of −55 ° C. to + 125 ° C. taken as one cycle in one hour. The capacitance that was 10% or less of the initial capacitance was defined as the capacitance NG, and the number thereof was defined as the occurrence rate. In addition, the depth D of the groove 6 is extracted from each of the five samples, polished from the side surface, and from the boundary between the base metal layer 5a and the electronic component body 2 to the contact portion between the groove 6 and the internal electrode 4. The distance was measured and obtained from an average value of a total of 25 points at 5 points per piece. The result is shown in the graph of FIG.

図2に示すように、溝6が形成されていない比較例すなわち0μmでは、100サイクルで40%以上の静電容量NGが発生している。しかし、溝6が形成されているものでは、500サイクルでも20%以下であり、特に深さDが8μmのものでは500サイクルでも静電容量NGが発生していないことがわかった。   As shown in FIG. 2, in the comparative example in which the groove 6 is not formed, that is, 0 μm, a capacitance NG of 40% or more is generated in 100 cycles. However, in the case where the groove 6 is formed, it is 20% or less even at 500 cycles, and in particular, when the depth D is 8 μm, the capacitance NG is not generated even at 500 cycles.

上記の結果より、本発明によれば、配線基板と電子部品素体との熱膨張の差による応力を緩和して、外部電極と内部電極との接合が切れることによる積層電子部品の静電容量の低下を防止することができる。   From the above results, according to the present invention, the capacitance of the multilayer electronic component due to the fact that the stress due to the difference in thermal expansion between the wiring board and the electronic component element body is alleviated and the connection between the external electrode and the internal electrode is broken. Can be prevented.

本発明の積層セラミックコンデンサを模式的に示す部分断面図である。It is a fragmentary sectional view showing typically the multilayer ceramic capacitor of the present invention. ヒートサイクル試験の結果を示すグラフである。It is a graph which shows the result of a heat cycle test.

符号の説明Explanation of symbols

1 積層セラミックコンデンサ
2 電子部品素体
3 セラミック誘電体
4 内部電極
4a 引出端部
5 外部電極
5a 下地導電層
5b 第一のメッキ金属層
5c 第ニのメッキ金属層
6 溝
DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor 2 Electronic component body 3 Ceramic dielectric 4 Internal electrode 4a Lead-out end 5 External electrode 5a Underlying conductive layer 5b First plating metal layer 5c Second plating metal layer 6 Groove

Claims (1)

略直方体形状の電子部品素体と、前記電子部品素体内部に埋め込まれかつ前記電子部品素体の表面に露出する引出端部を有する内部電極と、前記電子部品素体の前記引出端部が露出している表面に形成されかつ前記内部電極と電気的に接続する外部電極と、を有する積層電子部品において、
前記外部電極は、導電性金属とガラス成分を含む下地金属層を有しており、
前記電子部品素体の前記引出端部付近に、前記内部電極に対して垂直方向に延びておりかつ前記内部電極と接する溝が形成されており、
前記溝にはガラス成分が充填されている
ことを特徴とする積層電子部品。


An electronic component element body having a substantially rectangular parallelepiped shape, an internal electrode embedded in the electronic component element body and having an extraction end exposed on the surface of the electronic component element element, and the extraction end part of the electronic component element body In a laminated electronic component having an external electrode formed on the exposed surface and electrically connected to the internal electrode,
The external electrode has a base metal layer containing a conductive metal and a glass component,
A groove extending in a direction perpendicular to the internal electrode and in contact with the internal electrode is formed in the vicinity of the leading end of the electronic component body,
A laminated electronic component, wherein the groove is filled with a glass component.


JP2008008069A 2008-01-17 2008-01-17 Multilayer electronic component Withdrawn JP2009170706A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013161983A (en) * 2012-02-06 2013-08-19 Tdk Corp Laminated electronic component
KR101528431B1 (en) * 2014-11-12 2015-06-11 가부시키가이샤 무라타 세이사쿠쇼 Multilayer ceramic condenser
KR101535752B1 (en) * 2014-11-11 2015-07-09 가부시키가이샤 무라타 세이사쿠쇼 Monolithic ceramic capacitor
JP2017022365A (en) * 2015-07-14 2017-01-26 株式会社村田製作所 Multilayer ceramic capacitor
JP2017059633A (en) * 2015-09-15 2017-03-23 Tdk株式会社 Laminate electronic component
JP2017059630A (en) * 2015-09-15 2017-03-23 Tdk株式会社 Laminate electronic component
KR20190116130A (en) * 2019-07-08 2019-10-14 삼성전기주식회사 Capacitor component

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Publication number Priority date Publication date Assignee Title
JP2005217128A (en) * 2004-01-29 2005-08-11 Kyocera Corp Ceramic electronic part

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
JP2005217128A (en) * 2004-01-29 2005-08-11 Kyocera Corp Ceramic electronic part

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013161983A (en) * 2012-02-06 2013-08-19 Tdk Corp Laminated electronic component
KR101535752B1 (en) * 2014-11-11 2015-07-09 가부시키가이샤 무라타 세이사쿠쇼 Monolithic ceramic capacitor
KR101528431B1 (en) * 2014-11-12 2015-06-11 가부시키가이샤 무라타 세이사쿠쇼 Multilayer ceramic condenser
JP2017022365A (en) * 2015-07-14 2017-01-26 株式会社村田製作所 Multilayer ceramic capacitor
JP2017059633A (en) * 2015-09-15 2017-03-23 Tdk株式会社 Laminate electronic component
JP2017059630A (en) * 2015-09-15 2017-03-23 Tdk株式会社 Laminate electronic component
KR20190116130A (en) * 2019-07-08 2019-10-14 삼성전기주식회사 Capacitor component
KR102333093B1 (en) * 2019-07-08 2021-12-01 삼성전기주식회사 Capacitor component
US11264170B2 (en) 2019-07-08 2022-03-01 Samsung Electro-Mechanics Co., Ltd. Capacitor component
US11651899B2 (en) 2019-07-08 2023-05-16 Samsung Electro-Mechanics Co., Ltd. Capacitor component
US11935701B2 (en) 2019-07-08 2024-03-19 Samsung Electro-Mechanics Co., Ltd. Capacitor component

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