JP2009170445A - Manufacturing method of semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of preventing degradation of bonding strength even when a second substrate and a first substrate formed by sintering are subjected to surface activated bonding; and a semiconductor device. <P>SOLUTION: In this manufacturing method of a semiconductor device, a semiconductor device having a chip substrate 160 mounted with an infrared sensor 1620, and a sealing substrate 10 sealing the infrared sensor 1620 by being bonded to the chip substrate 160 is manufactured. The sealing substrate 10 is provided with a sintered body 111 formed by sintering, and a film 132 having less crystalline grains compared to the sintered body 111 and having an aligned plane orientation. The manufacturing method includes processes of: forming a film 130 (132) on a sintered body 110 (111); and bringing the chip substrate 160 into surface activated bonding with the film 132 at room temperature. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device formed by surface activation bonding a first substrate and a second substrate, and a semiconductor device.

Conventionally, there is a semiconductor device in which a circuit board and a cap are joined at room temperature (see Patent Document 1). The circuit board is mounted with a SAW element. The cap is made of silicon and has a cavity. The semiconductor device manufacturing method uses a surface activated room temperature bonding method. That is, after the surface activation process is performed on the joint between the circuit board and the cap, the room temperature bonding is performed. In this way, the SAW element is sealed.
JP 2004-31474 A

  However, when the cap is formed by sintering, polycrystal grains exist in the cap, and the surface orientation of the cap varies. For this reason, the conventional semiconductor device manufacturing method has a problem that even if the surface activation treatment is performed on the joint portion between the circuit board and the cap, the treatment cannot be sufficiently performed and the joint strength is lowered.

  The present invention has been made in view of these problems, and manufacture of a semiconductor device capable of suppressing a decrease in bonding strength even when surface-activated bonding is performed between a second substrate formed by sintering and the first substrate. It is an object to provide a method and a semiconductor device.

  In order to achieve the above object, in the method for manufacturing a semiconductor device according to the present invention, the first substrate on which the electronic component is mounted is formed by sintering and has fewer crystal grains than the sintered body, The component is sealed by bonding a second substrate having a film with a uniform orientation.

  In the method of manufacturing a semiconductor device according to the present invention, the film having fewer crystal grains and having the same plane orientation is formed on the sintered body as compared with the sintered body, so that no gap is formed in the joint. The second substrate formed by sintering and the first substrate can be surface-activated bonded, and a decrease in bonding strength can be suppressed.

  A semiconductor device manufacturing method and a semiconductor device manufactured using the manufacturing method according to the first to fifth embodiments of the present invention will be described below with reference to FIGS.

(First embodiment)
First, a semiconductor device manufactured using the method for manufacturing a semiconductor device according to the first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a diagram showing a structure of a semiconductor device manufactured by using the method for manufacturing a semiconductor device according to the first embodiment of the present invention. FIG. 1A is a plan view of the semiconductor device, and FIG. 1B is a cross-sectional view as viewed from an arrow AA. FIG. 1C is a view corresponding to FIG. 1A when the microlens 1321 is formed on the film 132.

  As shown in FIGS. 1A and 1B, the semiconductor device includes a chip substrate 160 that is a first substrate, a sealing substrate 10 that is a second substrate, and metal bumps 150. The chip substrate 160 has an infrared sensor 1620 as an electronic component mounted on the center of the surface. In the semiconductor device, the sealing substrate 10 is arranged on the surface of the chip substrate 160 so as to circulate the outer frame. Then, the chip substrate 160 and the sealing substrate 10 are surface-activated at room temperature and the infrared sensor 1620 is vacuum-sealed. Further, the chip substrate 160 has a hollow portion 1610 below the mounting position of the infrared sensor 1620. The cavity 1610 is formed by etching or the like to improve the characteristics of the infrared sensor 1620.

  On the other hand, the sealing substrate 10 includes a sintered body 111 formed by sintering, and a film 132 having fewer crystal grains and having a uniform plane orientation as compared with the sintered body 111. Further, the sealing substrate 10 has at least one through electrode wiring 140 in order to output a signal from the chip substrate 160 to the outside of the semiconductor device. Here, the material of the sintered body 111 is preferably ZnS, ZnSe, Ge, chalcogenide glass or the like in order to transmit infrared rays. The film 132 includes a transmission part 1320 that transmits infrared rays and a joint part 1325 that joins the outer frame of the chip substrate 160. The through electrode wiring 140 is filled with a metal such as Cu or solder and has an airtight structure. The through electrode wiring 140 and the chip substrate 160 are electrically connected through the metal bump 150. The metal bump 150 may be made of a metal such as Au, Cu, Al, or solder. In addition, as shown in FIG.1 (c), in order to raise a condensing rate, the micro lens 1321 can also be formed in the permeation | transmission part 1320 of the board | substrate 11 for sealing. The sealing substrate 11 is the same as the sealing substrate 10 except for the shape of the sintered body 112 and the microlens 1321.

  Next, a method for manufacturing the semiconductor device according to the first embodiment will be described with reference to FIG. FIG. 2 is a cross-sectional process diagram illustrating the method of manufacturing the semiconductor device according to the first embodiment. Here, FIG. 2A is a step of forming the sintered body 110 by the molding die 100 that is a mold, and FIG. 2B is a step of removing the molding die 100. FIG. 2C shows a step of forming a film 130 with fewer crystal grains and a uniform plane orientation on the sintered body 110 as compared with the sintered body 110. FIG. 2D shows a through electrode wiring. 140 is a step of forming 140. FIG. 2E shows a step of polishing in order to planarize the film 131, and FIG. 2F shows a step of surface activation room temperature bonding between the chip substrate 160 and the film 132.

  In the step shown in FIG. 2A, the molding die 100 is filled with a powdery material, and the sintered body 110 is formed by sintering. The manufacturing method may be a hot press method or the like. For example, when the material of the sintered body 110 is ZnS, the sintered body 110 is formed if the sintering temperature is about 1000 minutes under an environment of about 1000 ° C. for about 5 minutes. Next, in the step shown in FIG. 2B, the molding die 100 is removed from the sintered body 110. Through this step, the shape of the molding die 100 is transferred to the sintered body 110 as it is. That is, a counterbore is formed on one side of the sintered body 110.

  Next, in the step shown in FIG. 2C, a film 130 having fewer crystal grains and having a uniform plane orientation than the sintered body 110 is formed on the surface of the sintered body 110 on the side with the counterbore. A method for forming the film 130 is a CVD method (chemical vapor deposition method) such as a thermal CVD method or a metal organic chemical vapor deposition method, a PVD method (physical vapor deposition method) such as sputtering or thermal evaporation, or plating. Should be used. In any case, the film 130 can obtain a uniform film quality. When the material of the film 130 is ZnS, the CVD method is desirable. Here, the film 130 is formed on the entire surface of the sintered body 110 on the side where the counterbore is present. Thereby, the transmission part 1320 and a junction part are formed. The film 130 needs to have a sufficient thickness so that the sintered body 110 does not come out even when lapping and polishing, and there is no problem if it is about 50 μm thick. Note that the material of the film 130 is limited to a material that can transmit infrared rays. That is, the same material as the material of the sintered body 110 or a metal that can transmit infrared rays is desirable. For example, Al, Cu, Au, or Ni can be used as the metal.

  Next, in the step shown in FIG. 2D, the through electrode wiring 140 is formed. Specifically, first, fine holes are drilled in the film 130 and the sintered body 110 with a drill or a laser. The hole is filled with a metal such as Cu or solder by plating or the like. Thereby, the through electrode wiring 140 is formed, and the film 131 and the sintered body 111 are formed. Next, in the step shown in FIG. 2E, the bonding portion of the film 131 is planarized. As a flattening method, first, rough polishing is performed in order to remove the height variation of the joint portion of the film 131. Then, when the surface roughness Ra of the joint portion of the film 131 is about 10 nm or less, fine polishing is performed. Specifically, the sintered body 111 side is fixed with a polishing jig 151. The film 131 is pressed against the pad 152 and finally polished until the surface of the bonding portion of the film 131 is flattened at the atomic level.

  Next, in the step shown in FIG. 2F, surface-activated room temperature bonding is performed between the bonding portion 1325 of the film 132 flattened at the atomic level and the chip substrate 160. Since the surface activated room temperature bonding is performed in a vacuum, the infrared sensor 1620 is sealed in a vacuum. Specifically, in order to take out a signal from the infrared sensor 1620 from the sealing substrate 10 side, wiring is routed from the infrared sensor 1620. An electrode pad is formed at the end of the wiring from the infrared sensor 1620, and the metal bump 150 is disposed on the electrode pad. Further, the film 132 and the chip substrate 160 are surface-activated at room temperature bonding while being aligned so that the position of the through-electrode wiring 140 on the sealing substrate 10 and the metal bump 150 coincide. Since the metal bump 150 and the through electrode wiring 140 do not apply heat, they contact and elastically deform. Thereby, the metal bump 150 and the through electrode wiring 140 are electrically connected. Therefore, the height of the metal bump 150 is slightly higher than the height between the chip substrate 160 and the sealing substrate 10. Furthermore, all are made uniform so that stress is not generated as much as possible. The bump may be a wire bump or a plating bump.

  As described above, the manufacturing method of the semiconductor device according to the first embodiment includes the step of forming the film 130 with fewer crystal grains and the same plane orientation on the sintered body 110 as compared with the sintered body 110. Also included is a step of surface activation room temperature bonding of the chip substrate 160 and the film 132. Thereby, the surface-activated normal temperature bonding of the sealing substrate 10 and the chip substrate 160 formed by sintering can be performed without forming a gap between the bonding portion 1325 and the chip substrate 160, and the bonding strength can be increased. Reduction can be suppressed. Therefore, it is possible to suppress an increase in the number of defective products having insufficient bonding strength and a deterioration in yield.

  In the method for manufacturing a semiconductor device according to the first embodiment, the molding die 100 is filled with a powdery material, and the sintered body 110 is formed by sintering. Thereby, the sintered compact 110 can be formed in arbitrary shapes. For example, a complicated shape such as the sintered body 112 shown in FIG. Further, when the sintered body 110 is made of ZnS, infrared rays of 8 μm to 12 μm can be transmitted.

  Further, the method for manufacturing a semiconductor device according to the first embodiment includes a step of forming the film 130 on the sintered body 110 by CVD, PVD, plating, or the like. Furthermore, the process of grind | polishing the junction part of the film | membrane 131 is included. Further, the film 130 can obtain a uniform film quality. Thereby, the etching rate at the time of polishing becomes uniform. From this, the surface roughness Ra of the joint portion of the film 131 can be flattened to 1 nm or less. Therefore, the bonding strength between the chip substrate 160 and the sealing substrate 10 by surface activated room temperature bonding is increased. That is, the reliability such as airtightness when vacuum-sealing is improved, and the yield is greatly improved.

  Further, the method for manufacturing a semiconductor device according to the first embodiment includes a step of forming the film 130 on the entire surface of the sintered body 110. Thus, it is not necessary to form the film 130 partially, and the film 130 can be formed with a small number of steps. Furthermore, when the material of the film 130 is the same as the material of the sintered body 110, the characteristics such as the thermal expansion coefficient of the film 130 and the above characteristics of the sintered body 110 become the same. From this, the influence of distortion due to thermal stress can be suppressed. In addition, when the material of the film 130 is a metal that can transmit infrared rays, for example, Al, Cu, Au, or Ni as the metal, the surface roughness after the surface activation treatment can be further improved. Furthermore, since it bends by elastic deformation, joint strength can be improved. When the material of the film 130 is Al, it is easy to oxidize, but when the surface is activated, it is easy to join. In addition, when Au is used, it is not oxidized even in the atmosphere, so the process management becomes easy. Furthermore, since the elastic modulus of Au is low, the effect of reducing the flatness is great. In addition, Cu is easy to handle because it is intermediate between Al and Au.

  In addition, the method for manufacturing a semiconductor device according to the first embodiment includes a step of forming the sintered body 110 with the molding die 100 and a step of removing the molding die 100. Then, the process of forming the film | membrane 130 in the sintered compact 110 is included. Thereby, after removing the molding die 100 from the sintered body 110, the film 130 is formed, so that the molding die 100 can be easily removed. Furthermore, since the molding die 100 can be removed and handled in a wafer state, the process of forming the film 130 is facilitated. In addition, when the sintered body 110 is formed after the film 130 made of ZnS is formed, the transmittance of the film 130 is reduced by heat during sintering. However, since the film 130 is formed after the sintered body 110 is formed, a decrease in the transmittance of the film 130 can be avoided.

  In the semiconductor device manufactured using the method for manufacturing a semiconductor device according to the first embodiment, the chip substrate 160 is mounted with the infrared sensor 1620. And the infrared sensor 1620 is vacuum-sealed by carrying out surface activation normal temperature bonding of the chip substrate 160 and the sealing substrate 10. Thus, the infrared sensor 1620 can be protected from external impact, moisture absorption, and dust.

  Next, an application example (hereinafter referred to as an application example) in which the semiconductor device manufacturing method according to the first embodiment is applied to manufacture of a wafer level chip scale package (hereinafter referred to as a wafer level package) will be described. This will be described with reference to FIG. In addition, regarding a semiconductor device manufactured using the method for manufacturing a semiconductor device according to this application example, the same reference numerals are given to the same structures as those in the first embodiment, and description thereof is omitted. As shown in FIG. 3F, the semiconductor device manufactured by using the method for manufacturing a semiconductor device according to this application example has a structure including a plurality of the same semiconductor devices as the semiconductor device shown in FIG. It has become. Thereafter, the semiconductor devices are separated into a plurality of semiconductor devices that are the same as those shown in FIG.

  FIG. 3 is a cross-sectional process diagram illustrating a process when the method for manufacturing the semiconductor device shown in FIG. 2 is applied to the manufacture of a wafer level package. Here, FIG. 3A is a step of forming the sintered body 210 by the molding die 200 which is a mold, and FIG. 3B is a step of removing the molding die 200. FIG. 3C shows a process of forming a film 230 with fewer crystal grains and a uniform plane orientation on the sintered body 210 as compared with the sintered body 210. FIG. 3D shows a through electrode wiring. 140 is a step of forming 140. FIG. 3E shows a step of polishing in order to planarize the film 231, and FIG. 3F shows a step of surface activation room temperature bonding of the chip substrate 260 and the film 232 as the first substrate. .

  In the step shown in FIG. 3A, as in the first embodiment, the molding die 200 is filled with a powdery material, and the sintered body 210 is formed by sintering. The manufacturing method may be a hot press method or the like. For example, when the material of the sintered body 210 is ZnS, the sintered body 210 is formed if the sintering temperature is about 10 minutes under an environment of about 1000 ° C. for about 5 minutes. Next, in the step shown in FIG. 3B, the molding die 200 is removed from the sintered body 210 as in the first embodiment. By this step, the shape of the molding die 200 is transferred as it is to the sintered body 210. That is, a counterbore is formed on one side of the sintered body 210.

  Next, in the step shown in FIG. 3C, as in the first embodiment, the film 230 having fewer crystal grains and having the same plane orientation than the sintered body 210 is formed in the counterbore of the sintered body 210. It is formed on the entire surface on the side where there is. Thereby, the permeation | transmission part and junction part of the film | membrane 230 are formed. As a method for forming the film 230, a CVD method, a PVD method (sputtering, vapor deposition), plating, or the like may be used. In any case, the film 230 can obtain a uniform film quality. When the material of the film 230 is ZnS, the CVD method is desirable. The film 230 needs to have a sufficient thickness so that the sintered body 210 does not come out even when lapping and polishing, and there is no problem if it is about 50 μm thick. Note that the material of the film 230 is limited to a material that can transmit infrared rays. That is, the same material as the material of the sintered body 210 or a metal that can transmit infrared rays is desirable. For example, Al, Cu, Au, or Ni can be used as the metal.

  Next, in the step shown in FIG. 3D, the through electrode wiring 140 is formed as in the first embodiment. Specifically, first, fine holes are drilled in the film 230 and the sintered body 210 with a drill or a laser. The hole is filled with a metal such as Cu or solder by plating or the like. Thereby, the through electrode wiring 140 is formed, and the film 231 and the sintered body 211 are formed. Next, in the step shown in FIG. 3E, the bonding portion of the film 231 is planarized as in the first embodiment. As a planarization method, first, rough polishing is performed in order to remove the height variation of the joint portion of the film 231. Then, when the surface roughness Ra of the joint portion of the film 231 becomes about 10 nm or less, fine polishing is performed. Specifically, the sintered body 211 side is fixed with a polishing jig 251. The film 231 is pressed against the pad 252 and finally polished until the surface of the bonding portion of the film 231 is planarized at the atomic level.

  Next, in the step shown in FIG. 3F, similarly to the first embodiment, the surface activating normal temperature bonding is performed between the bonding portion of the film 232 planarized at the atomic level and the chip substrate 260. Since the surface activated room temperature bonding is performed in a vacuum, the infrared sensor 1620 is sealed in a vacuum. Specifically, wiring is drawn from the infrared sensor 1620 in order to extract a signal from the infrared sensor 1620 from the sealing substrate 20 side which is the second substrate. An electrode pad is formed at the end of the wiring from the infrared sensor 1620, and the metal bump 150 is disposed on the electrode pad. Further, the film 232 and the chip substrate 260 are surface-activated at room temperature bonding while being aligned so that the position of the through-electrode wiring 140 on the sealing substrate 20 and the metal bump 150 coincide. Since the metal bump 150 and the through electrode wiring 140 do not apply heat, they contact and elastically deform. Thereby, the metal bump 150 and the through electrode wiring 140 are electrically connected. Therefore, the height of the metal bump 150 is slightly higher than the height between the chip substrate 260 and the sealing substrate 20. Furthermore, all are made uniform so that stress is not generated as much as possible. The bump may be a wire bump or a plating bump.

  As described above, the semiconductor device manufacturing method according to this application example can obtain the same effects as those of the first embodiment. In addition, a semiconductor device manufactured using the method for manufacturing a semiconductor device according to this application example has a structure including a plurality of the same semiconductor devices as the semiconductor device shown in FIG. As a result, it becomes possible to simultaneously manufacture a plurality of the same semiconductor devices as the semiconductor device shown in FIG. 1, and the cost can be greatly reduced. Further, since the semiconductor device has a structure including a plurality of the same semiconductor devices as the semiconductor device shown in FIG. 1, in the process shown in FIG. Since the polishing is performed uniformly, the planarization accuracy of the joint portion of the film 231 is improved.

(Second Embodiment)
Next, a method for manufacturing a semiconductor device according to the second embodiment will be described with reference to FIG. 4 focusing on differences from the method for manufacturing a semiconductor device according to the first embodiment. Also, with respect to a semiconductor device manufactured using the method for manufacturing a semiconductor device according to the second embodiment, the same reference numerals are given to the same structures as those in the first embodiment, and description thereof is omitted. The semiconductor device according to the second embodiment is the same as that of the first embodiment. FIG. 4 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor device according to the second embodiment. Here, FIG. 4A to FIG. 4C are steps of forming the film 130 on the sintered body 110. Specifically, FIG. 4A shows a first step of forming the film 130 on the molding die 300 which is a mold, and FIG. 4B shows the sintered body 110 on the film 130. It is the 2nd process to form. FIG. 4C shows a third step of removing the molding dies 300 and 301. FIGS. 4D to 4F are the same steps as FIGS. 2D to 2F. Only the steps shown in FIGS. 4A to 4C will be described below.

  In the step shown in FIG. 4A, the film 130 is formed on the entire surface of the molding die 300. Thereby, the transmission part 1320 and a junction part are formed. As a method of forming the film 130, a CVD method, a PVD method, plating, or the like may be used as in the first embodiment. In any case, the film 130 can obtain a uniform film quality. When the material of the film 130 is ZnS, the CVD method is desirable. There is no problem if the thickness of the film 130 is about 50 μm as in the first embodiment. Further, in order to easily remove the molding die 300 from the film 130, a release material may be applied in advance to the entire surface of the molding die 300. In addition, the material of the film | membrane 130 is restricted to the material which can permeate | transmit infrared rays similarly to 1st Embodiment. That is, the same material as the material of the sintered body 110 or a metal that can transmit infrared rays is desirable. For example, Al, Cu, Au, or Ni can be used as the metal.

  Next, in the process shown in FIG. 4B, a powdery material is filled in the space surrounded by the molding die 301 and the film 130 which are the molds. The sintered body 110 is formed by sintering. The manufacturing method may be a hot press method or the like. For example, when the material of the sintered body 110 is ZnS, as in the first embodiment, the sintered body 110 can be formed by applying a pressure of several tens of MPa for about 5 minutes in an environment of about 1000 ° C. It is formed. Next, in the step shown in FIG. 4C, the molding die 301 is removed from the sintered body 110. Further, the mold 300 is removed from the membrane 130. By this step, the shape of the molding die 300 is transferred as it is to the sintered body 110. That is, a counterbore is formed on one side of the sintered body 110. In this way, the film 130 is formed on the entire surface of the sintered body 110 on the side where the counterbore is present.

  As described above, the method for manufacturing a semiconductor device according to the second embodiment includes the step of forming, on the sintered body 110, the film 130 having fewer crystal grains than the sintered body 110 and having a uniform plane orientation. Also included is a step of surface activation room temperature bonding of the chip substrate 160 and the film 132. Thereby, the surface-activated normal temperature bonding of the sealing substrate 10 and the chip substrate 160 formed by sintering can be performed without forming a gap between the bonding portion 1325 and the chip substrate 160, and the bonding strength can be increased. Reduction can be suppressed. Therefore, it is possible to suppress an increase in the number of defective products having insufficient bonding strength and a deterioration in yield.

  In the method for manufacturing a semiconductor device according to the second embodiment, the space surrounded by the molding die 300 and the film 130 is filled with a powdery material. The sintered body 110 is formed by sintering. Thereby, the sintered compact 110 can be formed in arbitrary shapes. For example, a complicated shape such as the sintered body 112 shown in FIG. Further, when the sintered body 110 is made of ZnS, infrared rays of 8 μm to 12 μm can be transmitted.

  The semiconductor device manufacturing method according to the second embodiment includes a first step of forming the film 130 on the molding die 300 by CVD, PVD, plating, or the like. A second step of forming the sintered body 110 on the film 130 is included. A third step of removing the molds 300 and 301 is included. Furthermore, the process of grind | polishing the junction part of the film | membrane 131 is included. The film 130 can obtain a uniform film quality. Thereby, the etching rate at the time of polishing becomes uniform. From this, the surface roughness Ra of the joint portion of the film 131 can be flattened to 1 nm or less. Therefore, the bonding strength between the chip substrate 160 and the sealing substrate 10 by surface activated room temperature bonding is increased. That is, the reliability such as airtightness when vacuum-sealing is improved, and the yield is greatly improved.

  In addition, the method for manufacturing a semiconductor device according to the second embodiment includes a step of forming the film 130 on the entire surface of the sintered body 110. Thus, it is not necessary to form the film 130 partially, and the film 130 can be formed with a small number of steps. Furthermore, when the material of the film 130 is the same as the material of the sintered body 110, the characteristics such as the thermal expansion coefficient of the film 130 and the above characteristics of the sintered body 110 become the same. From this, the influence of distortion due to thermal stress can be suppressed. In addition, when the material of the film 130 is a metal that can transmit infrared rays, for example, Al, Cu, Au, or Ni as the metal, the surface roughness after the surface activation treatment can be further improved. Furthermore, since it bends by elastic deformation, joint strength can be improved. When the material of the film 130 is Al, it is easy to oxidize, but when the surface is activated, it is easy to join. In addition, when Au is used, it is not oxidized even in the atmosphere, so the process management becomes easy. Furthermore, since the elastic modulus of Au is low, the effect of reducing the flatness is great. In addition, Cu is easy to handle because it is intermediate between Al and Au.

  In addition, the method for manufacturing a semiconductor device according to the second embodiment includes a first step of forming the film 130 on the molding die 300 and a second step of forming the sintered body 110 on the film 130. . Further, a third step of removing the molds 300 and 301 is included. Thereby, before forming the sintered body 110, the film | membrane 130 can be formed in the shaping | molding die 300 previously. From this, as shown in FIG. 1C, when the microlens 1321 or the like is formed in the transmission portion 1320 of the film 132, the microlens 1321 or the like can be formed with very high accuracy. Furthermore, the film 130 can be formed without considering the chemical resistance of the sintered body 110.

  In the semiconductor device manufactured using the semiconductor device manufacturing method according to the second embodiment, the chip substrate 160 has the infrared sensor 1620 mounted thereon. And the infrared sensor 1620 is vacuum-sealed by carrying out surface activation normal temperature bonding of the chip substrate 160 and the sealing substrate 10. Thus, the infrared sensor 1620 can be protected from external impact, moisture absorption, and dust.

(Third embodiment)
Next, a manufacturing method of the semiconductor device according to the third embodiment will be described with reference to FIG. 5 focusing on differences from the manufacturing method of the semiconductor device according to the first embodiment. In addition, regarding the semiconductor device manufactured using the method for manufacturing a semiconductor device according to the third embodiment, the same reference numerals are given to the same structures as those in the first embodiment, and description thereof is omitted. The semiconductor device according to the third embodiment is almost the same as that of the first embodiment. The semiconductor device according to the third embodiment is different from the first embodiment in a sealing substrate 40 that is a second substrate. The sealing substrate 40 includes a sintered body 411, a bonding portion film 432 that is a film, and a through electrode wiring 440. The bonding portion film 432 is formed only at the bonding portion between the sealing substrate 40 and the chip substrate 160. Therefore, the through electrode wiring 440 does not penetrate the bonding portion film 432. Further, the counterbore depth of the sintered body 411 is shallower than the counterbore depth of the sintered body 111 by the film thickness of the film 430.

  FIG. 5 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor device according to the third embodiment. Here, FIG. 5A is a step of forming the sintered body 410 with the molding die 400 which is a mold, and FIG. 5B is a step of removing the molding die 400. FIG. 5C shows a step of applying a resist 420 to the counterbore of the sintered body 410. FIG. 5D shows a film 430 having fewer crystal grains and having a uniform plane orientation than the sintered body 410. Is formed on the sintered body 410 and the resist 420. FIG. 5E is a step of removing the resist 420 and the film 430, and FIG. 5F is a step of forming the through electrode wiring 440. FIG. FIG. 5G shows a step of polishing in order to flatten the bonding portion film 431 which is a film, and FIG. 5H shows surface activation room temperature bonding between the chip substrate 160 and the bonding portion film 432. It is a process.

  In the step shown in FIG. 5A, similarly to the first embodiment, the molding die 400 is filled with a powdery material, and the sintered body 410 is formed by sintering. The manufacturing method may be a hot press method or the like. For example, when the material of the sintered body 410 is ZnS, the sintered body 410 is formed if the sintering temperature is about several minutes under an environment of about 1000 ° C. for about 5 minutes. Next, in the step shown in FIG. 5B, the molding die 400 is removed from the sintered body 410 as in the first embodiment. By this step, the shape of the molding die 400 is transferred as it is to the sintered body 410. That is, a counterbore is formed on one side of the sintered body 410.

  Next, in the step shown in FIG. 5C, a resist 420 is applied to the counterbore of the sintered body 410. The material of the resist 420 is a material that can withstand the film formation temperature of the film 430 and can be dissolved by a solvent in which the sintered body 410 does not dissolve. For example, consider a case where the material of the sintered body 410 is ZnS. Since ZnS has weak acid resistance, an acidic solvent cannot be used. Therefore, the material of the resist 420 is limited to a material that is alkaline and can be dissolved. Next, in the step shown in FIG. 5D, a film 430 having fewer crystal grains and having a uniform plane orientation than the sintered body 410 is formed on the entire surface of the sintered body 410 and the resist 420. As a method for forming the film 430, a CVD method, a PVD method, plating, or the like may be used. In any case, the film 430 can obtain a uniform film quality. When the material of the film 430 is ZnS, the CVD method is desirable. The film 430 needs to have a sufficient thickness so that the sintered body 410 does not come out even when lapping and polishing, and there is no problem if it is about 50 μm thick. Unlike the first embodiment, the material of the film 430 is not limited to a material that can transmit infrared rays. Therefore, the same material as the material of the sintered body 410 or a metal can be used.

  Next, in the step shown in FIG. 5E, the film 430 and the resist 420 formed on the resist 420 are removed by lift-off. In this way, the bonding portion film 431 is formed. Next, in the step shown in FIG. 5F, the through electrode wiring 440 is formed as in the first embodiment. Specifically, first, fine holes are drilled in the sintered body 410 with a drill, a laser, or the like. The hole is filled with a metal such as Cu or solder by plating or the like. As a result, the through electrode wiring 440 is formed to be a sintered body 411. Next, in the step shown in FIG. 5G, the bonding portion film 431 is planarized as in the first embodiment. As a flattening method, first, rough polishing is performed in order to remove the height variation of the bonding portion of the bonding portion film 431. Then, when the surface roughness Ra of the bonding portion of the bonding portion film 431 becomes about 10 nm or less, fine polishing is performed. Specifically, the sintered body 411 side is fixed with a polishing jig 151. The bonding portion film 431 is pressed against the pad 152 and finally polished until the surface of the bonding portion of the bonding portion film 431 is flattened at the atomic level.

  Next, in the step shown in FIG. 5H, similarly to the first embodiment, the bonding portion film 432 flattened at the atomic level and the chip substrate 160 are surface-activated at room temperature. Since the surface activated room temperature bonding is performed in a vacuum, the infrared sensor 1620 is sealed in a vacuum. Specifically, in order to extract a signal from the infrared sensor 1620 from the sealing substrate 40 side, wiring is routed from the infrared sensor 1620. An electrode pad is formed at the end of the wiring from the infrared sensor 1620, and the metal bump 150 is disposed on the electrode pad. Further, the bonding portion film 432 and the chip substrate 160 are surface-activated at room temperature bonding while being aligned so that the position of the through-electrode wiring 440 on the sealing substrate 40 and the metal bump 150 coincide with each other. Since the metal bump 150 and the through electrode wiring 440 do not apply heat, they contact and elastically deform. Thereby, the metal bump 150 and the through electrode wiring 440 are electrically connected. Therefore, the height of the metal bump 150 is slightly higher than the height between the chip substrate 160 and the sealing substrate 40. Furthermore, all are made uniform so that stress is not generated as much as possible. The bump may be a wire bump or a plating bump.

  As described above, in the method for manufacturing a semiconductor device according to the third embodiment, the step of forming the film 430 with fewer crystal grains and the same plane orientation on the sintered body 410 and the resist 420 as compared with the sintered body 410. including. Also included is a step of surface activation room temperature bonding between the chip substrate 160 and the bonding portion film 432. Accordingly, the sealing substrate 40 and the chip substrate 160 formed by sintering can be surface-activated and bonded at room temperature without forming a gap between the bonding portion film 432 and the chip substrate 160. A decrease in strength can be suppressed. Therefore, it is possible to suppress an increase in the number of defective products having insufficient bonding strength and a deterioration in yield.

  In the method for manufacturing a semiconductor device according to the third embodiment, the molding die 400 is filled with a powdery material, and the sintered body 410 is formed by sintering. Thereby, the sintered compact 410 can be formed in arbitrary shapes. For example, a complicated shape such as the sintered body 112 shown in FIG. Further, when the material of the sintered body 410 is ZnS, infrared rays of 8 μm to 12 μm can be transmitted.

  In addition, the semiconductor device manufacturing method according to the third embodiment includes a step of forming the film 430 on the sintered body 410 and the resist 420 by CVD, PVD, plating, or the like. Further, a step of polishing the bonding portion film 431 is included. Further, the film 430 can obtain a uniform film quality. Thereby, the etching rate at the time of polishing becomes uniform. From this, the surface roughness Ra of the bonding portion film 432 can be flattened to 1 nm or less. Therefore, the bonding strength between the chip substrate 160 and the sealing substrate 40 by surface activated room temperature bonding is increased. That is, the reliability such as airtightness when vacuum-sealing is improved, and the yield is greatly improved.

  In addition, the semiconductor device manufacturing method according to the third embodiment includes a step of forming the bonding portion film 432 only at the bonding portion between the sealing substrate 40 and the chip substrate 160. Thus, although the number of steps increases, a material that cannot transmit infrared rays can be used as the material of the film 430. When the material of the film 430 is a metal, the surface roughness after the surface activation treatment can be further improved. Furthermore, since it bends by elastic deformation, joint strength can be improved. Note that when the material of the film 430 is Al, it is easy to oxidize, but when the surface is activated, bonding is easy. In addition, when Au is used, it is not oxidized even in the atmosphere, so the process management becomes easy. Furthermore, since the elastic modulus of Au is low, the effect of reducing the flatness is great. In addition, Cu is easy to handle because it is intermediate between Al and Au. Furthermore, when the material of the film 430 is the same as that of the sintered body 410, the characteristics such as the thermal expansion coefficient of the film 430 and the above characteristics of the sintered body 410 are the same. From this, the influence of distortion due to thermal stress can be suppressed.

  In the method for manufacturing a semiconductor device according to the third embodiment, the bonding portion film 432 is formed only at the bonding portion between the sealing substrate 40 and the chip substrate 160 and is not formed at any place other than the bonding portion. When the film 430 is present between the infrared sensor 1620 and the sintered body 411, the film 430 may reduce the infrared transmittance, although it depends on the material of the film 430. However, since the film 430 does not exist between the infrared sensor 1620 and the sintered body 411, it is possible to prevent the film 430 from reducing the infrared transmittance.

  In addition, the method for manufacturing a semiconductor device according to the third embodiment includes a step of forming the sintered body 410 with the molding die 400 and a step of removing the molding die 400. Then, the process of forming the film | membrane 430 in the sintered compact 410 and the resist 420 is included. As a result, since the film 430 is formed after the molding die 400 is removed from the sintered body 410, the molding die 400 can be easily removed. Furthermore, since the mold 400 can be handled in the wafer state after removal, the process of forming the film 430 is facilitated.

  In the semiconductor device manufactured by using the semiconductor device manufacturing method according to the third embodiment, the chip substrate 160 is mounted with the infrared sensor 1620. And the infrared sensor 1620 is vacuum-sealed by carrying out surface activation normal temperature bonding of the chip substrate 160 and the sealing substrate 40. Thus, the infrared sensor 1620 can be protected from external impact, moisture absorption, and dust.

(Fourth embodiment)
Next, a manufacturing method of the semiconductor device according to the fourth embodiment will be described with reference to FIG. 6 focusing on differences from the manufacturing method of the semiconductor device according to the third embodiment. Also, in the semiconductor device manufactured by using the method for manufacturing a semiconductor device according to the fourth embodiment, the same reference numerals are given to the same structures as those in the third embodiment, and description thereof is omitted. The semiconductor device according to the fourth embodiment is the same as that of the third embodiment.

  FIG. 6 is a cross-sectional process diagram illustrating a method of manufacturing a semiconductor device according to the fourth embodiment. Here, FIG. 6A to FIG. 6E are processes for forming the bonding portion film 431 on the sintered body 410. Specifically, FIG. 6A is a step of applying a resist 520 to the convex portions of the molding die 500 that is a mold, and FIG. 6B is a film on the molding die 500 and the resist 520. This is the first step of forming 430. FIG. 6C is a step of removing the resist 520 and the film 430, and FIG. 6D is a second step of forming the sintered body 410 on the bonding portion film 431 and the molding die 500. . FIG. 6E shows a third step of removing the molding dies 500 and 501. 6 (f) to 6 (h) are the same steps as FIGS. 5 (f) to 5 (h). Hereinafter, only the steps shown in FIGS. 6A to 6E will be described.

  In the step shown in FIG. 6A, a resist 520 is applied to the surface of the convex portion of the molding die 500. The material of the resist 520 is limited to a material that can withstand the deposition temperature of the film 430. Next, in the step shown in FIG. 6B, a film 430 is formed on the entire surface of the resist 520 and the molding die 500. As a method for forming the film 430, a CVD method, a PVD method, plating, or the like may be used as in the third embodiment. In any case, the film 430 can obtain a uniform film quality. When the material of the film 430 is ZnS, the CVD method is desirable. There is no problem if the film thickness of the film 430 is about 50 μm as in the third embodiment. The material of the film 430 is not limited to a material that can transmit infrared rays, as in the third embodiment. Therefore, the same material as the material of the sintered body 410 or a metal can be used. Further, in order to make it easy to remove the molding die 500 from the bonding portion film 431 and the sintered body 410, a release material may be applied to the entire surface of the molding die 500 in advance.

  Next, in the step shown in FIG. 6C, the film 430 and the resist 520 formed on the resist 520 are removed by lift-off. In this way, the bonding portion film 431 is formed. Here, since this step is performed before the sintered body 410 is formed, unlike the third embodiment, it is not necessary to consider the chemical resistance of the sintered body 410. Next, in a step shown in FIG. 6D, a powdery material is filled in a space surrounded by the bonding portion film 431, the molding die 500, and the molding die 501 which is a mold. A sintered body 410 is formed by sintering. The manufacturing method may be a hot press method or the like. For example, when the material of the sintered body 410 is ZnS, as in the third embodiment, the sintered body 410 can be formed by applying a pressure of several tens of MPa for about 5 minutes in an environment of about 1000 ° C. It is formed. Next, in the step shown in FIG. 6 (e), the molding dies 500 and 501 are removed from the sintered body 410 and the bonding portion film 431. Through this step, the sintered body 410 has the shape formed by the molding dies 500 and 501 and the bonding portion film 431 transferred as it is. That is, a counterbore is formed on one side of the sintered body 410. In this way, the bonding portion film 431 is formed on the sintered body 410.

  As described above, the manufacturing method of the semiconductor device according to the fourth embodiment includes the step of forming, on the sintered body 410, the bonding portion film 431 having fewer crystal grains and having the same plane orientation as compared with the sintered body 410. Including. Also included is a step of surface activation room temperature bonding between the chip substrate 160 and the bonding portion film 432. Accordingly, the sealing substrate 40 and the chip substrate 160 formed by sintering can be surface-activated and bonded at room temperature without forming a gap between the bonding portion film 432 and the chip substrate 160. A decrease in strength can be suppressed. Therefore, it is possible to suppress an increase in the number of defective products having insufficient bonding strength and a deterioration in yield.

  In the semiconductor device manufacturing method according to the fourth embodiment, the space surrounded by the molding dies 500 and 501 and the bonding portion film 431 is filled with a powdery material. A sintered body 410 is formed by sintering. Thereby, the sintered compact 410 can be formed in arbitrary shapes. For example, a complicated shape such as the sintered body 112 shown in FIG. Further, when the material of the sintered body 410 is ZnS, infrared rays of 8 μm to 12 μm can be transmitted.

  Further, the semiconductor device manufacturing method according to the fourth embodiment includes a first step of forming the film 430 on the molding die 500 and the resist 520 by CVD, PVD, plating, or the like. A step of removing the film 430 and the resist 520 formed on the resist 520 and a second step of forming the sintered body 410 on the bonding portion film 431 are included. A third step of removing the molds 500 and 501 is included. Further, a step of polishing the bonding portion film 431 is included. The film 430 can obtain a uniform film quality. Thereby, the etching rate at the time of polishing becomes uniform. From this, the surface roughness Ra of the bonding portion film 432 can be flattened to 1 nm or less. Therefore, the bonding strength between the chip substrate 160 and the sealing substrate 40 by surface activated room temperature bonding is increased. That is, the reliability such as airtightness when vacuum-sealing is improved, and the yield is greatly improved.

  In addition, the semiconductor device manufacturing method according to the fourth embodiment includes a step of forming the bonding portion film 432 only at the bonding portion between the sealing substrate 40 and the chip substrate 160. Thus, although the number of steps increases, a material that cannot transmit infrared rays can be used as the material of the film 430. When the material of the film 430 is a metal, the surface roughness after the surface activation treatment can be further improved. Furthermore, since it bends by elastic deformation, joint strength can be improved. Note that when the material of the film 430 is Al, it is easy to oxidize, but when the surface is activated, bonding is easy. In addition, when Au is used, it is not oxidized even in the atmosphere, so the process management becomes easy. Furthermore, since the elastic modulus of Au is low, the effect of reducing the flatness is great. In addition, Cu is easy to handle because it is intermediate between Al and Au. Furthermore, when the material of the film 430 is the same as that of the sintered body 410, the characteristics such as the thermal expansion coefficient of the film 430 and the above characteristics of the sintered body 410 are the same. From this, the influence of distortion due to thermal stress can be suppressed.

  Further, in the method of manufacturing a semiconductor device according to the fourth embodiment, the bonding portion film 432 is formed only at the bonding portion between the sealing substrate 40 and the chip substrate 160 and is not formed at any place other than the bonding portion. When the film 430 is present between the infrared sensor 1620 and the sintered body 411, the film 430 may reduce the infrared transmittance, although it depends on the material of the film 430. However, since the film 430 does not exist between the infrared sensor 1620 and the sintered body 411, it is possible to prevent the film 430 from reducing the infrared transmittance.

  In addition, the method for manufacturing a semiconductor device according to the fourth embodiment includes a first step of forming a film 430 on the molding die 500 and the resist 520. A step of removing the film 430 and the resist 520 formed on the resist 520 and a second step of forming the sintered body 410 on the bonding portion film 431 are included. A third step of removing the molds 500 and 501 is included. Thereby, before forming the sintered body 410, the bonding portion film 431 can be formed in advance. Thus, the bonding portion film 431 can be formed without considering the chemical resistance of the sintered body 410. Similarly, the resist 520 can be removed without considering the chemical resistance of the sintered body 410.

  In the semiconductor device manufactured using the method for manufacturing a semiconductor device according to the fourth embodiment, the chip substrate 160 is mounted with the infrared sensor 1620. And the infrared sensor 1620 is vacuum-sealed by carrying out surface activation normal temperature bonding of the chip substrate 160 and the sealing substrate 40. Thus, the infrared sensor 1620 can be protected from external impact, moisture absorption, and dust.

(Fifth embodiment)
Next, a semiconductor device manufacturing method according to the fifth embodiment will be described with reference to FIG. 7 focusing on differences from the semiconductor device manufacturing method according to the third embodiment. Also, with respect to a semiconductor device manufactured by using the method for manufacturing a semiconductor device according to the fifth embodiment, the same reference numerals are given to the same structures as those of the third embodiment, and description thereof is omitted. The semiconductor device according to the fifth embodiment is almost the same as that of the third embodiment. The semiconductor device according to the fifth embodiment is different from the third embodiment in that the sealing substrate 60 which is the second substrate is different and the metal bumps 150 are not provided. Further, the through electrode wiring 641 is different in that the sealing substrate 60 is different from the sealing substrate 40 of the third embodiment. As will be described later, the through electrode wiring 640 is formed simultaneously with the bonding portion film 431.

  FIG. 7 is a cross-sectional process diagram illustrating the method of manufacturing the semiconductor device according to the fifth embodiment. Here, FIG. 7A to FIG. 7F are steps of forming the bonding portion film 431 on the sintered body 410. 7 (a) and 7 (b) are the same steps as FIG. 5 (a) and FIG. 5 (b). FIG. 7C is a step of applying a resist 620 to the counterbore, side surface, and back surface of the sintered body 410, and FIG. 7D is a step of forming a through hole 625 in the sintered body 410 and the resist 620. It is. FIG. 7E shows a step of plating the sintered body 411 and the resist 621, and FIG. 7F shows a step of removing the resist 621. FIG. 7G shows a step of polishing in order to flatten the bonding portion film 431, and FIG. 7H shows a step of surface activation room temperature bonding between the chip substrate 160 and the bonding portion film 432. . Hereinafter, only the steps shown in FIGS. 7C to 7H will be described.

  In the step shown in FIG. 7C, a resist 620 is applied to the counterbore, side surface, and back surface of the sintered body 410. That is, later, a resist 620 is applied around the sintered body 410 except for a portion of the sealing substrate 60 that becomes a joint portion with the chip substrate 160. The material of the resist 620 is limited to a material that can withstand the plating temperature and that can be dissolved by a solvent that does not dissolve the sintered body 411. For example, consider a case where the material of the sintered body 410 is ZnS. Since ZnS has weak acid resistance, an acidic solvent cannot be used. Therefore, the material of the resist 620 is limited to a material that is alkaline and can be dissolved. Next, in the step shown in FIG. 7D, a through hole 625 for the through electrode wiring 640 is formed to form a sintered body 411 and a resist 621. Specifically, fine holes are formed in the sintered body 410 and the resist 620 with a drill, a laser, or the like.

  Next, in the step shown in FIG. 7E, the periphery of the sintered body 411 and the resist 621 is plated to form a metal plating 630. Thereby, the metal plating 630 is filled in the through hole 625. As the plating method, electroless plating, electrolytic plating, or the like can be used. Further, the material of the metal plating 630 is limited to metals such as Cu and solder capable of through-hole filling. Next, in the step shown in FIG. 7F, the metal plating 630 and the resist 621 processed into the resist 621 are removed by lift-off. In this way, the bonding portion film 431 is formed on the sintered body 411. For this reason, the film | membrane 431 for junction parts can obtain uniform film quality. The film thickness of the bonding portion film 431 needs to be sufficiently thick so that the sintered body 411 does not come out even when lapping and polishing, and there is no problem if it is about 50 μm thick. At the same time, the through electrode wiring 640 is also formed.

  Next, in the step shown in FIG. 7G, the bonding portion film 431 is planarized as in the third embodiment. At the same time, the through electrode wiring 640 is also planarized. As a flattening method, first, rough polishing is performed in order to remove the height variation of the bonding portion of the bonding portion film 431. Then, when the surface roughness Ra of the bonding portion of the bonding portion film 431 becomes about 10 nm or less, fine polishing is performed. Specifically, the sintered body 411 side is fixed with a polishing jig 151. The bonding portion film 431 is pressed against the pad 152 and finally polished until the surface of the bonding portion of the bonding portion film 431 is flattened at the atomic level. As a result, the bonding surface of the bonding portion film 432 flattened at the primitive level with the chip substrate 160 and the end surface on the chip substrate 160 side of the through electrode wiring 641 become the same plane.

  Next, in the step shown in FIG. 7H, similarly to the third embodiment, the bonding portion film 432 flattened at the atomic level and the chip substrate 160 are surface-activated at room temperature bonding. Since the surface activated room temperature bonding is performed in a vacuum, the infrared sensor 1620 is sealed in a vacuum. Specifically, in order to take out a signal from the infrared sensor 1620 from the sealing substrate 60 side, wiring is routed from the infrared sensor 1620. An electrode pad is formed at the end of the wiring from the infrared sensor 1620. Furthermore, alignment is performed so that the end surface on the chip substrate 160 side of the through-electrode wiring 641 and the electrode pad coincide with each other. Thereafter, the bonding portion film 432 and the chip substrate 160 are surface-activated and bonded at room temperature.

  As described above, the method for manufacturing the semiconductor device according to the fifth embodiment includes the step of forming, on the sintered body 411, the bonding portion film 431 having fewer crystal grains and the same plane orientation as compared with the sintered body 411. Including. Also included is a step of surface activation room temperature bonding between the chip substrate 160 and the bonding portion film 432. Thereby, the surface-activated normal temperature bonding of the sealing substrate 60 and the chip substrate 160 formed by sintering can be performed without forming a gap between the bonding portion 432 and the chip substrate 160, and the bonding strength can be increased. Reduction can be suppressed. Therefore, it is possible to suppress an increase in the number of defective products having insufficient bonding strength and a deterioration in yield.

  In the semiconductor device manufacturing method according to the fifth embodiment, the molding die 400 is filled with a powdery material, and the sintered body 410 is formed by sintering. Thereby, the sintered compact 410 can be formed in arbitrary shapes. For example, a complicated shape such as the sintered body 112 shown in FIG. Further, when the material of the sintered body 410 is ZnS, infrared rays of 8 μm to 12 μm can be transmitted.

  In addition, the method for manufacturing a semiconductor device according to the fifth embodiment includes a step of applying a resist 620 around the sintered body 410 excluding a portion of the sealing substrate 60 that becomes a joint portion with the chip substrate 160. . A step of plating the sintered body 411 and the resist 621 is included. It includes a step of removing the resist 621 and forming a bonding portion film 431 having fewer crystal grains and having a uniform plane orientation than the sintered body 411. Further, a step of polishing the bonding portion film 431 is included. Thereby, the film | membrane 431 for junction parts can obtain uniform film quality. The etching rate at the time of polishing becomes uniform. From this, the surface roughness Ra of the bonding portion film 431 can be flattened to 1 nm or less. Therefore, the bonding strength between the chip substrate 160 and the sealing substrate 60 by surface activated room temperature bonding is increased. That is, the reliability such as airtightness when vacuum-sealing is improved, and the yield is greatly improved.

  In addition, the method for manufacturing a semiconductor device according to the fifth embodiment includes a step of applying a resist 620 around the sintered body 410 excluding a portion of the sealing substrate 60 that becomes a joint portion with the chip substrate 160. . A step of plating the sintered body 411 and the resist 621 is included. It includes a step of removing the resist 621 and forming a bonding portion film 431. Thus, the bonding portion film 432 is formed only at the bonding portion between the sealing substrate 60 and the chip substrate 160 and is not formed at any place other than the bonding portion. Therefore, a metal such as Cu or solder can be used as the material of the bonding portion film 431. For this reason, the surface roughness after the surface activation treatment can be further improved. Furthermore, since it bends by elastic deformation, joint strength can be improved.

  In the method for manufacturing a semiconductor device according to the fifth embodiment, the bonding portion film 432 is formed only at the bonding portion between the sealing substrate 60 and the chip substrate 160 and is not formed at any place other than the bonding portion. When the film 430 is present between the infrared sensor 1620 and the sintered body 411, the film 430 may reduce the infrared transmittance, although it depends on the material of the film 430. However, since the film 430 does not exist between the infrared sensor 1620 and the sintered body 411, it is possible to prevent the film 430 from reducing the infrared transmittance.

  In addition, the method for manufacturing a semiconductor device according to the fifth embodiment includes a step of forming the sintered body 410 with the molding die 400 and a step of removing the molding die 400. It includes a step of applying a resist 620 around the sintered body 410 excluding a portion of the sealing substrate 60 that becomes a joint portion with the chip substrate 160. A step of plating the sintered body 411 and the resist 621 is included. It includes a step of removing the resist 621 and forming a bonding portion film 431. As a result, since the bonding portion film 431 is formed after the molding die 400 is removed from the sintered body 410, the molding die 400 can be easily removed. Furthermore, after the molding die 400 is removed, it can be handled in the wafer state, so that the subsequent steps are facilitated.

  In addition, the method for manufacturing a semiconductor device according to the fifth embodiment includes a step of applying a resist 620 around the sintered body 410 excluding a portion of the sealing substrate 60 that becomes a joint portion with the chip substrate 160. . A step of forming a through hole 625 for the through electrode wiring 640 in the sintered body 410 and the resist 620 is included. A step of plating the sintered body 411 and the resist 621 is included. This includes a step of removing the resist 621 and forming the bonding portion film 431 and the through electrode wiring 640. Thereby, the film | membrane 431 for junction parts and the penetration electrode wiring 640 can be formed simultaneously. Therefore, the number of processes can be greatly reduced.

  In the semiconductor device manufacturing method according to the fifth embodiment, the bonding surface of the bonding portion film 432 with the chip substrate 160 and the end surface on the chip substrate 160 side of the through electrode wiring 641 are simultaneously polished. And it is trying to become the same plane. As a result, the metal bump 150 is not necessary, and the number of processes can be reduced. In the first to fourth embodiments, internal stress may occur in the sealing substrate and the chip substrate 160 due to variations in the height of the metal bumps 150. However, in the fifth embodiment, since the bonding surface of the bonding portion film 432 with the chip substrate 160 and the end surface on the chip substrate 160 side of the through electrode wiring 641 are on the same plane, the internal stress can be eliminated.

  In the semiconductor device manufactured by using the semiconductor device manufacturing method according to the fifth embodiment, the chip substrate 160 has the infrared sensor 1620 mounted thereon. And the infrared sensor 1620 is vacuum-sealed by carrying out surface activation normal temperature joining of the chip substrate 160 and the sealing substrate 60. Thus, the infrared sensor 1620 can be protected from external impact, moisture absorption, and dust.

  A semiconductor device manufactured using the method for manufacturing a semiconductor device according to the present invention includes chip substrates 160 and 260 on which an infrared sensor 1620 is mounted. Further, sealing substrates 10, 11, 20, 40, 60 that seal the infrared sensor 1620 by being bonded to the chip substrates 160, 260 are provided. Further, the sealing substrates 10, 11, 20, 40, 60 include sintered bodies 111, 112, 211, 411 and films 132, 232 or a bonding part film 432 formed by sintering. The method for manufacturing a semiconductor device according to the present invention includes the steps of sintering the films 130, 230, 430 or the bonding portion film 431 having fewer crystal grains and having the same plane orientation as compared with the sintered bodies 110, 210, 410, 411. A step of forming the bonded bodies 110, 210, 410, and 411. Further, there is a step of surface-activating normal temperature bonding of the chip substrates 160 and 260 and the films 132 and 232 or the bonding portion film 432. Thus, the sealing substrates 10, 11, 20, 40, 60 and the chip substrate 160 formed by sintering without forming a gap between the bonding portion 1325 or the bonding portion film 432 and the chip substrate 160. Can be surface-activated at room temperature bonding, and a decrease in bonding strength can be suppressed. Therefore, it is possible to suppress an increase in the number of defective products having insufficient bonding strength and a deterioration in yield.

  In addition, the method for manufacturing a semiconductor device according to the present invention includes a step of forming the sintered bodies 110, 210, and 410 using the molding dies 100, 200, and 400. Thereby, the sintered compacts 110, 210, and 410 can be formed in arbitrary shapes.

  The step of forming the film 130 or the bonding portion film 431 on the sintered bodies 110 and 410 in the method for manufacturing a semiconductor device according to the present invention is a first step of forming the films 130 and 430 on the molding dies 300 and 500. These steps are included. A second step of forming the sintered bodies 110 and 410 on the films 130 and 430 and a third step of removing the molds 300, 301, 500, and 501 are included. Thereby, the sintered compacts 110 and 410 can be formed in arbitrary shapes. Furthermore, before forming the sintered bodies 110 and 410, the films 130 and 430 can be formed on the molds 300 and 500 in advance. Therefore, the films 130 and 430 can be formed without considering the chemical resistance of the sintered bodies 110 and 410.

  Further, the bonding portion film 432 in the method for manufacturing a semiconductor device according to the present invention is formed only at the bonding portion between the sealing substrates 40 and 60 and the chip substrate 160.

  Further, the films 132 and 232 or the junction film 432 in the method for manufacturing a semiconductor device according to the present invention is a metal. From this, the surface roughness after the surface activation treatment can be further improved. Furthermore, since it bends by elastic deformation, joint strength can be improved.

  In addition, the films 132 and 232 or the bonding part film 432 in the method for manufacturing a semiconductor device according to the present invention are made of the same material as that of the sintered bodies 111, 211 and 411. Accordingly, the characteristics such as the thermal expansion coefficient of the films 132 and 232 or the bonding part film 432 are the same as the characteristics of the sintered bodies 111, 211, and 411. From this, the influence of distortion due to thermal stress can be suppressed.

  In addition, a semiconductor device manufactured using the method for manufacturing a semiconductor device according to the present invention includes a chip substrate 160 on which an infrared sensor 1620 is mounted. Further, a sealing substrate 60 that is bonded to the chip substrate 160 and seals the infrared sensor 1620 is provided. The sealing substrate 60 includes a sintered body 411 and a bonding portion film 432 formed by sintering. The method for manufacturing a semiconductor device according to the present invention includes a step of forming a sintered body 410 with a molding die 400. It includes a step of applying a resist 620 around the sintered body 410 excluding a portion of the sealing substrate 60 that becomes a joint portion with the chip substrate 160. A step of forming a through hole 625 for the through electrode wiring 640 in the sintered body 410 and the resist 620 and a step of plating the sintered body 411 and the resist 621 are included. This includes a step of removing the resist 621 and forming a bonding portion film 431 and a through electrode wiring 640 having fewer crystal grains and having a uniform plane orientation as compared with the sintered body 411. A step of surface-activating normal-temperature bonding between the chip substrate 160 and the bonding portion film 432. Thereby, the film | membrane 431 for junction parts and the penetration electrode wiring 640 can be formed simultaneously. Therefore, the number of processes can be greatly reduced.

  The embodiment described above is an example of the implementation of the present invention, and the scope of the present invention is not limited thereto, and other various embodiments are within the scope described in the claims. It is applicable to. For example, in the semiconductor device manufacturing method according to the first to fifth embodiments and application examples, the infrared sensor 1620 is mounted on the chip substrates 160 and 260, and the infrared sensor 1620 is vacuum-sealed. The present invention is not particularly limited to this, and other sensors may be vacuum sealed. Moreover, you may vacuum-seal electronic components other than a sensor.

  In the semiconductor device manufacturing method according to the first to fifth embodiments and application examples, a material that can transmit infrared rays is used as the material of the sintered bodies 111, 112, 211, and 411. It is not limited. If the electronic component is not an infrared sensor, other materials may be used.

  In the semiconductor device manufacturing method according to the first to fifth embodiments and application examples, the through electrode wirings 140, 440 and 641 are formed on the sealing substrates 10, 11, 20, 40 and 60. However, it is not particularly limited to this. It may be formed on the chip substrates 160 and 260. For example, as shown in FIG. 8, the through electrode wiring 7610 may be formed on the chip substrate 760. Note that the film 730 is formed by polishing the film 130.

  Further, in the method for manufacturing a semiconductor device according to the third to fifth embodiments, the counterbore is formed on the sintered body 411. However, the present invention is not limited to this, and the counterbore may not be formed. . In this case, this can be easily realized by making the thickness of the bonding portion film 432 thicker than the height of the infrared sensor 1620.

  In the application example, the method for manufacturing the semiconductor device according to the first embodiment is applied to the manufacture of a wafer level package. However, the present invention is not particularly limited to this, and the second to fifth embodiments are not limited thereto. Such a method for manufacturing a semiconductor device may be applied.

The figure which shows the structure of the semiconductor device manufactured using the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. Sectional process drawing which shows the manufacturing method of the semiconductor device which concerns on 1st Embodiment. FIG. 3 is a cross-sectional process diagram showing a process when the method for manufacturing the semiconductor device shown in FIG. Sectional process drawing which shows the manufacturing method of the semiconductor device which concerns on 2nd Embodiment. Sectional process drawing which shows the manufacturing method of the semiconductor device which concerns on 3rd Embodiment. Sectional process drawing which shows the manufacturing method of the semiconductor device which concerns on 4th Embodiment. Sectional process drawing which shows the manufacturing method of the semiconductor device which concerns on 5th Embodiment. FIG. 9 is a diagram showing a modification of the semiconductor device shown in FIG. 1.

Explanation of symbols

10, 11, 20, 40, 60 Substrate for sealing which is the second substrate,
100, 200, 400 Molds that are molds,
110, 111, 112, 210, 211, 410, 411 sintered body,
130, 131, 132, 230, 231, 232, 430, 730 membrane,
140, 440, 640, 641 through electrode wiring, 150 metal bump,
151, 251 Polishing jig, 152, 252 pad,
160, 260, 760 Chip substrate which is the first substrate,
300, 301, 500, 501 Molds that are molds,
420, 520, 620, 621 resist,
431, 432 films for joints, 625 through holes, 630 metal plating,
1320 Transmission part, 1321 Micro lens, 1325 Joining part,
1610 cavity part, 1620 infrared sensor which is an electronic component,
7610 Through-electrode wiring,

Claims (8)

A first board on which electronic components are mounted;
A method of manufacturing a semiconductor device comprising: a sintered body and a film formed by sintering; and a second substrate that is bonded to the first substrate and seals the electronic component,
Forming the film with fewer crystal grains and having a uniform plane orientation compared to the sintered body on the sintered body;
A method of manufacturing a semiconductor device, comprising: a step of surface activation bonding the first substrate and the film.   The method for manufacturing a semiconductor device according to claim 1, further comprising a step of forming the sintered body with a mold. The step of forming the film on the sintered body includes a first step of forming the film on a mold,
A second step of forming the sintered body on the film;
The method for manufacturing a semiconductor device according to claim 1, further comprising a third step of removing the mold.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the film is formed only at a joint portion between the second substrate and the first substrate. 5.   The method of manufacturing a semiconductor device according to claim 1, wherein the film is a metal.   The method of manufacturing a semiconductor device according to claim 1, wherein the film is made of the same material as that of the sintered body. A first board on which electronic components are mounted;
A method of manufacturing a semiconductor device comprising: a sintered body and a film formed by sintering; and a second substrate that is bonded to the first substrate and seals the electronic component,
Forming the sintered body by a mold,
Applying a resist around the sintered body excluding a portion of the second substrate that becomes a joint with the first substrate;
Forming a through-hole for wiring in the sintered body and the resist;
Plating the sintered body and the resist;
Removing the resist, forming the film and the wiring with less crystal grains compared to the sintered body and having a uniform plane orientation; and
A method of manufacturing a semiconductor device, comprising: a step of surface activation bonding the first substrate and the film. A first board on which electronic components are mounted;
A second substrate that seals the electronic component by surface activation bonding with the first substrate, and a semiconductor device comprising:
The second substrate includes a sintered body formed by sintering, and the film having fewer crystal grains and having a uniform plane orientation than the sintered body.

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