JP2009168994A - Plasma display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display device allowing to increase the number of sustain pulses to attain high luminance and increase the number of subfields to increase the number of gradation for improvement in image quality. <P>SOLUTION: In this plasma display device, for shortening an address period during a drive sequence, functional powder, which is a monocrystal of any of MgO, SrO, CaO, and BaO, is arranged on a protective film covering a Y electrode group. The drive sequence includes a second drive sequence wherein a Y electrode (Y) becomes a positive electrode and weak discharge is carried out, and a third drive sequence wherein the Y electrode (Y) becomes a negative electrode and a lighted pixel is selected based on presence/absence of discharge. These drive sequences are carried out successively temporally. In this way, an address electric discharge delay is shortened, and surplus time can be allocated to increase luminance and to increase the number of gradation. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a plasma display device, and more particularly to a technique effective when applied to a driving sequence of a plasma display panel.

According to a study by the present inventor, with respect to the driving sequence of the plasma display panel, as described in Patent Document 1, for example, one subfield is composed of a reset period, an address period, and a sustain period. The One field is composed of a plurality of subfields having different sustain periods, for example. One field constitutes one picture, and a 60-field continuous TV movie is formed in one second. Patent Document 2 describes a technique for reducing the length of a subfield.
Japanese Patent No. 3394010 JP 2006-189864 A

  Incidentally, in the driving sequence of the plasma display panel as in Patent Document 1, the brightness of the plasma display panel is approximately proportional to the number of sustain pulses in the sustain period. On the other hand, in order to express the smoothness of the image quality of the plasma display panel, it is necessary to increase the number of gradations, and the number of gradations depends on the number of subfields. In the conventional plasma display panel, the drive sequence is designed to be full of time, and there is no choice but to reduce the gradation to increase the brightness or reduce the brightness to increase the gradation. It is an object of the present invention to improve at least one of brightness and gradation without sacrificing the other. Further, the technique of Patent Document 2 does not specify the voltage values of the cathode voltage (−V1) applied to the Y electrode during the pre-reset period and the cathode voltage (−Vy) during scanning.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display apparatus capable of realizing high brightness by increasing the number of sustain pulses and improving the image quality by increasing the number of gradations by increasing the number of subfields. .

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  In other words, the outline of a typical one is that in the configuration of the plasma display panel having the first electrode group and the second electrode group intersecting each other in order to shorten the address period in the drive sequence, the first electrode A functional powder that is a single crystal of MgO, SrO, CaO, or BaO is disposed on the protective film covering the group, and the drive sequence performs weak discharge with the first electrode serving as an anode. A second driving sequence and a third driving sequence for selecting a lighting pixel depending on the presence or absence of discharge with the first electrode serving as a cathode are sequentially performed in time. As a result, the delay in address discharge is shortened, so that the surplus time can be distributed to increase in luminance and increase in the number of gradations.

  Further, in the configuration of the plasma display panel in which the third electrode group is arranged in parallel with each of the first electrode group in addition to the first electrode group and the second electrode group, the same driving sequence is used. By applying, the address discharge delay is shortened, so that the surplus time can be distributed to increase in luminance or increase in the number of gradations.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  That is, the effect obtained by a typical one is that the time can be spared by reducing the address discharge delay, and that amount can be allocated to the increase in the number of sustain pulses and the number of subfields. The image quality can be improved by increasing the number of subfields and increasing the number of gradations by increasing the number of subfields.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

[Outline of Embodiment of the Present Invention]
In the embodiment of the present invention, the problem is solved by shortening the address period in the drive sequence. The address period is the sum of the scan times for one row and one row, and in order to shorten the entire time, it is necessary to shorten the one scan time. One scan time is defined by the time difference from the start of the address voltage pulse to the start of discharge. The time difference is known by the name of discharge delay.

  The present inventor investigated the discharge delay when various reset waveforms were used. As a result, it was found that as a reset immediately before the address, a discharge delay is shorter when a positive ramp waveform is inserted into the Y electrode than when a negative ramp waveform is input into the conventional Y electrode. Furthermore, it was found that address discharge delay can be shortened by accumulating electrons in the protective film on the Y electrode immediately before addressing.

  Each embodiment of the present invention will be specifically described based on the outline of the embodiment of the present invention.

[First Embodiment]
The plasma display device according to the first embodiment of the present invention will be described with reference to FIGS. In this embodiment, in order to make the features of the present invention easier to understand, the description will be made in comparison with the prior art.

<Configuration of plasma display panel>
An example of the configuration of the plasma display panel will be described with reference to FIG. FIG. 2 shows an example of a structure in which functional powder is arranged on the protective film of the plasma display panel.

  The plasma display panel 1 is formed by combining a front plate 10 and a back plate 20, and these are hermetically sealed and a gas containing Ne and Xe as main components is sealed at a pressure of 350 to 500 Torr.

  The front plate 10 includes a pair of X electrodes (X) and Y electrodes (Y), each of which is formed by combining a transparent electrode 14 and a metal bus electrode 15 having high conductivity on a glass substrate 11. The X electrode (X) and the Y electrode (Y) become one TV scanning line. The X electrode (X) and the Y electrode (Y) are covered with a dielectric layer 17 and further covered with a protective film 18. The dielectric layer 17 is made of low melting point glass. The protective film 18 is generally made of MgO formed by vapor deposition.

  In particular, the front plate 10 has a structure in which functional powders 40 are sparsely disposed on the protective film 18 as shown in FIG. This functional powder 40 is a single crystal powder of MgO, SrO, CaO, or BaO.

  On the other hand, the back plate 20 is formed on the glass substrate 21 in a direction intersecting with a plurality of address electrodes (A) and X electrodes (X) and Y electrodes (Y). These are covered with a dielectric layer 22, and barrier ribs 23 for partitioning discharge are formed thereon. Three types of red phosphors 24 of red (R), green (G), and blue (B), a green phosphor 25, and a blue phosphor 26 are formed between the barrier ribs 23.

  In the plasma display panel 1 configured as described above, each intersection region with the address electrode (A) is a pixel in a region sandwiched between each pair of the X electrode (X) and the Y electrode (Y), and adjacent to each other. Three sets of red (R), green (G), and blue (B) are used as one set.

  In the plasma display device, the plasma display panel 1 is attached to, for example, the front surface side of the base chassis, and a drive circuit that drives each electrode group of the plasma display panel 1 is attached to the back surface side of the base chassis. The drive circuit includes an X electrode drive circuit for driving an X electrode group composed of a plurality of X electrodes (X), a Y electrode drive circuit for driving a Y electrode group composed of a plurality of Y electrodes (Y), and a plurality of address electrodes. There is an address electrode drive circuit for driving the address electrode group consisting of (A). These drive circuits implement the drive sequence described later.

<Plasma display panel drive sequence>
An example of the driving sequence of the plasma display panel will be described with reference to FIG.

  One subfield is composed of a reset period, an address period, and a sustain period. Here, an example is shown in which ten subfields having different sustain periods are consecutively constituting one field. One field constitutes one picture, and a 60-field continuous TV movie is formed in one second. In an actual product, how many subfields are included in one field differs depending on the model.

<Driving Waveform of Conventional Technology for this Embodiment>
With reference to FIG. 4, an example of a conventional driving waveform for the present embodiment will be described.

  Here, a large-scale reset is used for the first subfield, and a small-scale reset is used for the second-10th subfield. This is intended to achieve both contrast and drive margin.

  In the reset period of the first subfield, first, a ramp waveform that gradually changes from 180 V to 400 V is applied to the Y electrode (Y) with the X electrode (X) at 0 V and the address electrode (A) at 0 V. Next, after the X electrode (X) is set to 50 V and the Y electrode (Y) is set to 0 V, a ramp waveform that gradually changes from 0 V to −200 V is input to the Y electrode (Y).

  The address period of the first subfield is -100V for the Y electrode (Y), 50V for the X electrode (X), 0V for the address electrode (A), and the Y electrode (Y) corresponding to one row on the screen in order. Scanning is performed with the voltage lowered to -220 V, and a voltage of 60 V is applied to the address electrode (A) of the column to be lit at the moment of scanning, thereby writing the selected cell and the non-selected cell. In the selected cell, a discharge occurs between the address electrode (A) and the Y electrode (Y), and negative wall charges are accumulated on the address electrode (A) and the X electrode (X), and positive wall charges are accumulated on the Y electrode (Y). Is done.

  In the sustain period of the first subfield, first, a voltage pulse of 180V is applied to the Y electrode (Y), 0V to the X electrode (X), and 0V to the address electrode (A). In the cell in which wall charges are accumulated in the address period, the discharge starts with the first pulse and continues to be discharged during the sustain period. Cells not selected in the address period are not discharged. Thereafter, pulses of 0V and 180V are alternately applied to the Y electrode (Y) and the X electrode (X) at a constant cycle, and finally a pulse of 180V is applied to the Y electrode (Y) and a pulse of 0V is applied to the X electrode (X). .

  In the reset period of the second to tenth subfields, a ramp waveform that gradually changes from 0 V to −200 V is input to the Y electrode (Y) with the X electrode (X) at 50 V and the address electrode (A) at 0 V. .

  The address period of the second to tenth subfields is exactly the same as that of the first subfield.

  The sustain period of the second to tenth subfields is exactly the same as that of the first subfield. Only in the 10th subfield, a pulse of 180 V is applied to the X electrode (X) and 0 V is applied to the Y electrode (Y).

  In this conventional driving waveform, the driving sequence is designed to fill the time, and at least one of the brightness and the number of gradations cannot be improved without sacrificing the other. Therefore, in this embodiment, this problem can be solved by applying a drive waveform described below.

<Driving waveform of this embodiment>
An example of the drive waveform of the present embodiment will be described with reference to FIG.

  Here, a large-scale reset is used for the first subfield, and a small-scale reset is used for the second-10th subfield. This is intended to achieve both contrast and drive margin.

  In the reset period of the first subfield, first, as the first drive sequence, the X electrode (X) is 0 V, the address electrode (A) is 0 V, and the Y electrode (Y) is gradually increased from 0 V to −300 V. Enter a ramp waveform that changes. Next, as a second driving sequence, after the X electrode (X) is set to −50 V and the Y electrode (Y) is set to 0 V, a ramp waveform that gradually changes from 0 V to 200 V is input to the Y electrode (Y).

  The address period of the first subfield corresponds to one row on the screen as a third drive sequence, in which the Y electrode (Y) is −100 V, the X electrode (X) is 50 V, and the address electrode (A) is 0 V. Scanning is performed by sequentially lowering the Y electrode (Y) to −220 V, and a voltage of 60 V is applied to the address electrode (A) of the column to be lit at the moment of scanning, thereby writing the selected cell and the non-selected cell. In the selected cell, a discharge occurs between the address electrode (A) and the Y electrode (Y), and negative wall charges are accumulated on the address electrode (A) and the X electrode (X), and positive wall charges are accumulated on the Y electrode (Y). Is done.

  In the sustain period of the first subfield, first, a voltage pulse of 180V is applied to the Y electrode (Y), 0V to the X electrode (X), and 0V to the address electrode (A). In the cell in which wall charges are accumulated in the address period, the discharge starts with the first pulse and continues to be discharged during the sustain period. Cells not selected in the address period are not discharged. Thereafter, pulses of 0V and 180V are alternately applied to the Y electrode (Y) and the X electrode (X) at a constant cycle, and finally a pulse of 180V is applied to the Y electrode (Y) and a pulse of 0V is applied to the X electrode (X). .

  In the reset period of the second to tenth subfields, a ramp waveform that gradually changes from 0 V to 200 V is applied to the Y electrode (Y) with the X electrode (X) at −50 V and the address electrode (A) at 0 V. (Second drive sequence).

  The address period of the second to tenth subfields is exactly the same as that of the first subfield (third driving sequence).

  The sustain period of the second to tenth subfields is exactly the same as that of the first subfield. Only in the 10th subfield, a pulse of 180 V is applied to the X electrode (X) and 0 V is applied to the Y electrode (Y).

  As described above, in the drive waveform of the present embodiment, in the first subfield and the second to tenth subfields, the Y electrode (Y) and the X electrode ( A weak discharge is generated by applying a ramp waveform in which the Y electrode (Y) serves as an anode and the X electrode (X) serves as a cathode. Then, in the third driving sequence, the lighting pixel is selected depending on whether or not there is a discharge in which the Y electrode (Y) serves as a cathode. These second and third drive sequences are successively performed in time sequence. In the first subfield, in the first driving sequence, a ramp waveform in which the Y electrode (Y) is a cathode and the X electrode (X) is an anode between the Y electrode (Y) and the X electrode (X). A weak discharge is generated by applying. It is also possible to apply an obtuse waveform instead of the ramp waveform.

  In particular, in the first subfield, the absolute value of the cathode voltage (−300 V) applied to the Y electrode (Y) in the first driving sequence is the cathode voltage applied to the Y electrode (Y) in the third driving sequence. The absolute value is larger than (−220V). The necessary voltage difference is required to be at least 50 V, and preferably 80 V as in the present embodiment. More preferably, 200V is required. The reason why such a voltage difference is necessary is that, if the scanning voltage in the third driving sequence is not shallower than the voltage in the first driving sequence, it causes erroneous lighting of non-selected cells.

<Effects of the present embodiment>
With reference to FIG. 6, the effect of the present embodiment will be described in comparison with the prior art for the present embodiment.

  In order to solve the problem by shortening the address period in the drive sequence, the present inventor has investigated the discharge delay when various reset waveforms are used. As a result, as a reset immediately before the address period, a positive ramp waveform is applied to the Y electrode (Y) as in this embodiment, rather than a negative ramp waveform applied to the Y electrode (Y) as in the prior art. It has been found that the discharge delay is shorter when. FIG. 6 shows an example of the comparison of the discharge delay in the address pulse after a certain elapsed time (resting time) after the weak discharge at the reset.

  In the address period, the elapsed time after reset for the scan of the first line is several tens of microseconds, but the elapsed time of the 1080th line is 1.08 milliseconds when the address pulse width is 1 microsecond. A typical plasma display panel has an address pulse width of 1.3 to 1.7 microseconds. In FIG. 6, Δ is a plot when using a large-scale reset waveform of the conventional driving waveform (FIG. 4) (conventional waveform), and ▲ is a large-scale reset waveform of the driving waveform (FIG. 5) in the present embodiment. FIG. 2 is a plot of (new waveform + functional powder) in the case of the structure (FIG. 2) in which functional powder is arranged. According to the present embodiment, the address discharge delay can be reduced by 10-30%. In addition, a circle indicates a plot (conventional waveform + functional powder) in the case of using a large-scale reset waveform of a conventional driving waveform (FIG. 4) and a structure (FIG. 2) in which functional powder is arranged, The mark is a plot when only the large-scale reset waveform of the drive waveform (FIG. 5) in this embodiment is used (new waveform).

  An example of a possible principle for shortening the address discharge delay is shown in FIG. In the reset of the prior art, since a negative voltage is applied to the Y electrode (Y), the ions 30 collide against the protective film 18 covering the electrode, and secondary electrons (e) are emitted from the inside. . For this reason, the protective film 18 on the Y electrode (Y) loses electrons and becomes a hole-rich state. When the address pulse is applied in this state, the number of electrons spontaneously jumping out from the Y electrode (Y) is small, priming is insufficient, and the address discharge delay is large.

  On the other hand, according to the present embodiment, since a positive voltage is applied to the Y electrode (Y) at the time of resetting, electrons (e) overflow on the protective film 18 covering the Y electrode (Y) immediately after resetting. become. Thereafter, when an address pulse is applied, electrons spontaneously jump out of the protective film 18 and become a priming source, thereby reducing the discharge delay. This effect becomes more prominent when the functional powder 40 is disposed. This is because the functional powder 40 has a property of easily collecting electrons upon reset.

  Thus, according to the present embodiment, the address discharge delay can be shortened by accumulating electrons in the protective film 18 on the Y electrode (Y) immediately before the address period. As a result, the address discharge delay is shortened, so that time can be afforded, and a high-luminance plasma display device can be realized by allocating that amount to the increase in the number of sustain pulses. Also, if the extra time is allocated to the increase in the number of subfields, the number of gradations can be increased and the image quality can be improved. Further, in the present embodiment, in comparison with Patent Document 2, the scan voltage in the third drive sequence is set to a voltage shallower than the voltage in the first drive sequence. The selected cell does not light up erroneously.

[Second Embodiment]
A plasma display apparatus according to a second embodiment of the present invention will be described with reference to FIG. The present embodiment is an example applied to a plasma display panel focusing on a Y electrode group composed of a plurality of Y electrodes intersecting with each other and an address electrode group composed of a plurality of address electrodes.

  The structure of the plasma display panel is the same as that shown in FIG. 1 in the first embodiment, and the structure in which the functional powder is arranged on the protective film of the plasma display panel is also shown in FIG. Is the same. Further, the drive sequence is the same as that shown in FIG. 3, and the drive waveform is the same as that shown in FIG.

  However, in this embodiment, in the arrangement of the X electrode (X), the Y electrode (Y), and the address electrode (A), the distance between the Y electrode (Y) and the address electrode (A) is Y electrode This is applied when the distance is shorter than the distance between (Y) and the X electrode (X).

  An example of a possible principle for shortening the address discharge delay in this embodiment is shown in FIG. In FIG. 8, 200 V is applied to the Y electrode (Y), −50 V is applied to the X electrode (X), and 0 V is applied to the address electrode (A). The potential difference between the Y electrode (Y) and the X electrode (X) is 250V, and the potential difference between the Y electrode (Y) and the address electrode (A) is 200V, but the distance between the Y electrode (Y) and the address electrode (A) is When the distance between the Y electrode (Y) and the X electrode (X) is shorter, the electric field between the Y electrode (Y) and the address electrode (A) becomes larger than between the Y electrode (Y) and the X electrode (X). The ions 30 are easily captured on the address electrode (A) side.

  That is, in the drive waveform of this embodiment (see FIG. 5), in the first subfield and the second to tenth subfields, the Y electrode (Y) arranged in the same pixel in the second drive sequence A weak discharge is generated by applying an obtuse wave or a ramp waveform between the address electrode (A) and the Y electrode (Y) serving as an anode and the address electrode (A) serving as a cathode. Then, in the third driving sequence, the lighting pixel is selected depending on whether or not there is a discharge in which the Y electrode (Y) serves as a cathode. These second and third drive sequences are successively performed in time sequence. Further, in the first subfield, in the first driving sequence, a blunt wave in which the Y electrode (Y) is a cathode and the address electrode (A) is an anode between the Y electrode (Y) and the address electrode (A). Alternatively, a weak discharge is generated by applying a ramp waveform.

  As described above, in this embodiment as well, as in the first embodiment, the address discharge delay can be reduced by accumulating electrons in the protective film 18 on the Y electrode (Y) immediately before the address period. Therefore, a high-luminance plasma display device can be realized by allocating the amount of this allowance to the increase in the number of sustain pulses, and the number of gradations can be realized by allocating the extra time to the increase in the number of subfields. Can increase the image quality.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The plasma display device of the present invention is particularly effective when applied to a driving sequence of a plasma display panel, and can be widely used in a consumer television receiver called the name of plasma television.

In the plasma display apparatus of the 1st Embodiment of this invention, it is a figure which shows an example of a structure of a plasma display panel. It is a figure which shows an example of the structure which has arrange | positioned functional powder on the protective film of the front plate in the plasma display apparatus of the 1st Embodiment of this invention. It is a figure which shows an example of the drive sequence of a plasma display panel in the plasma display apparatus of the 1st Embodiment of this invention. It is a figure which shows an example of the drive waveform of the prior art with respect to the 1st Embodiment of this invention. It is a figure which shows an example of a drive waveform in the plasma display apparatus of the 1st Embodiment of this invention. In the comparison of the effect of the 1st Embodiment of this invention and a prior art, it is a figure which shows an example of the discharge delay with respect to the elapsed time (rest time) from reset. It is a figure which shows an example of the principle considered about shortening of address discharge delay in the comparison with the 1st Embodiment of this invention and a prior art. It is a figure which shows an example of the principle considered about shortening of address discharge delay in the comparison with the 2nd Embodiment of this invention and a prior art.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Plasma display panel, 10 ... Front plate, 11 ... Glass substrate, 14 ... Transparent electrode, 15 ... Metal bus electrode, 17 ... Dielectric layer, 18 ... Protective film, 20 ... Back plate, 21 ... Glass substrate, 22 ... Dielectric layer, 23 ... partition, 24 ... red phosphor, 25 ... green phosphor, 26 ... blue phosphor, 30 ... ion, 40 ... functional powder.

Claims (7)

At least a first electrode group and a second electrode group intersecting each other, wherein at least the first electrode group is covered with a dielectric layer and a protective film, and the first electrode group and the second electrode group A plasma display panel in which each intersection with the electrode group is a pixel,
A driving circuit for driving the first electrode group and the second electrode group of the plasma display panel;
A functional powder that is a single crystal of MgO, SrO, CaO, or BaO is disposed on the protective film.
The driving sequence of the plasma display panel by the driving circuit includes a second driving sequence for performing weak discharge in which at least one first electrode of the first electrode group serves as an anode, and the first electrode includes: A driving sequence in which the second driving sequence and the third driving sequence are sequentially performed sequentially in time, including a third driving sequence for selecting a lighting pixel depending on the presence or absence of a discharge serving as a cathode. There is provided a plasma display device. The plasma display device according to claim 1, wherein
In the second driving sequence, the first electrode is placed between the first electrode and the second electrode of the second electrode group disposed in the same pixel as the first electrode. A plasma display device, characterized in that the driving sequence generates a weak discharge by applying an obtuse wave or a ramp waveform that serves as an anode and the second electrode serves as a cathode. The plasma display device according to claim 2, wherein
Immediately before the second drive sequence, an obtuse wave or a ramp waveform between the first electrode and the second electrode, in which the first electrode serves as a cathode and the second electrode serves as an anode. A plasma display device comprising a first drive sequence that generates a weak discharge when applied. The plasma display device according to claim 3, wherein
The absolute value of the cathode voltage applied to the first electrode in the first driving sequence is larger than the absolute value of the cathode voltage applied to the first electrode in the third driving sequence, and the voltage difference is at least A plasma display device having a voltage of 50 V or more. The plasma display device according to claim 1, wherein
In the plasma display panel, a third electrode group is arranged in parallel with the first electrode group, one by one,
The drive circuit drives the third electrode group;
In the second driving sequence, the first electrode is placed between the first electrode and the third electrode of the third electrode group disposed in the same pixel as the first electrode. A plasma display device, characterized in that the driving sequence generates a weak discharge by applying an obtuse wave or a ramp waveform that becomes an anode and the third electrode becomes a cathode. The plasma display device according to claim 5, wherein
Immediately before the second driving sequence, an obtuse wave or a ramp waveform between the first electrode and the third electrode, in which the first electrode becomes a cathode and the third electrode becomes an anode. A plasma display device comprising a first drive sequence that generates a weak discharge when applied. The plasma display device according to claim 6, wherein
The absolute value of the cathode voltage applied to the first electrode in the first driving sequence is larger than the absolute value of the cathode voltage applied to the first electrode in the third driving sequence, and the voltage difference is at least A plasma display device having a voltage of 50 V or more.

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