JP2009165184A - Image information processing apparatus, image information processing method and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reproduce stable image density without a right-left density difference between machine bodies, by eliminating a variation in a right-left CCD characteristic difference by a CCD device difference, by making a correction by using a right-left correction circuit for clearly adjusting the correction, when using a 4-channel output CCD. <P>SOLUTION: In a gradation pattern read mode, an average value is determined by reading image data of a plurality of picture element parts on respective gradation data by scanning of a scanner part by gradation pattern read processing of an image processing ASIC. A basic part CPU 311 makes a correction processing calculation on the image data corresponding to the left side of the read 4-channel output CCD by a difference with the image data corresponding to the right side, and sets calculated correction data on a right-left correction table of the right-left correction circuit 160. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention includes an image information processing apparatus and an image information processing method for processing an electrical signal from a 4-channel output CCD that receives optical image information of a document and outputs an electrical signal, for example, and an image having the image information processing apparatus. The present invention relates to an image forming apparatus such as an electronic copying machine.

  In recent years, image forming apparatuses such as digital copying machines have rapidly spread. In such a digital copying machine, in order to output a scanner-input image with high quality, a CCD that can be read at a high resolution, a high-quality image processing, and a laser optical unit that realizes a high-resolution laser drive are used. It is increasing.

  Furthermore, there is a demand for higher speed digital copiers instead of high speed analog copiers, and there is a need for devices capable of realizing higher speed and higher resolution processing.

  As one of the devices, development of a CCD capable of realizing high-speed and high-resolution processing has been advanced and commercialization has started.

  As this high-speed CCD, a high-speed CCD having a pre-processing system using a 4-channel output CCD has already been announced.

  FIG. 17 shows a conventional 2-channel output CCD. In a preprocessing system using such a 2-channel output CCD, the same signal is transmitted as the output signal of the CCD with an even component (OS2) and an odd component (OS1). Processing is performed by a route (processing route).

  In the preprocessing system shown in FIG. 18, an image signal that has been subjected to signal amplification processing AMP and AD conversion (ADC) processing is a digital signal of 8 bits (pixels) per pixel in two channels of an even component DOBx and an odd component DOBx. The data is input to the scanner control ASIC, and is first synthesized into one channel. That is, as a result, the image data for one line is in the same state as the CCD pixel array.

  By applying a shading process to the one-channel image data AIDTx, a deviation in density gradient that occurs for each pixel of the image data with respect to the image density, that is, illuminance unevenness, CCD light receiving element (photodiode, etc.) Sensitivity fluctuations, the influence of dark current generated in the light receiving element, storage electrode and analog shift register in the CCD, and the influence of the afterimage phenomenon that occurs when the charge signal photoelectrically converted in the CCD is transferred by the analog shift register. Correction is performed for each pixel.

  The image data subjected to the shading correction is bit-inverted and transferred to the image processing ASIC as it is. Here, in the image processing ASIC, filtering processing, range correction processing, magnification conversion (enlargement / reduction) processing, density conversion processing, level conversion processing, A series of system correction processing by image processing such as tone processing is performed.

  However, in the case of a preprocessing system using a 4-channel output CCD that is compatible with high-speed processing compared to the conventional preprocessing system using a 2-channel output CCD, the right and left data are simultaneously output from the CCD output signal. The left even component OS2, the left odd component OS1, the right even component OS4, and the right odd component OS3 are processed by the same signal transmission path (processing path).

  In the signal amplification processing AMP of the preprocessing system, the left and right even components and odd components are respectively subjected to signal amplification and synthesis, and the AD signal (ADC) processed image signal is an even number in the state of a digital signal of 8 bits per pixel. Two channels of component DOBx and odd component DOAx are input to the high-speed scanner control ASIC.

  The even-numbered component DOBx and odd-numbered component DOAx two-channel signals input to the high-speed scanner control ASIC reduce the processing speed by bus width conversion and correct the density gradient deviation that occurs for each pixel of the image data relative to the image density. In order to perform the shading correction, it is processed as a 4-channel signal.

  After that, the image data subjected to the shading correction is bit-inverted, and after the order of the image data is arranged by raster conversion, the image data is transferred in units of four pixels in order to reduce the transfer speed from the internal high-speed processing speed. To the image processing ASIC.

  Here, a series of systems based on image processing such as filtering processing, range correction processing, magnification conversion (enlargement and reduction) processing, density conversion processing, and gradation processing after conversion into image data of one pixel unit in the image processing ASIC Correction processing is performed. When comparing the CCD signal output configurations, when the conventional 2-channel output CCD is viewed as the signal output order of the pixel signals for one line of the CCD, these two outputs are even and odd components respectively. Are output from the leftmost pixel signal in an aligned state (appropriately arranged in terms of image processing), whereas the current high-speed compatible CCD, that is, the 4-channel output CCD, outputs pixels for one line of the CCD as a signal output. When viewed as the order of signals, the 4-channel output is for even and odd components, the left output is from the leftmost pixel signal in order, the last is the center pixel signal, and the right output is from the rightmost pixel signal. Since the final pixel signal is output in the final state, the signal arrangement is not aligned (an inappropriate arrangement in terms of image processing).

  In this way, the 4-channel output CCD is configured to be used separately in the main scanning direction for left and right and odd and even. However, in the conventional 2-channel output CCD, regarding the variation in characteristics of the transfer path after shading with odd and even numbers. In the case of a four-channel output CCD, the difference in sensitivity characteristics between the left and right CCDs can be corrected by shading correction in the case of a four-channel output CCD. Since it appears in the processed image data and cannot be suppressed and corrected only by the conventional image processing, correction circuits for the left and right image data are provided before the image processing.

  However, the right and left image data correction circuits are necessary because the sensor characteristics differ between the left and right in the main scanning direction due to the configuration of the preprocessing system using a 4-channel output CCD for high speed. Still, it has not been clear about the adjustment of the clear correction method of the left and right correction circuits. However, if the left and right corrections are not performed, the difference between the left and right CCD characteristics varies depending on the CCD device, and the difference between the aircraft in terms of image density reproduction may increase.

  As described above, when a 4-channel output CCD is used for high-speed operation, a correction circuit is required because sensor characteristics differ between the left and right in the main scanning direction due to the configuration of the preprocessing system. The adjustment of the correction method of the left and right correction circuits is not clear. If this right and left correction is not performed, the difference in the CCD characteristics of the left and right differs depending on the CCD device, and the difference between the aircraft in terms of image density reproduction. There was a problem that a large and stable image density could not be reproduced.

  Therefore, in the present invention, when a 4-channel output CCD is used, correction is performed using a left / right correction circuit in which correction adjustment is clarified, and variations in the left and right CCD characteristics due to differences in CCD devices are eliminated. It is an object of the present invention to provide an image information processing apparatus, an image information processing method, and an image forming apparatus capable of reproducing a stable image density without a difference in left and right density.

  The present invention has been made on the basis of the above-mentioned problems. The storage means for storing optical signals obtained by photoelectrically converting optical image information in one line of elements, and the electric signals stored in the storage means for the one line. A first output unit that sequentially outputs an even component from an end of the first element in the first direction to a predetermined pixel as an even signal in the first direction; and an end of the one-line element in the first direction A second output unit that sequentially outputs odd components from the first pixel to the predetermined pixel as an odd signal in the first direction, and the predetermined pixel from the end of the one line in the second direction opposite to the first direction. A third output unit that sequentially outputs even-numbered components up to the second direction as an even signal, and an odd-numbered component from the end of the one line in the second direction opposite to the first direction to the predetermined pixel Output in order as odd signals in the second direction A first output means having the first output means, and the even signal in the first direction and the even signal in the second direction output from the first output means, and outputs a first composite signal. A first pre-processing unit, a second odd signal in the first direction and a second odd signal output from the first output unit, and a second combined signal is output. And the first synthesized signal and the second synthesized signal output from the first and second preprocessing means, the odd component in each of the first direction and the second direction, and The first component is output into an odd component signal in the first direction, an odd component signal in the second direction, an even component signal in the first direction, and an even component signal in the second direction. 2 output means and the first direction odd-number output from the second output means. First to fourth shading correction means for correcting shading of a component signal, an odd component signal in the second direction, an even component signal in the first direction, and an even component signal in the second direction; Selection means for selecting an even component signal in the second direction and an odd component signal in the second direction among output signals from the first to fourth shading correction means, and the first direction as a reference As the correction data, the difference between the even-numbered component signals in the first and second directions obtained in advance and the difference between the odd-numbered component signals in the first and second directions obtained in advance with reference to the first direction are used as correction data. Of the output signals from the first to fourth shading correction means selected by the selection means, only the even component signal in the second direction and the odd component signal in the second direction are compensated. The present invention provides an image information processing apparatus characterized by comprising a right / left correction means for correcting.

  According to the present invention, when a four-channel output CCD is used, correction is performed using a left / right correction circuit in which correction adjustment is clarified to eliminate variations in the difference between right and left CCD characteristics due to differences in CCD devices. It is possible to provide an image information processing apparatus, an image information processing method, and an image forming apparatus that can reproduce a stable image density without a difference in left and right density.

1 is a cross-sectional view showing an internal structure of a digital copying machine according to an image forming apparatus of the present invention. 1 is a block diagram showing a control system of a digital copying machine. FIG. 2 is a diagram showing a schematic configuration of the digital copying machine shown in FIG. 1. The figure which shows the structure of 4 channel output CCD. The figure which shows the structure of a pre-processing system and a high-speed scanner control ASIC. The block diagram which shows the structure of a high-speed scanner control ASIC. The figure which shows the structure of a right-and-left correction circuit. The figure which shows the flow of the data arrangement at the time of using the conventional 2 channel output CCD. The figure which shows the flow of a data arrangement | sequence at the time of using 4 channel output CCD. The figure which shows the image data of a gradation pattern original document. The flowchart for demonstrating the read-out operation | movement of each block. The flowchart for demonstrating the read-out operation | movement of each block. The flowchart for demonstrating the read-out operation | movement of each block. The flowchart for demonstrating the read-out operation | movement of each block. The figure which shows the example corrected with the left-right reference | standard left-right correction circuit. The figure which shows the example correct | amended by the left-right correction circuit only by offset. The figure which shows the conventional 2-channel output CCD. The figure for demonstrating the conventional pre-processing system and ASIC for scanner control.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a cross-sectional view showing the internal structure of a digital copying machine (DPPC) using a high-speed 4-channel output CCD according to the image forming apparatus of the present invention.

  As shown in FIG. 1, the digital copying machine includes an apparatus main body 10 in which a scanner unit 4 that functions as an image reading unit and a printer unit 6 that functions as an image forming unit are provided. .

  On the upper surface of the apparatus main body 10, a document placing table 12 made of transparent glass on which a reading object, that is, a document D is placed, is provided. Further, an automatic document feeder 7 (hereinafter referred to as ADF) for automatically feeding a document onto the document table 12 is disposed on the upper surface of the apparatus body 10. The ADF 7 is disposed so as to be openable and closable with respect to the document placing table 12, and also functions as a document presser that brings the document D placed on the document placing table 12 into close contact with the document placing table 12.

  The ADF 7 includes a document tray 8 on which a document D is set, an empty sensor 9 that detects the presence or absence of a document, a pickup roller 14 that picks up a document from the document tray 8 one by one, a paper feed roller 15 that transports the retrieved document, a document Are provided with an aligning roller pair 16 for aligning the leading ends of the paper and a conveying belt 18 disposed so as to cover almost the entire document placing table 12. A plurality of documents set on the document tray 8 are taken out from the bottom page, that is, the last page in order, aligned by the aligning roller pair 16, and then placed on the document by the conveying belt 18. It is transported to a predetermined position on the table 12.

  In the ADF 7, a reversing roller 20, a non-reversing sensor 21, a flapper 22, and a paper discharge roller 23 are disposed at the end opposite to the aligning roller pair 16 with the conveying belt 18 in between. A document D whose image information has been read by a scanner unit 4 to be described later is sent out from the document placing table 12 by a conveyor belt 18 and is discharged from the upper surface of the ADF 7 via a reverse roller 20, a flapper 21, and a discharge roller 22. It is discharged on the part 24. When reading the back side of the document D, the document D transported by the transport belt 18 is reversed by the reversing roller 20 by switching the flapper 22, and then is again moved to a predetermined position on the document placing table 12 by the transport belt 18. Sent.

  The scanner unit 4 disposed in the apparatus main body 10 includes an exposure lamp 25 serving as a light source for illuminating the document D placed on the document table 12 and a first light that deflects reflected light from the document D in a predetermined direction. The exposure lamp 25 and the first mirror 26 are attached to a first carriage 27 disposed below the document table 12.

  The first carriage 27 is arranged so as to be movable in parallel with the document placing table 12 and is reciprocated below the document placing table 12 by a scanning motor 35 described later via a toothed belt (not shown).

  A second carriage 28 that is movable in parallel with the document table 12 is disposed below the document table 12. Second and third mirrors 30 and 31 for sequentially deflecting the reflected light from the document D deflected by the first mirror 26 are attached to the second carriage 28 at right angles to each other. The second carriage 28 is driven with respect to the first carriage 27 by a toothed belt or the like that drives the first carriage 27, and the document is placed on the first carriage at half the speed. It is moved in parallel along the table 12.

  Also, below the document table 12, an imaging lens 32 that focuses the reflected light from the third mirror 31 on the second carriage 28, and the reflected light focused by the imaging lens is received and photoelectrically received. A 4-channel output CCD (photoelectric conversion element) 34 for conversion is disposed. The imaging lens 32 is disposed so as to be movable via a drive mechanism in a plane including the optical axis of the light deflected by the third mirror 31, and moves itself to reflect light at a desired magnification. Form an image. The 4-channel output CCD 34 photoelectrically converts the incident reflected light and outputs an electrical signal corresponding to the read document D.

  On the other hand, the printer unit 6 includes a laser exposure device 40 that functions as a latent image forming unit. The laser exposure apparatus 40 rotates a semiconductor laser 41 as a light source, a polygon mirror 36 as a scanning member that continuously deflects the laser light emitted from the semiconductor laser 41, and a polygon mirror 36 at a predetermined rotational speed described later. As a scanning motor for driving, a polygon motor 37 and an optical system 42 for deflecting laser light from the polygon mirror and guiding it to a photosensitive drum 44 described later are provided. The laser exposure apparatus 40 having such a configuration is fixedly supported by a support frame (not shown) of the apparatus main body 10.

  The semiconductor laser 41 is on / off controlled in accordance with the image information of the original D read by the scanner unit 4 or facsimile transmission / reception document information, and this laser light is passed through the polygon mirror 36 and the optical system 42 to the photosensitive drum. The electrostatic latent image is formed on the circumferential surface of the photosensitive drum 44 by scanning the circumferential surface of the photosensitive drum 44.

  Further, the printer unit 6 has a rotatable photosensitive drum 44 as an image carrier disposed almost at the center of the apparatus main body 10, and the peripheral surface of the photosensitive drum 44 is a laser beam from the laser exposure device 40. To form a desired electrostatic latent image. Around the photosensitive drum 44, a charging charger 45 for charging the drum peripheral surface to a predetermined charge, and toner as a developer is supplied to the electrostatic latent image formed on the peripheral surface of the photosensitive drum 44 to obtain a desired charge. A developing unit 46 that develops at an image density, a transfer material fed from a later-described paper cassette, that is, a peeling charger 47 for separating the copy paper P from the photosensitive drum 44 are integrally provided. A transfer charger 48 for transferring the toner image formed on the paper P to the paper P, a peeling claw 49 for peeling the copy paper P from the circumferential surface of the photosensitive drum 44, a cleaning device 50 for cleaning the toner remaining on the circumferential surface of the photosensitive drum 44, A static eliminator 51 for neutralizing the circumferential surface of the photosensitive drum 44 is disposed in order.

  In the lower part of the apparatus main body 10, an upper cassette 52, a middle cassette 53, and a lower cassette 54 that can be pulled out from the apparatus main body are arranged in a stacked state, and copy papers of different sizes are loaded in each cassette. Yes. A large-capacity feeder 55 is provided on the side of these cassettes. The large-capacity feeder 55 accommodates about 3000 sheets of copy paper P having a frequently used size, for example, A4-size copy paper P. . A paper feed cassette 57 that also serves as a manual feed tray 56 is detachably mounted above the large capacity feeder 55.

  In the apparatus main body 10, a conveyance path 58 extending from each cassette and the large-capacity feeder 55 through a transfer portion located between the photosensitive drum 44 and the transfer charger 48 is formed. A fixing device 60 having a lamp 60a is provided. A discharge port 61 is formed in the side wall of the apparatus main body 10 facing the fixing device 60, and a single tray finisher 150 is attached to the discharge port 61.

  In the vicinity of the upper cassette 52, middle cassette 53, lower cassette 54, paper feed cassette 57 and in the vicinity of the large-capacity feeder 55, pickup rollers 63 for taking out the sheets P one by one from the cassette or the large-capacity feeder are provided. . The conveyance path 58 is provided with a plurality of paper feed roller pairs 64 that convey the copy paper P taken out by the pickup roller 63 through the conveyance path 58.

  A registration roller pair 65 is provided on the upstream side of the photosensitive drum 44 in the conveyance path 58. The registration roller pair 65 corrects the inclination of the taken copy paper P and aligns the front end of the toner image on the photoconductive drum 44 with the front end of the copy paper P so that the moving speed of the peripheral surface of the photoconductive drum 44 The copy paper P is fed to the transfer unit at the same speed. A pre-aligning sensor 66 for detecting the arrival of the copy paper P is provided in front of the registration roller pair 65, that is, on the paper feed roller 64 side.

  The copy paper P that is picked up one by one from each cassette or large-capacity feeder 55 by the pickup roller 63 is sent to the registration roller pair 65 by the paper feed roller pair 64. The copy paper P is fed to the transfer section after the leading edge is aligned by the registration roller pair 65.

  In the transfer portion, the developer image formed on the photosensitive drum 44, that is, the toner image is transferred onto the paper P by the transfer charger 48. The copy sheet P to which the toner image has been transferred is peeled off from the peripheral surface of the photosensitive drum 44 by the action of the peeling charger 47 and the peeling claw 49, and is transferred to the fixing device 60 via the conveyance belt 67 constituting a part of the conveyance path 52. Be transported. Then, after the developer image is melted and fixed on the copy paper P by the fixing device 60, the copy paper P is discharged onto the finisher 150 through the discharge port 61 by the paper feed roller pair 68 and the paper discharge roller pair 69.

  Below the conveyance path 58, there is provided an automatic duplex device 70 that reverses the copy paper P that has passed through the fixing device 60 and sends it again to the registration roller pair 65. The automatic double-side device 70 includes a temporary stacking unit 71 that temporarily stacks the copy paper P, and a reverse path 72 that branches from the conveyance path 58 and reverses the copy paper P that has passed through the fixing device 60 and guides it to the temporary stacking unit 71. A pick-up roller 73 for picking up the copy sheets P collected in the temporary stacking unit one by one; and a paper feed roller 75 for feeding the picked-up sheets to the registration roller pair 65 through the transport path 74. In addition, a branching gate 76 that selectively distributes the copy paper P to the discharge port 61 or the reversing path 72 is provided at a branch portion between the conveyance path 58 and the reversing path 72.

  When performing double-sided copying, the copy paper P that has passed through the fixing device 60 is guided to the reversing path 72 by the sorting gate 76 and is temporarily accumulated in the temporary accumulating unit 71 in an inverted state, and then the pickup roller 73 and The paper is fed to the registration roller pair 65 through the conveyance path 74 by the paper feed roller pair 75. Then, after the copy paper P is aligned by the registration roller pair 65, it is sent again to the transfer unit, and the toner image is transferred to the back surface of the copy paper P. Thereafter, the copy paper P is discharged to the finisher 150 via the conveyance path 58, the fixing device 60 and the paper discharge roller 69.

  The finisher 150 staples and stores the discharged partially structured document in units. Every time the copy paper P to be stapled is discharged from the single sheet discharge port 61, the guide bar 151 moves toward the staple side and aligns. When all the paper has been discharged, the paper presser arm 152 suppresses the partial copy paper P discharged, and a stapler unit (not shown) performs stapling. Thereafter, the guide bar 151 is lowered, and the copy paper P, which has been stapled, is discharged to the finisher discharge tray 154 by the finisher discharge roller 155 in part. The lowering amount of the finisher discharge tray 154 is determined to some extent by the number of copy sheets P to be discharged, and decreases step by step every time it is discharged in some units. Further, the guide bar 151 for aligning the discharged copy paper P is at such a height that it does not hit the already stapled copy paper P placed on the finisher discharge tray 154.

  Further, the finisher discharge tray 154 is connected to a shift mechanism (not shown) that shifts partly (for example, in the four directions of front, rear, left, and right) in the sort mode.

  An operation panel 380 for inputting various copy conditions and a copy start signal for starting a copy operation is provided at the upper front of the apparatus main body 10.

  Next, a control system for the digital copying machine will be described with reference to FIG.

  The control system of the digital copier is generally composed of three blocks, and the basic unit 301 constituting the digital copier is formed by connecting the scanner unit 4 and the printer unit 6 through the basic system bus 312 with the image processing unit 5. A page memory unit 302 that receives and records the image data from the basic unit 301, transfers the recorded image data to the basic unit 301 again to realize memory copy (electronic sort), and the page memory unit 302. Hard disk (HD) as secondary memory for storing compressed image data, FAX board (G4 / G3 / FAX control means) 369 for exchanging image compressed data with the outside through a public line, data via LAN LAN board (local area network line control means) 371 that exchanges And the like, including an expansion unit CPU 361 that controls the expansion unit system bus 373 and the ISA bus 374, a main memory 361a used by the expansion unit CPU 361, and a motherboard that includes a DMAC 362 that controls DMA transfer on the ISA bus 374. The unit 303 is configured.

  The basic unit 301 and the page memory unit 302 are connected by a basic unit system interface 316 that exchanges control data and a basic unit image interface 317 that exchanges image data. The page memory unit 302 and the expansion unit 303 are connected by an expansion unit system interface 376 that exchanges control data and an expansion unit image interface 377 that exchanges image data.

  The basic unit 301 is connected to an input unit (scanner unit) 4, an output unit (printer unit) 6, an image processing unit 5, and a basic unit system bus 312, and control unit (basic unit CPU) for controlling them. ) 311.

  The scanner unit 4 includes the above-described four-channel output CCD 34 including a plurality of light receiving elements (one line CCD) arranged in a row, and an image of a document placed on the document placement table 12 is received from the basic unit CPU 311. According to the instruction, each line is read, and after the image density is converted into 8-bit digital data, it is output to the image processing unit 5 as time-series digital data together with a synchronization signal via a scanner interface (not shown).

  The basic unit CPU 311 controls the respective units in the basic unit 301 and the units in the page memory unit 302 described later.

  The page memory unit 302 controls communication of control information between the basic unit CPU 311 in the basic unit 301 and the expansion unit CPU 361 in the expansion unit 303, and controls access to the page memory 323 from the basic unit 301 and the expansion unit 303. A system control unit 304 having a built-in communication memory 305, a storage unit (page memory) 323 for temporarily storing image data, an address control unit 306 for generating an address of the page memory 323, and a page memory unit 302 An image bus 320 for transferring data between devices, a control bus 321 for transferring control signals between each device in the page memory unit 302 and the system control means 304, a page memory 323 and others via the image bus 320 Data control means 307 for controlling data transfer when data is transferred to other devices An image data I / F unit 308 that interfaces image data when transferring image data to and from the basic unit 301 via the basic unit image interface 317, and other image data when transmitting image data to devices with different resolutions. Resolution conversion / binary rotation means for converting image data received from devices having different resolutions into resolution of the printer unit 6 of the basic unit 301, or performing 90 degree rotation processing of binary image data 325, compressing image data input for a device for compressing and transmitting image data, such as facsimile transmission and optical disk storage, and compressing image data via the printer unit 6 Connected to the compression / expansion means 324 and the image data I / F means 308 that are expanded for visualization. It constituted by multivalued rotation memory 309 to use the image data when outputting rotated 90 degrees or -90 degrees when outputting Luo image data.

  The expansion unit 303 includes control means (expansion unit CPU) 361 for controlling each device in the expansion unit 303 described below via the expansion unit system bus 373, a main memory 361a used by the expansion unit CPU 361, and a general-purpose ISA bus 374. , An ISA bus controller (ISA / B / C) 363 that interfaces the expansion unit system bus 373 and the ISA bus 374, a DMA controller (DMAC) 362 that controls data transfer on the ISA bus 374, and an ISA bus 374. Storage means (HDD) 365 for electronically storing data, HD / FD interface (HD / FDI / F) 364 as its interface, storage for electronically storing image data connected to the ISA bus 374 Means (optical disk apparatus; ODD) 368, its interface SCSI interface 367, local area network line control means (LAN) 371 for realizing the LAN function, printer controller means 370 for realizing the printer function, G4 / G3 with G4 / G3 / FAX control function An extension unit image bus 375 for outputting image data from the FAX control unit 369 and the printer controller unit 370 to the page memory unit 302 via the system image interface 377.

  In the hard disk HD built in the HDD 365, compressed image data for each document consisting of one page or a plurality of pages is stored as a file in a state managed by search data for searching the document. It is like that.

  Further, the above-described operation panel 80 including a keyboard and a display for instructing the expansion unit 303 is connected to the expansion unit system bus 373.

  The storage unit (ODD) 368 is connected to the ISA bus 374 via the SCSI interface 367, and the expansion unit CPU 361 uses the SCSI command to store the storage unit 368 via the expansion unit system bus 373, the ISA / B / C 63, and the ISA bus 374. To control.

  Next, the image data I / F means (image data control means) 308 will be described. The image data I / F unit 308 is a device on the image bus 320 and transfers image data between the scanner unit 4 or printer unit 6 and the page memory 323 via the image processing unit 5. Also, image data is transferred between the page controller 323 and the printer controller 370 connected to the extension unit image bus 375 in the extension unit 303.

  Here, the page memory 323 of the page memory unit 302 has a large memory space.

  FIG. 3 shows a schematic configuration of the digital copying machine shown in FIGS. That is, as described above, the scanner unit 4, the image processing unit 5, and the printer unit 6 are included. As shown in FIG. 3, in the case of a digital copying machine, reading of an original image is performed by directly applying light to the original surface with an exposure lamp 25 and using the reflected light using mirrors 26, 30 and 31 and an imaging lens 32. The optical image data is led to the channel output CCD 34, and the optical image data is photoelectrically converted by the 4-channel output CCD 34, so that a plurality of light receiving elements (for example, 7500 in the case of 600 dpi) are replaced with charge signals. This charge signal is sequentially transferred and output as an analog signal by a CCD analog shift register (to be described later) inside the 4-channel output CCD 34.

  As shown in FIG. 3, the control system shown in FIG. 2 includes a read control unit 81 including a 4-channel output CCD 34, a page memory board 82, an edit board 83, an image processing unit 84 and a write control processing unit 85, and laser drive. The laser light from the semiconductor laser 41 is deflected by the polygon mirror 36 and guided to the photosensitive drum 44.

  FIG. 4 shows the configuration of the 4-channel output CCD 34 in detail. The light receiving elements (photodiodes and the like) S1 to S7500 arranged in order, the shift gate 101, the shift gate 102, the CCD analog shift registers 111 to 114, It consists of output buffers 121-124.

  As shown in FIG. 4, in the case of the 4-channel output CCD 34, the signal output is divided into even and odd components, and each is divided into left and right to form a four-system output configuration, so the CCD analog shift registers 111, 112 and 113 are used. , 114 exist. Accordingly, the CCD analog shift register 111 sequentially transfers and outputs the signals from the leftmost light receiving element of the odd component, the analog shift register 112 sequentially transfers and outputs the signals from the leftmost light receiving element of the even component, and the analog shift register 113 outputs the odd number. The signals from the light receiving element at the right end of the component are sequentially transferred and output, and the signals from the light receiving element at the right end of the even component are sequentially transferred and output by the analog shift register 114.

  The last signal output from the left and right of the odd and even components is a signal by the light receiving elements S3749, S3750, S3751, and S3752 that are arranged at the center of the light receiving elements S1 to S7500. Control signals (transfer clock, shift gate signal, reset signal, clamp signal) necessary for driving the 4-channel output CCD 34 are generated by a CCD drive function of a high-speed scanner control ASIC, which will be described later.

  FIG. 5 shows a configuration of the preprocessing system 130 for transferring image data and the high-speed scanner control ASIC 135 in the 4-channel output CCD 34 mounted on the reading control unit 81. The preprocessing system 130 includes amplifiers 131 and 132 and A / D converters 133 and 134.

  In the preprocessing system 130, analog signals output from the 4-channel output CCD 34 are sampled and amplified for each pixel signal by amplifiers (Amp: analog signal processing integrated circuits) 131 and 132.

  The amplifiers 131 and 132 used here can process two channels in parallel on a single chip. The amplifier 131 receives the left and right channels (output terminals OS1 and OS3) of the odd component of the pixel signal of the 4-channel output CCD 34, and the amplifier 132 receives the left and right channels of the even component of the pixel signal of the 4-channel output CCD 34 (output). Terminals OS2 and OS4) are used as inputs.

  In each of the amplifiers 131 and 132, the two-channel pixel signals from the left and right sides of the 4-channel output CCD 34 are processed in parallel (sampling and signal amplification), and then combined (multiplexed) into one channel. That is, the amplifier 131 combines odd-numbered left and right signals into one channel, and the amplifier 132 combines even-numbered left and right signals into one channel and outputs them from the amplifiers 131 and 132, respectively. ing.

  In this configuration, the amplifier 131 collectively processes the left and right pixel signals of the odd component of the 4-channel output CCD 34, and the amplifier 132 collectively processes the left and right pixel signals of the even component of the 4-channel output CCD 34. By adopting a simple configuration, the distortion of the left and right signals of the even and odd components of the output signal of the 4-channel output CCD 34 depends on the variation between the chips of the amplifier (131, 132) (variation in circuit characteristics due to chip difference). It has become a consideration to avoid.

  In this case, the signal output rate from the amplifiers 131 and 132 is twice the signal input rate to the amplifiers 131 and 132. The analog signal for each pixel amplified to an appropriate level for signal processing output from the amplifiers 131 and 132 is AD converted by the A / D converters (ADCs 133 and 134) to become a digital signal.

  The amplifier 131 samples the odd-numbered left and right two-channel pixel signals output from the 4-channel output CCD 34 in parallel and amplifies the signals, further synthesizes the signals into one channel, and outputs the analog signal output from the amplifier 131. The signal is AD converted by an A / D converter 133. The amplifier 132 also samples the left and right two-channel pixel signals of the even component output from the 4-channel output CCD 34 in parallel and amplifies the signals, and further synthesizes this signal into one channel, which is output from the amplifier 132. The analog signal is AD converted by the A / D converter 134. Further, since the resolution of the A / D converters 133 and 134 used here is 8 bits (bit: 256 steps), the pixel data is 8 bits per pixel.

  The pixel signal (analog signal) output from the 4-channel output CCD 34 based on the image information read by the 4-channel output CCD 34 (inputted as optical image data to the 4-channel output CCD 34) in this way is an amplifier 131, A series of processing such as signal amplification and synthesis at 132 and AD conversion by the A / D converters 133 and 134 into digital signals is called preprocessing in the scanner unit 4, and the preprocessing system 130 is configured.

  In addition, a high-speed scanner is used for control signals (sample hold pulse, composite signal, clamp signal) necessary for driving the amplifiers 131, 132 and AD conversion clocks necessary for AD conversion processing in the A / D converters 133, 134. It is generated from the preprocessing LSI drive function of the control ASIC 135. The pixel signal based on the pre-processed image information (8-bit data per pixel, hereinafter referred to as image data) is input to the high-speed scanner control ASIC 135, and shading correction is performed in the high-speed scanner control ASIC 135. Processing, right / left correction processing and raster conversion processing according to the present invention are performed.

  FIG. 6 shows the configuration of the high-speed scanner control ASIC 135 according to the present invention. That is, the high-speed scanner control ASIC 135 includes a bus width conversion circuit 140, shading correction circuits 141, 142, 143, 144, bus select circuits (SEL) 145, 146, 147, 148, left / right correction circuit 160, and bit inversion circuits 161, 162. 163, 164, and a raster conversion circuit 165.

  The image data preprocessed by the preprocessing system 130 is a high-speed scanner with two channels as DOAx (8 bits: data obtained by combining the left and right of the odd component) and DOBx (8 bits: data obtained by combining the left and right of the even component). Input to the control ASIC 135.

  All processing in the high-speed scanner control ASIC 135 is performed on the digitized image data in the preprocessing system 130. These image data are first divided into left data and right data in the odd and even components by passing through the bus width conversion circuit 140. That is, DOAx (8 bits), which is the left / right synthesized data of odd components, is converted into DOA1X (8 bits: left data of odd components) and DOA2X (8 bits: right data of odd components) by the bus width conversion circuit 140. DOBx (8 bits), which is the left and right synthesized data of the even components, is converted into DOB1X (8 bits: left data of the even components) and DOB2X (8 bits: right data of the even components) by the bus width conversion circuit 140. ).

  Therefore, since the image data input in 2 channels by the bus width conversion circuit 140 is decomposed into 4 channels, for example, when the data rate of image data is input from DOAx and DOBx as 40 MHz per channel in 2 channels, The image data as the output after the bus width conversion processing is output in a state of being converted into DOA1X, DOA2X, DOB1X, DOB2X at 20 MHz per channel for 4 channels, and input to the next stage.

  Respective image data DOA1X (8 bits: left data of odd components), DOA2X (8 bits: right data of odd components), DOB1X (8 bits: left data of even components) decomposed by the bus width conversion processing , DOB2X (8 bits: right data of even components) is subjected to shading correction processing by the shading correction circuits 141, 142, 143, 144. Further, as shown in the figure, in the case of the high-speed scanner control ASIC 135, by preparing four shading correction circuits, four-channel image data DOA1X, DOA2X, DOB1X, and DOB2X that have been subjected to bus width conversion processing can be simultaneously processed in parallel. The structure is as follows.

  Here, the shading correction function will be briefly described. The shading correction includes white level shading correction and black level shading correction. The high-speed scanner control ASIC 135 has a circuit configuration based on an algorithm corresponding to both corrections.

  White level shading correction is the reading on the original by dividing the read data (image data) on the original read by the 4-channel output CCD 34 for each pixel by the white reference data read by the 4-channel output CCD 34 in advance. Data (image data) is normalized (corrected) for each pixel. As a result, unevenness in illuminance and sensitivity variations among the light receiving elements of the 4-channel output CCD 34 can be corrected.

  Black level shading correction refers to the read data on a document read by the 4-channel output CCD 34 (for example, the influence of the dark current generated in the light receiving element inside the 4-channel output CCD 34, which is the main factor that distorts the black level). The black reference data previously read by the 4-channel output CCD 34 is canceled (corrected) by subtracting each pixel from the image data) and the white reference data.

  The respective image data subjected to the shading correction are corrected by the left / right correction circuit 160 according to the present invention for the left and right data of the even component and the odd component, and then the bit inversion circuits 161, 162, 163, 164 Inversely, the raster conversion circuit 165 performs an alignment process of the arrangement order of the image data.

  The image data that has undergone such a series of processing in the high-speed scanner control ASIC 135 is sent from the high-speed scanner control ASIC 135 as AIDTAX (8 bits), AIDTBX (8 bits), AIDTCX (8 bits), and AIDTDX (8 bits). The image is output and transferred to the image processing ASIC 84. The image data input to the image processing ASIC 84 is converted into image data such as filtering processing, gradation pattern reading processing, range correction processing, magnification conversion (enlargement, reduction) processing, γ correction density conversion processing, gradation processing in the image processing ASIC 84. A series of data processing by the processing is performed.

  FIG. 7 shows the configuration of the left / right correction circuit 160. The left / right correction circuit 160 includes a correction memory chip enable generation circuit 170, bus select circuits (SEL) 171, 172, 173, 174, 175, 176, left / right correction memory 180, and bus select circuits (SEL) 181, 182. , 183, 184, and 185. The left / right correction circuit 160 is controlled via the CPU-IF circuit 177.

  As described above, the high-speed compatible line sensor (four-channel output CCD 34) used for the reading scanner of the high-speed digital copying machine corresponds to the required specification of high speed, as shown in FIG. 4, the light receiving elements S1 to S7500. 4 sets of CCD analog shift registers (for left odd component charge signal transfer) 111, CCD analog shift registers (for left even component charge signal transfer) 112, CCD analog shift register (odd right) Component output signal transfer) 113 and CCD analog shift register (for even right component charge signal transfer) 114, four sets of output buffers arranged on the left and right sides (for driving the left odd component signal output) 121, output buffer (for driving signal output of left even component) 122, output buffer (signal of right odd component) The pixel signal for one line of the 4-channel output CCD 34 (for example, the pixel signal for 7500 pixels in the case of 600 dpi) is divided into four systems by the output buffer (for power drive) 123 and the output buffer (for signal output drive for the right even component). It is configured to output.

  In addition, with such a configuration, the last pixel signal output from the left and right of each of the odd and even components is a signal from the light receiving elements S3749, S3750, S3751 and S3752 that are arranged together at the center of the 4-channel output CCD 34. It has become. Therefore, in the case of the 4-channel output CCD 34, the pixel signal for one line of the 4-channel output CCD 34 as a signal output configuration is driven by the left and right output buffers (121 and 123, 122 and 124) for each of the even and odd components. Therefore, the signal transmission path is clearly divided into four systems at the output stage of the four-channel output CCD 34.

  Further, the pixel signal (analog signal) output from the 4-channel output CCD 34 is subjected to signal amplification and AD conversion by the above-described preprocessing system 130, and is digitized as image data. Depending on the configuration of 130, the signal transmission path is arbitrarily changed between 1 to 4 systems.

  Accordingly, the image information input to the 4-channel output CCD 34 as an optical image signal is photoelectrically converted into a charge signal for each of the plurality of light receiving elements (S1 to S7500) in the 4-channel output CCD 34. Even if a charge signal is obtained by photoelectrically converting an optical image signal having the same density as the image information on the document to be read by each light receiving element (S1 to S7500), the transmission path of this charge signal ( If the processing path is different, distortion may occur between pixel signals (image data) due to deviations in the circuit characteristics of the 4-channel output CCD 34 and the preprocessing system 130.

  In fact, the adverse effect of this deviation in circuit characteristics is that when printed as a copy, the output signal of the CCD is the same for even and odd components as in the preprocessing system using the conventional 2-channel output CCD shown in FIG. In the case of the processing by the signal transmission path (processing path), the pre-processing using the 4-channel output CCD 34 for the high-speed digital copier shown in FIG. 5 does not appear as an average density difference on the printed image. When processing is performed by a signal transmission path (processing path) that further divides each of the even and odd components into left and right as in the system 130, the average density difference between the left and right at a level that can be visually confirmed on the printed image. Is confirmed by simulation.

  That is, it is not so important that the signal transmission paths (processing paths) of the odd component and the even component are different, but the point to be regarded as a problem here is that when the 4-channel output CCD 34 corresponding to high speed is used, That is, it is desirable that the signal transmission path (processing path) is essentially the same. If this is possible as a configuration of the 4-channel output CCD 34 and the preprocessing system 130, no special measures are required for the adverse effects of deviation due to circuit characteristics.

  However, as a physically possible system configuration, the configuration of the preprocessing system 130 shown in FIG. 5 is used. However, the charge signal photoelectrically converted by the light receiving elements S1 to S7500 is used for the CCD because of the structure of the 4-channel output CCD 34. Using four sets of CCD analog shift registers 111, 112, 113, and 114, four sets of pixel signals for one line of the CCD 34 are provided by four sets of output buffers 121, 122, 123, and 124 arranged on the left and right sides thereof. Divided into and output. For this reason, a deviation occurs due to the transmission efficiency of each CCD analog shift register (111, 112, 113, 114), the characteristics of the output buffers (121, 122, 123, 124), and the like.

  Regarding the adverse effect on the left and right image data due to the circuit characteristic deviation caused by the internal configuration of the CCD chip itself (right and left density difference caused by the linear deviation of the image data with respect to the image density), some correction is also made externally. The fact is that it is impossible to cope without providing means. This means is a left / right correction function, and this module is arranged as one function of the high-speed scanner control ASIC 135.

  As shown in FIG. 6, the left / right correction circuit 160 is positioned after the shading correction circuits 141, 142, 143, and 144 in the high-speed scanner control ASIC 135, and as an image data processing flow. Positioning before a series of data processing by image processing such as filtering processing by the ASIC 84, gradation pattern reading processing, range correction processing, magnification conversion (enlargement, reduction) processing, γ correction density conversion processing, gradation processing, etc. It shall be.

  The meaning of this positioning will be described later, and the configuration of the left / right correction circuit 160 will now be described.

  The left / right correction in the left / right correction circuit 160 is based on the data conversion table method using the memory 180. That is, the data to be converted (image data in this case) is input to the address of the memory 180, and the converted data is the data (corrected data) set in advance for each address of the memory 180 from the data output of the memory 180. Data) is output instead, and conversion processing is performed.

  Therefore, since the image data handled in the high-speed scanner control ASIC 135 is a digital signal of 8 bits per pixel and resolution of 256 steps (00H to FFH), the memory 180 prepared for the data conversion table for this image data is 256 words. (Word) * 8 bits.

  The left / right correction circuit 160 includes such a memory 180 as a 256-port * 8-bit 2-port RAM, a chip enable generation circuit 170, bus select circuits 171, 172, 173, 174, 175, 176, 181, 182, 183, 184 and 185, which are controlled via a CPU-IF circuit 177. The memory 180 has a mode setting signal (memory access mode) based on an access mode (data correction processing) by data processing inside the high-speed scanner control ASIC 135 and an access mode (data set for the conversion table) from the basic CPU (external) 311. Can be switched by a setting signal (set by DAM).

  Furthermore, since the left / right correction execution selection (left / right correction setting signal: set by LRADJ) can also be set, the image data can be sent to the next process without being corrected left / right (in this case) The path of the image data is indicated by a broken line <1>). For setting various modes, mode setting registers (not shown) are prepared in the high-speed scanner control ASIC 135, and all of these registers can be changed from the basic unit CPU (external) 311.

  First, when the memory 180 is in an access mode by data processing inside the high-speed scanner control ASIC 135 (a state in which data correction processing is possible) and the left / right correction setting signal is corrected, the image data bus in the high-speed scanner control ASIC 135 is stored in the memory 180. Connected.

  That is, the image data digitized in the preprocessing system 130 and input to the high-speed scanner control ASIC 135 with two channels is first converted into four channels (odd component left data, odd component right data, The left data of the even component and the right data of the even component), and the respective image data are subjected to shading correction processing by the shading correction circuits 141, 142, 143, and 144 simultaneously in parallel.

  Of the image data of each of the four channels after the shading correction, a correction memory 180 for either the left or right channel of the odd component, for example, the right data bus, or the left or right channel of the even component, for example, the right data bus. The bus select circuits 171 to 175 and 181 to 184 are connected to each other. That is, the bus line indicated by the broken line <1> is disabled, and as shown by the bold solid line, either the left or right channel of the odd component, for example, the right data (image data before the left / right correction) is port A of the memory 180. To the address input AAX, and the converted data (image data after left / right correction) for that data is output from the data output AOX of the port A, and either left or right channel of even component, for example, right data (before right / left correction) The image data) is connected to the address input BAX of port B of the correction memory, and the converted data (image data after left / right correction) for that data is output from the data output BOX of port B.

  That is, the data operation using the data conversion table by the memory 180 can be performed on either the left or right channel of each of the even component and the odd component, for example, the right data. Further, as can be seen, the data operation using the data conversion table by the memory 180 is performed for two channels as a memory for performing either one of the left and right channels of the even component and the odd component of the image data of the four channels. The two-channel image data is required to be processed in parallel (memory access) using the same data conversion table. Therefore, a 2-port type memory satisfying these conditions is used. ing.

  One of the major points of the idea of left and right data correction by this method is that the left and right channels of even and odd components, for example, the left data is considered as a reference, and the other channel, for example, left data is the reference. In this case, the right data is manipulated using a data conversion table using a correction memory. In other words, the linear deviation of the left and right image data with respect to the image density is corrected (corrected) by adjusting the data by operating only one of the left and right channels.

  Next, the meaning of the arrangement position of the left / right correction process will be described.

  The image data before being digitized by the pre-processing system 130 and subjected to internal processing in the high-speed scanner control ASIC 135 is a density gradient deviation that occurs for each pixel of the image data with respect to the image density, that is, illuminance unevenness, 4-channel output Sensitivity variation for each light receiving element of the CCD 34 Image data in a state including the influence of dark current generated in the light receiving elements S1 to S7500 and the CCD analog shift registers 111 to 114 in the 4-channel output CCD 34 for each pixel. In addition to this, the 4-channel output CCD 34 for high-speed correspondence this time, the linearity deviation generated between the left and right image data with respect to the image density, which is an inherent deviation occurring in the configuration of the preprocessing system 130, that is, the 4-channel output CCD 34, pre-processing system 13 Left and right signals pathways in (processing path) includes the influence of the deviation of the circuit characteristics caused by different.

  Further, the effect of these two deviations differs in the way of acting on the image data. That is, the influence of the density-gradient deviation that occurs for each pixel of the image data with respect to the image density acts for each pixel of the image data, whereas the left and right image data for the image density (between the signal transmission paths (processing paths) The effect of the linearity deviation that occurs in the above)) acts on each signal transmission path (each processing path).

  That is, when there are two signal transmission paths (processing paths) A and B (in this case, left and right) and a circuit characteristic deviation occurs between these signal transmission paths (between processing paths), for example, the signal transmission path Considering (processing path) A as a reference, a deviation due to circuit characteristics acts on the other signal transmission path (processing path) B. At this time, the influence of this deviation is caused in the signal transmission path (processing path) B. It is considered that the pixel signal acts uniformly on all the pixel signals to be transmitted (processed) with a certain amount.

  Therefore, the influence of two deviations of these different characteristics included in the image data digitized in the pre-processing system 130 (the influence of the density gradient deviation generated for each pixel of the image data on the image density and the left and right of the image density) It is considered that the influence of linearity deviation between image data (between signal transmission paths (between processing paths)) should be corrected by separate correction means.

  In other words, the influence of the density gradient deviation that occurs for each pixel of the image data with respect to the image density is corrected by the shading correction function, and between the left and right image data with respect to the image density (between signal transmission paths (between processing paths)). The idea is to correct the influence of the generated linearity deviation by the left / right correction circuit 160 according to the present invention.

  Based on this concept, as a processing configuration (processing flow) for image data in the high-speed scanner control ASIC 135, shading correction is first performed on image data by arranging shading correction circuits 141 to 144 as shown in FIG. And the left and right correction circuit 160 is arranged on the image data in the shading-corrected state, and the two correction processes are a filtering process and a gradation process by the image processing ASIC 84. This is performed before a series of data processing processes by image processing such as pattern reading processing, range correction processing, magnification conversion (enlargement and reduction) processing, γ correction density conversion processing, and gradation processing.

  First, the shading correction corrects the influence of the variation of each pixel, that is, the influence of the density-gradient deviation generated for each pixel of the image data on the image density (that is, the normalized (normalized) image data). The right / left correction method according to the invention, that is, one data conversion table for replacing a signal value itself with a certain value (in this case, a signal to be handled is an 8-bit digital signal, a range from 00H to FFH) is corrected. It is possible to correct the signal values of all the pixel signals forming the image data transmitted (processed) in the signal transmission path (processing path) that requires the same by using them in common.

  Since these processes are intended to correct the influence of two deviations caused by the 4-channel output CCD 34 and the preprocessing system 130, naturally the subsequent filtering process by the image processing ASIC 84, gradation pattern reading process, range This is a process to be performed before a series of data processing processes by image processing such as correction processing, magnification conversion (enlargement / reduction) processing, γ correction density conversion processing, and gradation processing.

  Next, a method for setting the left / right correction table in the memory 180 in the left / right correction circuit 160 will be described.

  As described above, the memory 180 has an access mode (data correction process) by data processing inside the high-speed scanner control ASIC 135 and an access mode (data set for the conversion table) from the basic unit CPU (external) 311. Switching is made by a setting signal (memory access mode setting signal: set by DAM).

  Therefore, when the memory 180 is in an access mode from the basic unit CPU (external) 311 (a state in which data for the left / right correction table can be set by the basic unit CPU 311), as shown in FIG. An address and data bus from the basic unit CPU (external) 311 are connected to the memory 180 via the CPU-IF circuit 177. That is, the line indicated by the broken line <2> is enabled, and at this time, the basic unit CPU (external) 311 stores the correction data for the left / right correction table generated based on the deviation generated between the left and right image data. This is a method of setting (writing) to 180.

  In addition, since access from the basic unit CPU (external) 311 to the memory 180 is readable / writable, data in the memory 180 can be referred to.

  Next, the raster conversion circuit 165 will be described.

  The function of the raster conversion circuit 165 is also an inherent function required by using a high-speed compatible line sensor, that is, a 4-channel output CCD 34, for a reading scanner of a high-speed digital copying machine. The purpose of the raster conversion circuit 165 is alignment by image data array operation, that is, rearrangement.

  Here, the reason why the image data must be rearranged when the 4-channel output CCD 34 is used will be described with reference to FIGS.

  FIG. 8 shows the flow of data arrangement when a conventional 2-channel output CCD is used, and FIG. 9 shows the flow of data arrangement when the 4-channel output CCD 34 of the present invention is used. The array of pixels of the 2-channel output CCD is shown in FIG. 8, and the array of pixels of the 4-channel output CCD is composed of dummy pixels and effective pixels as shown as array 1 in FIG.

  This is because image information of a document to be read is output from a CCD as an effective pixel signal by effective pixels, and these effective pixels are 7500 pixels (S1 to S7500) as a 600 dpi CCD. . As shown in the array 1, the effective pixels are arranged in order, such as S1 on the left side and S7500 on the right side. As for the arrangement of the effective pixels, the conventional 2-channel output CCD is also 4 of the present invention. The same applies to the channel output CCD 34. That is, it is a physical arrangement of the light receiving elements (S1 to S7500).

  As described with reference to FIG. 3, reading of an original image in the case of a high-speed digital copying machine directs light directly on the original surface and uses the mirrors 26, 30, 31 and the imaging lens 32 to reflect the reflected light. The optical image data, that is, the image information is photoelectrically converted by the 4-channel output CCD 34 by leading to the 4-channel output CCD 34, and is first replaced with a charge signal for each light receiving element, that is, for each effective pixel. Output from the 4-channel output CCD 34. The structure of the reading optical system is such that the left and right sides of the document correspond to the left and right sides of the 4-channel output CCD 34, that is, the direction of reading by the CCD, that is, the left and right sides of the document in the main scanning direction is shown in array 1. The channel output CCD 34 corresponds to the left and right array of effective pixels.

  Therefore, a fundamental algorithm of a series of data processing algorithms by image processing such as filtering processing by the image processing ASIC 84, gradation pattern reading processing, range correction processing, magnification conversion (enlargement, reduction) processing, γ correction density conversion processing, gradation processing, etc. As a basic concept, the image data input to the image processing ASIC 84 (data array in units of pixels for one line in the main scanning direction), that is, image data as image information for each line in the main scanning direction is 4 channels. It is assumed that the pixel array of the output CCD 34, that is, an array in an aligned state that is the same as or equivalent to the array shown in the array 1.

  In other words, each data manipulation algorithm in a series of data processing by the image processing ASIC 84 is valid for image data that is input in an aligned data array that is the same as or equivalent to the array 1. is there.

  In the conventional system, that is, a system using a two-channel output CCD, as shown in FIG. 8, the CCD pixel array and the array of image data output from the scanner control ASIC to the image processing ASIC, that is, array 1 and array 3 is equal.

  In other words, in a system using a conventional two-channel output CCD, first, the signal output from the CCD is divided into two channels with an even component and an odd component for the pixel array in the CCD, that is, the array 1. As shown in FIG. 2, the effective pixel signal from the odd pixel is used as the output terminal OS1, the left effective pixel S1 is set as the start direction, and thereafter, S3, S5,..., S7495, S7497, S7499 (the rightmost as the end direction) The effective pixel signal of the even-numbered pixel is output terminal OS2, and the effective pixel signal on the left side is set as the start direction, and then S4, S6,..., S7496, S7498, S7500 (in the end direction) (The rightmost effective pixel) is output, and this array is scanned with 2 channels. Is input to the control ASIC.

  The input two-channel image data is first synthesized (multiplexed) into one channel in the scanner control ASIC. That is, the image data is in the state shown in the array 3, and in this state, the processing inside the scanner control ASIC, that is, the image data in the data array as shown in the array 3 is subjected to shading correction processing and bit-inverted. Since it is transferred to the image processing ASIC as AIDTX as it is, it can be seen that there is no particular need for processing for sorting, that is, rearrangement by data operation between the arrays 1 to 3.

  On the other hand, in the case of the high-speed compatible system using the 4-channel output CCD 34 of the present invention shown in FIG. 9, the signal output from the 4-channel output CCD 34 is first output to the pixel array in the 4-channel output CCD 34, that is, the array 1. Even-numbered component and odd-numbered component so far are the same as the 2-channel output CCD, but this is further divided into left and right with the center of the 4-channel output CCD 34 as the boundary, and as shown in the array 2, the output terminal OS1 is effective by the odd pixel The pixel signal is output in the order of S3, S5,..., S3745, S3747, S3749 (center effective pixel as the end direction) in order from the left effective pixel S1 as the start direction.

  Similarly, the effective pixel signal of the even number pixel as the output terminal OS2, the left effective pixel S2 as the start direction, and thereafter, S4, S6,..., S3746, S3748, S3750 (center effective pixel as the end direction) Outputs properly.

  Similarly, as the output terminal OS3, the effective pixel signal of the odd-numbered pixels, the effective pixel S7499 on the right side as the start direction, S7497, S7495,..., S3755, S3753, S3751 (center effective pixel as the end direction) Outputs properly.

  Similarly, the effective pixel signal of the even number pixel as the output terminal OS4, the effective pixel S7500 on the right side as the start direction, and thereafter S7498, S7496,..., S3756, S3754, S3752 (center effective pixel as the end direction) Outputs properly.

  These four-channel signals are combined in the pre-processing system 130 in the amplifiers 131 and 132 with odd-numbered components left and right, that is, the output terminal OS1 and the output terminal OS3, respectively, and even-component left and right components, that is, the output terminal OS2 and the output terminal. The OS 4 is combined into one channel, and in this state, the even component and the odd component are input to the high speed scanner ASIC 135 with two channels.

  The input two-channel image data is first decomposed again into four channels in the high-speed scanner ASIC 135 by the processing of the bus width conversion circuit 140 as shown in FIG.

  In this state, the processing within the high-speed scanner ASIC 135 for each of the four channels, that is, the shading correction processing by the shading correction circuits 141 to 144 simultaneously in parallel with respect to the image data of each of the four channels in the data array shown in array 2, The left and right correction processing is performed by the correction circuit 160, and the image data of these four channels is aligned by the raster data conversion operation by the raster conversion circuit 165 in a state where the bits are inverted by the bit inversion circuits 161 to 164, that is, rearrangement processing is performed. By doing so, the state shown in the array 3 is obtained, that is, the state of the array 2 is converted into the state of the array 3 and transferred to the image processing ASIC 84 as image data having a 4-channel configuration of AIDTAX, AIDTBX, AIDTCX, and AITDDX. The take.

  First, here is the reason why the image data delivered to the image processing ASIC 84 has a 4-channel configuration with respect to the conventional one channel. This is of course faster in the case of a high-speed digital copying machine than the image processing speed. Is required. Therefore, when one line of image data from the 4-channel output CCD 34 is processed in one channel, the data transfer rate per pixel, that is, the processing speed becomes very high, and various margins are insufficient for hardware processing. It will be.

  Therefore, in order to solve this problem, the image data for one line is decomposed into four channels, and each of them is processed in parallel at the same time. That is, by performing parallel processing with four channels, the data transfer rate per pixel, that is, the processing speed is reduced to ¼. For example, in the case of 80M processing with one channel, the amount of information handled is the same in 4-channel parallel processing with 20M processing per channel.

  Therefore, in the case of a high-speed compatible system using the 4-channel output CCD 34, the data output configuration as the array 3 is 4 channels. Therefore, as in the conventional system using the 2-channel output CCD, the data of the arrays 1 and 3 is used. It becomes impossible to make the relationship of the array completely equal.

  The reason why the image data subjected to the internal processing in the state of the array 2 is not transferred to the image processing ASIC 84 as it is but is converted into the state of the array 3 by the raster conversion circuit 165 according to the present invention is as the reason for the transfer. As described above, the algorithm for each data operation in the series of data processing by the image processing ASIC 84 is established for the image data input in the aligned data array that is the same as or equivalent to the array 1. Based on the condition of

  That is, the array 2 is an inappropriate data array for a series of data processing by the image processing ASIC 84, and the array 3 is defined as an aligned data array equivalent to the array 1. is there. Therefore, in the case of a high-speed compatible system using the 4-channel output CCD 34, rearranging array 2 to array 3 with respect to array 1 is defined as the alignment by data operation in raster conversion circuit 165, that is, the rearrangement process. Assume that the interface specifications between the scanner control ASIC 135 and the image processing ASIC 84 are determined.

  In this way, the image data for one line is manipulated by the raster conversion circuit 165 by performing data write processing → data read processing on a dedicated line memory (not shown), and the arrangement of pixel data is shown in FIG. (Array 2) is rearranged to the state of (Array 3).

  Further, by preparing two dedicated line memories (not shown), it is possible to perform the above processing alternately between the line memories and continuously process the image data line by line.

  In this manner, the image signal output from the 4-channel output CCD 34 is converted into a data array suitable for performing a series of data processing by image processing. That is, the aligned image data is transferred from the high-speed scanner control ASIC 135 to the image processing ASIC 84.

  Next, a correction method of the left / right correction circuit 160 of the present invention will be described with reference to FIG.

  Here, the transfer in units of 4 pixels output from the high-speed scanner control ASIC 135 is converted into transfer in units of 1 pixel by the image processing ASIC 84 in the next stage and processed. In this high-speed scanner control ASIC 135, a left / right correction circuit 160 is provided to correct the left / right CCD characteristic variation of the scanner unit 4 after the shading correction processing in four channels (left / right, odd / even).

  The left / right correction circuit 160 has a table configuration capable of converting 256 data for converting input / output characteristics. Further, the left / right correction circuit 160 may be configured by an adder / subtracter capable of setting an offset instead of the correction table configuration. These table and offset configurations are connected by the basic unit system bus 312 and can be set by access from the basic unit CPU 311.

  The image processing ASIC 84 positioned after the high-speed scanner control ASIC 135 performs processing in the order of filtering processing, gradation pattern reading processing, range correction processing, magnification conversion processing, γ correction density conversion processing, and gradation processing.

  The filtering process includes a low-pass filter (hereinafter referred to as LPF) that suppresses moire and the like and a high-pass filter (hereinafter referred to as HPF) that emphasizes the edge of a character.

  The gradation pattern reading process is a block that is used for reading the test pattern from the printer unit 6 and correcting the variation of the entire system and the current right / left characteristic correction process. The gradation pattern reading process also includes a document whose gradation data changes in the sub-scanning direction. And a circuit unit for reading out and averaging the image data of each gradation and each gradation data register for storing the read average value for each gradation.

  The range correction process is a process for widening the range of image data for density reproduction so as to be optimal for a document.

  In the magnification conversion processing, image data enlargement processing and reduction processing are performed in the main scanning direction in order to change the document size and the output size.

  The γ correction density conversion processing corrects variations in reproduction characteristics of the printer unit 6 and image reproduction in each image quality mode. This γ correction density conversion process has a conversion table configuration, is connected to the basic unit system bus 312, and can be set and changed by accessing the basic unit CPU 311.

  The gradation process is a process for realizing a pseudo halftone level in accordance with the gradation level at which the density of the printer unit 6 can be reproduced, and an error diffusion process that achieves both character reproduction and halftone reproduction, In general, a dithering process that reproduces a stable halftone is used.

  Further, the fact that the gradation pattern reading process is positioned after the filtering process has a configuration that enables reading after cutting the noise frequency component mixed in the data from the previous stage.

  The gradation pattern reading process will be described in detail.

  In the image data of the gradation pattern document shown in FIG. 10, this block is roughly divided into a gradation pattern cue portion (A mode), a gradation data skip 1 portion (B mode), and a gradation data calculation portion (C mode). ), Gradation data skipping 2 parts (D mode). In addition, a sampling region from the start of sampling (SMPST) to the end of sampling (SMPED) is set in the register.

  Next, the read operation of each block in such a configuration will be described with reference to the flowcharts of FIGS.

  First, the operation of the part for detecting the head position of the gradation pattern in the gradation pattern cueing part (A mode) will be described with reference to the flowchart of FIG.

  First, a sampling area in the main scanning direction is set in the registers (SMPST, SMPED) by access from the basic unit CPU 311. However, the number of sampling pixels in the main scanning direction is a power of 2 in order to reduce the circuit configuration. Subsequently, whether the operation of the gradation pattern reading process is effective (ST1: GAM [0] = 1) or the gradation pattern cueing operation switching (GAM [1]) is “by register setting from the basic unit CPU 311”. It is checked whether it is “0” (ST4).

  If the operation of the gradation pattern reading process is not valid in step ST1, the adjustment mode is not performed, and if the gradation pattern cueing operation switching is not “0” in step ST4, the process proceeds to the B mode (ST5).

  Subsequently, the heading invalid line number HIRST in the sub-scanning direction is compared with the sub-scanning line counter HLIN, and the process skips to the invalid line (ST6, 7). Thereafter, pixel data in the main scanning sampling area for each line are added, and an average value is obtained by bit shift (ST8). This average value is compared with the gradation pattern finding data threshold value THRI (ST9). If it is smaller, the line counter (YLIN) is cleared (returned to 0) and moved to the next line (ST10). And the line counter (YLIN) is counted up (ST11).

  Subsequently, the continuous line number (YLIN) is compared with the continuous line number threshold value THR2 in order to determine the continuity of the cueing part (ST12), and in the case of the density part that is continuous from THR2, the first gradation is obtained. Is completed and the mode is shifted to the B mode (ST13).

  Next, the operation of the first gradation data skip (B mode) will be described with reference to the flowchart of FIG. This mode is a process for skipping the number of sub-scanning lines up to the next gradation data calculation unit (C mode).

  Shifting from the above-described A mode (ST20), the line counter (YLIN) is counted up for each line (ST21), and the number of lines (YLIN) for which cueing has been completed is set to the gradation pattern skip line threshold (THR3) 1 (ST22), the line counter (YLIN) is cleared (returned to 0) (ST23) when the grayscale pattern skip line threshold (THR3) is larger than 1 (ST23), and the mode is shifted to C mode (ST24).

  Next, the operation of the gradation data calculation unit (C mode) will be described with reference to the flowchart of FIG.

  In this mode, the sampling width in the main scanning direction designated for each gradation data and the image data in the sampling area corresponding to the designated number of sub-scanning lines are added (ST31, 32), and the line counter (YLIN) is counted up. (ST33) An average value is obtained by bit shift (ST34). The sampling width in the main scanning direction is set by a register (SMPST, SMPED) accessed by the basic unit CPU 311 in the same manner as the sampling width in the main scanning direction. Further, the number of lines in the sub-scanning direction is set by the gradation threshold value line threshold value (THR4) 2 (ST31).

  The read average value for each gradation is stored in each gradation data register for storing (ST34). Each gradation data register is managed by the gradation counter KCON, and when it is stored in the register, it is counted up (ST35).

  The value of the gradation counter KCON is compared with the gradation pattern counter threshold value THR5 for setting the number of changes in the gradation pattern of the document (ST36), and the next D mode processing is performed until the gradation pattern counter threshold value THR5 is reached. The process proceeds (ST37), and the gradation data calculation unit (C mode) is repeated.

  However, when the gradation pattern number counter threshold value THR5 or more is reached (ST36), an end flag is set (ST38), and the gradation pattern reading process is ended.

  Here, the value of each gradation data register that stores the read average value for each gradation is read from the basic unit CPU 311 and used as a calculation process (ST39).

  Next, the operation of the second gradation data skip (D mode) will be described with reference to the flowchart of FIG.

  This mode is a process for skipping the number of sub-scanning lines from the end line of the gradation data calculation unit (C mode) to the start of the next gradation data calculation unit (C mode).

  First, from the gradation data calculation unit (C mode) end line (ST40), the number of lines (YLIN) is cleared to 0 (ST41), and the line counter (YLIN) is counted up for each line (ST42). The number (YLIN) and the gradation pattern skip line threshold value THR6 are compared (ST43). If the number of lines (YLIN) becomes larger than the gradation pattern skip line threshold value THR6, the number of lines (YLIN) is cleared to "0". (ST44), and shifts to the next C mode (ST45).

  The left / right correction circuit 160 this time reads basic reference information and corrects the difference between the left and right CCD characteristics. In this case, a gradation pattern that changes in density in the sub-scanning direction as a reference document is prepared, and left and right variation information of the scanner unit 4 is read by the gradation pattern reading process of the image processing ASIC 84. After the basic unit CPU 311 performs calculation processing based on the left / right variation information, correction values are set in the left / right correction table of the memory 180, and the right / left correction function is applied during normal copying.

  Here, an example of the gradation pattern read processing operation of the image processing ASIC 84 will be described.

  A reference gradation pattern document prepared in advance is placed on the document table 12 (here, the dark density portion is read and placed on the first line side), and left sampling corresponding to the left side of the 4-channel output CCD 34 in FIG. For the position, the gradation pattern reading process for obtaining the average value data of each gradation density is set, and the image data reading operation of the scanner unit 4 is performed.

  In this case, in the filtering process in the previous stage in the processing block, the setting is such that the raw image data from the scanner unit 4 can be read out as the setting for outputting the image data through. After the reading is completed, it is confirmed that the completion flag of the gradation pattern reading process of the image processing ASIC 84 described above is set, and each floor storing the average value read for each gradation corresponding to each gradation density. The value of the key data register is read by accessing the basic unit CPU 311 and data is held.

  Subsequently, at the right sampling position corresponding to the right side of the 4-channel output CCD 34 in FIG. 10, the gradation pattern reading process for setting the average value data of each gradation density is set, and the image data reading operation of the scanner unit 4 is performed. Let

  Also in this case, in the filtering process in the previous stage in the processing block, the setting is made so that the raw image data from the scanner unit 4 can be read out as the setting for outputting the image data through. After the reading is completed, it is confirmed that the completion flag of the gradation pattern reading process of the image processing ASIC 84 described above is set, and each floor storing the average value read for each gradation corresponding to each gradation density. The value of the key data register is read by accessing the basic unit CPU 311 and data is held.

  As a result, the average value of the left and right gradation data is extracted to the basic unit CPU 311.

  The difference between the average values of the left and right gradation data is corrected by calculation processing. The gradation data corresponding to the right side of the read 4-channel output CCD 34 is compared with the gradation data corresponding to the left side of the previously read 4-channel output CCD 34. Correction processing calculation is performed based on the density difference, and correction data is calculated. This correction data is set by the basic unit CPU 311 in the left / right correction table of the memory 180 in the left / right correction circuit 160. This series of processing is automatically performed.

  Here, correction data calculation processing will be described.

  Each read gray scale data (33 gray scales here) is interpolated using the least square method or the like to obtain 256 levels (8 bits minimum resolution), thereby making each image data It is possible to finely correct the difference in density of the right and left image data of the scanner unit 4. Here, the left image data is used as a reference, and the right image data is corrected to have the left characteristic.

  FIG. 15 shows an example of correction by the left-right reference left / right correction circuit 160.

  FIG. 15A shows the result that the left and right characteristics after processing become the same by correction. FIG. 15B shows left and right reading difference data set in the left and right correction table of the memory 180 for correction as shown in FIG. The values in the left / right correction table in the memory 180 are stored as a machine adjustment value in an NVRAM (not shown) and set in the left / right correction table in the memory 180 before the copying operation. For products that do not require adjustment of left / right correction with a small difference so far, it is possible to perform left / right correction so that it falls within the error range determined by know-how, etc. -It is possible to handle with offset on one side by calculation processing such as minimum error and maximum error.

  FIG. 16 shows an example in which the left / right correction circuit 160 corrects only with this offset.

  FIG. 16A shows the result that the left and right characteristics after processing approach the left CCD characteristics by offset correction. FIG. 16B shows offset data based on the average error of the left and right reading differences set in the left and right correction table of the memory 180 in order to approximate the characteristics shown in FIG.

  In addition to the present embodiment, not only the left and right pixel data but also a method for correcting the gradation characteristics by preparing a left and right correction table of the memory 180 for correcting the CCD characteristic data divided into a plurality of parts can be extended. Is possible. In this case, the read gradation data (here, 33 gradations) is set to 256 gradations, interpolation processing is performed using the least squares, etc., and then the output from the scanner unit 4 is made linear. The correction can be performed using an approximate correction curve (exponential function, log function, etc.) of each image data. Further, by having correction characteristics in a table, it is possible to extend the correction to the correction table on the printer unit 6 side together.

  As described above, according to the embodiment of the present invention, when a device having different sensor characteristics on the left and right in the main scanning direction is used because the preprocessing system is configured by using the 4-channel output CCD for high speed operation. However, by performing automatic adjustment correction using the image data left / right correction circuit of the present invention, there is no variation in the left / right CCD characteristics due to the difference in CCD devices, and there is no difference in the left / right density between the airframes. Image density reproduction is possible.

4 ... Scanner unit 5 ... Image processing unit 6 ... Printer unit 34 ... 4-channel output CCD
84 ... Image processing ASIC
130 ... Pre-processing system 135 ... High-speed scanner control ASIC
160 ... Left / Right Correction Circuit 180 ... Memory 311 ... Basic Unit CPU

Claims (6)

Storage means for storing an electrical signal photoelectrically converted by receiving light image information in one line of elements;
A first output unit for sequentially outputting the electrical signal stored in the storage means as an even signal from the end in the first direction of the one line element to a predetermined pixel as an even signal in the first direction; A second output unit that sequentially outputs odd components from the end in the first direction of the element of the line to a predetermined pixel as an odd signal in the first direction; and opposite to the first direction of the one line A third output unit that sequentially outputs even-numbered components from the end in the second direction to the predetermined pixel as an even signal in the second direction; and a second direction opposite to the first direction of the one line A first output unit having a fourth output unit that sequentially outputs odd components from the end of the second pixel to the predetermined pixel as odd signals in the second direction;
First preprocessing means for combining the even signal in the first direction and the even signal in the second direction output from the first output means, and outputting a first composite signal;
Second pre-processing means for combining the odd signal in the first direction and the odd signal in the second direction output from the first output means, and outputting a second combined signal;
The first combined signal and the second combined signal output from the first and second preprocessing means are separated into odd and even components in the first direction and the second direction, respectively. Second output means for outputting the odd component signal in the first direction, the odd component signal in the second direction, the even component signal in the first direction, and the even component signal in the second direction;
The odd component signal in the first direction, the odd component signal in the second direction, the even component signal in the first direction, and the even component signal in the second direction output from the second output means. First to fourth shading correction means for correcting shading of each,
Selecting means for selecting an even component signal in the second direction and an odd component signal in the second direction out of the output signals from the first to fourth shading correction means;
The difference between the even component signals in the first and second directions obtained in advance with the first direction as a reference, and the odd component signal in the first and second directions obtained in advance with the first direction as a reference. Of the output signals from the first to fourth shading correction means selected by the selection means using the difference between them as the correction data, the even component signal in the second direction and the odd number in the second direction Left and right correction means for correcting only the component signal;
An image information processing apparatus comprising: Storage means for storing an electrical signal photoelectrically converted by receiving light image information in one line of elements;
A first output unit for sequentially outputting the electrical signal stored in the storage means as an even signal from the end in the first direction of the one line element to a predetermined pixel as an even signal in the first direction; A second output unit that sequentially outputs odd components from the end in the first direction of the element of the line to a predetermined pixel as an odd signal in the first direction; and opposite to the first direction of the one line A third output unit that sequentially outputs even-numbered components from the end in the second direction to the predetermined pixel as an even signal in the second direction; and a second direction opposite to the first direction of the one line A first output unit having a fourth output unit that sequentially outputs odd components from the end of the second pixel to the predetermined pixel as odd signals in the second direction;
The first signal output from the first output means is converted into a digital signal and combined with the even signal in the first direction and the even signal in the second direction, and a first combined digital signal is output. Pre-processing means;
The second odd-numbered signal in the first direction and the odd-numbered signal in the second direction output from the first output means are converted into a digital signal and synthesized, and a second synthesized digital signal is output. Pre-processing means;
Separating the first combined digital signal and the second combined digital signal output from the first and second preprocessing means into odd and even components in the first and second directions, respectively. And outputting the odd component digital signal in the first direction, the odd component digital signal in the second direction, the even component digital signal in the first direction, and the even component digital signal in the second direction. Two output means;
The odd component digital signal in the first direction, the odd component digital signal in the second direction, the even component digital signal in the first direction, and the even number in the second direction output from the second output means. First to fourth shading correction means for correcting shading of each of the component digital signals;
Selecting means for selecting the even-numbered component digital signal in the second direction and the odd-numbered component digital signal in the second direction out of the output signals from the first to fourth shading correction means;
When the storage means receives a reference optical image signal, the even component digital signal in the first direction, the odd component digital signal in the first direction, the even component digital signal in the second direction, and the first component. Correction data generating means for generating correction data from a deviation generated between the odd component digital signals in the direction of 2;
With respect to the correction data generated by the correction data generation means, the difference between the digital signals in the first and second directions obtained in advance with the first direction as a reference is selected as correction data by the selection means. Left and right correction means for correcting only the even component digital signal in the second direction and the odd component digital signal in the second direction of the output signals from the first to fourth shading correction means;
An image information processing apparatus comprising: An electrical signal obtained by receiving light image information and photoelectrically converting it is accumulated in one line element,
The accumulated electric signal is converted into an even signal in the first direction, which is an even component from the end in the first direction of the one-line element to a predetermined pixel, and the end in the first direction of the one-line element. Odd signal in the first direction, which is an odd component from the first portion to the predetermined pixel, and an even component from the end in the second direction opposite to the first direction of the one line to the predetermined pixel. Output in order as an even signal in the direction of 2 and an odd signal in the second direction which is an odd component from the end of the second direction opposite to the first direction of the one line to the predetermined pixel,
Combining the even signal in the first direction and the even signal in the second direction to output a first composite signal;
Combining the odd signal in the first direction and the odd signal in the second direction to output a second combined signal;
The first synthesized signal and the second synthesized signal are separated into an odd component and an even component in each of the first direction and the second direction, and an odd component signal in the first direction and a second direction signal in the second direction are separated. Output an odd component signal, an even component signal in the first direction, and an even component signal in the second direction;
Shading correction is performed on each of the odd component signal in the first direction, the odd component signal in the second direction, the even component signal in the first direction, and the even component signal in the second direction,
Of the output signals corrected for shading, select an even component signal in the second direction and an odd component signal in the second direction;
Correct the difference between the even component signals in the first and second directions obtained in advance with the first direction as a reference and the difference between the odd component signals in the first and second directions obtained in advance with the first direction as a reference Of the output signals from the first to fourth shading correction means selected as data, only the even component signal in the second direction and the odd component signal in the second direction are corrected. Image information processing method. An electrical signal obtained by receiving light image information and photoelectrically converting it is accumulated in one line element,
The accumulated electric signal is converted into an even signal in the first direction, which is an even component from the end in the first direction of the one-line element to a predetermined pixel, and the end in the first direction of the one-line element. Odd signal in the first direction, which is an odd component from the first portion to the predetermined pixel, and an even component from the end in the second direction opposite to the first direction of the one line to the predetermined pixel. Output in order as an even signal in the direction of 2 and an odd signal in the second direction which is an odd component from the end of the second direction opposite to the first direction of the one line to the predetermined pixel,
An even signal in the first direction and an even signal in the second direction are converted into a digital signal and combined to output a first combined digital signal,
The odd-number signal in the first direction and the odd-number signal in the second direction are converted into a digital signal and synthesized to output a second synthesized digital signal,
The first synthesized digital signal and the second synthesized digital signal are separated into odd and even components in the first direction and the second direction, respectively, and an odd component digital signal in the first direction, second Output an odd component digital signal in the direction, an even component digital signal in the first direction, and an even component digital signal in the second direction,
Shading correction of each of the odd component digital signal in the first direction, the odd component digital signal in the second direction, the even component digital signal in the first direction, and the even component digital signal in the second direction;
Of the output signals corrected for shading, select an even component digital signal in the second direction and an odd component digital signal in the second direction;
When receiving a reference optical image signal, the even component digital signal in the first direction, the odd component digital signal in the first direction, the even component digital signal in the second direction, and the odd component digital signal in the second direction Correction data is generated from the deviation between
With respect to the generated correction data, the difference between the digital signals in the first and second directions obtained in advance with reference to the first direction is used as the correction data, and the selected even-numbered component digital signal in the second direction and the first An image information processing method, wherein only odd-numbered component digital signals in the direction 2 are corrected. Storage means for storing an electrical signal photoelectrically converted by receiving light image information in one line of elements;
A first output unit for sequentially outputting the electrical signal stored in the storage means as an even signal from the end in the first direction of the one line element to a predetermined pixel as an even signal in the first direction; A second output unit that sequentially outputs odd components from the end in the first direction of the element of the line to a predetermined pixel as an odd signal in the first direction; and opposite to the first direction of the one line A third output unit that sequentially outputs even-numbered components from the end in the second direction to the predetermined pixel as an even signal in the second direction; and a second direction opposite to the first direction of the one line A first output unit having a fourth output unit that sequentially outputs odd components from the end of the second pixel to the predetermined pixel as odd signals in the second direction;
First preprocessing means for combining the even signal in the first direction and the even signal in the second direction output from the first output means, and outputting a first composite signal;
Second pre-processing means for combining the odd signal in the first direction and the odd signal in the second direction output from the first output means, and outputting a second combined signal;
The first combined signal and the second combined signal output from the first and second preprocessing means are separated into odd and even components in the first direction and the second direction, respectively. Second output means for outputting the odd component signal in the first direction, the odd component signal in the second direction, the even component signal in the first direction, and the even component signal in the second direction;
The odd component signal in the first direction, the odd component signal in the second direction, the even component signal in the first direction, and the even component signal in the second direction output from the second output means. First to fourth shading correction means for correcting shading of each,
Selecting means for selecting an even component signal in the second direction and an odd component signal in the second direction out of the output signals from the first to fourth shading correction means;
The difference between the even component signals in the first and second directions obtained in advance with the first direction as a reference, and the odd component signal in the first and second directions obtained in advance with the first direction as a reference. Of the output signals from the first to fourth shading correction means selected by the selection means using the difference between them as the correction data, the even component signal in the second direction and the odd number in the second direction Left and right correction means for correcting only the component signal;
Among the outputs from the left and right correction means and the outputs from the first to fourth shading correction means, each of the outputs from the two shading correction means not corrected by the left and right correction means has at least a filtering process, Image processing means for performing image processing including gradation pattern reading processing, range correction processing, magnification conversion processing, γ correction density conversion processing, and gradation processing;
Image forming means for forming an image based on a signal output from the image processing means;
An image forming apparatus comprising: Storage means for storing an electrical signal photoelectrically converted by receiving light image information in one line of elements;
A first output unit for sequentially outputting the electrical signal stored in the storage means as an even signal from the end in the first direction of the one line element to a predetermined pixel as an even signal in the first direction; A second output unit that sequentially outputs odd components from the end in the first direction of the element of the line to a predetermined pixel as an odd signal in the first direction; and opposite to the first direction of the one line A third output unit that sequentially outputs even-numbered components from the end in the second direction to the predetermined pixel as an even signal in the second direction; and a second direction opposite to the first direction of the one line A first output unit having a fourth output unit that sequentially outputs odd components from the end of the second pixel to the predetermined pixel as odd signals in the second direction;
The first signal output from the first output means is converted into a digital signal and combined with the even signal in the first direction and the even signal in the second direction, and a first combined digital signal is output. Pre-processing means;
The second output odd signal in the first direction and the odd signal in the second direction output from the first output means are converted into a digital signal and combined to output a second combined digital signal. Pre-processing means;
Separating the first combined digital signal and the second combined digital signal output from the first and second preprocessing means into odd and even components in the first and second directions, respectively. And outputting the odd component digital signal in the first direction, the odd component digital signal in the second direction, the even component digital signal in the first direction, and the even component digital signal in the second direction. Two output means;
The odd component digital signal in the first direction, the odd component digital signal in the second direction, the even component digital signal in the first direction, and the even number in the second direction output from the second output means. First to fourth shading correction means for correcting shading of each of the component digital signals;
Selecting means for selecting the even-numbered component digital signal in the second direction and the odd-numbered component digital signal in the second direction out of the output signals from the first to fourth shading correction means;
When the storage means receives a reference optical image signal, the even component digital signal in the first direction, the odd component digital signal in the first direction, the even component digital signal in the second direction, and the first component. Correction data generating means for generating correction data from a deviation generated between the odd component digital signals in the direction of 2;
With respect to the correction data generated by the correction data generation unit, the difference between the digital signals in the first and second directions obtained in advance with the first direction as a reference is selected as correction data by the selection unit. Left and right correction means for correcting only the even component digital signal in the second direction and the odd component digital signal in the second direction of the output signals from the first to fourth shading correction means;
Among the outputs from the left and right correction means and the outputs from the first to fourth shading correction means, each of the outputs from the two shading correction means not corrected by the left and right correction means has at least a filtering process, Image processing means for performing image processing including gradation pattern reading processing, range correction processing, magnification conversion processing, γ correction density conversion processing, and gradation processing;
Image forming means for forming an image based on a signal output from the image processing means;
An image forming apparatus comprising:

Images