JP2009159343A - Communication device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a communication device capable of reducing output power by suppressing reduction in power addition efficiency. <P>SOLUTION: A base band signal generator 1 provides a modulation output to be transmitted. A fixed amplitude phase modulator 2 generates a fixed amplitude high frequency signal whose amplitude is fixed based on the modulation output. An amplitude signal generation means 7A generates an amplitude signal for reducing a modulation degree in pulse width modulation in an area whose modulation error is not more than a modulation error upper limit value. A pulse width modulator 8 generates a logical pulse signal having an ON period rate proportional to the amplitude of the amplitude signal and outputs the logical pulse signal to a switching means 5. The switching means 5 generates a burst signal by making the fixed amplitude high frequency signal intermittent by the logical pulse signal, amplifies the generated burst signal and outputs the amplified signal to a band-pass filter 6. The band-pass filter 6 filters the burst signal and outputs a transmission output. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a communication apparatus that outputs a high-frequency signal whose amplitude is modulated.

  In recent years, the spread of digital mobile radio communications represented by mobile phone systems (cellular phone systems) and wireless local area networks (hereinafter abbreviated as wireless LAN (Local Area Network)) has rapidly progressed, and the data transmission speed has also increased. ing. In order to realize a high transmission rate, it is necessary to increase a transmission signal bandwidth or a signal-to-noise ratio (hereinafter abbreviated as SNR (Signal to Noise Ratio)). Since the noise power at the receiver is proportional to the bandwidth, it is necessary to increase the SNR in order to perform high-speed transmission, and it is desirable that the transmission power is high.

  On the other hand, in such a wireless communication system, there is a strong demand for miniaturization of terminal devices and low power consumption for extending battery life. The transmission power amplifier circuit occupies most of the current consumption in the wireless device, particularly the wireless transmission / reception circuit, and the transmission power amplifier circuit is desirably highly efficient. In the former analog systems and European GSM (Global System for Mobile communications) mobile phone systems, frequency modulation (FM) that makes the amplitude of the transmission signal constant is used. Saturation amplifier circuits have been used for transmission power amplifier circuits.

  In recent years, in radio systems that have been put into practical use, band-limited phase modulation such as π / 4 shift QPSK and multi-value amplitude phase modulation such as 16QAM are actively used from the viewpoint of effective use of frequencies. When a signal whose amplitude varies is amplified by a nonlinear saturation amplifier circuit such as class C or class F, the leakage power to the adjacent channel increases due to nonlinear distortion, the modulation accuracy is degraded, and the error rate on the receiving side is degraded. For this reason, the ratio of the saturation output power of the amplifier circuit to the back-off, that is, the average transmission power is increased, and the power amplifier circuit is designed to perform class A or class AB operation, that is, linear amplification. However, a power amplification circuit with a large back-off has low power efficiency and is not desirable for the terminal device from the viewpoint of power consumption and heat dissipation. In particular, PAPR (Peak) is used in a multicarrier transmission scheme such as OFDM (Orthogonal Frequency Division Multiplexing) that has recently been put to practical use in wireless LANs and digital terrestrial television broadcasting and is being studied for use in next-generation mobile phone systems. to Average Power Power Ratio (peak power to average power ratio) is higher, and thus a larger back-off is required, and a transmission power amplifier circuit with low power efficiency must be used. For this reason, it is necessary to reduce the transmission power of the terminal to reduce power consumption, and in the case of a mobile phone, it is necessary to reduce the service area per base station. Alternatively, if the increase in power consumption is allowed, the battery life must be shortened. In addition, a television broadcast transmitter (broadcaster) is practically used with a power consumption higher than that of a conventional analog broadcaster.

  In the saturation amplifier circuit such as the class C or class F amplifier, the amplitude of the output signal can be changed by changing the DC power supply voltage of the amplifier circuit. Therefore, even in an amplifier with non-linear distortion with respect to a high-frequency input signal, amplitude modulation of all carriers without phase fluctuation can be performed by the saturation amplifier circuit at the final stage. In this case, a configuration is adopted in which a resonance circuit or the like is provided at the output to remove the harmonic component of the carrier wave. With such a final stage amplitude modulation configuration using a saturation amplifier circuit, high power efficiency can be obtained, and modulation distortion that is practically satisfactory for amplitude modulation of all carrier waves used for analog audio and image transmission. An amplitude-modulated output is obtained. Such final amplitude modulation is called plate modulation for vacuum tube circuits, collector modulation for bipolar transistor circuits, and drain modulation for field effect transistor circuits. 2. Description of the Related Art Transmitting devices such as television broadcast video signals and radio telephones for air traffic control communication have been actively used from the inception to the present day.

  However, in amplitude modulation of a suppressed carrier single sideband (which is often abbreviated as SSB-SC or simply SSB) used in offshore air traffic control communications, oceanographic radiotelephones, and amateur radio using short waves, phase variation or Since it involves phase inversion, final stage modulation cannot be used. Therefore, the modulator output must be linearly amplified by a class A or class AB amplifier, and a power amplifier circuit with low efficiency is used as in the above-described recent wireless systems.

  In order to solve the problem of the power efficiency of the transmission apparatus of the modulated signal with fluctuations in both amplitude and phase, EER (Envelope elimination and restoration: envelope elimination and reproduction) in which final amplitude modulation is performed by a saturation amplifier circuit ) Type amplifier has been devised (Non-Patent Document 1). This EER type amplifier is divided into two signals: an amplitude signal obtained by envelope detection of the output of the modulator, and a constant amplitude high frequency signal with only phase fluctuation by limiting the amplitude of the modulator output by a limiter. Separated, power-amplified by the above-mentioned saturation amplification circuit using a constant amplitude high-frequency signal as input, and the amplitude modulation input obtained by amplifying the amplitude signal to the required level by the amplitude modulation signal amplification circuit, and performing final stage amplitude modulation by the saturation amplification circuit It is.

  However, in the method according to Non-Patent Document 1, although the efficiency of the power amplifier circuit is improved, the amplitude modulation signal amplifier circuit requires a linear amplifier using a class A or class AB amplifier, and the modulation input required for the final stage modulation. The signal power is almost equal to the transmission power. Since the final power efficiency is a product of the efficiency of both amplifier circuits, the improvement of the power efficiency as a transmission device remains only a little and has not been used until today.

  In order to improve this point, for example, Patent Documents 1 and 2 and Non-Patent Document 2 disclose techniques for improving efficiency by using a class S amplifier circuit as an amplitude modulation signal amplifier circuit.

  FIG. 12 is a block diagram of a wireless transmission device 200 according to the prior art. A conventional radio transmission apparatus 200 includes a modulator 201, a local oscillator 202, a limiter 203, a high frequency amplifier circuit 204, a power amplifier circuit 205, an envelope detector 206, and an amplitude modulation signal amplifier circuit 207. .

  The modulator 201 modulates a carrier wave according to transmission data or a baseband signal and outputs a modulated output signal to be transmitted. The local oscillator 202 generates a carrier wave and outputs the generated carrier wave to the modulator 201. The limiter 203 limits the output of the modulator 201 and outputs a constant amplitude high frequency signal having a constant amplitude.

  The high frequency amplifier circuit 204 amplifies the constant amplitude high frequency signal output from the limiter 203. The power amplification circuit 205 operates using the amplitude modulation signal output from the amplitude modulation signal amplification circuit 207 as a DC power supply, and amplifies the output of the high frequency amplification circuit 204 to a required transmission power.

  The envelope detector 206 detects the amplitude fluctuation of the output signal of the modulator 201, that is, the envelope. The amplitude modulation signal amplification circuit 207 amplifies the amplitude signal obtained from the envelope detector 206.

  The amplitude modulation signal amplification circuit 207 includes a pulse width modulator 2071 and a low-pass filter 2072. The pulse width modulator 2071 samples the amplitude signal obtained from the envelope detector 206 at every fixed period of the sampling signal called sampling or PWM carrier, and obtains a pulse width proportional to the instantaneous value (sample value) of the amplitude signal. The rectangular pulse that has is output. That is, the pulse width modulator 2071 performs pulse width modulation (hereinafter abbreviated as PWM) on the amplitude signal and outputs a PWM signal.

  The low pass filter 2072 extracts an amplitude signal component from the PWM signal output from the pulse width modulator 2071. The cutoff frequency of the low-pass filter 2072 is designed to be higher than the frequency band of the amplitude signal and lower than the sampling frequency fs of the PWM signal.

  FIG. 13 is a spectrum diagram of the PWM signal. In general, the spectrum of the PWM signal has a fundamental wave component 208 having a spectrum equal to the PWM input signal (in this case, the amplitude signal in this case) as shown in FIG. 13 if the input signal is band-limited at the frequency Wf. A switching distortion wave component 209 generated by the intermodulation between the sampling signal and the PWM input signal centered on the sampling frequency and its harmonics. Therefore, if the cutoff frequency is Wf shown in FIG. 13, the distorted wave component 209 is removed by the low-pass filter 2072. FIG. 13 shows a general example of PWM signal output when the input signal is band-limited at the frequency Wf, and corresponds to the PWM signal of the conventional wireless transmission device 200 described below. Not what you want.

  FIG. 14 is a timing chart of signals in radio transmission apparatus 200 shown in FIG. The operation of the conventional radio transmission apparatus 200 shown in FIG. 12 is illustrated by taking as an example a case where amplitude modulation of a suppressed carrier double sideband is performed on a carrier wave having a center frequency fc with respect to a sine wave modulation input signal having a frequency fm. This will be described with reference to FIG.

  The modulator 201 modulates the carrier wave output from the local oscillator 202 based on the transmission data, and outputs the modulation output indicated by the waveform wv1 to the limiter 203 and the envelope detector 206. The limiter 203 limits the amplitude of the modulation output from the modulator 201 and outputs a constant amplitude signal having a waveform wv2 to the high frequency amplifier circuit 204. The high frequency amplifier circuit 204 amplifies the constant amplitude signal (waveform wv2) and outputs the amplified signal to the power amplifier circuit 205.

  On the other hand, the envelope detector 206 detects the modulation output (waveform wv1) received from the modulator 201 and detects the pulsating signal (waveform wv3) by the full-wave rectification as the pulse width of the amplitude modulation signal amplification circuit 207. Output to modulator 2071.

  In the amplitude modulation signal amplification circuit 207, the pulse width modulator 2071 receives the pulsating signal (waveform wv3) from the envelope detector 206, and samples the received pulsating signal (waveform wv3) at the sampling period. The PWM signal (waveform wv4) having a width corresponding to the amplitude of the pulsating signal (waveform wv3) is output to the low-pass filter 2072.

  The low-pass filter 2072 removes the switching distortion component 209 of the PWM signal (waveform wv4) and outputs an amplitude modulation signal (waveform wv6) to the power amplifier circuit 205.

  Then, the power amplifier circuit 205 amplifies the constant amplitude signal (waveform wv2) output from the high frequency amplifier circuit 204, performs amplitude modulation with the amplitude modulation signal (waveform wv6), is amplified to a required power, and An output signal having a waveform wv7 equivalent to the waveform wv1 in both phase and amplitude is output.

  Conventionally, as the output power control method of the power amplifier circuit 205, the following three methods are known.

  (1) The output power is controlled by changing the input power itself to the power amplifier circuit 205.

  (2) The output power is controlled by changing the operating point of the active element in the power amplifier circuit 205 while keeping the input power level to the power amplifier circuit 205 constant.

(3) The operating point and input power level of the power amplifier circuit 205 are made constant, a variable attenuator is connected to the output side of the power amplifier circuit 205, and the output power is changed.
JP-A-6-217209 Japanese translation of PCT publication No. 2002-500846 LR Kahn, “Single-Sideband Transmission by Envelope Elimination and Restoration”, Proceedings of the IRE, Vol. 40, pp. 803-806, July 1952. FH Raab, et al., “L-band transmitter using Kahn EER Technique”, IEEE Transactions on Microwave Theory and Techniques, Vol. 46, No. 12, December 1998.

  However, the conventional output power control method has the following problems. That is, in the control method (1) described above, the operation deviates from the maximum efficiency point of the power amplifier circuit, resulting in a decrease in efficiency. In addition, in the control method (2), the operating point changes as in the control method (1), and therefore the operation that maximizes the power added efficiency is not guaranteed. Furthermore, in the control method of (3), the power amplifier circuit itself can maintain the maximum point of the power added efficiency, but it consumes unnecessary energy using an attenuator and outputs it. The efficiency when evaluating with.

  Accordingly, the present invention has been made to solve such a problem, and an object of the present invention is to provide a communication device capable of reducing output power by suppressing reduction in power added efficiency.

  Another object of the present invention is to provide a communication apparatus capable of reducing output power by suppressing reduction in power added efficiency and increase in modulation error.

  According to the present invention, the communication device includes pulse output means, constant amplitude signal generation means, switching means, and a band pass filter. The pulse output means outputs a logic pulse signal having a duty ratio proportional to the amplitude of the modulation output signal. In the region where the modulation error in the pulse width modulation is equal to or lower than the modulation error upper limit value, the pulse output modulation is performed based on the modulation output signal. The logic pulse is output at a lower modulation degree. The constant amplitude signal generating means generates a constant amplitude high frequency signal based on the modulation output signal, and outputs the generated constant amplitude high frequency signal while keeping the signal level constant. The switching means intermittently receives the constant amplitude high frequency signal received from the constant amplitude signal generating means by the logic pulse signal received from the pulse output means. The band pass filter filters the constant amplitude high frequency signal interrupted by the switching means, and outputs the filtered signal as a transmission signal.

  According to the invention, the communication device includes a pulse output unit, a constant amplitude signal generation unit, a switching unit, and a band pass filter. The pulse output means outputs a logic pulse signal having a duty ratio proportional to the amplitude of the modulation output signal. In the region where the modulation error in the pulse width modulation is equal to or lower than the modulation error upper limit value, the pulse output modulation is performed based on the modulation output signal. A logic pulse is output at a lower modulation degree. The constant amplitude signal generating means generates a constant amplitude high frequency signal by reducing the signal level based on the modulation output signal in a region where the modulation error is larger than the modulation error upper limit value, and outputs the generated constant amplitude high frequency signal. . The switching means intermittently receives the constant amplitude high frequency signal received from the constant amplitude signal generating means by the logic pulse signal received from the pulse output means. The band pass filter filters the constant amplitude high frequency signal interrupted by the switching means, and outputs the filtered signal as a transmission signal.

  Preferably, the pulse output means outputs the logic pulse signal while maintaining the degree of modulation when the modulation error reaches the modulation error upper limit value in a region where the modulation error is larger than the modulation error upper limit value.

  Preferably, the constant amplitude signal generating means generates a constant amplitude high frequency signal based on the modulation output signal in a region where the modulation error is equal to or less than the modulation error upper limit value, and the signal level of the generated constant amplitude high frequency signal is made constant. Hold and output.

  In the present invention, in the region where the modulation error is equal to or less than the modulation error upper limit value, the output power is reduced by reducing the modulation degree in the pulse width modulation.

  Therefore, according to the present invention, it is possible to reduce the output power while suppressing the reduction of the power added efficiency.

  Further, in the present invention, in a region where the modulation error is equal to or lower than the modulation error upper limit value, the output power is reduced by reducing the modulation degree in the pulse width modulation, and in a region where the modulation error is larger than the modulation error upper limit value. The output power is reduced by reducing the signal level of the input signal to the power amplifier circuit.

  Therefore, according to the present invention, it is possible to reduce output power while suppressing a decrease in power added efficiency and an increase in modulation error.

  Embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a block diagram of a communication apparatus according to Embodiment 1 of the present invention. A communication device 10 according to Embodiment 1 of the present invention includes a baseband signal generator 1, a constant amplitude phase modulator 2, a local oscillator 3, a high frequency amplifier circuit 4, a switching means 5, a band pass filter 6, Amplitude signal generating means 7 and a pulse width modulator 8 are provided.

  The baseband signal generator 1 generates a baseband signal corresponding to the modulation output signal to be transmitted in accordance with the transmission data, and the generated baseband signal is sent to the constant amplitude phase modulator 2 and the amplitude signal generation means 7. Output.

  The constant amplitude phase modulator 2 receives a baseband signal from the baseband signal generator 1 and a carrier wave from the local oscillator 3. Then, the constant amplitude phase modulator 2 has a phase equal to the modulation output signal to be transmitted in accordance with the baseband signal in a region where the modulation error in pulse width modulation (PWM) is equal to or less than the modulation error upper limit value. The carrier wave is phase-modulated so as to fluctuate to generate a constant amplitude high frequency signal having a constant amplitude, and the generated constant amplitude high frequency signal is output to the high frequency amplifier circuit 4 while maintaining the signal level.

  The local oscillator 3 generates a carrier wave and outputs the generated carrier wave to the constant amplitude phase modulator 2. The high frequency amplifier circuit 4 amplifies the constant amplitude high frequency signal phase-modulated by the constant amplitude phase modulator 2.

  The switching means 5 includes a switching circuit 51 and a power amplification circuit 52. The switching circuit 51 intermittently turns the constant-amplitude high-frequency signal amplified by the high-frequency amplifier circuit 4 into a burst signal by the logic pulse of the PWM signal received from the pulse width modulator 8, and the burst signal is converted into the power amplifier circuit 52. Output to.

  The power amplification circuit 52 amplifies the burst signal output from the switching circuit 51 so as to have a required output power, and outputs the output signal to the band pass filter 6. More specifically, the power amplifying circuit 52 performs excitation amplification for amplifying a burst signal having a constant amplitude to a sufficient amplitude so that a sufficient output can be obtained with respect to the power amplifying circuit 52.

  The band pass filter 6 filters the burst-like signal output from the switching means 5, removes unnecessary wave components generated by switching by the PWM signal, and outputs a modulated output signal to be transmitted.

  The amplitude signal generator 7 receives a baseband signal from the baseband signal generator 1. When the amplitude signal generating means 7 receives the instruction signal INST_D from the outside, in the region where the modulation error in the pulse width modulation is equal to or less than the modulation error upper limit value, the amplitude output to be transmitted based on the received baseband signal An amplitude signal is generated that is proportional to the amplitude of the signal and that reduces the degree of modulation in pulse width modulation. Then, the amplitude signal generating means 7 outputs the generated amplitude signal to the pulse width modulator 8.

  Further, when the amplitude signal generating means 7 receives the instruction signal INST_I from the outside, the amplitude of the modulation output signal to be transmitted based on the baseband signal in the region where the modulation error in the pulse width modulation is equal to or lower than the modulation error upper limit value. And an amplitude signal for increasing the degree of modulation in the pulse width modulation is generated, and the generated amplitude signal is output to the pulse width modulator 8.

  The pulse width modulator 8 receives the amplitude signal from the amplitude signal generation means 7, generates a logic pulse signal having a duty ratio proportional to the amplitude of the received amplitude signal, and outputs the generated logic pulse signal to the switching means 5. Output to the switching circuit 51. That is, the pulse width modulator 8 generates a PWM signal that is pulse width modulated by the amplitude of the amplitude signal, and outputs the generated PWM signal to the switching circuit 51.

  The passband width of the bandpass filter 6 is wider than the bandwidth of the modulated output signal and sufficiently lower than the sampling frequency of the sampling signal. The high-frequency amplifier circuit 4 and the power amplifier circuit 52 are composed of saturation amplifier circuits such as class C and class F with high power efficiency. Further, when the communication device 10 is a small output transmitter, the power amplifier circuit 52 may be omitted.

  FIG. 2 is a diagram for explaining the operation of the pulse width modulator 8 shown in FIG. 1 in detail. The pulse width modulator 8 synchronizes with a sampling signal such as a sampling pulse or a PWM carrier, and outputs a rectangular pulse having a pulse width proportional to the instantaneous value (sample value) of the input signal at regular intervals. More specifically, the pulse width modulator 8 uses the input signal IS as an inverting input, uses the triangular wave TRA as a sampling signal as a non-inverting input, compares the input signal IS with the triangular wave TRA, and generates a PWM signal PWMS. In this case, the sampling frequency of the sampling signal is higher than the bandwidth of the modulated output signal to be transmitted, and preferably three times or more of this bandwidth is used.

  FIG. 3 is a diagram illustrating the relationship between the modulation error, power efficiency, and output power. A straight line k1 represents power efficiency, and a straight line k2 represents a modulation error. In the method of reducing the output power by changing the modulation degree in the pulse width modulation and taking a long time for the power amplification circuit 52 to be turned off, the power efficiency is constant with respect to the output power (see the straight line k1). ) The modulation error increases as the output power decreases (see the straight line k2).

  The reason why the power efficiency and the modulation error are represented by the straight line k1 and the straight line k2, respectively, will be described. FIG. 4 is a diagram illustrating a change in signal when the modulation degree in the pulse width modulation is changed. 4A shows a case where the modulation degree is 100%, and FIG. 4B shows a case where the modulation degree is lower than 100%.

  When the modulation degree is 100%, the pulse width modulator 8 generates the PWM signal PWMS1 by the method described above, and outputs the generated PWM signal PWMS1 to the switching circuit 51.

  Switching circuit 51 generates a burst signal BST1 by interrupting the constant-amplitude high-frequency signal received from high-frequency amplifier circuit 4 with PWM signal PWMS1. (See FIG. 4A).

  When the modulation degree is lower than 100%, the pulse width modulator 8 generates the PWM signal PWMS2 by the method described above, and outputs the generated PWM signal PWMS2 to the switching circuit 51.

  Switching circuit 51 generates a burst signal BST2 by interrupting the constant-amplitude high-frequency signal received from high-frequency amplifier circuit 4 with PWM signal PWMS2. (See FIG. 4B).

  Then, the change in burst width BW1 of burst signal BST1 is larger than the change in burst width BW2 of burst signal BST2. As a result, when the modulation degree is 100%, for example, the amplitude of the envelope signal IS1 of the modulation signal is expressed by a maximum of 10 sampling points, and when the modulation degree is lower than 100%, for example, 6 points The amplitude of the envelope signal IS2 of the modulation signal is expressed by the sampling point.

  Therefore, when the modulation degree is 100%, the amplitude of the envelope signal IS1 is expressed by 10 gradations, and when the modulation degree is lower than 100%, the amplitude of the envelope signal IS2 is expressed by 6 gradations. The

  Then, when the sampling frequency in digital signal processing is constant, reducing the modulation degree leads to a decrease in the number of sample points. This decrease in the number of sample points leads to an increase in quantization error in reproduction of amplitude information, resulting in an increase in modulation error. However, since the power amplifier circuit 52 operates at a point where the power added efficiency is maximum, the power efficiency does not decrease.

  Therefore, in the method of reducing the output power by changing the modulation degree in the pulse width modulation and taking a long time for the power amplifier circuit 52 to be turned off, as shown in FIG. On the other hand, it is constant (see the straight line k1), and the modulation error increases as the output power decreases (see the straight line k2).

  Therefore, in the present invention, the modulation error upper limit value TH is provided for the modulation error, and in the region REG1 where the modulation error is equal to or lower than the modulation error upper limit value TH, the modulation degree in the pulse width modulation is reduced to reduce the output power. did.

  FIG. 5 is a timing chart of signals in the communication apparatus 10 shown in FIG. Each waveform in FIG. 5 is described by taking as an example a case where amplitude modulation of a suppressed carrier double side band is performed on a carrier wave of frequency fc with respect to a sine wave modulation input signal of frequency fm.

  The operation of the communication apparatus 10 shown in FIG. 1 will be described with reference to FIG. First, the baseband signal generator 1 generates in-phase components I (t) and Q (t) of the baseband signal corresponding to the modulation output waveform shown in Expression (1), and the in-phase components of the generated baseband signal. I (t) and Q (t) are output to the constant amplitude phase modulator 2 and the amplitude signal generating means 7.

  In the formula (1), A (t) and φ (t) are expressed by the following formula.

  In Expression (2), Arg (x, y) represents an angle from the positive direction of the x axis to the coordinate (x, y).

  Thus, the baseband signal generator 1 generates a signal having the waveform wv1 and outputs it to the constant amplitude phase modulator 2 and the amplitude signal generating means 7.

  The local oscillator 3 generates a carrier wave and outputs it to the constant amplitude phase modulator 2. The constant amplitude phase modulator 2 receives a baseband signal (waveform wv1) from the baseband signal generator 1 and receives a carrier wave from the local oscillator 3. The constant amplitude phase modulator 2 modulates the carrier wave based on the baseband signal (waveform wv1), generates a constant amplitude high frequency signal (waveform wv2) having a constant amplitude represented by the following equation, The constant amplitude high frequency signal thus output is output to the high frequency amplifier circuit 4.

  For example, the constant amplitude phase modulator 2 may be configured to modulate a carrier wave with a normal quadrature modulator after being converted into a baseband signal represented by the following equation.

  Alternatively, the constant amplitude phase modulator 2 is configured to output the signal of the formula (1) obtained by quadrature modulation using the baseband signals I (t) and Q (t) via a limiter (amplitude limiting circuit). Also good.

  In the following, the waveform example shown in FIG. 5 shows an example when amplitude modulation of the suppressed carrier double sideband is performed on the carrier wave of frequency fc with respect to the sine wave modulation input signal of frequency fm, This corresponds to the following equation.

  On the other hand, the amplitude signal generating means 7 receives a baseband signal (waveform wv1) from the baseband signal generator 1. When the amplitude signal generating means 7 receives the instruction signal INST_D from the outside, the amplitude signal generating means 7 is composed of a signal indicated by A (t) in the equation (2) based on the baseband signal (waveform wv1), and is subjected to pulse width modulation. An amplitude signal (waveform wv3) for lowering the modulation degree is generated, and the generated amplitude signal (waveform wv3) is output to the pulse width modulator 8.

  As described above, when amplitude modulation of the suppressed carrier double sideband is performed on the sinusoidal modulation input signal, a pulsating signal by full wave rectification shown in the waveform wv3 of FIG. 5 is output.

  The pulse width modulator 8 receives the amplitude signal (waveform wv3) from the amplitude signal generation means 7, generates a PWM signal (waveform wv4) having a pulse width corresponding to the amplitude of the received amplitude signal (waveform wv3), The generated PWM signal (waveform wv4) is output to the switching circuit 51 of the switching means 5.

  Then, the switching circuit 51 receives a constant amplitude high frequency signal (waveform wv2) from the high frequency amplifier circuit 4, and receives a PWM signal (waveform wv4) from the pulse width modulator 8. The switching circuit 51 generates a burst signal (waveform wv5) by intermittently switching the constant amplitude high frequency signal (waveform wv2) by the PWM signal (waveform wv4), and power amplifies the generated burst signal (waveform wv5). Output to the circuit 52. The power amplifier circuit 52 amplifies the burst signal (waveform wv5) and outputs the amplified signal to the band pass filter 6.

  Thus, the constant-amplitude high-frequency signal (waveform wv2) in which only the phase is modulated is amplified by the high-frequency amplifier circuit 4, and then intermittently / amplified by the switching means 5, and as shown in the waveform wv5, the PWM signal ( Waveform wv4), that is, a high frequency signal that is intermittent at an on-period ratio (duty ratio) proportional to the value of the amplitude signal A (t) is output. In general, the spectrum of a sine wave (fs <fc) having a center frequency fc that is intermittent at the sampling frequency fs has a spectrum in the fundamental wave components fc and fc ± fs, so that the signal is passed through the band-pass filter 6 having the center frequency fc. For example, a signal whose amplitude (envelope) is proportional to the ratio (duty ratio) of the ON period of the switching means 5 is obtained. That is, a signal having an amplitude proportional to the amplitude signal A (t) and having a phase modulated by φ (t) is output.

  Accordingly, the band-pass filter 6 outputs an output signal indicated by the waveform wv7 that has been amplified to the required power and that has both the phase and amplitude modulated to the desired values.

  Thus, the communication apparatus 10 reduces the output power by reducing the modulation degree in the pulse width modulation in the region REG1 where the modulation error is equal to or less than the modulation error upper limit value TH. In the region REG1, the power efficiency is constant with respect to the output power.

  Therefore, according to the present invention, it is possible to reduce the output power while suppressing the reduction of the power added efficiency.

  Further, the communication apparatus 10 converts a constant amplitude high frequency signal (waveform wv2) obtained by making the modulation output signal to be transmitted into a constant amplitude by a logic pulse (waveform wv4) having a duty ratio proportional to the amplitude of the modulation output signal to be transmitted. Amplitude modulation is performed by intermittently amplifying and passing through the band-pass filter 6. As a result, the amplitude fluctuation of the transmission output is controlled with high accuracy by the duty ratio of the logic pulse, and amplitude modulation with good linearity is performed without negative feedback or with negative feedback with a small feedback rate.

  FIG. 6 is another timing chart of signals in the communication apparatus 10 shown in FIG. The signal timing chart shown in FIG. 6 is a signal timing chart when the degree of modulation in pulse width modulation is lower than that shown in FIG.

  The communication apparatus 10 performs an operation similar to the operation described in FIG. 5, and outputs the waveform wv71 as an output signal through a path consisting of the waveform wv1, the waveform wv2, the waveform wv31, the waveform wv41, and the waveform wv51.

  In this case, the amplitude signal generating means 7 generates an amplitude signal (= waveform wv31) for reducing the modulation degree in the pulse width modulation as compared with the case shown in FIG. 5 in accordance with the instruction signal INST_D from the outside. Output to the width modulator 8.

  Then, the pulse width modulator 8 performs pulse width modulation on the amplitude signal (= waveform wv31) from the amplitude signal generating means 7 to generate a PWM signal (= waveform wv41) and outputs it to the switching circuit 51. Then, the switching circuit 51 interrupts the constant amplitude high frequency signal (= waveform wv2) from the high frequency amplifier circuit 4 by the amplitude signal (= waveform wv41) from the pulse width modulator 8, and the burst signal (= waveform wv51). It is generated and output to the power amplifier circuit 52.

  The power amplification circuit 52 amplifies the burst signal (= waveform wv51), and the bandpass filter 6 outputs an output signal (= waveform wv71).

  In this case, since the off period of the PWM signal (= waveform wv41) shown in FIG. 6 is longer than the off period of the PWM signal (= waveform wv4) shown in FIG. 5, it is based on the amplitude signal (= waveform wv31). Thus, the pulse width modulator 8 that generates the PWM signal (= waveform wv41) generates the PWM signal (= waveform wv41) by reducing the modulation degree in the pulse width modulation.

  Further, the output signal (= waveform wv71) shown in FIG. 6 has a smaller amplitude than the output signal (= waveform wv7) shown in FIG. 5, and the power of the output signal (= waveform wv71) is reduced.

  As described above, in the first embodiment, in the region REG1 where the modulation error is equal to or less than the modulation error upper limit value TH, the power of the output signal is reduced by reducing the modulation degree of the pulse width modulation.

  Therefore, according to the present invention, the output power can be reduced while suppressing the reduction in power efficiency.

  In the above description, the case where the output power is reduced by reducing the modulation degree in the pulse width modulation has been described. However, when the amplitude signal generating means 7 receives the instruction signal INST_I from the outside, the amplitude signal generating means 7 changes the modulation degree in the pulse width modulation. Since the amplitude signal for increasing is generated, in the first embodiment, in the region REG1 where the modulation error is equal to or less than the modulation error upper limit TH, the output power is changed by changing the modulation degree in the pulse width modulation (that is, Output power can be increased or decreased).

  The amplitude signal generator 7 generates an amplitude signal for reducing the modulation factor in the pulse width modulation every time the instruction signal INST_D is received from the outside, and every time the instruction signal INST_I is received from the outside, An amplitude signal for increasing the modulation factor is generated, and the decrease width of the modulation factor and the increase rate of the modulation factor may be constant or may vary.

  As described above, the amplitude signal generating unit 7 generates an amplitude signal (= waveform wv31) for reducing the modulation degree in the pulse width modulation, and the pulse width modulator 8 receives the amplitude received from the amplitude signal generating unit 7. According to the amplitude of the signal (= waveform wv31), the modulation degree is reduced to generate the PWM signal (= waveform wv41). Therefore, the amplitude signal generating means 7 and the pulse width modulator 8 have a modulation error whose modulation error upper limit value. In the region REG1 which is equal to or lower than TH, “pulse output means” is configured to output a PWM signal (= logic pulse) by reducing the modulation factor of pulse width modulation.

[Embodiment 2]
FIG. 7 is a block diagram of a communication apparatus according to Embodiment 2 of the present invention. The communication device 10A according to the second embodiment is obtained by replacing the high-frequency amplifier circuit 4 and the amplitude signal generating unit 7 of the communication device 10 shown in FIG. 1 with the high-frequency amplifier circuit 4A and the amplitude signal generating unit 7A, respectively. It is the same as the communication device 10.

  When receiving the instruction signal INST1 from the outside, the high frequency amplifier circuit 4A amplifies the constant amplitude high frequency signal phase-modulated by the constant amplitude phase modulator 2, and maintains the signal level of the amplified constant amplitude high frequency signal. To 51.

  When the high frequency amplifier circuit 4A receives the instruction signal INST2_D from the outside, the high frequency amplifier circuit 4A attenuates the signal level of the constant amplitude high frequency signal phase-modulated by the constant amplitude phase modulator 2, and the attenuated constant amplitude high frequency signal is switched to the switching circuit 51. Output to.

  Further, when receiving the instruction signal INST2_I from the outside, the high frequency amplifier circuit 4A increases the signal level of the constant amplitude high frequency signal phase-modulated by the constant amplitude phase modulator 2, and the increased constant amplitude high frequency signal is switched to the switching circuit. To 51.

  When the amplitude signal generating means 7A receives the instruction signal INST1_D from the outside, the amplitude signal generating means 7A generates an amplitude signal for reducing the modulation degree in the pulse width modulation, as in the amplitude signal generating means 7 in the first embodiment, The amplitude signal thus output is output to the pulse width modulator 8.

  Further, when the amplitude signal generating means 7A receives the instruction signal INST1_I from the outside, the amplitude signal generating means 7A generates an amplitude signal for increasing the modulation degree in the pulse width modulation, similarly to the amplitude signal generating means 7 in the first embodiment, The generated amplitude signal is output to the pulse width modulator 8.

  Further, when receiving the instruction signal INST 2 from the outside, the amplitude signal generating means 7 A generates an amplitude signal for making the modulation degree in the pulse width modulation constant, and outputs the generated amplitude signal to the pulse width modulator 8. .

  FIG. 8 is a diagram illustrating another relationship between modulation error, power efficiency, and output power. In FIG. 8, a straight line k3 represents power efficiency, and a straight line k4 represents a modulation error. As a method of changing the output power, when a method of keeping the modulation degree in pulse width modulation constant and changing the signal level of the input signal to the power amplifier circuit, the modulation degree in pulse width modulation is constant. Therefore, there is no increase in modulation error due to a decrease in the modulation degree described in the first embodiment.

  On the other hand, since the power amplifier circuit operates at a point deviating from the maximum point of the power added efficiency, the power efficiency is lowered.

  Therefore, the power efficiency decreases as the output power decreases (see the straight line k3), and the modulation error becomes constant with respect to the output power (see the straight line k4).

  When the method of changing the modulation degree in the pulse width modulation is adopted as the method of changing the output power, as shown in FIG. 3, when the output power is further lowered than the region REG1, the modulation error is greater than the modulation error upper limit value TH. (See the straight line k2).

  In addition, when a method of changing the signal level of the input signal to the power amplifier circuit is adopted as a method of changing the output power, as shown in FIG. 8, the power efficiency decreases in a region where the output power is low (straight line). k3).

  Therefore, in the second embodiment, a method of changing the output power by changing the modulation degree in the pulse width modulation and a method of changing the output power by changing the signal level of the input signal to the power amplifier circuit are combined. As a result, a decrease in power efficiency is minimized and an increase in modulation error is minimized.

  FIG. 9 is a diagram showing still another relationship between the modulation error, power efficiency, and output power. In FIG. 9, a curve k5 represents power efficiency, and a curve k6 represents a modulation error.

  In the second embodiment, in the region REG1 where the modulation error is equal to or lower than the modulation error upper limit TH, the signal level of the input signal to the power amplifier circuit is kept constant, and the modulation degree in the pulse width modulation is changed. In the region REG2 in which the modulation error is larger than the modulation error upper limit TH, the modulation degree in the pulse width modulation is kept constant and the signal level of the input signal to the power amplifier circuit is changed. To change the output power. In the region REG2, the modulation degree in the pulse width modulation is held at a modulation degree at which the modulation error reaches the modulation error upper limit value TH.

  An operation of the communication device 10A in the areas REG1 and REG2 will be described. First, in region REG1, communication device 10A changes the output power by changing the degree of modulation in pulse width modulation by the same operation as communication device 10 in the first embodiment.

  In this case, the high frequency amplifier circuit 4A amplifies the constant amplitude high frequency signal received from the constant amplitude phase modulator 2 in accordance with the instruction signal INST1 received from the outside, and makes the signal level of the amplified constant amplitude high frequency signal constant. The constant-amplitude high-frequency signal is held and output to the switching circuit 51. Further, the amplitude signal generating means 7A generates an amplitude signal for increasing or decreasing the modulation degree in the pulse width modulation according to the external instruction signals INST1_D and INST1_I, and outputs the amplitude signal to the pulse width modulator 8.

  Next, the operation of the communication device 10A in the region REG2 will be described. FIG. 10 is a timing chart of signals in communication apparatus 10A shown in FIG. The baseband signal generator 1 generates a baseband signal (= waveform wv21) by the following method, and outputs the generated baseband signal (= waveform wv21) to the constant amplitude phase modulator 2 and the amplitude signal generating means 7A. To do.

  The local oscillator 3 generates a carrier wave and outputs it to the constant amplitude phase modulator 2. The constant amplitude phase modulator 2 receives a baseband signal (waveform wv21) from the baseband signal generator 1 and receives a carrier wave from the local oscillator 3. The constant amplitude phase modulator 2 modulates the carrier wave based on the baseband signal (waveform wv21), generates a constant amplitude high frequency signal having a constant amplitude by the above-described method, and generates the generated constant amplitude high frequency signal. Output to the high-frequency amplifier circuit 4A.

  When receiving the instruction signal INST2_D from the outside, the high frequency amplifier circuit 4A attenuates the constant amplitude high frequency signal received from the constant amplitude phase modulator 2, and outputs the attenuated constant amplitude high frequency signal (= waveform wv22) to the switching circuit 51. To do.

  On the other hand, the amplitude signal generating means 7A receives a baseband signal (waveform wv21) from the baseband signal generator 1. When the amplitude signal generating means 7A receives the instruction signal INST2 from the outside, the amplitude signal generating means 7A is composed of a signal indicated by A (t) in the equation (2) based on the baseband signal (waveform wv21), and is subjected to pulse width modulation. An amplitude signal (waveform wv23) for maintaining the modulation degree at the modulation degree at which the modulation error reaches the modulation error upper limit TH is generated, and the generated amplitude signal (waveform wv23) is output to the pulse width modulator 8.

  The pulse width modulator 8 receives the amplitude signal (waveform wv23) from the amplitude signal generating means 7A, generates a PWM signal (waveform wv24) having a pulse width corresponding to the amplitude of the received amplitude signal (waveform wv23), The generated PWM signal (waveform wv24) is output to the switching circuit 51.

  Then, the switching circuit 51 receives the constant amplitude high frequency signal (waveform wv22) from the high frequency amplifier circuit 4A and the PWM signal (waveform wv24) from the pulse width modulator 8. The switching circuit 51 generates a burst signal (waveform wv25) by intermittently switching the constant amplitude high frequency signal (waveform wv22) by the PWM signal (waveform wv24), and power amplifies the generated burst signal (waveform wv25). Output to the circuit 52. The power amplifier circuit 52 amplifies the burst signal (waveform wv25) and outputs the amplified signal to the band pass filter 6.

  Then, as described above, the band pass filter 6 outputs an output signal indicated by the waveform wv27 that has been amplified to a required power and that has both the phase and amplitude modulated to desired values.

  As described above, in the region REG2, the communication device 10A reduces the output power by inputting the constant amplitude high frequency signal (= waveform wv22) whose signal level is attenuated to the power amplifier circuit 52.

  FIG. 11 is another timing chart of signals in communication apparatus 10A shown in FIG.

  The communication device 10A performs the same operation as that described with reference to FIG. 10, and outputs the waveform wv271 as an output signal through a path consisting of the waveform wv21 → the waveform wv221 → the waveform wv23 → the waveform wv24 → the waveform wv251.

  In this case, the amplitude signal generating means 7A holds the amplitude signal (= waveform wv23) for maintaining the modulation degree in the pulse width modulation at the modulation degree at which the modulation error becomes the modulation error upper limit value TH in accordance with the external instruction signal INST2. ) And output to the pulse width modulator 8. Then, the pulse width modulator 8 performs pulse width modulation on the amplitude signal (= waveform wv23) from the amplitude signal generating means 7A to generate a PWM signal (= waveform wv24) and outputs it to the switching circuit 51.

  Further, the high frequency amplifier circuit 4A further attenuates the signal level of the constant amplitude high frequency signal received from the constant amplitude phase modulator 2 in accordance with the external instruction signal INST2_D, and the attenuated constant amplitude high frequency signal (= waveform wv221). ) To the switching circuit 51.

  Then, the switching circuit 51 interrupts the constant amplitude high frequency signal (= waveform wv221) from the high frequency amplifier circuit 4A by the amplitude signal (= waveform wv24) from the pulse width modulator 8, and the burst signal (= waveform wv251). It is generated and output to the power amplifier circuit 52.

  The power amplification circuit 52 amplifies the burst signal (= waveform wv251), and the bandpass filter 6 outputs an output signal (= waveform wv271).

  In this case, since the amplitude of the burst signal (= waveform wv251) shown in FIG. 11 is lower than that of the burst signal (= waveform wv25) shown in FIG. 10, the bandpass filter 6 outputs the output signal (= waveform). An output signal (= waveform wv271) having an amplitude lower than that of wv27) is output. That is, when the constant amplitude high frequency signal (= waveform wv 221) is input to the switching circuit 51, the output power is reduced.

  Therefore, by reducing the signal level of the input signal to the power amplifier circuit 52, it is possible to suppress the reduction in power efficiency to the minimum and reduce the output power.

  In the above description, the case where the output power is reduced by reducing the signal level of the input signal to the power amplifier circuit has been described. However, when the high frequency amplifier circuit 4A receives the instruction signal INST2_I from the outside, the constant amplitude phase modulation is performed. Since the signal level of the constant-amplitude high-frequency signal from the device 2 is increased and the increased constant-amplitude high-frequency signal is output to the switching circuit 51, in the second embodiment, the region where the modulation error is larger than the modulation error upper limit TH In REG2, the output power can be changed (that is, the output power can be increased or decreased) by changing the signal level of the constant-amplitude high-frequency signal to the power amplifier circuit 52.

  The high-frequency amplifier circuit 4A attenuates the signal level of the constant-amplitude high-frequency signal from the constant-amplitude phase modulator 2 every time it receives the instruction signal INST2_D, and every time it receives the instruction signal INST2_I from the outside, the constant-amplitude phase The signal level of the constant-amplitude high-frequency signal from the modulator 2 is increased, but the decrease level of the signal level of the constant-amplitude high-frequency signal and the increase level of the signal level of the constant-amplitude high-frequency signal may be constant or change. Also good.

  As described above, the amplitude signal generating unit 7A generates an amplitude signal (= waveform wv31) for reducing the modulation degree in the pulse width modulation in the region REG1, and the pulse width modulator 8 includes the amplitude signal generating unit 7A. Since the PWM signal (= waveform wv41) is generated by reducing the modulation degree according to the amplitude of the amplitude signal received from (= waveform wv31), the amplitude signal generating means 7A and the pulse width modulator 8 have a modulation error. In the region REG1 which is equal to or less than the modulation error upper limit TH, “pulse output means” is configured to output a PWM signal (= logic pulse) by reducing the modulation degree of pulse width modulation.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

  The present invention is applied to a communication device capable of reducing output power by suppressing a decrease in power added efficiency. In addition, the present invention is applied to a communication apparatus capable of reducing output power by suppressing reduction in power added efficiency and increase in modulation error.

It is a block diagram of the communication apparatus by Embodiment 1 of this invention. It is a figure for demonstrating in detail the operation | movement of the pulse width modulator shown in FIG. It is a figure which shows the relationship between a modulation error and power efficiency, and output power. It is a figure which shows the change of a signal when changing the modulation degree in pulse width modulation. It is a timing chart of the signal in the communication apparatus shown in FIG. 4 is another timing chart of signals in the communication apparatus shown in FIG. 1. It is a block diagram of the communication apparatus by Embodiment 2 of this invention. It is a figure which shows the other relationship of a modulation error, power efficiency, and output power. It is a figure which shows the further another relationship between a modulation error and power efficiency, and output power. It is a timing chart of the signal in the communication apparatus shown in FIG. It is another timing chart of the signal in the communication apparatus shown in FIG. It is a block diagram of the radio transmitter by a prior art. It is a spectrum figure of a PWM signal. 13 is a timing chart of signals in the wireless transmission device shown in FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Baseband signal generator, 2 Constant amplitude phase modulator, 3,202 Local oscillator, 4, 4A, 204 High frequency amplifier circuit, 5 Switching means, 6 Band pass filter, 7, 7A Amplitude signal generation means, 8 Pulse width modulation , 10, 10A communication device, 51 switching circuit, 5,205 power amplification circuit, 200 wireless transmission device, 201 modulator, 203 limiter, 206 envelope detector, 207 amplitude modulation signal amplification circuit, 2071 pulse width modulator, 2072 Low pass filter.

Claims (4)

In a region where the modulation error in pulse width modulation for outputting a logic pulse signal having a duty ratio proportional to the amplitude of the modulation output signal is equal to or less than the modulation error upper limit value, the modulation degree of the pulse width modulation is based on the modulation output signal. Pulse output means for lowering the output and outputting the logic pulse;
A constant amplitude high frequency signal is generated based on the modulated output signal, and the generated constant amplitude high frequency signal is output while holding the signal level constant;
Switching means for intermittently switching a constant amplitude high frequency signal received from the constant amplitude signal generating means by a logic pulse signal received from the pulse output means;
A communication apparatus comprising: a band-pass filter that filters a constant-amplitude high-frequency signal interrupted by the switching means and outputs the filtered signal as a transmission signal. In a region where the modulation error in pulse width modulation for outputting a logic pulse signal having a duty ratio proportional to the amplitude of the modulation output signal is equal to or less than the modulation error upper limit value, the modulation degree of the pulse width modulation is based on the modulation output signal. Pulse output means for lowering the output and outputting the logic pulse;
In a region where the modulation error is larger than the modulation error upper limit value, a constant amplitude high frequency signal is generated by lowering a signal level based on the modulation output signal, and the generated constant amplitude high frequency signal is output. Means,
Switching means for intermittently switching a constant amplitude high frequency signal received from the constant amplitude signal generating means by a logic pulse signal received from the pulse output means;
A communication apparatus comprising: a band-pass filter that filters a constant-amplitude high-frequency signal interrupted by the switching means and outputs the filtered signal as a transmission signal.   The pulse output means outputs the logic pulse signal while maintaining a degree of modulation when the modulation error reaches the modulation error upper limit value in a region where the modulation error is larger than the modulation error upper limit value. Item 3. The communication device according to Item 2.   The constant amplitude signal generating means generates a constant amplitude high frequency signal based on the modulation output signal in a region where the modulation error is equal to or less than the modulation error upper limit value, and the signal level of the generated constant amplitude high frequency signal is constant. The communication apparatus according to claim 2, wherein the communication apparatus holds and outputs the data.

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