JP5532968B2 - Signal processing circuit and communication apparatus having this circuit - Google Patents

Description

  The present invention relates to a signal processing circuit for improving the power efficiency of a power amplifier included in a power amplifier circuit that amplifies a modulated wave signal, and a communication apparatus having this circuit.

For example, in a method of modulating a transmission signal using a plurality of carriers, such as an OFDM (Orthogonal Frequency Division Multiplex) method and a W-CDMA (Wideband Code Division Multiple Access) method, the phases of the carriers overlap. May have a large peak power.
On the other hand, the power amplifier (power amplifier) is required to have excellent linearity. However, when a signal having a level exceeding the maximum output is input, the output is saturated and nonlinear distortion increases.

For this reason, when a signal having a large peak power is input to the nonlinear amplifier, nonlinear distortion occurs in the output signal, which causes deterioration of reception characteristics and out-of-band radiation on the reception side.
In order to prevent nonlinear distortion from increasing with respect to peak power, a power amplifier with a wide dynamic range is required, but if the dynamic range of the amplifier is widened due to peak power that does not appear frequently, the waveform on the time axis The ratio between the average power and the short-time peak power (PAPR: Peak to Average Power Ratio) increases, resulting in poor power efficiency.

Therefore, it is more reasonable to suppress a signal having a large peak power with a low appearance frequency before being input to the amplifier as it is. Therefore, in order to suppress the peak power of the IQ baseband signal before power amplification, there is a technique that performs a clipping process that instantaneously gives an amplitude in the reverse direction to an IQ baseband signal having a peak power exceeding a predetermined threshold.
Since the clipping process is a process of applying an impulse signal in the reverse direction on the time axis, it is the same as applying noise in a wide frequency band on the frequency axis. Therefore, when only the clipping process is simply performed, there is a problem that noise is generated outside the band.

Therefore, in order to deal with the problem of out-of-band radiation, peak power suppression circuits called NS-CFR (Noise Shaping-Crest Factor Reduction) and PC-CFR (Peak Cancellation-Crest Factor Reduction) are known.
Among these, NS-CFR performs band limitation by filtering the peak component of the IQ baseband signal whose instantaneous power exceeds the threshold by using a low-pass filter, FIR (Finite Impulse Response) filter, and the like. The peak component is subtracted from the original IQ baseband signal (see Patent Document 1).

  The PC-CFR has a basic function that does not cause out-of-band radiation even when clipping, and is obtained by multiplying the peak component of an IQ baseband signal whose instantaneous power exceeds a threshold by the basic function. Subtract from the original IQ baseband signal (see Patent Documents 2 and 3).

On the other hand, as a high-efficiency technology for high-frequency amplifiers, by changing the drain voltage of the power amplifier according to the output power, the power loss that occurs during operation in the case of a fixed voltage is reduced, realizing high efficiency. Tracking) type power amplifier circuits are known.
This ET power amplifier circuit extracts amplitude information (envelope) from the modulated wave signal input to the power amplifier, applies it as the power supply voltage of the power amplifier, and operates the power amplifier in a nearly saturated state. (See Patent Document 4).

Japanese Patent No. 3954341 Japanese Patent No. 3853509 Japanese Patent Laid-Open No. 2004-135087 (FIGS. 1 to 6) JP 2008-288777 A

In the power amplifier of the power amplifier circuit of the ET system, for example, as shown in FIG. 6, a section in which the power efficiency increases almost monotonously as the output power increases, and a steady section in which the increase in power efficiency does not affect the output power substantially. And has a characteristic that the slope of the monotonically increasing section is much larger than that of, for example, a normal class A amplifier.
Therefore, in the case of the ET system, it is possible to improve the power efficiency by operating without reducing the output power of the power amplifier as much as possible.

For this reason, in order to improve the power efficiency of the power amplifier, it is desirable to operate without reducing the output power as much as possible.
However, since the conventional peak power suppression circuit performs a clipping process that gives the reverse amplitude to the IQ baseband signal, the output power of the power amplifier of the power amplifier circuit in the subsequent stage is less than that before the process. I can't raise it.

For this reason, even if a conventional peak power suppression circuit is provided in the front stage of the power amplifier circuit, it cannot be avoided that the power efficiency falls to almost zero in the section where the output power of the power amplifier monotonously increases and the power efficiency deteriorates. In some cases, the power efficiency could not be improved.
The present invention has been made in view of such conventional problems, and an object thereof is to provide a signal processing circuit or the like that can improve the power efficiency of a power amplifier of a power amplifier circuit more reliably.

  (1) A signal processing circuit of the present invention is a signal processing circuit for improving the power efficiency of a power amplifier included in a power amplifier circuit that amplifies a modulated wave signal, and increases the output power of the power amplifier in an increasing direction. A signal generation unit that generates an adjustment signal for the IQ baseband signal of the modulated wave signal to be shifted; and a signal input unit that superimposes the generated adjustment signal on the IQ baseband signal. It is characterized by.

  According to the signal processing circuit of the present invention, the signal generation unit generates an adjustment signal for the IQ baseband signal of the modulated wave signal for shifting the output power of the power amplifier in the increasing direction, and the signal input unit Since the generated adjustment signal is superimposed on the IQ baseband signal, the power amplifier can be operated in a state where the output power of the power amplifier does not drop to zero.

  (2) Therefore, for example, a power amplifier used in an ET type power amplifier circuit has a section in which the power efficiency increases almost monotonously as the output power increases, and the slope in the monotonically increasing section is 1 By adopting a power amplifier having a larger power efficiency characteristic, the power efficiency of the power amplifier can be reliably improved.

(3) In the signal processing circuit of the present invention, the signal generation unit specifically includes a power calculation unit that calculates instantaneous power of the IQ baseband signal, and the IQ baseband that has the instantaneous power smaller than the threshold value. The signal calculation unit can calculate a correction signal for correcting the signal so that the instantaneous power corresponding to the threshold value is obtained.
In this case, the adjustment signal composed of the correction signal may be superimposed on the IQ baseband signal in the signal input unit.

In contrast to the conventional clipping process that cuts the outer periphery of the instantaneous power of the IQ baseband signal, the signal generation unit is a so-called “cut-out process” that cuts the inside of the instantaneous power (the instantaneous power is raised above the threshold value). In this sense, it can also be called “boosting processing”.
Even in the case of the “cut-out process” that raises the instantaneous power in this way, the PAPR of the modulated wave signal input to the power amplifier circuit decreases, so that the power efficiency can be improved as in the case of the conventional clipping process. it can.

(4) In the signal processing device of the present invention, the signal generation unit may be configured by an offset circuit that generates a sine wave signal having a frequency corresponding to a DC subcarrier of the modulated wave signal formed of a multicarrier signal. it can.
In this case, the adjustment signal composed of the sine wave signal may be superimposed on the IQ baseband signal in the signal input unit.

According to the signal generation unit including the offset circuit, the power calculation unit and the signal calculation unit that are necessary for performing the “drilling process” are not necessary, so that the circuit configuration is simplified and the cost can be reduced. is there.
Further, according to the signal generation unit including the offset circuit, since a sine wave signal having a frequency corresponding to a DC subcarrier not used for data transmission is used, the sine wave signal (adjustment signal) is superimposed on the IQ baseband signal. However, communication failure does not occur on the receiving side.

(5) Further, in the signal processing device of the present invention, the signal generation unit synthesizes a sine wave signal having a frequency corresponding to a center frequency of a plurality of subcarriers of the modulated wave signal formed of a multicarrier signal. It is also possible to configure an offset circuit that generates
In this case, the signal input unit may superimpose the adjustment signal composed of the synthesized wave signal on the IQ baseband signal.

According to the signal generation unit including the offset circuit, the power calculation unit and the signal calculation unit that are necessary for performing the “drilling process” are not necessary, so that the circuit configuration is simplified and the cost can be reduced. is there.
In addition, according to the signal generation unit composed of the offset circuit, a synthesized wave signal obtained by synthesizing a sine wave signal having a frequency corresponding to the center frequency of the plurality of subcarriers is used. Even if it is superimposed on the baseband signal, its phase does not change, and communication failure does not occur on the receiving side.

(6) In the signal processing circuit according to the aspect of the invention, the signal generation unit corrects the IQ baseband signal in which the instantaneous power is larger than a predetermined second threshold so that the instantaneous power is equivalent to the second threshold. It is preferable to further include a second signal calculation unit that calculates a second correction signal for the purpose.
In this case, the second correction signal may be superimposed on the IQ baseband signal in the signal input unit.

  According to the signal generation unit, since the clipping process for cutting the outer peripheral side of the instantaneous power of the IQ baseband signal is performed together with the “cut-out process”, the power amplification circuit is compared with the case of performing only the “cut-out process”. The PAPR of the modulated wave signal input to can be further reduced, and the power efficiency of the power amplifier can be further improved.

  (7) The communication device of the present invention includes a transmitter on which the signal processing circuit of the present invention and the power amplifier circuit arranged in the subsequent stage are mounted, and is similar to the signal processing circuit of the present invention. Has an effect.

  As described above, according to the present invention, since the adjustment signal for shifting the output power of the power amplifier in the increasing direction is superimposed on the IQ baseband signal, the output power of the power amplifier is prevented from dropping to zero, The power efficiency of the power amplifier can be reliably improved.

1 is an overall configuration diagram of a radio communication system to which the present invention is preferably applicable. It is a functional block diagram which shows the principal part of the OFDM transmitter of a base station apparatus. It is a functional block diagram showing an example of a power amplifier circuit. 1 is a functional block diagram of a signal processing circuit according to a first embodiment of the present invention. It is a coordinate diagram on the IQ plane showing the relationship between IQ baseband signals and thresholds. It is a graph which shows the power efficiency characteristic of the power amplifier of a power amplifier circuit. It is a functional block diagram of the signal processing circuit which concerns on 2nd Embodiment of this invention. (A) is a figure which shows the power spectrum of a sine wave signal, (b) is a figure which shows the power spectrum of a synthetic wave signal. It is a functional block diagram of the signal processing circuit which concerns on 3rd Embodiment of this invention. It is a coordinate diagram of the IQ plane showing the relationship between the IQ baseband signal and the first and second threshold values.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
[Wireless communication system]
FIG. 1 is an overall configuration diagram of a radio communication system to which the present invention can be suitably applied.
As shown in FIG. 1, a wireless communication system according to the present embodiment includes a base station device (BS: Base Station) 1 and a plurality of mobile terminals (MSs) that perform wireless communication with the device 1 in the cell of the device 1. Mobile Station) 2.

In this radio communication system, an OFDM scheme is adopted as a modulation scheme between the base station apparatus 1 and the mobile terminal 2. This method is a multi-carrier digital modulation method in which transmission data is carried on a large number of carrier waves (subcarriers). Since the subcarriers are orthogonal to each other, the data can be arranged so densely as to overlap on the frequency axis. There are advantages.
But as a modulation system of the said radio | wireless communications system, a W-CDMA system may be used besides the OFDM system.

[Configuration of transmitter]
FIG. 2 is a functional block diagram illustrating a main part of the OFDM transmitter 3 of the base station apparatus 1.
The transmitter 3 includes a transmission processor 4 and a power amplification circuit 5. The transmission processor 4 is configured by, for example, an FPGA (Field Programmable Gate Array) having one or a plurality of memories and a CPU. ing.

The FPGA can set (configure) the configuration information for various logic circuits in advance at the time of shipment of the processor, the manufacture of the base station apparatus 1, and the like. Functional units 6 to 10 are configured.
That is, the transmission processor 4 of this embodiment includes, in order from the left, an S / P conversion unit 6, a mapping unit 7, an IFFT (Inverse Fast Fourier Transform) unit 8, a signal processing unit 9, and an orthogonal modulation unit. 10 is included.

The serial signal sequence input to the transmission processor 4 is converted into a plurality of signal sequences by the S / P (serial parallel) conversion unit 6, and each parallel signal sequence converted is converted into a predetermined signal by the mapping unit 7. It is converted into a plurality of subcarrier signals f1, f2,... Fn composed of combinations of amplitude and phase.
Each of the subcarrier signals f1, f2,... Fn is converted into an I signal and a Q signal as baseband signals orthogonal to each other on the time axis by the IFFT unit 8.

The IQ signal (Iin, Qin) is subjected to predetermined signal processing in a signal processing unit 9 (signal processing circuit of the present embodiment) at the subsequent stage. The IQ signals (Iout, Qout) after the signal processing are quadrature modulated by the quadrature modulation unit 10 to become a modulated wave signal, and this modulated wave signal is input to the power amplifier circuit 5 in the subsequent stage.
The signal processing circuit 9 of the present embodiment performs signal processing so that the instantaneous power P of the IQ signal does not become less than a predetermined threshold value Pth, and details thereof will be described later.

[Configuration of power amplifier circuit]
FIG. 3 is a functional block diagram illustrating an example of the power amplifier circuit 5.
The power amplifying circuit 5 of the present embodiment employs the ET method, and extracts amplitude information (envelope) from the modulated wave signal input to the power amplifier 16 and applies it as a power supply voltage of the power amplifier 16. Thus, the power amplifier 16 is operated in a state that is almost saturated.

As shown in FIG. 3, the power amplification circuit 5 specifically includes a distortion compensation unit 12, an envelope detection unit 13, a gate voltage adjustment unit 14, a drain voltage modulation unit 15, and a power amplifier 16.
Among these, the distortion compensation unit 12 adds, for example, a characteristic opposite to the distortion characteristic to the input signal (modulated / demodulated signal) of the power amplifier 16 in advance, so that the output signal of the power amplifier 16 is reduced in distortion. It consists of a predistorter to get.

The envelope detection unit 13 detects an envelope of the modulated wave signal, and includes, for example, a diode detector and a circuit that calculates the amplitude component of the modulated wave signal from the I and Q components of the IQ baseband signal. ing.
The envelope detector 13 outputs an envelope signal to the gate voltage adjuster 14 and the drain voltage modulator 15.

The gate voltage adjustment unit 14 compares a predetermined threshold voltage with the value of the envelope signal, and switches the gate voltage of the power amplifier 16 in accordance with the comparison result. The drain voltage modulation unit 15 amplifies the power supply voltage based on the envelope signal, and applies the amplified power supply voltage to the drain terminal of the power amplifier 16.
The power amplifier 16 is composed of, for example, an FET (Field Effect Transistor) type transistor, and amplifies the modulated wave signal based on the drain voltage and the gate voltage.

[Configuration of signal processing circuit]
FIG. 4 is a functional block diagram of the signal processing circuit 9 according to the first embodiment of the present invention.
As shown in FIG. 4, the signal processing circuit 9 of this embodiment includes a power calculation unit 18, a comparison unit 19, a correction signal calculation unit 20, filters 21 and 22, scaling units 23 and 24, adder / subtractors 25 and 26, and a delay. Parts 27 and 28.

In the present embodiment, the power calculation unit 18, the comparison unit 19, and the correction signal calculation unit 20 adjust the adjustment signal (correction) for the IQ baseband signal of the modulated wave signal so that the output power of the power amplifier 16 is shifted in the increasing direction. A signal generator for generating signals ΔI, ΔQ) is configured.
The adders / subtracters 25 and 26 constitute a signal input unit that superimposes the generated adjustment signals (correction signals ΔI and ΔQ) on the corresponding IQ baseband signal.

The power calculator 18 calculates the instantaneous power P of the IQ baseband signal from the square sum of the input I signal and the Q signal (Iin, Qin). The comparison unit 19 compares the calculated instantaneous power P with a predetermined threshold value Pth, and issues a calculation command to the correction signal calculation unit 20 when the instantaneous power P is smaller than the threshold value Pth.
When receiving the calculation command from the comparison unit 19, the correction signal calculation unit 20 calculates the correction signals ΔI and ΔQ to be applied to the Iin signal and the Qin signal based on the following equations, and outputs these. The correction signal calculation unit 20 outputs zero when no calculation command is received.

In the following equation, SQRT (•) is a function that takes the square root of a variable in parentheses (hereinafter the same).
ΔI = {1−SQRT (Pth / P)} × Iin
ΔQ = {1−SQRT (Pth / P)} × Qin

The correction signals ΔI and ΔQ output from the correction signal calculation unit 20 are band-limited (nose shaping) by filters 21 and 22 including a low-pass filter and an FIR filter at the subsequent stage, respectively, and are further scaled by scaling units 23 and 24 at the subsequent stages. The amplitude is adjusted and input to the adders / subtracters 25 and 26.
Further, the delay units 27 and 28 in the previous stage of the adders / subtracters 25 and 26 delay the time of the Iin signal and the Qin signal by the time of the arithmetic processing in the power calculation unit 18 and the correction signal calculation unit 20 or the like.

The adders / subtracters 25 and 26 subtract the correction signals ΔI and ΔQ from the delayed Iin signal and Qin signal, respectively, to obtain an Iout signal (= SQRT (Pth / P) × Iin) and a Qout signal (= SQRT (Pth / Pth / P) × Qin) is output.
By this subtraction, an IQ baseband signal having an instantaneous power P less than the threshold value Pth is corrected to an instantaneous power signal corresponding to the threshold value Pth. Further, an IQ baseband signal whose instantaneous power P is equal to or greater than the threshold value Pth is output without being corrected.

FIG. 5 is a coordinate diagram on the IQ plane showing the relationship between the IQ baseband signal and the threshold value Pth when the above signal processing is performed.
As shown in FIG. 5, the processing by the signal processing circuit 9 of the present embodiment is the reverse of the conventional clipping process that cuts the outer peripheral side of the instantaneous power P of the IQ baseband signal. In other words, cutting is performed by “cut-out processing”. In the case of the “cut-out process”, the power is raised and the PAPR of the modulated wave signal input to the power amplifier circuit 5 is lowered, so that the power efficiency of the power amplifier 16 is also improved in this respect. This cut-out process can also be expressed as a “boosting process” in the sense that the instantaneous power P is raised to a predetermined threshold value Pth or higher.

[Relationship with power efficiency characteristics of power amplifier]
FIG. 6 is a graph showing the power efficiency characteristics of the power amplifier 16 of the power amplifier circuit 5.
As shown in FIG. 6, in the case of the ET type power amplifier circuit 5, the power efficiency characteristic of the power amplifier 16 is such that the power efficiency η increases almost monotonically as the output power P _RF increases. Then, a steady zone Z2 in which an increase in power efficiency η does not substantially affect the output power P _RF appears. In FIG. 6, the characteristic of the power efficiency η in the section Z1 is schematically shown as a straight line. However, strictly speaking, the characteristic is not a straight line, but a curved shape that slightly bulges upward.

Here, the output power (average power) of the power amplifier 16 is P _RF , the DC power on the drain side is P _DC , and the increased power generated on the output side of the power amplifier 16 by applying the correction signals ΔI and ΔQ in the signal processing circuit 9 ( Average power) is Pa, and the slope in the monotonically increasing section Z1 is α.
When the instantaneous power P of the IQ baseband signal is P <Pth, when the power efficiency before the processing by the signal processing circuit 9 is η1, and the power efficiency after the processing is η2, these efficiency η1 and η2 are Each is calculated as follows.

η1 = α × (P _RF / P _DC )
η2 = α × {(P _RF + Pa) / P _DC }
On the other hand, since the increased power Pa is an extra output not based on the modulated wave signal, the true power efficiency η3 after the signal processing needs to subtract the influence of Pa from η2. Therefore, the true power efficiency η3 after the signal processing is as follows.
η3 = η2-Pa / P _DC
= Η1 × [1 + {(α-1) / α} × (Pa / P _RF )]

In this case, if the slope α of the monotonically increasing section Z1 is α> 1, η3 becomes larger than η1, and the correction signal ΔI, ΔQ is applied in the signal processing circuit 9, whereby the power efficiency of the power amplifier 16 is increased. It will be better than before application. In the power amplifier 16 used for the ET method, the inclination α can be set to about 10.
Therefore, in the transmitter 3 of the present embodiment, the power amplifier 16 with α> 1 is mounted on the power amplifier circuit 5.

According to the signal processing circuit 9 of the present embodiment having the above-described configuration, the IQ baseband signal does not become lower than the predetermined threshold Pth by the hollowing process (see FIG. 5), so that the output power of the power amplifier 16 increases. It does not fall below the power Pa (see FIG. 6).
As described above, since the slope α of the power amplifier 16 in the monotonically increasing section Z1 is greater than 1, the power efficiency of the power amplifier 16 can be improved as compared with that before the signal processing.

[Second Embodiment]
FIG. 7 is a functional block diagram of the signal processing circuit 9 according to the second embodiment of the present invention.
The signal processing circuit 9 of this embodiment includes an offset circuit 30 as a signal generation unit that generates a predetermined sine wave signal S1 or a synthesized wave signal S2, and the sine wave signal S1 or the synthesized wave signal S2 as an IQ baseband signal. It comprises adders 31 and 32 as signal input units to be superimposed.

FIG. 8A shows the power spectrum of the sine wave signal S1, and FIG. 8B shows the power spectrum of the combined wave signal S2.
As shown in FIG. 8A, the sine wave signal S1 is composed of a sine wave having a frequency corresponding to a DC subcarrier in a modulated wave signal (OFDM signal in the present embodiment) composed of a multicarrier signal. Since the DC subcarrier is not used for data transmission, communication failure does not occur on the receiving side even if a sine wave signal S1 having a frequency corresponding to the DC subcarrier is superimposed on the IQ baseband signal.

Further, as shown in FIG. 8B, the synthesized wave signal S2 is a synthesized sine wave signal corresponding to the center frequency of the subcarriers f1, f2,... Fn in the modulated wave signal composed of the multicarrier signal. is there.
Since the synthesized wave signal S2 is a synthesized sine wave signal having a frequency corresponding to the center frequency of each subcarrier, the phase does not change even if it is superimposed on the IQ baseband signal. No communication failure occurs.

In FIG. 8B, the synthesized wave signal S2 has frequency components corresponding to the center frequencies of all the subcarriers f1, f2,... Fn, but only some of the subcarriers are used. You may do.
In the present embodiment, since the sine wave signal S1 and the synthesized wave signal S2 are superimposed on the IQ baseband signal, the output power of the power amplifier 16 is shifted in the increasing direction by the application of the signals S1 and S2, and the output power is increased. Never falls to zero. For this reason, also in this embodiment, the same operation effect as a 1st embodiment is acquired.

  Further, in the present embodiment, the circuit configuration is simplified because an arithmetic processing unit such as the power calculation unit 18 and the correction signal calculation unit 19 such as the signal processing circuit 9 of the first embodiment (FIG. 4) is unnecessary. There is also an advantage that the cost can be reduced.

[Third Embodiment]
FIG. 9 is a functional block diagram of a signal processing circuit 9 according to the third embodiment of the present invention.
As shown in FIG. 9, in the signal processing circuit 9 of the present embodiment, in addition to the first correction signal calculation unit 20, a second correction signal calculation unit 34 for performing clipping processing on the IQ baseband signal is provided. This is different from the signal processing circuit 9 of the first embodiment (FIG. 4).
Hereinafter, the same functional units as those in the first embodiment (FIG. 4) will be denoted by the same reference numerals in FIG.

The comparison unit 19 holds two thresholds, a smaller first threshold Pth1 and a larger second threshold Pth2, and the first threshold Pth1 is the same value as the threshold Pth in the first embodiment (FIG. 4). is there.
The comparison unit 19 compares the calculated instantaneous power P with the threshold values Pth1 and Pth2, and issues a calculation command to the first correction signal calculation unit 20 when the instantaneous power P is smaller than the first threshold value Pth1. At the same time, when the instantaneous power P is larger than the second threshold value Pth2, a calculation command is issued to the second correction signal calculation unit 34.

In this case, the first correction signals ΔI1 and ΔQ1 output from the first correction signal calculation unit 20 are calculated by the following equations, as in the case of the first embodiment.
ΔI1 = {1−SQRT (Pth1 / P)} × Iin
ΔQ1 = {1−SQRT (Pth1 / P)} × Qin

On the other hand, when receiving the calculation command from the comparison unit 19, the second correction signal calculation unit 34 calculates the second correction signals ΔI2 and ΔQ2 to be applied to the Iin signal and the Qin signal based on the following expressions, Is output. The second correction signal calculation unit 34 outputs zero when no calculation command is received.
ΔI2 = {1−SQRT (Pth2 / P)} × Iin
ΔQ2 = {1-SQRT (Pth2 / P)} × Qin

  The second correction signals ΔI2 and ΔQ2 output from the second correction signal calculation unit 34 are band-limited (nose shaping) by filters 35 and 34 including a low-pass filter, an FIR filter, and the like at the subsequent stage, respectively, and further, a scaling unit at the subsequent stage The amplitude is adjusted by 37 and 38 and input to the adders / subtracters 25 and 26.

Then, the adder / subtracters 25 and 26 subtract the second correction signals ΔI2 and ΔQ2 from the delayed Iin signal and Qin signal, respectively, to obtain an Iout signal (= SQRT (Pth2 / P) × Iin) and a Qout signal (= SQRT ( Pth2 / P) × Qin) is output.
By this subtraction, an IQ baseband signal whose instantaneous power P exceeds the second threshold value Pth2 is corrected to a signal of instantaneous power equivalent to the second threshold value Pth2. In addition, an IQ baseband signal whose instantaneous power P is equal to or less than the second threshold value Pth2 is output as it is without being corrected.

FIG. 10 is a coordinate diagram on the IQ plane showing the relationship between the IQ baseband signal and the first and second threshold values Pth1 and Pth2 in the case of the signal processing circuit 9 of the third embodiment.
As shown in FIG. 10, the processing by the signal processing circuit 9 according to the present embodiment includes the hollowing process for cutting the inside of the instantaneous power P of the IQ baseband signal, and the outer peripheral side of the instantaneous power P of the IQ baseband signal. It performs both of the clipping processing for cutting the image.

  Therefore, compared with the signal processing circuit 9 of the first embodiment (FIG. 4) that performs only the hollowing process, the PAPR of the modulated wave signal input to the power amplifier circuit 5 can be further reduced, and the power of the power amplifier 16 can be reduced. Efficiency can be further improved.

[Other variations]
The embodiment disclosed this time is illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, and includes all modifications that are within the scope of the claims and equivalents.
For example, the signal processing circuit 9 and the power amplification circuit 5 at the subsequent stage of the present invention are mounted not only on the base station apparatus 1 but also on an RRH (Remote Radio Head) connected to the base station apparatus 1 via a CPRI (Common Public Radio Interface). You can also

The signal processing circuit 9 of the present invention can be applied not only to the ET type power amplifier circuit 5 but also to an EER (Envelope Elimination and Restoration) type power amplifier circuit.
However, in the EER system, there is no amplitude fluctuation in the RF signal, and there is an amplitude fluctuation in the envelope signal. Therefore, when the present invention is applied to an EER power amplifier circuit, the signal of the present invention is included in the envelope signal. Processing is performed to improve the efficiency of the power amplifier circuit.

DESCRIPTION OF SYMBOLS 1 Base station apparatus 2 Mobile terminal 3 Transmitter 4 Processor for transmission 5 Power amplifier circuit 9 Signal processing part (signal processing circuit)
16 Power amplifier 18 Power calculation part (signal generation part)
19 Comparison unit (signal generation unit)
20 Correction signal calculation unit (signal generation unit)
21, 22 Filter 23, 24 Scaling unit 25, 26 Adder / subtracter (signal input unit)
27, 28 Delay unit 30 Offset circuit (signal generation unit)
31, 32 adder (signal input unit)
34 Second correction signal calculation unit 35, 36 Filter 37, 38 Scaling unit

Claims (7)

A signal processing circuit for improving the power efficiency of a power amplifier included in a power amplifier circuit for amplifying a modulated wave signal,
A signal generator for generating an adjustment signal for an IQ baseband signal of the modulated wave signal input to the power amplifier circuit for shifting the output power of the power amplifier in an increasing direction;
A signal input unit that superimposes the generated adjustment signal on the IQ baseband signal;
Bei obtain signal processing circuit. A signal processing circuit for improving the power efficiency of a power amplifier included in a power amplifier circuit for amplifying a modulated wave signal,
A signal generator for generating an adjustment signal for the IQ baseband signal of the modulated wave signal for shifting the output power of the power amplifier in an increasing direction;
A signal input unit that superimposes the generated adjustment signal on the IQ baseband signal;
With
The signal generator corrects the IQ baseband signal whose instantaneous power is smaller than a predetermined threshold so that the instantaneous power of the IQ baseband signal is equal to the threshold. A signal calculation unit for calculating a correction signal for
The signal input unit, the correction signal consisting of said adjustment signal to the IQ baseband signal signal processing circuit you superimposed. The signal generation unit calculates a second correction signal for correcting the IQ baseband signal in which the instantaneous power is larger than a predetermined second threshold so that the instantaneous power is equivalent to the second threshold. A second signal calculating unit;
The signal processing circuit according to claim 2 , wherein the signal input unit superimposes the second correction signal on the IQ baseband signal. The signal generation unit includes an offset circuit that generates a sine wave signal having a frequency corresponding to a DC subcarrier of the modulated wave signal including a multicarrier signal,
The signal input unit, a signal processing circuit according to any one of claims 1 to 3, superimposing the adjustment signal consisting of the sine wave signal to the IQ baseband signal. A signal processing circuit for improving the power efficiency of a power amplifier included in a power amplifier circuit for amplifying a modulated wave signal,
A signal generator for generating an adjustment signal for the IQ baseband signal of the modulated wave signal for shifting the output power of the power amplifier in an increasing direction;
A signal input unit that superimposes the generated adjustment signal on the IQ baseband signal;
With
The signal generation unit includes an offset circuit that generates a synthesized wave signal obtained by synthesizing a sine wave signal having a frequency corresponding to a center frequency of a plurality of subcarriers of the modulated wave signal including a multicarrier signal,
The signal input unit, the synthesized wave signal the adjustment signal as the IQ baseband signal you superimposed signal processing circuit. 6. The power amplifier according to claim 1, wherein the power amplifier has a section in which the power efficiency increases substantially monotonously as the output power increases, and has a power efficiency characteristic in which the slope in the monotonically increasing section is greater than 1. The signal processing circuit according to the item . It said signal processing circuit and, that communication device having a transmitter and the power amplifier circuit disposed on the subsequent stage is mounted according to any one of claims 1-6.

Images