JP2009152484A - Power protection circuit and integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power protection circuit which operates for a surge voltage by static electricity and does not operate for a usual spike noise on the power supply. <P>SOLUTION: The power supply protective circuit, which is provided between a power terminal 1 to which power voltage is applied, and a protective target circuit 2 which is connected to the power terminal 1, includes: two capacitors C1 and C2 which are connected in series between the power terminal 1 and a ground; a protective transistor TR1 in which a source and a drain are connected between the power terminal 1 and the ground, and a gate is connected to a connection point A between the capacitors C1 and C2; and bias means (4, TR2) which apply bias voltage to the connection point A. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a power supply protection circuit provided in a power supply connection portion of a protection target circuit such as an IC (integrated circuit).

  FIG. 3 is a circuit diagram of an IC equipped with a conventional power protection circuit. This power supply protection circuit includes two capacitors C1 and C1 and one transistor TR1, and is provided between a power supply terminal 1 connected to an external power supply and an internal circuit (protection target circuit) 2 (not shown).

  The two capacitors C1 and C2 are connected in series between the connection line 3 between the power supply terminal 1 and the internal circuit 2 and the ground (ground), and the gate of the transistor TR1 is connected between the capacitors C1 and C2. Connected to the point A, the source and drain are connected between the connection line 3 and the ground.

  This power protection circuit is configured to function when an IC, which is a component, is assembled to a substrate such as a digital camera, for example. During assembly, a surge voltage due to static electricity is transmitted from the power supply terminal 1 to the internal circuit 2 so that the internal circuit 2 The capacitance ratio of the capacitors C1 and C2 is determined so as not to be destroyed. That is, the transistor TR1 is turned on when there is a voltage fluctuation exceeding the fluctuation determined by this capacitance ratio, and an excessive surge voltage is not applied to the protection target circuit 2 side.

  As a power protection circuit related to the prior art, for example, there is one described in Patent Document 1 below.

Japanese Patent Laid-Open No. 2004-22950

  The power supply protection circuit described above has large capacitances C1 and C2 as viewed from the power supply terminal, and has a configuration suitable as a protection circuit connected to the power supply terminal. However, there is a possibility that the protection transistor TR1 is turned on even when the power is turned on or normal spike noise on the driving power supply. Since the internal circuit 2 is designed to have a structure that is not destroyed by the level of spike noise that is normally generated, there is no problem even if spike noise enters the internal circuit, and the transistor TR1 is turned on and the power supply voltage is supplied to the internal circuit 2. The problem is that it disappears.

  In other words, the power supply protection circuit needs to be configured so that the transistor TR1 is never conductive after the IC is assembled to the device, and the transistor TR1 is conductive against an excessive surge voltage that may occur during the assembly. However, it is necessary that the transistor TR1 does not conduct even when a voltage of spike noise generated after assembly is applied.

  However, in the conventional power protection circuit, there is a possibility that the protection transistor TR1 becomes conductive even when the power is turned on after the IC is assembled to the device or when spike noise occurs, and this power protection circuit is applied to the IC or the like. There is a problem that it is difficult.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a power protection circuit having a configuration in which a transistor that operates to protect against an excessive surge voltage caused by static electricity does not operate at a normal spike noise level, and an integrated circuit including the power protection circuit. is there.

  The power protection circuit of the present invention is a power protection circuit provided between a power supply terminal to which a power supply voltage is applied and a protection target circuit connected to the power supply terminal, and is connected in series between the power supply terminal and the ground. Two capacitors, a protection transistor whose source and drain are connected between the power supply terminal and ground, and whose gate is connected to a connection point between the two capacitors, and a bias voltage is applied to the connection point And bias means.

  The bias means of the power supply protection circuit of the present invention includes a bias circuit that rises in conjunction with the supply of the power supply voltage and generates a predetermined voltage, and a source and drain connected between the connection point and ground, and the predetermined gate is connected to the predetermined circuit And a biasing transistor to which a voltage is applied.

  The power protection circuit of the present invention is characterized in that a low-pass filter is provided between the connection point and the gate of the protection transistor.

  The integrated circuit according to the present invention is characterized in that any one of the power protection circuits described above is formed between the power supply terminal connected to an external power supply and the protection target circuit inside.

  According to the present invention, it is possible to provide a power supply protection circuit that operates reliably against an excessive surge voltage generated by static electricity and does not operate with a level of normal spike noise on the power supply.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a circuit diagram of a power protection circuit according to the first embodiment of the present invention. This power protection circuit is formed inside the IC and is provided between the power terminal 1 and the protection target circuit 2. Similar to the circuit configuration shown in FIG. 3, two capacitors C1 and C2 connected in series are provided between the connection line 3 connecting the power supply terminal 1 and the protection target circuit 2 and the ground. In addition, a protection first transistor TR1 having a connection point A between the capacitors C1 and C2 is connected to the gate, and a source and a drain are connected between the connection line 3 and the ground.

  Further, the power protection circuit of the present embodiment includes a bias circuit 4 that rises in conjunction with power-on when power is turned on, and a bias second transistor TR2 to which a predetermined voltage supplied from the bias circuit 4 is applied to the gate. Prepare. The source and drain of the second transistor TR are connected between the connection point A and the ground.

  In the power supply protection circuit having such a configuration, even when a surge voltage enters from the power supply terminal 1 when the IC is assembled to the device, the AC component voltage of the surge voltage determined by the capacitance ratio [C1 / (C1 + C2)] of the capacitors C1 and C2 is protected. Since the first transistor TR1 is turned on by being applied to the gate of the first transistor TR1, the surge voltage flows to the ground side, and the protection target circuit 2 is not destroyed by the excessive surge voltage.

  When the power is turned on after the IC is assembled to the device, the bias circuit 4 starts up in conjunction with the power on, and a predetermined voltage supplied from the bias circuit 4 is applied to the gate of the second transistor TR2.

  As a result, the second transistor TR2 becomes conductive at the same time as the power is turned on, and the gate of the first transistor TR1 for protection is connected to the ground, and the gate of the first transistor TR1 is fixed to a bias voltage that does not make the transistor TR1 conductive.

  At this time, even if spike noise or the like is applied to the power supply terminal 1 and the power supply terminal voltage fluctuates, the gate voltage of the protection transistor TR1 fluctuates because the potential at the connection point A of the capacitor C1 is maintained at a fixed voltage by the transistor TR2. In other words, the protection transistor TR1 does not conduct with the normal spike noise.

  FIG. 2 is a circuit diagram of a power protection circuit according to the second embodiment of the present invention. The power supply protection circuit according to the present embodiment is different from the power supply protection circuit according to the first embodiment shown in FIG. 1 in that a low-pass filter including a resistor R1 and a capacitor C3 is added.

  That is, in the power supply protection circuit of this embodiment, the connection point A between the capacitors C1 and C2 and the gate of the first transistor TR1 for protection are connected by the resistor R1, and the capacitor C3 is connected between the gate and the ground. It is set as the structure connected by.

  In this way, by inserting the low-pass filter (R1, C3) between the connection point A and the gate of the protection transistor TR1, a surge voltage enters from the power supply terminal 1 while the IC is assembled to the device. When this occurs, the period during which the protection transistor TR1 is conducting (on period) can be made longer than in the embodiment of FIG.

  This makes it possible to increase as much as possible the surge voltage that escapes to the ground side as compared with the embodiment of FIG. 1, and to improve the surge voltage resistance of the IC.

  According to the embodiment described above, it is possible to design a power supply protection circuit ignoring the noise performance of the power supply. At the same time, the voltage at which the protective transistor TR1 is turned on can be set low, which makes it possible to speed up the response compared to the prior art, so that the internal voltage rise can be kept low.

  The power supply protection circuit according to the present invention can prevent the circuit to be protected from being destroyed by a surge voltage due to static electricity and can prevent the protection transistor from malfunctioning with a noise voltage other than the surge voltage. This is useful as a power protection circuit formed in the power terminal portion.

1 is a circuit diagram of a power supply protection circuit according to a first embodiment of the present invention. It is a circuit diagram of the power supply protection circuit which concerns on 2nd Embodiment of this invention. It is a circuit diagram of the conventional power supply protection circuit.

Explanation of symbols

1 Power supply terminal 2 Internal circuit (Protection target circuit)
3 Connection line 4 Bias circuit A Connection point TR1 First transistor TR2 for protection Second transistor C1, C2, C3 Capacitor R1 Resistance

Claims (4)

  In a power supply protection circuit provided between a power supply terminal to which a power supply voltage is applied and a protection target circuit connected to the power supply terminal, two capacitors connected in series between the power supply terminal and the ground, A protection transistor having a source and a drain connected between a power supply terminal and ground and a gate connected to a connection point between the two capacitors, and bias means for applying a bias voltage to the connection point are provided. Power protection circuit.   The bias means includes a bias circuit that generates a predetermined voltage that rises in conjunction with the application of the power supply voltage, and a bias circuit in which a source and a drain are connected between the connection point and ground and the predetermined voltage is applied to the gate. The power supply protection circuit according to claim 1, further comprising a transistor.   The power supply protection circuit according to claim 1, wherein a low-pass filter is provided between the connection point and the gate of the protection transistor.   4. An integrated circuit, wherein the power protection circuit according to claim 1 is formed between the power terminal connected to an external power source and the protection target circuit inside.

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