JP2009146993A5 - - Google Patents

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Publication number
JP2009146993A5
JP2009146993A5 JP2007320917A JP2007320917A JP2009146993A5 JP 2009146993 A5 JP2009146993 A5 JP 2009146993A5 JP 2007320917 A JP2007320917 A JP 2007320917A JP 2007320917 A JP2007320917 A JP 2007320917A JP 2009146993 A5 JP2009146993 A5 JP 2009146993A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007320917A
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Japanese (ja)
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JP2009146993A (en
JP5288783B2 (en
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Publication date
Application filed filed Critical
Priority to JP2007320917A priority Critical patent/JP5288783B2/en
Priority claimed from JP2007320917A external-priority patent/JP5288783B2/en
Publication of JP2009146993A publication Critical patent/JP2009146993A/en
Publication of JP2009146993A5 publication Critical patent/JP2009146993A5/ja
Application granted granted Critical
Publication of JP5288783B2 publication Critical patent/JP5288783B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2007320917A 2007-12-12 2007-12-12 Bonding pad arrangement method, semiconductor chip and system Expired - Fee Related JP5288783B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007320917A JP5288783B2 (en) 2007-12-12 2007-12-12 Bonding pad arrangement method, semiconductor chip and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007320917A JP5288783B2 (en) 2007-12-12 2007-12-12 Bonding pad arrangement method, semiconductor chip and system

Publications (3)

Publication Number Publication Date
JP2009146993A JP2009146993A (en) 2009-07-02
JP2009146993A5 true JP2009146993A5 (en) 2011-02-03
JP5288783B2 JP5288783B2 (en) 2013-09-11

Family

ID=40917299

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007320917A Expired - Fee Related JP5288783B2 (en) 2007-12-12 2007-12-12 Bonding pad arrangement method, semiconductor chip and system

Country Status (1)

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JP (1) JP5288783B2 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003100800A (en) * 2001-09-21 2003-04-04 Fuji Electric Co Ltd Electrode structure of silicon chip
JP4587676B2 (en) * 2004-01-29 2010-11-24 ルネサスエレクトロニクス株式会社 Three-dimensional semiconductor device having a stacked chip configuration
JP2005339604A (en) * 2004-05-24 2005-12-08 Nec Electronics Corp Semiconductor storage device
JP4662474B2 (en) * 2006-02-10 2011-03-30 ルネサスエレクトロニクス株式会社 Data processing device

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