JP2009141297A - Multilayer wiring board and its manufacturing method - Google Patents

Multilayer wiring board and its manufacturing method Download PDF

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JP2009141297A
JP2009141297A JP2007319174A JP2007319174A JP2009141297A JP 2009141297 A JP2009141297 A JP 2009141297A JP 2007319174 A JP2007319174 A JP 2007319174A JP 2007319174 A JP2007319174 A JP 2007319174A JP 2009141297 A JP2009141297 A JP 2009141297A
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layer
wiring board
solder
copper
copper wiring
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Toyoichi Yoshino
豊一 吉野
Shinji Morimoto
信司 森本
Koji Nakajima
晃治 中島
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Panasonic Corp
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Panasonic Corp
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Priority to JP2007319174A priority Critical patent/JP2009141297A/en
Priority to US12/331,754 priority patent/US20090145651A1/en
Priority to CNU2008201821890U priority patent/CN201336772Y/en
Publication of JP2009141297A publication Critical patent/JP2009141297A/en
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer wiring board which has high connection reliability, is optimum for making copper wiring layers small, and has interlayer connection portions excellent in productivity; and to provide its manufacturing method. <P>SOLUTION: The multilayer wiring board 1 comprises an insulating layer 2, a copper wiring upper layer 3 and a copper wiring lower layer 4 laminated on both sides of the insulating layer 2, a through-hole 5 penetrating the insulating layer 2 and at least the one copper wiring layer, and a solder conductor 6 filled in the through-hole 5 and connecting and making conductive the copper wiring upper layer 3 and the copper wiring lower layer 4. The solder-exposing surfaces exposed to the outmost surfaces with a part of the solder conductor 6 contacting with the copper wiring upper layer 3 and the copper wiring lower layer 4, and surfaces of the copper wiring upper layer 3 and the copper wiring lower layer 4 are integrally covered and connected with a plating film 8 composed of a metal. The plating film 8 composed of the metal is composed of a metal having a larger ionization tendency than the solder conductor 6. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、各種の表面実装型電子部品を搭載する配線板であり、特に高い接続信頼性をもつ多層配線板およびその製造方法に関する。   The present invention relates to a wiring board on which various surface-mount type electronic components are mounted, and particularly to a multilayer wiring board having high connection reliability and a method for manufacturing the same.

近年、電子機器の小型軽量化及び高機能化に伴い、使用される配線板の配線密度もさらに増加する傾向にある。この配線板の配線密度を増加させる手段としては、銅配線層の微細化だけでは限界がある。そこで、銅配線層を積層し、銅配線層間にある絶縁層に層間接続部を設け、銅配線層を立体的に接続させ、配線密度をさらに増加させた多層配線板が注目されている。   In recent years, with the reduction in size and weight and higher functionality of electronic devices, the wiring density of wiring boards used tends to further increase. As means for increasing the wiring density of this wiring board, there is a limit only by miniaturization of the copper wiring layer. Therefore, a multilayer wiring board in which copper wiring layers are stacked, an interlayer connection portion is provided in an insulating layer between copper wiring layers, the copper wiring layers are three-dimensionally connected, and the wiring density is further increased is drawing attention.

従来、多層配線板は、用いられる絶縁層の違いにより異なる特徴をもつ。例えば、絶縁層として、最も普及しているガラスクロス含浸エポキシ樹脂基材(以下ガラエポ基材と略)を用いた場合は、低コスト化が図れ、また、ポリイミドに代表される電気絶縁性フィルムを用いた場合は、薄型軽量化が可能となる。この絶縁層の違いにより多様な特徴をもつ多層配線板であるが、層間接続方法に関しては基本的に同じ技術が用いられている。この層間接続方法について、ポリイミドフィルムを用いた多層配線板を例に挙げて以下に説明する。   Conventionally, multilayer wiring boards have different characteristics depending on the difference in the insulating layers used. For example, when the most popular glass cloth impregnated epoxy resin base material (hereinafter abbreviated as a glass epoxy base material) is used as the insulating layer, the cost can be reduced, and an electrically insulating film represented by polyimide can be used. When used, it is possible to reduce the thickness and weight. Although it is a multilayer wiring board having various characteristics due to the difference in the insulating layer, basically the same technique is used for the interlayer connection method. This interlayer connection method will be described below by taking a multilayer wiring board using a polyimide film as an example.

その方法は、ポリイミドフィルムからなる絶縁層の両面に銅箔を積層した銅張両面基板に貫通孔であるスルーホールを設け、このスルーホール壁面に銅めっき膜を形成し、絶縁層の両面にある銅箔を立体的に層間接続している(例えば特許文献1参照。)。   In the method, a through-hole which is a through-hole is provided in a copper-clad double-sided substrate in which copper foil is laminated on both sides of an insulating layer made of polyimide film, and a copper plating film is formed on the wall surface of the through-hole. A copper foil is three-dimensionally interconnected (for example, refer to Patent Document 1).

この層間接続方法は、めっきスルーホール法と呼ばれ、最も一般的な層間接続方法である。この製造方法は、絶縁性であるスルーホール壁面を無電解めっきで導体化処理する工程と、電解めっきにより銅の厚付けめっきを行う工程との二つの大きな工程からなる。特徴としては、スルーホール内の銅めっき膜とポリイミドフィルムからなる絶縁層との熱膨張率が略同一であるが故に、熱に対する接続信頼性に優れている。   This interlayer connection method is called a plated through hole method and is the most common interlayer connection method. This manufacturing method is composed of two major steps: a step of converting the wall surface of the through-hole that is insulative into a conductor by electroless plating and a step of performing thick plating of copper by electrolytic plating. As a feature, since the thermal expansion coefficient of the copper plating film in the through hole and the insulating layer made of the polyimide film is substantially the same, the connection reliability against heat is excellent.

しかしながら、銅の厚付けめっきを施すと、スルーホール内の銅めっき膜の厚みだけでなく、絶縁層の両面に形成された銅箔の厚みも増加させてしまい、その後のエッチング処理による銅配線層の微細化が難しくなる。また、プロセスが長大となり、生産性にも問題が残る方法であった。   However, when copper thick plating is applied, not only the thickness of the copper plating film in the through hole, but also the thickness of the copper foil formed on both surfaces of the insulating layer is increased, and the copper wiring layer by the subsequent etching process It becomes difficult to miniaturize. In addition, the process is lengthy, and productivity remains a problem.

これらの問題を解決する層間接続の方法として、スルーホール内に半田ペーストを印刷し溶融固化する方法(例えば特許文献2参照。)等が提案されている。この方法の特徴としては、上記めっきスルーホール法と比較し簡単なプロセスで作製できるので、生産性が高く、また、銅配線層形成後に層間接続を施すので、プロセス上銅箔の厚みに関し何ら影響を与えず、銅配線層の微細化を阻害するものでない。   As a method of interlayer connection to solve these problems, a method of printing a solder paste in a through hole and melting and solidifying it (for example, see Patent Document 2) has been proposed. As a feature of this method, since it can be manufactured by a simple process compared to the plated through hole method described above, the productivity is high, and since the interlayer connection is performed after the formation of the copper wiring layer, there is no influence on the thickness of the copper foil in the process. Does not hinder the miniaturization of the copper wiring layer.

しかしながら、半田の熱膨張率がポリイミドフィルムからなる絶縁層と比較し大きく、加熱するとスルーホール内の半田が絶縁層以上に膨張し、絶縁層表面の銅配線層と半田との接合界面が剥離する危険性がある。このように、半田を用いた方法は、熱による接続信頼性が十分でないという問題があった。   However, the thermal expansion coefficient of the solder is larger than that of the insulating layer made of polyimide film, and when heated, the solder in the through hole expands more than the insulating layer, and the bonding interface between the copper wiring layer and the solder on the surface of the insulating layer peels off. There is a risk. As described above, the method using solder has a problem that connection reliability by heat is not sufficient.

以上の課題は、同じ層間接続方法にて得られるガラエポ基材の多層配線板においても共通の課題であった。
特開平5−175636号公報 特開平7−176847号公報
The above problems are common to the multilayer wiring boards of glass epoxy base materials obtained by the same interlayer connection method.
JP-A-5-175636 JP-A-7-176847

以上のように、従来のめっきスルーホール法による多層配線板の層間接続は、接続信頼性に優れるものの、銅配線層の微細化と生産性の向上に課題があり、また、半田を用いた方法は、上記課題である銅配線層の微細化と生産性の向上は図れるものの、接続信頼性に課題があった。   As described above, the interlayer connection of the multilayer wiring board by the conventional plated through-hole method is excellent in connection reliability, but there are problems in miniaturization of the copper wiring layer and improvement in productivity, and a method using solder However, there is a problem in connection reliability, although the above-described problem can be achieved by miniaturization of the copper wiring layer and improvement of productivity.

したがって、多層配線板の層間接続においては、高い接続信頼性と銅配線層の微細化との両立が可能な高い生産性をもつ多層配線板が要求されていた。   Therefore, in interlayer connection of multilayer wiring boards, a multilayer wiring board having high productivity capable of achieving both high connection reliability and miniaturization of a copper wiring layer has been required.

上記の問題に鑑み、本発明は、接続信頼性の高い、銅配線層の微細化に最適な、生産性に優れる層間接続部を有する多層配線板およびその製造方法を提供することを目的とする。   In view of the above problems, an object of the present invention is to provide a multilayer wiring board having an interlayer connection portion having high connection reliability, optimum for miniaturization of a copper wiring layer, and excellent in productivity, and a manufacturing method thereof. .

上記課題を解決するために本発明の多層配線板は、絶縁層と、前記絶縁層の両面に積層された銅配線層と、前記絶縁層と少なくとも片方の前記銅配線層とを貫通する貫通孔と、前記貫通孔に充填され前記銅配線層間を接続導通する半田導電体とからなる多層配線板であって、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とが金属めっき膜にて被覆一体化され接合しており、且つ前記金属めっき膜は、前記半田導電体よりもイオン化傾向が大なる金属からなることを備えたものである。   In order to solve the above problems, a multilayer wiring board according to the present invention includes an insulating layer, a copper wiring layer laminated on both surfaces of the insulating layer, and a through-hole penetrating the insulating layer and at least one of the copper wiring layers. And a multilayer wiring board comprising a solder conductor filled in the through-hole and connected and conductive between the copper wiring layers, wherein a part of the solder conductor is in contact with the copper wiring layer and exposed to the outermost surface. The exposed surface of the solder and the surface of the copper wiring layer are coated and integrated with a metal plating film, and the metal plating film is made of a metal having a higher ionization tendency than the solder conductor. It is a thing.

また、上記課題を解決するために本発明の多層配線板の製造方法は、絶縁層の両面に銅配線層が形成された両面配線板の所定の層間接続位置に前記銅配線層と前記絶縁層とを貫通する貫通孔を形成した後、略球状の一個の半田ボールを圧入充填することで半田導電体を形成し、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とを電解ニッケルめっきによってニッケルめっき膜を電析することで前記銅配線層間の導通をとることを備えたものである。   In addition, in order to solve the above problems, the method of manufacturing a multilayer wiring board according to the present invention includes the copper wiring layer and the insulating layer at a predetermined interlayer connection position of a double-sided wiring board in which a copper wiring layer is formed on both surfaces of the insulating layer. A solder conductor is formed by press-fitting a substantially spherical solder ball, and a part of the solder conductor is in contact with the copper wiring layer and exposed to the outermost surface. The solder exposed surface and the surface of the copper wiring layer are electroplated with a nickel plating film to conduct electricity between the copper wiring layers.

ここで、この金属めっき膜は、半田と銅というイオン化傾向の異なる金属表面への電析であるため、通常の酸性めっき液中に浸漬すると直ぐに半田と銅との間で局部電池を構成する。この電池の起電力を駆動力として、イオン化傾向のより大きな半田がイオン化し液中に溶解、半田の腐食が進行していく。この腐食していく半田表面に金属めっき膜を形成することは、非常に難しい。ここでの半田とは錫もしくは錫を主成分とする錫合金である。   Here, since this metal plating film is electrodeposition on the metal surfaces having different ionization tendencies, that is, solder and copper, a local battery is formed between the solder and copper as soon as it is immersed in a normal acidic plating solution. Using the electromotive force of the battery as a driving force, solder having a higher ionization tendency is ionized and dissolved in the liquid, and the corrosion of the solder proceeds. It is very difficult to form a metal plating film on the corroding solder surface. The solder here is tin or a tin alloy containing tin as a main component.

したがって、本発明者らはこのイオン化傾向の異なる金属表面への電析について鋭意研究を重ね、金属めっき膜として、半田よりもイオン化傾向の大なる金属めっき膜を選択することで実現可能であることを見出すに至った。つまり、この半田腐食を抑制するため、イオン化傾向が半田よりもさらに大きな金属が溶解しているめっき液中にて電析を行うことで、半田のイオン化による腐食を防ぎつつ表面に金属めっき膜が形成可能となり、結果、半田導電体よりもイオン化傾向の大なる金属めっき膜でのみ被覆一体化され接合が可能となった。   Therefore, the present inventors have conducted intensive research on electrodeposition on metal surfaces having different ionization tendencies, and can be realized by selecting a metal plating film having a greater ionization tendency than solder as the metal plating film. I came to find. In other words, in order to suppress this solder corrosion, electrodeposition is performed in a plating solution in which a metal whose ionization tendency is larger than that of the solder is dissolved, so that the metal plating film is formed on the surface while preventing corrosion due to ionization of the solder. As a result, only the metal plating film having a higher ionization tendency than the solder conductor can be integrated and joined.

これにより、層間接続部に用いる半田導電体と銅配線層との表面を金属めっき膜にて被覆した一体構造が実現でき、この金属めっき膜が加熱時に膨張する半田導電体を規制し、熱応力が抑制できるため、半田導電体と銅配線層との接合が十分に確保でき、高い接続信頼性が得られる。   As a result, an integrated structure in which the surface of the solder conductor used for the interlayer connection and the copper wiring layer is covered with the metal plating film can be realized, and the metal plating film regulates the solder conductor that expands when heated, and the thermal stress Therefore, the bonding between the solder conductor and the copper wiring layer can be sufficiently secured, and high connection reliability can be obtained.

また、この金属めっき膜は、従来のめっきスルーホール法の様な電気配線としての役割でなく、熱膨張した半田導電体の規制を主な目的としているため、めっきスルーホール法に比べ金属めっき膜の膜厚を薄くすることができる。したがって、製造方法においては、銅配線層形成後に層間接続用として薄く金属めっき膜であるニッケルめっき膜を形成することから、銅配線層への影響は少なく、銅配線層の微細化に適している。さらに、半田導電体の充填と金属めっきという非常にシンプルなプロセスで層間接続を行うため、高い生産性も確保できる。   In addition, this metal plating film is not the role of electrical wiring as in the conventional plating through-hole method, but is mainly intended to regulate thermally expanded solder conductors. The film thickness can be reduced. Therefore, in the manufacturing method, a nickel plating film, which is a thin metal plating film, is formed for interlayer connection after the copper wiring layer is formed, so that the influence on the copper wiring layer is small and suitable for miniaturization of the copper wiring layer. . Furthermore, since the interlayer connection is performed by a very simple process of filling the solder conductor and metal plating, high productivity can be secured.

本発明の請求項1に記載の多層配線板によれば、充填した半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と銅配線層表面とを、半田よりイオン化傾向が大なる金属めっき膜で被覆した一体構造を層間接続部に有するため、半田よりイオン化傾向が大なる金属めっき膜を選択することで、半田と銅表面に被覆可能となり、さらにこの金属めっき膜が熱膨張した半田導電体の応力を抑制し、高い接続信頼性をもつ多層配線板が得られるという効果がある。   According to the multilayer wiring board according to claim 1 of the present invention, the exposed solder surface and the copper wiring layer surface in which a part of the filled solder conductor is in contact with the copper wiring layer and exposed on the outermost surface, Since the interlayer connection part has an integrated structure coated with a metal plating film that has a higher ionization tendency than solder, it is possible to cover the solder and copper surfaces by selecting a metal plating film that has a higher ionization tendency than solder. The metal plating film has an effect of suppressing the stress of the solder conductor thermally expanded and obtaining a multilayer wiring board having high connection reliability.

本発明の請求項2に記載の多層配線板によれば、絶縁層との熱膨張率の整合性が良好な銅を半田導電体のコア部に含むため、半田導電体全体の熱膨張率が効果的に最適化され、さらに高接続信頼性を有する多層配線板が得られるという効果がある。   According to the multilayer wiring board according to claim 2 of the present invention, since copper having good thermal expansion coefficient matching with the insulating layer is included in the core portion of the solder conductor, the thermal expansion coefficient of the entire solder conductor is reduced. There is an effect that a multilayer wiring board which is effectively optimized and has high connection reliability can be obtained.

本発明の請求項3に記載の多層配線板によれば、半田よりもイオン化傾向が大きく、金属材料の中でも比較的硬いニッケルもしくはニッケル合金を金属めっき膜として用いるため、半田と銅表面に金属めっき膜が被覆可能となり、さらに金属めっき膜が熱膨張した半田導電体の応力を確実に抑制でき、より高い接続信頼性をもつ多層配線板が得られるという効果がある。   According to the multilayer wiring board according to claim 3 of the present invention, since the ionization tendency is larger than that of the solder and a relatively hard nickel or nickel alloy is used as the metal plating film, the metal plating is applied to the solder and the copper surface. The film can be covered, and the stress of the solder conductor in which the metal plating film is thermally expanded can be surely suppressed, so that there is an effect that a multilayer wiring board having higher connection reliability can be obtained.

本発明の請求項4に記載の多層配線板によれば、異種金属めっき膜は、半田導電体表面と銅配線層表面を被覆保護した金属めっき膜表面に形成するため、金属めっき膜がバリア層の役目を果たし、イオン化傾向の制約を受けることなく、通常のめっき金属から選択でき、製品に応じ表面のめっき被覆が選択できることから、製品の設計自由度が高い多層配線板が得られるという効果がある。   According to the multilayer wiring board of the present invention, the dissimilar metal plating film is formed on the surface of the metal plating film that covers and protects the surface of the solder conductor and the surface of the copper wiring layer. Because it can be selected from ordinary plating metal without being restricted by ionization tendency and the surface plating coating can be selected according to the product, it is possible to obtain a multilayer wiring board with a high degree of freedom in product design. is there.

本発明の請求項5に記載の多層配線板によれば、層間接続部含んだ領域のみに金属めっき膜を部分めっきしているため、他の銅配線層表面に金属めっき膜が形成されず、プロセス上銅配線層に何ら影響を与えないため、銅配線層の微細化に優れた高接続信頼性の多層配線板が得られるという効果がある。   According to the multilayer wiring board of claim 5 of the present invention, since the metal plating film is partially plated only in the region including the interlayer connection portion, the metal plating film is not formed on the surface of the other copper wiring layer, Since there is no influence on the copper wiring layer in the process, there is an effect that a multilayer wiring board with high connection reliability excellent in miniaturization of the copper wiring layer can be obtained.

本発明の請求項6に記載の多層配線板の製造方法によれば、銅配線層形成後に層間接続用として薄くニッケルめっき膜を形成することから、銅配線層への影響は少なく、銅配線層の微細化に適しており、さらに、半田導電体の充填と金属めっきという非常にシンプルなプロセスで層間接続を行うため、微細な配線層をもつ多層配線板が高い生産性にて製造できるという効果がある。   According to the method for manufacturing a multilayer wiring board according to claim 6 of the present invention, since the nickel plating film is formed thinly for interlayer connection after the copper wiring layer is formed, there is little influence on the copper wiring layer, and the copper wiring layer It is suitable for miniaturization of solder, and since the interlayer connection is performed by a very simple process of filling the solder conductor and metal plating, it is possible to manufacture a multilayer wiring board with a fine wiring layer with high productivity. There is.

本発明の請求項7に記載の多層配線板の製造方法によれば、非常に微細な銅配線層をもつ片面配線板をプロセス材として用いるため、さらに微細な銅配線層をもつ多層配線板が製造できるという効果がある。   According to the method for manufacturing a multilayer wiring board according to claim 7 of the present invention, since a single-sided wiring board having a very fine copper wiring layer is used as a process material, a multilayer wiring board having a further fine copper wiring layer is provided. There is an effect that it can be manufactured.

本発明の請求項8に記載の多層配線板の製造方法によれば、層間接続用にブラインドバイアホールを用いるため、さらに高い接続信頼性をもつ多層配線板が製造できるという効果がある。   According to the method for manufacturing a multilayer wiring board according to claim 8 of the present invention, since the blind via hole is used for interlayer connection, there is an effect that a multilayer wiring board having higher connection reliability can be manufactured.

本発明の請求項9に記載の多層配線板の製造方法によれば、貫通孔並びブラインドビアホールに充填され層間接続用の半田導電体となる半田ボールの代わりとして銅コア半田ボールを用いることで、絶縁層との熱膨張率の整合性が良好な銅を半田導電体のコア部に含むため、半田導電体全体の熱膨張率が効果的に最適化され、さらに高接続信頼性を有する多層配線板が得られるという効果がある。   According to the method for manufacturing a multilayer wiring board according to claim 9 of the present invention, by using a copper core solder ball instead of a solder ball that fills through holes and blind via holes and serves as a solder conductor for interlayer connection, Multi-layer wiring with high connection reliability because the thermal expansion coefficient of the entire solder conductor is effectively optimized because copper with good thermal expansion coefficient matching with the insulating layer is included in the core of the solder conductor. There is an effect that a plate is obtained.

本発明の請求項1に記載の多層配線板は、絶縁層と、前記絶縁層の両面に積層された銅配線層と、前記絶縁層と少なくとも片方の前記銅配線層とを貫通する貫通孔と、前記貫通孔に充填され前記銅配線層間を接続導通する半田導電体とからなる多層配線板であって、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とが金属めっき膜にて被覆一体化され接合しており、且つ前記金属めっき膜は、前記半田導電体よりもイオン化傾向が大なる金属からなることを備えたものである。この構成により、半田よりもイオン化傾向が大なる金属を金属めっき膜として用いるため、半田と銅表面に金属めっき膜を被覆でき、さらにこの金属めっき膜が熱膨張した半田導電体の応力を抑制できるという作用を有する。   The multilayer wiring board according to claim 1 of the present invention includes an insulating layer, a copper wiring layer laminated on both surfaces of the insulating layer, a through-hole penetrating the insulating layer and at least one of the copper wiring layers. A multilayer wiring board comprising a solder conductor filled in the through-hole and connecting and conducting between the copper wiring layers, wherein a part of the solder conductor is in contact with the copper wiring layer and exposed on the outermost surface. The exposed solder surface and the copper wiring layer surface are coated and integrated with a metal plating film, and the metal plating film is made of a metal having a higher ionization tendency than the solder conductor. Is. With this configuration, since a metal having a higher ionization tendency than solder is used as the metal plating film, the metal plating film can be coated on the solder and the copper surface, and the stress of the solder conductor in which the metal plating film is thermally expanded can be suppressed. It has the action.

本発明の請求項2に記載の多層配線板は、請求項1記載の多層配線板において、前記半田導電体は、前記貫通孔径より小さな銅片をコア部に有し、表面を半田金属層で被覆されていることを備えたものである。この構成により、絶縁層との熱膨張率の整合性が良好な銅を半田導電体のコア部に含むため、半田導電体全体の熱膨張率の最適化が図れ、熱膨張差にて生じる熱応力を緩和することができるという作用を有する。   The multilayer wiring board according to claim 2 of the present invention is the multilayer wiring board according to claim 1, wherein the solder conductor has a copper piece smaller than the diameter of the through hole in the core portion, and the surface is a solder metal layer. It is provided with being covered. With this configuration, copper having good thermal expansion coefficient matching with the insulating layer is included in the core portion of the solder conductor, so that the thermal expansion coefficient of the entire solder conductor can be optimized and heat generated by the difference in thermal expansion can be achieved. It has the effect that stress can be relaxed.

本発明の請求項3に記載の多層配線板は、請求項1及び2記載の多層配線板において、前記金属めっき膜がニッケルもしくはニッケル合金のうち少なくとも一つを含むことを備えたものである。この構成により、半田よりもイオン化傾向が大きく、金属材料の中でも比較的硬いニッケルもしくはニッケル合金を金属めっき膜として用いるため、半田と銅表面に金属めっき膜を被覆でき、さらに金属めっき膜が熱膨張した半田導電体の応力を確実に抑制できるという作用を有する。   A multilayer wiring board according to a third aspect of the present invention is the multilayer wiring board according to the first and second aspects, wherein the metal plating film includes at least one of nickel and a nickel alloy. This configuration has a higher ionization tendency than solder and uses relatively hard nickel or nickel alloy among the metal materials as the metal plating film, so the metal plating film can be coated on the solder and copper surfaces, and the metal plating film is thermally expanded. It has the effect | action that the stress of the solder conductor which carried out can be suppressed reliably.

本発明の請求項4に記載の多層配線板は、請求項1から3記載の多層配線板において、前記金属めっき膜の表面に少なくとも一種類の異種金属めっき膜を積層することを備えたものである。この構成により、異種金属めっき膜は、半田導電体表面と銅配線層表面を被覆保護した金属めっき膜表面に形成するので、金属めっき膜がバリア層の役目を果たし、イオン化傾向の制約を受けることなく、通常のめっき金属から選択できるという作用を有する。   A multilayer wiring board according to a fourth aspect of the present invention is the multilayer wiring board according to the first to third aspects, further comprising laminating at least one kind of different metal plating film on the surface of the metal plating film. is there. With this configuration, the dissimilar metal plating film is formed on the surface of the metal plating film that covers and protects the surface of the solder conductor and the copper wiring layer, so that the metal plating film serves as a barrier layer and is restricted by ionization tendency. And has the effect of being able to select from ordinary plated metals.

本発明の請求項5に記載の多層配線板は、請求項1から4記載の多層配線板において、少なくとも半田導電体が充填された範囲を含んだ領域のみに前記金属めっき膜を部分めっきすることを備えたものである。この構成により、層間接続部を含んだ領域のみに金属めっき膜を被覆しているため、他の銅配線層表面に金属めっきが形成されないという作用を有する。   A multilayer wiring board according to a fifth aspect of the present invention is the multilayer wiring board according to the first to fourth aspects, wherein the metal plating film is partially plated only in a region including at least a range filled with a solder conductor. It is equipped with. With this configuration, since the metal plating film is covered only in the region including the interlayer connection portion, the metal plating is not formed on the surface of the other copper wiring layer.

本発明の請求項6に記載の多層配線板の製造方法は、絶縁層の両面に銅配線層が形成された両面配線板の所定の層間接続位置に前記銅配線層と前記絶縁層とを貫通する貫通孔を形成した後、略球状の一個の半田ボールを圧入充填することで半田導電体を形成し、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とを電解ニッケルめっきによってニッケルめっき膜を電析することで前記銅配線層間の導通をとることを備えたものである。この構成により、銅配線層形成後に薄く銅めっき膜を形成することから、銅配線層への影響が少ないという作用と、半田導電体の充填と金属めっきという層間接続のプロセスが非常に簡素化できるという作用を有する。   According to a sixth aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board, wherein the copper wiring layer and the insulating layer are penetrated at a predetermined interlayer connection position of a double-sided wiring board in which a copper wiring layer is formed on both surfaces of the insulating layer. After forming the through-hole, a solder conductor is formed by press-fitting a substantially spherical solder ball, and a part of the solder conductor is in contact with the copper wiring layer and exposed on the outermost surface. Conduction between the copper wiring layers is provided by electrodepositing a nickel plating film on the exposed solder surface and the copper wiring layer surface by electrolytic nickel plating. With this configuration, a thin copper plating film is formed after the copper wiring layer is formed, so that the effect on the copper wiring layer is small, and the process of interlayer connection such as filling of the solder conductor and metal plating can be greatly simplified. It has the action.

本発明の請求項7に記載の多層配線板の製造方法は、請求項6記載の多層配線板の製造方法であって、絶縁層の片面に銅配線層が形成された2枚の片面配線板を前記銅配線層が最外層になる向きに接着層を介して貼り合わせ前記両面配線板を形成することを備えたものである。この構成により、両面配線板より片面配線板の方が銅配線層の微細化が可能であり、この片面配線板を貼り合わせて両面配線板を得るため、銅配線層がさらに微細である多層配線板が得られるという作用を有する。   A method for manufacturing a multilayer wiring board according to claim 7 of the present invention is the method for manufacturing a multilayer wiring board according to claim 6, wherein two single-sided wiring boards having a copper wiring layer formed on one side of an insulating layer are provided. The double-sided wiring board is formed by bonding the copper wiring layer through an adhesive layer in the direction in which the copper wiring layer becomes the outermost layer. With this configuration, a single-sided wiring board can be made finer than a double-sided wiring board, and a double-sided wiring board is obtained by laminating this single-sided wiring board. It has the effect | action that a board is obtained.

本発明の請求項8に記載の多層配線板の製造方法は、絶縁層の片面に銅配線層が形成された片面配線板の所定の層間接続位置に前記銅配線層と前記絶縁層とを貫通する貫通孔を形成し、前記片面配線板の前記銅配線層が最外層になる向きに他の片面配線板の銅配線層表面に接着層を介して積層しブラインドバイアホールを形成した後、前記ブラインドバイアホール内に略球状の一個の半田ボールを圧入充填することで半田導電体を形成し、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とを電解ニッケルめっきによってニッケルめっき膜を電析することで前記銅配線層間の導通をとることを備えたものである。この構成により、非貫通であり、底面に配線層をもつブラインドバイアホールに半田ボールを圧入して、表面の金属層を変形させ層間導通をとるため、上記貫通孔と比較して半田導電体と銅配線層との接合面積が増加し両者の密着強度が増加するという作用を有する。   The method for manufacturing a multilayer wiring board according to claim 8 of the present invention is such that the copper wiring layer and the insulating layer are penetrated at a predetermined interlayer connection position of the single-sided wiring board in which the copper wiring layer is formed on one side of the insulating layer. Forming a through-hole, and laminating via a bonding layer on the copper wiring layer surface of another single-sided wiring board in a direction in which the copper wiring layer of the single-sided wiring board becomes the outermost layer, A solder exposed surface is formed by press-fitting a substantially spherical solder ball into a blind via hole to form a solder conductor, and a part of the solder conductor is in contact with the copper wiring layer and exposed on the outermost surface. And the copper wiring layer surface are electroplated by electrolytic nickel plating to provide electrical conduction between the copper wiring layers. With this configuration, a solder ball is press-fitted into a blind via hole that is non-penetrating and has a wiring layer on the bottom surface to deform the metal layer on the surface and take interlayer conduction. The bonding area with the copper wiring layer increases and the adhesion strength between the two increases.

本発明の請求項9に記載の多層配線板の製造方法は、請求項6から8記載の多層配線板の製造方法であって、前記半田ボールが前記貫通孔径より小さな銅片をコア部に有し、表面を半田金属層で被覆されていることを備えたものである。この構成により、絶縁層との熱膨張率の整合性が良好な銅を半田導電体のコア部に含むため、半田導電体全体の熱膨張率の最適化が図れ、熱膨張差にて生じる熱応力を緩和することができるという作用を有する。   A method for producing a multilayer wiring board according to claim 9 of the present invention is the method for producing a multilayer wiring board according to claims 6 to 8, wherein the solder ball has a copper piece smaller than the diameter of the through hole in the core portion. And the surface is covered with a solder metal layer. With this configuration, copper having good thermal expansion coefficient matching with the insulating layer is included in the core portion of the solder conductor, so that the thermal expansion coefficient of the entire solder conductor can be optimized and heat generated by the difference in thermal expansion can be achieved. It has the effect that stress can be relaxed.

以下本発明の一実施の形態について図1から図4を用いて説明する。なお、これらの図面において同一の部材には同一の符号を付しており、重複した説明は省略させている。また、実施の形態において示されている数値は種々選択し得る中の一例であり、これに限定されるものではない。   Hereinafter, an embodiment of the present invention will be described with reference to FIGS. In these drawings, the same members are denoted by the same reference numerals, and redundant description is omitted. The numerical values shown in the embodiments are examples that can be selected in various ways, and are not limited thereto.

(実施の形態)
以下に本発明の一実施の形態の多層配線板について説明する。まず、本発明の多層配線板について図1で説明する。図1は本発明の一実施の形態における多層配線板の要部断面図である。なお、本発明の一実施の形態においては、電気絶縁性フィルムを用いた多層配線板について主に説明を行っているが、ガラエポ基材の多層配線板についても基本的に同一であるためここでは詳しい説明を省略する。
(Embodiment)
A multilayer wiring board according to an embodiment of the present invention will be described below. First, the multilayer wiring board of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view of a main part of a multilayer wiring board according to an embodiment of the present invention. In the embodiment of the present invention, a multilayer wiring board using an electrically insulating film is mainly described. However, since the multilayer wiring board of a glass-epoxy base material is basically the same, the multilayer wiring board is basically the same here. Detailed description is omitted.

図1において、1はポリイミドフィルムからなる絶縁層2の両面に銅配線上層3及び銅配線下層4を形成した多層配線板であり、貫通孔5内部に充填された半田導電体6にて各銅配線層の層間接続を行っている。ここで半田導電体6は、半田ボール7を絶縁層2の厚み方向に加圧変形させて充填させたものである。さらに、充填させた半田導電体6の表面と各銅配線層の表面をめっき膜8にて被覆させている。   In FIG. 1, reference numeral 1 denotes a multilayer wiring board in which a copper wiring upper layer 3 and a copper wiring lower layer 4 are formed on both sides of an insulating layer 2 made of a polyimide film, and each copper conductor is filled with a solder conductor 6 filled in a through hole 5. Interlayer connection of wiring layers is performed. Here, the solder conductor 6 is formed by pressurizing and deforming solder balls 7 in the thickness direction of the insulating layer 2. Further, the surface of the filled solder conductor 6 and the surface of each copper wiring layer are covered with a plating film 8.

図1に示すように、多層配線板1の層間接続を行う半田導電体6は、半田ボール7を圧入変形させることによって、半田ボール7が貫通孔5内に隙間なく密着した状態で形成でき、銅配線上層3及び銅配線下層4と接合される。さらに、半田導電体6の表面と各銅配線層の表面は、めっき膜8にて被覆一体化され、このめっき膜8が加熱時に膨張する半田導電体6を規制し、熱応力が抑制できる構造となっている。   As shown in FIG. 1, the solder conductor 6 that performs interlayer connection of the multilayer wiring board 1 can be formed in a state in which the solder ball 7 is in close contact with the through hole 5 by press-fitting and deforming the solder ball 7. It is joined to the copper wiring upper layer 3 and the copper wiring lower layer 4. Further, the surface of the solder conductor 6 and the surface of each copper wiring layer are covered and integrated with a plating film 8, and the plating film 8 regulates the solder conductor 6 that expands when heated, thereby suppressing thermal stress. It has become.

ここで、このめっき膜8は、半田よりもイオン化傾向の大なる金属からなっている。この半田よりイオン化傾向の大なる金属を用いる理由であるが、本発明は半田と銅というイオン化傾向の異なる金属表面への電析であるため、通常の酸性めっき液中に浸漬すると直ぐに半田と銅との間で局部電池を構成し、イオン化傾向のより大きな半田が溶解、半田の腐食が進行していく。この半田腐食を抑制するため、イオン化傾向が半田よりもさらに大きな金属が溶解しているめっき液中にて電析を行うことにより、半田のイオン化による腐食を防ぎつつ表面にめっき膜を形成させることが可能となり、結果、半田導電体よりもイオン化傾向の大なるめっき膜でのみ被覆が可能となっている。ここでの半田とは錫もしくは錫を主成分とする錫合金であり、即ち錫よりイオン化傾向の大きな金属めっき膜でのみ被覆が可能となる。   Here, the plating film 8 is made of a metal having a higher ionization tendency than solder. This is the reason for using a metal having a higher ionization tendency than solder, but since the present invention is electrodeposition on the metal surface with different ionization tendency of solder and copper, the solder and copper are immediately immersed in an ordinary acidic plating solution. A local battery is formed between the solder and the solder having a larger ionization tendency, and the corrosion of the solder proceeds. In order to suppress this solder corrosion, a plating film is formed on the surface while preventing corrosion due to ionization of the solder by performing electrodeposition in a plating solution in which a metal whose ionization tendency is larger than that of the solder is dissolved. As a result, it is possible to cover only with a plating film having a higher ionization tendency than the solder conductor. The solder here is tin or a tin alloy containing tin as a main component, that is, it can be coated only with a metal plating film having a higher ionization tendency than tin.

これにより、層間接続に半田を用いる最大の課題であった、半田だけで構成されている導電体を加熱すると貫通孔内の半田が絶縁層以上に膨張し、絶縁層表面の銅配線層と半田との接合界面が剥離し、熱による接続信頼性が確保できないという課題が解決できる。したがって本構造により、高い接続信頼性が得られる。   As a result, when a conductor composed only of solder was heated, which was the biggest problem of using solder for interlayer connection, the solder in the through hole expanded beyond the insulating layer, and the copper wiring layer on the surface of the insulating layer and the solder This solves the problem that the bonding interface with the surface is peeled off and the connection reliability by heat cannot be ensured. Therefore, high reliability of connection can be obtained by this structure.

なお、半田導電体6としては、貫通孔5より小さな銅片をコア部に有し、表面を半田金属層で被覆された銅コア半田ボールを充填してもよい。これは、絶縁層2との熱膨張率の整合性が良好な銅を半田導電体6のコア部に含むため、半田導電体6全体の熱膨張率の最適化が図れ、熱膨張差にて生じる熱応力を緩和することができ、さらに高い接続信頼性が得られる。適宜好適に応じどちらを使用してもよい。また、半田導電体6の半田組成は、共晶はんだ、高温半田、鉛フリー半田等、適宜好適に応じどれを使用してもよい。   The solder conductor 6 may be filled with a copper core solder ball having a copper piece smaller than the through-hole 5 in the core portion and having the surface covered with a solder metal layer. This is because copper having good thermal expansion coefficient matching with the insulating layer 2 is included in the core portion of the solder conductor 6, so that the thermal expansion coefficient of the entire solder conductor 6 can be optimized and The generated thermal stress can be relaxed, and higher connection reliability can be obtained. Either may be used as appropriate. Further, the solder composition of the solder conductor 6 may be any suitable one such as eutectic solder, high temperature solder, lead-free solder and the like.

また、絶縁層2としては、電気絶縁性フィルムであるポリイミドフィルム、PET(ポリエチレンテレフタレート)フィルム、PEN(ポリエチレンナフタレート)フィルム、ポリエステルフィルム、ポリアミドイミドフィルム、PEI(ポリエーテルイミド)フィルム、PEEK(ポリエーテルエーテルケトン)フィルム、PES(ポリエーテルサルフォン)フィルム、PPS(ポリフェニレンサルファイド)フィルム、アラミドフィルム、LCPフィルム、PTFE(ポリテトラフルオロエチレン)フィルム等が使用でき、適宜好適に応じ、どれを使用してもよい。なかでも耐熱性、寸法安定性、機械特性に優れるポリイミドフィルムを用いることが最も好ましい。さらに、絶縁層2としてガラエポ基材を用いる場合は、熱硬化性樹脂としてフェノール樹脂、メラミン樹脂、ポリエステル樹脂、ジアチルフタレート樹脂、エポキシ樹脂およびこれらの変性樹脂を含む樹脂材料が使用でき、また、この熱硬化樹脂内に紙、布、ガラス布、不織布(合成、天然、無機、有機のどの材質の繊維を用いてもよい)を用いることができ、適宜好適に応じどれを使用してもよい。   Insulating layer 2 includes an electrically insulating film such as polyimide film, PET (polyethylene terephthalate) film, PEN (polyethylene naphthalate) film, polyester film, polyamideimide film, PEI (polyetherimide) film, PEEK (polyethylene). Ether ether ketone) film, PES (polyethersulfone) film, PPS (polyphenylene sulfide) film, aramid film, LCP film, PTFE (polytetrafluoroethylene) film, etc. can be used. May be. Among these, it is most preferable to use a polyimide film excellent in heat resistance, dimensional stability, and mechanical properties. Furthermore, when a glass epoxy substrate is used as the insulating layer 2, a resin material including a phenol resin, a melamine resin, a polyester resin, a diethyl phthalate resin, an epoxy resin, and a modified resin thereof can be used as the thermosetting resin. Paper, cloth, glass cloth, and non-woven fabric (synthetic, natural, inorganic, and organic fibers may be used) can be used in the thermosetting resin, and any of these may be used as appropriate. .

また、半田よりもイオン化傾向の大きいめっき膜8としては、ニッケル、ニッケル合金、亜鉛、亜鉛系合金が挙げられるが、ニッケルもしくはニッケル合金のうち少なくとも一つを用いることが最も好ましい。これは、金属材料の中でも比較的硬いニッケルもしくはニッケル合金をめっき膜8として用いるため、金属めっき膜が熱膨張した半田導電体6の応力を確実に抑制でき、より高い接続信頼性が得られる。   Further, examples of the plating film 8 having a higher ionization tendency than solder include nickel, nickel alloy, zinc, and zinc-based alloy, but it is most preferable to use at least one of nickel or nickel alloy. This is because a relatively hard nickel or nickel alloy among the metal materials is used as the plating film 8, so that the stress of the solder conductor 6 in which the metal plating film is thermally expanded can be reliably suppressed, and higher connection reliability can be obtained.

さらに、このめっき膜8の表面に異種金属めっき膜を形成してもよい。この異種金属めっき膜は、半田導電体6の表面と各銅配線層の表面を被覆保護しためっき膜8の表面に形成するので、めっき膜8がバリア層の役目を果たし、イオン化傾向の制約を受けることなく、通常のめっき金属から選択できる。したがって、製品に応じ表面のめっき被覆が選択でき、製品の設計自由度を上げることができる。ここで、異種金属めっき膜としては、金、銀、パラジウム、スズ、銅およびこれらの合金等が挙げられ、適宜好適に応じどれを使用してもよい。   Further, a dissimilar metal plating film may be formed on the surface of the plating film 8. Since this dissimilar metal plating film is formed on the surface of the plating film 8 that covers and protects the surface of the solder conductor 6 and the surface of each copper wiring layer, the plating film 8 serves as a barrier layer and restricts the ionization tendency. Without receiving, it can be selected from ordinary plating metal. Therefore, the plating coating on the surface can be selected according to the product, and the design flexibility of the product can be increased. Here, examples of the dissimilar metal plating film include gold, silver, palladium, tin, copper, and alloys thereof, and any of them may be used as appropriate.

また、層間接続部を含んだ領域のみにめっき膜8を部分めっきしてもよい。この範囲を限定しためっき膜8の被覆は、他の銅配線層の表面にめっき膜8が形成されないので、プロセス上銅配線層に何ら影響を与えず、銅配線層の微細化に好適な構造となる。したがって、さらに銅配線層の微細化に優れた、高い接続信頼性をもつ多層配線板が得られる。   Alternatively, the plating film 8 may be partially plated only in a region including the interlayer connection portion. The coating of the plating film 8 that limits this range has no effect on the copper wiring layer in the process because the plating film 8 is not formed on the surface of the other copper wiring layer, and is a structure suitable for miniaturization of the copper wiring layer. It becomes. Therefore, it is possible to obtain a multilayer wiring board having high connection reliability and excellent in miniaturization of the copper wiring layer.

次に、この様な高い接続信頼性をもつ多層配線板の製造方法について銅コア半田ボールを用いて、図2から図4でさらに詳しく説明する。なお、図1と同じ符号のものは図2から図4においても基本的に同一であるためここでは説明を省略する。   Next, a method of manufacturing such a multilayer wiring board having high connection reliability will be described in more detail with reference to FIGS. 2 to 4 using copper core solder balls. The same reference numerals as those in FIG. 1 are basically the same in FIG. 2 to FIG.

最初に、本発明の一実施の形態における多層配線板の製造方法について図2を用いて説明する。図2(a)は本発明の一実施の形態における原材料である両面銅張積層板の要部断面図、図2(b)は本発明の一実施の形態における銅配線層が形成された両面配線板の要部断面図、図2(c)は本発明の一実施の形態における貫通孔が形成された両面配線板の要部断面図、図2(d)は本発明の一実施の形態における銅コア半田ボールが圧入前の両面配線板の要部断面図、図2(e)は本発明の一実施の形態における銅コア半田ボールが圧入変形後の両面配線板の要部断面図、図2(f)は本発明の一実施の形態におけるめっき膜が形成中の両面配線板の要部断面図、図2(g)は本発明の一実施の形態における層間接続後の多層配線板の要部断面図である。   Initially, the manufacturing method of the multilayer wiring board in one embodiment of this invention is demonstrated using FIG. 2A is a cross-sectional view of the main part of a double-sided copper-clad laminate that is a raw material in one embodiment of the present invention, and FIG. 2B is a double-sided surface on which a copper wiring layer is formed in one embodiment of the present invention. Fig. 2 (c) is a cross-sectional view of the main part of the wiring board, Fig. 2 (c) is a cross-sectional view of the main part of the double-sided wiring board in which the through hole is formed in the embodiment of the present invention, and Fig. FIG. 2E is a cross-sectional view of the main part of the double-sided wiring board after the copper core solder ball is press-fitted and deformed in one embodiment of the present invention. FIG. 2 (f) is a cross-sectional view of the main part of the double-sided wiring board on which a plating film is formed in one embodiment of the present invention, and FIG. 2 (g) is a multilayer wiring board after interlayer connection in one embodiment of the present invention. FIG.

図2において、9は絶縁層2の両面に銅箔10が直接形成された両面銅張積層板であり、11は両面銅張積層板9をエッチング処理し銅配線層を形成した両面配線板である。また、12は貫通孔加工用のパンチング金型である。13は銅片14をコア部に有す銅コア半田ボールである。15および16は銅コア半田ボール13を圧入変形させるための加圧上プレートと加圧下プレートである。17はめっき膜8を形成するためのめっき浴、18はめっき用の対向電極である。   In FIG. 2, 9 is a double-sided copper-clad laminate in which copper foils 10 are directly formed on both sides of the insulating layer 2, and 11 is a double-sided wiring board in which the double-sided copper-clad laminate 9 is etched to form a copper wiring layer. is there. Reference numeral 12 denotes a punching die for processing through holes. Reference numeral 13 denotes a copper core solder ball having a copper piece 14 in the core portion. Reference numerals 15 and 16 denote an upper pressure plate and a lower pressure plate for press-fitting and deforming the copper core solder ball 13. Reference numeral 17 denotes a plating bath for forming the plating film 8, and 18 denotes a counter electrode for plating.

まず、図2(a)に示すように、絶縁層2の両面に銅箔10が直接形成された両面銅張積層板9を準備する。なお、本発明の一実施の形態においては、絶縁層2と銅箔10の間に接着層が無い二層タイプを挙げているが、接着層のある三層タイプを用いることも可能であり、適宜好適に応じどちらを使用しても良く、これに限定されるものではない。   First, as shown in FIG. 2A, a double-sided copper-clad laminate 9 in which copper foils 10 are directly formed on both sides of an insulating layer 2 is prepared. In addition, in one embodiment of the present invention, a two-layer type without an adhesive layer between the insulating layer 2 and the copper foil 10 is cited, but a three-layer type with an adhesive layer can also be used, Any one of them may be used as appropriate and is not limited thereto.

次に、図2(b)に示すように、マスク材を銅箔10の表面に形成し、塩化鉄、塩化銅等の銅のエッチング液を用いてエッチング処理を行い、銅配線上層3及び銅配線下層4が形成された両面配線板11が得られる。   Next, as shown in FIG. 2 (b), a mask material is formed on the surface of the copper foil 10, and an etching process is performed using an etching solution of copper such as iron chloride or copper chloride. A double-sided wiring board 11 on which the wiring lower layer 4 is formed is obtained.

さらに、図2(c)に示すように、パンチング金型12を用いたパンチング加工により、貫通孔5を形成する。なお、本発明の一実施の形態においては、パンチング加工を挙げているが、絶縁層2の種類および貫通孔のサイズや精度に応じてドリル加工、レーザー加工、エッチング加工を用いることも可能であり、適宜好適に応じどれを使用しても良く、これに限定されるものではない。   Further, as shown in FIG. 2C, the through hole 5 is formed by punching using a punching die 12. In the embodiment of the present invention, punching is used, but drilling, laser processing, and etching can be used depending on the type of insulating layer 2 and the size and accuracy of the through hole. Any one may be used as appropriate, and the present invention is not limited to this.

さらに、図2(d)に示すように、貫通孔5の位置に銅片14をコア部に有する銅コア半田ボール13を配置した後、銅コア半田ボール13は加圧上プレート15と加圧下プレート16にて、貫通孔5への圧入変形が開始される。銅コア半田ボール13の配置方法としては、BGAと呼ばれる半導体パッケージに半田ボールを搭載する従来から知られている方法を転用することもできる。具体的には、貫通孔5と対応する位置に銅コア半田ボール13より小径の吸引孔を設けた吸着プレートを準備し、吸引孔内の圧力調整用に真空ポンプと接続しておく。この吸着プレートを用い銅コア半田ボール13を吸引孔に吸着し、貫通孔5上部に位置合せし、銅コア半田ボール13を落下させ、銅コア半田ボール13を貫通孔位置に配置する。以上の様な操作を行うボールマウンターと呼ばれる設備を使用することも可能である。ここでは真空吸着による銅コア半田ボール13の搭載例を示したが、他に静電吸着などの方法を用いてもよい。   Further, as shown in FIG. 2D, after the copper core solder ball 13 having the copper piece 14 at the core portion is arranged at the position of the through hole 5, the copper core solder ball 13 is pressed against the pressure upper plate 15 and the pressure lower plate. In the plate 16, press-fitting deformation into the through hole 5 is started. As a method for arranging the copper core solder balls 13, a conventionally known method of mounting solder balls on a semiconductor package called BGA can be used. Specifically, a suction plate having a suction hole smaller in diameter than the copper core solder ball 13 at a position corresponding to the through hole 5 is prepared and connected to a vacuum pump for adjusting the pressure in the suction hole. Using this suction plate, the copper core solder ball 13 is sucked into the suction hole, aligned with the upper portion of the through hole 5, the copper core solder ball 13 is dropped, and the copper core solder ball 13 is placed at the through hole position. It is also possible to use equipment called a ball mounter that performs the above operations. Here, an example of mounting the copper core solder ball 13 by vacuum suction is shown, but other methods such as electrostatic suction may be used.

次に図2(e)に示すように、加圧上プレート15と加圧下プレート16によって貫通孔5内に銅コア半田ボール13が圧入変形され、貫通孔5内に充填された半田導電体6が形成される。ここで、銅コア半田ボール13は、半田合金からなる軟質金属にて構成されているため、圧入と伴に順次変形し貫通孔5内壁に沿って変形し、貫通孔5内が隙間ない状態で半田導電体6によって完全に充填できる。この半田導電体6によって銅配線上層3と銅配線下層4とが導通される。   Next, as shown in FIG. 2 (e), the copper conductor solder ball 13 is press-fitted and deformed into the through hole 5 by the pressurizing upper plate 15 and the pressurizing lower plate 16, and the solder conductor 6 filled in the through hole 5. Is formed. Here, since the copper core solder balls 13 are made of a soft metal made of a solder alloy, the copper core solder balls 13 are sequentially deformed along with the press-fitting and deformed along the inner wall of the through-hole 5 so that there is no gap in the through-hole 5. The solder conductor 6 can be completely filled. By this solder conductor 6, the copper wiring upper layer 3 and the copper wiring lower layer 4 are electrically connected.

さらに、図2(f)に示すように、半田導電体6が充填された両面配線板11をめっき浴17中に浸漬し、対向電極18を用いて通電を行い、イオン化傾向が大きい金属からなるめっき膜8を半田導電体6の一部が最外表面に露出している半田露出の表面と各銅配線層の表面とに形成して、図2(g)に示すように、貫通孔5に充填された半田導電体6にて銅配線層間が導通され、銅片14をコア部に有する半田導電体6の表面と各銅配線層の表面とをめっき膜8にて被覆一体化した、高接続信頼性をもつ多層配線板1が得られる。   Further, as shown in FIG. 2 (f), the double-sided wiring board 11 filled with the solder conductor 6 is immersed in a plating bath 17, energized using the counter electrode 18, and made of a metal having a high ionization tendency. A plated film 8 is formed on the surface of the exposed solder where a part of the solder conductor 6 is exposed on the outermost surface and the surface of each copper wiring layer, and as shown in FIG. Between the copper wiring layers is made conductive by the solder conductor 6 filled in, and the surface of the solder conductor 6 having the copper piece 14 in the core portion and the surface of each copper wiring layer are integrally covered with the plating film 8. A multilayer wiring board 1 having high connection reliability is obtained.

ここで、このめっき膜8は、従来のめっきスルーホール法の様な電気配線としての役割でなく、熱膨張した半田導電体6の規制を主な目的としているため、めっきスルーホール法に比べめっき膜の膜厚を薄くすることができる。したがって、製造方法においては、銅配線層形成後に層間接続用として薄くめっき膜を形成することから、銅配線層への影響は少なく、銅配線層の微細化に適している。さらに、めっき膜8を形成する前に層間接続部の近傍を露出させたマスキングを行い、他の銅配線層の表面にめっき膜8を形成させない部分めっき法を用いることができる。この方法によれば、他の銅配線層の表面にめっき膜8が形成されないので、さらに銅配線層の微細化に適した製法となる。   Here, the plating film 8 is not used as an electric wiring as in the conventional plating through-hole method, but mainly for the regulation of the thermally expanded solder conductor 6, so that the plating film 8 is plated compared to the plating through-hole method. The film thickness can be reduced. Therefore, in the manufacturing method, since a thin plating film is formed for interlayer connection after the copper wiring layer is formed, there is little influence on the copper wiring layer and it is suitable for miniaturization of the copper wiring layer. Furthermore, before the plating film 8 is formed, masking that exposes the vicinity of the interlayer connection portion is performed, and a partial plating method in which the plating film 8 is not formed on the surface of another copper wiring layer can be used. According to this method, since the plating film 8 is not formed on the surface of another copper wiring layer, the manufacturing method is suitable for further miniaturization of the copper wiring layer.

なお、本製法の生産形態は、フープ状もしくはシート状の原材料へ製品を複数個配置し、各工程の処理を行い、最終工程にて製品外形を切り出すことができる。なかでもフープ処理は生産性良好な生産形態であり最も望ましい。   In the production method of this production method, a plurality of products are arranged on a hoop-shaped or sheet-shaped raw material, each process is performed, and the product outer shape can be cut out in the final process. Among these, the hoop treatment is the most desirable because it is a production form with good productivity.

以上の様にして得られた本発明の一実施の形態における多層配線板の製造方法は、以下の特徴をもつ。まず、層間接続の半田導電体の表面と銅配線層がめっき膜にて被覆され一体構造を有しているため、熱膨張差にて生じる応力を抑制でき高い接続信頼性が得られる。さらに、銅配線層形成後に層間接続用の薄いめっき膜を形成するため、銅配線層に与える影響も少なく、銅配線層の微細化に適している。最後に、半田ボールの充填と金属めっきという非常にシンプルなプロセスで層間接続が行え、他の層間接続方法と比較し工程数が少なく、生産性は格段に向上する。したがって、本発明により、接続信頼性の高い、銅配線層の微細化に最適な、生産性に優れる層間接続を有する多層配線板が得られる。   The method for manufacturing a multilayer wiring board in one embodiment of the present invention obtained as described above has the following characteristics. First, since the surface of the solder conductor for interlayer connection and the copper wiring layer are covered with a plating film and have an integral structure, the stress caused by the difference in thermal expansion can be suppressed and high connection reliability can be obtained. Furthermore, since a thin plating film for interlayer connection is formed after the copper wiring layer is formed, there is little influence on the copper wiring layer, which is suitable for miniaturization of the copper wiring layer. Finally, interlayer connection can be performed by a very simple process of solder ball filling and metal plating, and the number of processes is small compared to other interlayer connection methods, and the productivity is greatly improved. Therefore, according to the present invention, it is possible to obtain a multilayer wiring board having high connection reliability, optimal for miniaturization of a copper wiring layer, and having interlayer connection excellent in productivity.

次に、さらに接続信頼性及び銅配線層の微細化に優れる本発明の一実施の形態における多層配線板の製造方法について図3を用いて説明する。図3(a)は本発明の一実施の形態における原材料である接着層付き片面銅張積層板の要部断面図、図3(b)は本発明の一実施の形態における銅配線層が形成された接着層付き片面配線板の要部断面図、図3(c)は本発明の一実施の形態における貫通孔が形成された接着層付き片面配線板の要部断面図、図3(d)は本発明の一実施の形態におけるブラインドバイアホールが形成された多層配線板の要部断面図、図3(e)は本発明の一実施の形態における銅コア半田ボールが圧入変形後の両面配線板の要部断面図、図3(f)は本発明の一実施の形態におけるめっき膜を形成した層間接続後の多層配線板の要部断面図である。   Next, a method for manufacturing a multilayer wiring board according to an embodiment of the present invention, which is further excellent in connection reliability and miniaturization of a copper wiring layer, will be described with reference to FIG. FIG. 3A is a cross-sectional view of an essential part of a single-sided copper-clad laminate with an adhesive layer, which is a raw material in one embodiment of the present invention, and FIG. 3B is formed by a copper wiring layer in one embodiment of the present invention. FIG. 3C is a cross-sectional view of the main part of the single-sided wiring board with an adhesive layer formed, FIG. 3C is a cross-sectional view of the main part of the single-sided wiring board with the adhesive layer in which the through hole is formed in one embodiment of the present invention ) Is a cross-sectional view of the main part of the multilayer wiring board in which the blind via hole in one embodiment of the present invention is formed, and FIG. 3 (e) is a diagram illustrating both surfaces of the copper core solder ball according to the embodiment of the present invention after the press-fitting deformation. Fig. 3 (f) is a cross-sectional view of the main part of the multilayer wiring board after the interlayer connection formed with the plating film according to the embodiment of the present invention.

図3において、19は絶縁層2の片面に銅箔10、他方の面に接着層20が形成された接着層付き片面銅張積層板である。また、21は接着層付き片面銅張積層板19をエッチング処理し銅配線上層3を形成した接着層付き片面配線板である。23は接着層付き片面配線板21と積層する他の片面配線板である。24は接着層付き片面配線板21及び23を積層し、層間接続用にブラインドバイアホール22を形成した多層配線板である。25はブラインドバイアホール22に充填された半田導電体6を有し、この半田導電体6の表面と銅配線上層3の表面とをめっき膜8にて被覆一体化した多層配線板である。   In FIG. 3, reference numeral 19 denotes a single-sided copper-clad laminate with an adhesive layer in which a copper foil 10 is formed on one side of the insulating layer 2 and an adhesive layer 20 is formed on the other side. Reference numeral 21 denotes a single-sided wiring board with an adhesive layer obtained by etching the single-sided copper-clad laminate 19 with an adhesive layer to form a copper wiring upper layer 3. Reference numeral 23 denotes another single-sided wiring board laminated with the single-sided wiring board 21 with an adhesive layer. Reference numeral 24 denotes a multilayer wiring board in which the single-sided wiring boards 21 and 23 with an adhesive layer are laminated and a blind via hole 22 is formed for interlayer connection. Reference numeral 25 denotes a multilayer wiring board having the solder conductor 6 filled in the blind via hole 22 and integrally covering the surface of the solder conductor 6 and the surface of the copper wiring upper layer 3 with a plating film 8.

まず、図3(a)に示すように、絶縁層2の片面に銅箔10が直接形成され、他方の面に接着層20が形成された接着層付き片面銅張積層板19を準備し、図3(b)に示すように、エッチング処理にて銅配線上層3を形成し、接着層付き片面配線板21を得る。ここで得られた接着層付き片面配線板21の銅配線上層3は、上記両面配線板の銅配線層と比較し、微細化に適した片面エッチングが可能であることから更なる微細化が可能となっている。   First, as shown in FIG. 3A, a single-sided copper-clad laminate 19 with an adhesive layer in which the copper foil 10 is directly formed on one side of the insulating layer 2 and the adhesive layer 20 is formed on the other side is prepared. As shown in FIG.3 (b), the copper wiring upper layer 3 is formed by an etching process, and the single-sided wiring board 21 with an adhesive layer is obtained. The copper wiring upper layer 3 of the single-sided wiring board 21 with an adhesive layer obtained here can be further miniaturized because it can be etched on one side suitable for miniaturization compared to the copper wiring layer of the double-sided wiring board. It has become.

その理由を以下に述べる。通常、両面配線板の銅配線層形成においては、両面銅張積層板の両面にある銅箔を同時にエッチング処理するため、エッチング液を両面銅張積層板の上下方向からムラなく均一にあてる必要がある。しかしながら、両面銅張積層板の上下方向からエッチング液を加圧噴霧した場合、上面に噴霧された後のエッチング液が上面に液だまりつくりエッチング均一性が保てないという問題がある。したがって、両面配線板においてはエッチング条件が不安定となり、非常に微細な銅配線層を形成することが難しい。一方、片面配線板の銅配線層形成においては、下側からの噴霧でよいため、エッチング液の液だまりができないため、エッチング条件の最適範囲が広くとれ、銅配線層の微細化に適している。   The reason is described below. Normally, when forming a copper wiring layer on a double-sided wiring board, the copper foil on both sides of the double-sided copper-clad laminate is etched simultaneously, so it is necessary to apply the etching solution uniformly from the top and bottom of the double-sided copper-clad laminate. is there. However, when the etching solution is sprayed under pressure from above and below the double-sided copper clad laminate, there is a problem that the etching solution after spraying on the upper surface accumulates on the upper surface and the etching uniformity cannot be maintained. Therefore, in the double-sided wiring board, the etching conditions become unstable, and it is difficult to form a very fine copper wiring layer. On the other hand, in forming a copper wiring layer of a single-sided wiring board, spraying from the lower side is sufficient, so that the etching liquid cannot be pooled. Therefore, the optimum range of etching conditions can be widened and suitable for miniaturization of the copper wiring layer. .

次に、図3(c)に示すように、パンチング金型12を用いたパンチング加工を接着層付き片面配線板21に施し、貫通孔5を形成し、図3(d)に示すように、接着層付き片面配線板21と銅配線下層4の形成された他の片面配線板23とを接着層20を介して接着させ、層間接続用のブラインドバイアホール22が形成された多層配線板24を得る。ここで得られた多層配線板24は、銅配線層が微細である片面配線板を積層しているため、上記両面配線板の配線層と比較し、銅配線層がさらに微細となる。なお、本発明の一実施の形態における片面配線板の積層方法としては、多層配線板24を挙げているが、2枚の片面配線板を銅配線層が最外層になる向きに接着層を介して貼り合わせ両面配線板を形成しても、銅配線層の微細化が図れる。適宜好適に応じどちらの積層方法を使用しても良く、これに限定されるものではない。   Next, as shown in FIG. 3 (c), punching using a punching die 12 is performed on the single-sided wiring board 21 with an adhesive layer to form a through hole 5, and as shown in FIG. 3 (d), The single-sided wiring board 21 with the adhesive layer and the other single-sided wiring board 23 on which the copper wiring lower layer 4 is formed are bonded via the adhesive layer 20, and the multilayer wiring board 24 in which the blind via hole 22 for interlayer connection is formed. obtain. Since the multilayer wiring board 24 obtained here has a single-sided wiring board having a fine copper wiring layer, the copper wiring layer becomes finer than the wiring layer of the double-sided wiring board. In addition, although the multilayer wiring board 24 is mentioned as a lamination | stacking method of the single-sided wiring board in one embodiment of this invention, it puts two single-sided wiring boards through an adhesive layer in the direction where a copper wiring layer becomes an outermost layer. Even if the laminated double-sided wiring board is formed, the copper wiring layer can be miniaturized. Any of the lamination methods may be used as appropriate and is not limited thereto.

さらに、図3(e)に示すように、ブラインドバイアホール22に銅コア半田ボールを圧入変形し半田導電体6を形成する。ここで得られた半田導電体6は、底面に銅配線下層4をもつブラインドバイアホール22に充填されているため、貫通孔と比較して半田導電体6と銅配線下層4との接合面積が増加し、両者の密着強度も増加する。よって、様々な外部ストレスが加わっても、銅配線下層4と半田導電体6との接合界面が剥離することなく、さらに高い接続信頼性が得られる。   Further, as shown in FIG. 3E, a solder conductor 6 is formed by press-fitting and deforming a copper core solder ball into the blind via hole 22. Since the solder conductor 6 obtained here is filled in the blind via hole 22 having the copper wiring lower layer 4 on the bottom surface, the bonding area between the solder conductor 6 and the copper wiring lower layer 4 is smaller than that of the through hole. The adhesion strength between the two increases. Therefore, even when various external stresses are applied, the connection interface between the copper wiring lower layer 4 and the solder conductor 6 does not peel off, and higher connection reliability can be obtained.

最後に、図3(f)に示すように、めっき浴の電析にてイオン化傾向が大きい金属からなるめっき膜8を半田導電体6の一部が最外表面に露出している半田露出表面と銅配線上層3の表面とに形成し、ブラインドバイアホール22に充填された半田導電体6にて銅配線層間が導通され、銅片14をコア部に有する半田導電体6の表面と各銅配線層の表面とをめっき膜8にて被覆一体化した、多層配線板25が得られる。   Finally, as shown in FIG. 3 (f), a solder exposed surface in which a part of the solder conductor 6 is exposed on the outermost surface of the plating film 8 made of a metal having a large ionization tendency by electrodeposition of the plating bath. And the surface of the solder conductor 6 having the copper piece 14 in the core portion, and the copper conductor layer 6 are electrically connected to each other by the solder conductor 6 filled in the blind via hole 22. A multilayer wiring board 25 in which the surface of the wiring layer is integrally covered with the plating film 8 is obtained.

以上のようにして得られた本発明の一実施の形態における多層配線板の製造方法は、片面配線板を積層するため、両面配線板の銅配線層と比較し、銅配線層がより微細となる。さらに、銅コア半田ボールを圧入変形してブラインドバイアホール内に半田導電体を充填するため、貫通孔と比較し、より高い接続信頼性が得られる。したがって、本発明によっても、接続信頼性の高い、銅配線層の微細化に最適な、生産性に優れる層間接続を有する多層配線板が得られる。   The method for manufacturing a multilayer wiring board according to one embodiment of the present invention obtained as described above is for laminating a single-sided wiring board, so that the copper wiring layer is finer than a copper wiring layer of a double-sided wiring board. Become. Further, since the solder conductor is filled in the blind via hole by press-fitting and deforming the copper core solder ball, higher connection reliability can be obtained as compared with the through hole. Therefore, according to the present invention, it is possible to obtain a multilayer wiring board having high connection reliability, optimum for miniaturization of a copper wiring layer, and having interlayer connection excellent in productivity.

最後に、前述した多層配線板をさらに積層化する本発明の一実施の形態における多層配線板について図4を用いて説明する。図4(a)は本発明の一実施の形態における積層後の多層配線板の要部断面図、図4(b)は本発明の一実施の形態における積層後の他の多層配線板の要部断面図である。   Finally, a multilayer wiring board according to an embodiment of the present invention in which the above-described multilayer wiring board is further laminated will be described with reference to FIG. FIG. 4A is a cross-sectional view of the main part of the multilayer wiring board after lamination in one embodiment of the present invention, and FIG. 4B is the main part of another multilayer wiring board after lamination in one embodiment of the present invention. FIG.

図4において、26は多層配線板1と多層配線板25を接着層20を介して積層した多層配線板である。まず、図4(a)に示すように、前述した本発明の一実施の形態によって製造された多層配線板1と多層配線板25を接着層20を介してさらに積層し、銅配線層数を増加させた多層配線板26が得られる。ここで得られた多層配線板26は、構成材料である多層配線板1と多層配線板25が高接続信頼性で、微細な銅配線層をもつため、接続信頼性が高く、銅配線層の微細化に優れたものとなる。   In FIG. 4, reference numeral 26 denotes a multilayer wiring board in which the multilayer wiring board 1 and the multilayer wiring board 25 are laminated via the adhesive layer 20. First, as shown in FIG. 4A, the multilayer wiring board 1 and the multilayer wiring board 25 manufactured according to the above-described embodiment of the present invention are further laminated via the adhesive layer 20, and the number of copper wiring layers is determined. An increased multilayer wiring board 26 is obtained. The multilayer wiring board 26 obtained here has high connection reliability because the multilayer wiring board 1 and the multilayer wiring board 25 which are constituent materials have high connection reliability and a fine copper wiring layer. Excellent in miniaturization.

また、図4(b)に示すように、前述した多層配線板1と多層配線板25のめっき膜8が接触する様に積層し、多層配線板27を得ている。ここでめっき膜8は金属層であるため、各配線層の導通が可能となる。さらにめっき膜8の表面に半田めっき膜を積層した場合は、この半田めっき膜を互いに接触させ加熱冷却を行うと、半田めっき膜が溶融固化し、互いに簡単に接合され接続信頼性が向上する。   Also, as shown in FIG. 4B, the multilayer wiring board 27 is obtained by laminating the multilayer wiring board 1 and the plating film 8 of the multilayer wiring board 25 so as to be in contact with each other. Here, since the plating film 8 is a metal layer, each wiring layer can be electrically connected. Further, when a solder plating film is laminated on the surface of the plating film 8, when the solder plating films are brought into contact with each other and heated and cooled, the solder plating films are melted and solidified and easily joined together to improve connection reliability.

以上の様にして得られた本発明の一実施の形態における多層配線板は、高接続信頼性で、微細な銅配線層をもつ多層配線板同士をさらに積層し形成を行うため、接続信頼性が高く、銅配線層の微細化に優れる。したがって、本発明によっても、接続信頼性の高い、銅配線層の微細化に最適な、生産性に優れる層間接続を有する多層配線板が得られる。   The multilayer wiring board according to one embodiment of the present invention obtained as described above has high connection reliability and is formed by further laminating multilayer wiring boards having fine copper wiring layers. High and excellent in miniaturization of the copper wiring layer. Therefore, according to the present invention, it is possible to obtain a multilayer wiring board having high connection reliability, optimum for miniaturization of a copper wiring layer, and having interlayer connection excellent in productivity.

本発明により、接続信頼性の高い、銅配線層の微細化に最適な、生産性に優れる層間接続を有する多層配線板及びその製造方法が提供できる。   According to the present invention, it is possible to provide a multilayer wiring board having high connection reliability, optimal for miniaturization of a copper wiring layer, and having an interlayer connection excellent in productivity, and a manufacturing method thereof.

本発明の一実施の形態における多層配線板の要部断面図Sectional drawing of the principal part of the multilayer wiring board in one embodiment of this invention (a)本発明の一実施の形態における原材料である両面銅張積層板の要部断面図、(b)本発明の一実施の形態における銅配線層が形成された両面配線板の要部断面図、(c)本発明の一実施の形態における貫通孔が形成された両面配線板の要部断面図、(d)本発明の一実施の形態における銅コア半田ボールが圧入前の両面配線板の要部断面図、(e)本発明の一実施の形態における銅コア半田ボールが圧入変形後の両面配線板の要部断面図、(f)本発明の一実施の形態におけるめっき膜が形成中の両面配線板の要部断面図、(g)本発明の一実施の形態における層間接続後の多層配線板の要部断面図(A) The principal part sectional drawing of the double-sided copper clad laminated board which is a raw material in one embodiment of this invention, (b) The principal part cross section of the double-sided wiring board in which the copper wiring layer in one embodiment of this invention was formed FIG. 3C is a cross-sectional view of a main part of a double-sided wiring board in which a through hole is formed in one embodiment of the present invention. FIG. 3D is a double-sided wiring board before a copper core solder ball is press-fitted in one embodiment of the present invention. (E) Cross-sectional view of the main part of the double-sided wiring board after the copper core solder ball in one embodiment of the present invention is press-fitted and deformed, (f) Plating film in one embodiment of the present invention is formed Cross-sectional view of the principal part of the double-sided wiring board inside, (g) Cross-sectional view of the principal part of the multilayer wiring board after interlayer connection in one embodiment of the present invention (a)本発明の一実施の形態における原材料である接着層付き片面銅張積層板の要部断面図、(b)本発明の一実施の形態における銅配線層が形成された接着層付き片面配線板の要部断面図、(c)本発明の一実施の形態における貫通孔が形成された接着層付き片面配線板の要部断面図、(d)本発明の一実施の形態におけるブラインドバイアホールが形成された多層配線板の要部断面図、(e)本発明の一実施の形態における銅コア半田ボールが圧入変形後の両面配線板の要部断面図、(f)本発明の一実施の形態におけるめっき膜を形成した層間接続後の多層配線板の要部断面図(A) Main part sectional drawing of the single-sided copper clad laminated board with the adhesive layer which is a raw material in one embodiment of this invention, (b) One side with the adhesive layer in which the copper wiring layer in one embodiment of this invention was formed Cross-sectional view of the main part of the wiring board, (c) Cross-sectional view of the main part of the single-sided wiring board with an adhesive layer in which the through hole is formed in the embodiment of the present invention, (d) Blind via in the embodiment of the present invention Cross-sectional view of the main part of the multilayer wiring board in which holes are formed, (e) Cross-sectional view of the main part of the double-sided wiring board after the copper core solder ball is press-fitted and deformed in one embodiment of the present invention, (f) One of the present invention Cross-sectional view of main parts of multilayer wiring board after interlayer connection on which plating film is formed in the embodiment (a)本発明の一実施の形態における積層後の多層配線板の要部断面図、(b)本発明の一実施の形態における積層後の他の多層配線板の要部断面図(A) Main part sectional drawing of the multilayer wiring board after lamination in one embodiment of the present invention, (b) Main part sectional view of another multilayer wiring board after lamination in one embodiment of the present invention

符号の説明Explanation of symbols

1 多層配線板
2 絶縁層
3 銅配線上層
4 銅配線下層
5 貫通孔
6 半田導電体
7 半田ボール
8 めっき膜
9 両面銅張積層板
10 銅箔
11 両面配線板
12 パンチング金型
13 銅コア半田ボール
14 銅片
15 加圧上プレート
16 加圧下プレート
17 めっき浴
18 対向電極
19 接着層付き片面銅張積層板
20 接着層
21 接着層付き片面配線板
22 ブラインドバイアホール
23 他の片面配線板
24 多層配線板
25 多層配線板
26 多層配線板
27 多層配線板
DESCRIPTION OF SYMBOLS 1 Multilayer wiring board 2 Insulation layer 3 Copper wiring upper layer 4 Copper wiring lower layer 5 Through-hole 6 Solder conductor 7 Solder ball 8 Plating film 9 Double-sided copper clad laminated board 10 Copper foil 11 Double-sided wiring board 12 Punching die 13 Copper core solder ball DESCRIPTION OF SYMBOLS 14 Copper piece 15 Pressure upper plate 16 Pressure lower plate 17 Plating bath 18 Counter electrode 19 Single-sided copper clad laminated board with an adhesive layer 20 Adhesive layer 21 Single-sided wiring board with an adhesive layer 22 Blind via hole 23 Other single-sided wiring boards 24 Multilayer wiring Board 25 Multi-layer wiring board 26 Multi-layer wiring board 27 Multi-layer wiring board

Claims (9)

絶縁層と、前記絶縁層の両面に積層された銅配線層と、前記絶縁層と少なくとも片方の前記銅配線層とを貫通する貫通孔と、前記貫通孔に充填され前記銅配線層間を接続導通する半田導電体とからなる多層配線板であって、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とが金属めっき膜にて被覆一体化され接合しており、且つ前記金属めっき膜は、前記半田導電体よりもイオン化傾向が大なる金属からなることを特徴とする多層配線板。 An insulating layer, a copper wiring layer laminated on both surfaces of the insulating layer, a through hole penetrating the insulating layer and at least one of the copper wiring layers, and a conductive connection between the copper wiring layers filled in the through hole A multilayer wiring board comprising a solder conductor, wherein a solder exposed surface in which a part of the solder conductor is in contact with the copper wiring layer and exposed at an outermost surface, and the copper wiring layer surface is a metal plating film A multilayer wiring board, wherein the metal plating film is made of a metal having a higher ionization tendency than the solder conductor. 前記半田導電体は、前記貫通孔径より小さな銅片をコア部に有し、表面を半田金属層で被覆されていることを特徴とする請求項1記載の多層配線板。 2. The multilayer wiring board according to claim 1, wherein the solder conductor has a copper piece smaller than the diameter of the through hole in the core portion, and the surface is covered with a solder metal layer. 前記金属めっき膜がニッケルもしくはニッケル合金のうち少なくとも一つを含むことを特徴とする請求項1及び2記載の多層配線板。 The multilayer wiring board according to claim 1 or 2, wherein the metal plating film contains at least one of nickel or a nickel alloy. 前記金属めっき膜の表面に少なくとも一種類の異種金属めっき膜を積層することを特徴とする請求項1から3記載の多層配線板。 4. The multilayer wiring board according to claim 1, wherein at least one kind of different metal plating film is laminated on the surface of the metal plating film. 少なくとも半田導電体が充填された範囲を含んだ領域のみに前記金属めっき膜を部分めっきすることを特徴とする請求項1から4記載の多層配線板。 5. The multilayer wiring board according to claim 1, wherein the metal plating film is partially plated only in a region including at least a range filled with the solder conductor. 絶縁層の両面に銅配線層が形成された両面配線板の所定の層間接続位置に前記銅配線層と前記絶縁層とを貫通する貫通孔を形成した後、略球状の一個の半田ボールを圧入充填することで半田導電体を形成し、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とを電解ニッケルめっきによってニッケルめっき膜を電析することで前記銅配線層間の導通をとることを特徴とする多層配線板の製造方法。 After forming a through hole that penetrates the copper wiring layer and the insulating layer at a predetermined interlayer connection position of a double-sided wiring board in which a copper wiring layer is formed on both surfaces of the insulating layer, a substantially spherical solder ball is press-fitted A solder conductor is formed by filling, and nickel plating is performed by electrolytic nickel plating on the solder exposed surface in which a part of the solder conductor is in contact with the copper wiring layer and exposed on the outermost surface. A method for producing a multilayer wiring board, comprising conducting a film between the copper wiring layers by electrodepositing a film. 絶縁層の片面に銅配線層が形成された2枚の片面配線板を前記銅配線層が最外層になる向きに接着層を介して貼り合わせ前記両面配線板を形成することを特徴とする請求項6記載の多層配線板の製造方法。 The double-sided wiring board is formed by bonding two single-sided wiring boards each having a copper wiring layer formed on one side of an insulating layer with an adhesive layer in an orientation in which the copper wiring layer becomes an outermost layer. Item 7. A method for producing a multilayer wiring board according to Item 6. 絶縁層の片面に銅配線層が形成された片面配線板の所定の層間接続位置に前記銅配線層と前記絶縁層とを貫通する貫通孔を形成し、前記片面配線板の前記銅配線層が最外層になる向きに他の片面配線板の銅配線層表面に接着層を介して積層しブラインドバイアホールを形成した後、前記ブラインドバイアホール内に略球状の一個の半田ボールを圧入充填することで半田導電体を形成し、前記半田導電体の一部が前記銅配線層と接し最外表面に露出している半田露出表面と前記銅配線層表面とを電解ニッケルめっきによってニッケルめっき膜を電析することで前記銅配線層間の導通をとることを特徴とする多層配線板の製造方法。 A through-hole penetrating the copper wiring layer and the insulating layer is formed at a predetermined interlayer connection position of the single-sided wiring board having a copper wiring layer formed on one side of the insulating layer, and the copper wiring layer of the single-sided wiring board After forming a blind via hole by laminating via an adhesive layer on the surface of the copper wiring layer of another single-sided wiring board in the direction to become the outermost layer, a substantially spherical solder ball is press-fitted into the blind via hole. A solder conductor is formed on the surface of the copper wiring layer by electrolytic nickel plating between the exposed surface of the solder that is in contact with the copper wiring layer and exposed on the outermost surface. The method for producing a multilayer wiring board is characterized in that electrical conduction is obtained between the copper wiring layers by analyzing. 請求項6から7記載の多層配線板の製造方法であって、前記半田ボールが前記貫通孔径より小さな銅片をコア部に有し、表面を半田金属層で被覆されていること特徴とする多層配線板の製造方法。 8. The method of manufacturing a multilayer wiring board according to claim 6, wherein the solder ball has a copper piece smaller than the diameter of the through hole in the core portion, and the surface is covered with a solder metal layer. A method for manufacturing a wiring board.
JP2007319174A 2007-12-11 2007-12-11 Multilayer wiring board and its manufacturing method Pending JP2009141297A (en)

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