JP2009140397A - Automatic wiring design method and computer program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an automatic wiring design method for executing wiring design processing for designing, on a virtual plane, a position of fan-out wire to be led from a bonding pad on a substrate surface of a semiconductor package without clearance error or wasteful wiring space by an arithmetic processor, and a computer program for making a computer execute the wiring design processing. <P>SOLUTION: In the automatic wiring design method for executing wiring design processing for designing, on a virtual plane corresponding to a substrate surface of a semiconductor package, a position of fan-out wire to be led from a bonding pad on the substrate surface by an arithmetic processor, the position of each fan-out wire is determined (S103) based on a function such that each angle of the long axis of the shape of each bonding pad and a corresponding fan-out wire to be led from each bonding pad is reduced, on a certain side of the substrate surface, from the ends toward the center (S102). <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention provides an automatic wiring design method in which a wiring design process for designing a position of a fan-out wiring drawn from a bonding pad on a virtual plane corresponding to the substrate surface on a substrate surface of a semiconductor package is executed by an arithmetic processing unit. And a computer program thereof.

  In semiconductor packages such as PBGA and EBGA, the electrode terminals of the semiconductor chip and the bonding pads of the substrate are wired with wires and are electrically connected to each other. In the wiring design of a semiconductor package, the designer himself designs the semiconductor package on a virtual plane using a CAD system while relying on his skill, experience, and intuition (see, for example, Patent Document 1).

  The fan-out wiring is drawn out from the center of the bonding pad with a certain length so as to be along the long axis direction of the shape of the corresponding bonding pad. The fan-out wiring is also designed one by one by a designer manually using a CAD system.

  FIG. 8 is a diagram illustrating a wiring example of fan-out wiring designed by the prior art. In the figure, an ellipse represents a bonding pad, a thick solid line represents a fan-out wiring, a white solid line represents a real wiring, and a circle represents a via. In addition, the peripheral edge (edge) of the substrate surface is indicated by reference numeral R. In general, a substrate of a semiconductor package and a semiconductor chip mounted on the substrate have a quadrangular shape, and vias aligned in the vicinity of the outline (that is, the periphery) of the semiconductor chip are bonding pads belonging to the same region as the aligned vias. In contrast, it is connected via wiring. Hereinafter, in order to simplify the description, the fan-out wiring design on one side of the four sides of the substrate of the semiconductor package will be described, but the same applies to the other three sides.

  FIG. 9 is a diagram for explaining how to design the fan-out wiring according to the prior art. In the figure, the ellipse represents the bonding pad, the thick solid line represents the fan-out wiring, and the thin solid line represents the wiring from the vicinity of the center of the substrate of the semiconductor package to the bonding pad.

  First, as shown in FIG. 9A, a fan-out wiring F1 drawn from the bonding pad BP1 located at the end on one side of the substrate surface is temporarily set. Next, as shown in FIG. 9B, the fan-out wiring F2 is set at a position offset from the fan-out wiring F1 with reference to the fan-out wiring F1. As shown in FIG. 9C, the fan-out wiring F2 is bonded to the bonding pad BP2 at the intersection of the wiring drawn out in the major axis direction of the bonding pad BP2 and the offset fan-out wiring F2. Connect to. By repeating such processing sequentially, the position of the fan-out wiring is determined.

JP 2001-135671 A

  In the above-described conventional method, a clearance error may occur in the connection portion between the fan-out wiring drawn from the bonding pad and the actual wiring. FIG. 10 is a diagram for explaining a clearance error caused by the fan-out wiring design according to the prior art, and FIG. 11 is an enlarged view of FIG. In the figure, the thick solid line is represented by fan-out wiring, and the solid wiring is represented by white solid lines. As shown in FIGS. 10 and 11, a clearance error (indicated by a dotted circle in the figure) between the actual wiring W1 connected to the fan-out wiring F1 and the actual wiring W2 connected to the fan-out wiring F2. ) Has occurred. On one side of the substrate surface, the angle formed by the major axis of the bonding pad shape and the actual wiring increases toward both ends thereof, so that a clearance error is likely to occur.

  The fan-out wiring cannot be connected to the actual wiring simply by offsetting the adjacent fan-out wiring with reference to the fan-out wiring drawn from the bonding pad located at the end on one side of the substrate surface. Therefore, wiring is performed by appropriately providing a bending point in the middle of the fan-out wiring. As a result, the wiring arrangement tends to be inhomogeneous on the substrate surface.

  FIG. 12 is a diagram for explaining an extra space generated by the fan-out wiring design according to the prior art. In the figure, an ellipse represents a bonding pad, a thick solid line represents a fan-out wiring, and a white solid line represents a real wiring. In the above-described prior art method, the adjacent fan-out wiring is offset with respect to the fan-out wiring drawn out from the bonding pad located at the end on one side of the substrate surface (that is, the bonding pad located at the end of the board is offset). Since the wiring is performed sequentially while maintaining the angle between the major axis direction of the shape and the fan-out wiring drawn from the bonding pad), there is wasted space where nothing is wired near the center of one side of the board surface ( In the figure, it is indicated by a dotted circle).

  Therefore, in view of the above problems, an object of the present invention is to perform a wiring design process for designing a position of a fan-out wiring drawn from a bonding pad on a substrate surface of a semiconductor package on a virtual plane corresponding to the substrate surface, a clearance error, An object of the present invention is to provide an automatic wiring design method executed by an arithmetic processing unit and a computer program to be executed by this wiring design processing computer so that useless wiring space is not generated.

  In order to achieve the above object, in the present invention, a wiring design process for designing a position of a fan-out wiring drawn from a bonding pad on a substrate surface of a semiconductor package on a virtual plane corresponding to the substrate surface is an arithmetic processing. The automatic wiring design method executed by the apparatus is such that each angle formed by the major axis of each bonding pad shape and the corresponding fan-out wiring drawn from each bonding pad is directed from one end to the center on one side of the substrate surface. The position of each fan-out wiring is determined based on a function that will decrease.

  A computer program according to the present invention for causing a computer to execute the wiring design process sets a total number n of fan-out wirings (where n is a positive integer) whose position is to be determined on one side of the board surface. The angle between the major axis of the shape of the bonding pad located at the end on one side of the substrate surface and the corresponding fan-out wiring drawn from the bonding pad is α degrees, and located at the end on one side of the substrate surface. When the fanout wiring number corresponding to the first fanout wiring drawn from the bonding pad is x (where x is a positive integer between 1 and n), the xth fanout wiring And the angle f (x) degrees formed by the major axis of the bonding pad shape corresponding to the xth bonding pad. The calculation step of calculating according to the function represented by f (x) = α × cos (90 × x / n), and the position of the xth fan-out wiring, the shape of the bonding pad corresponding to the xth bonding pad And a confirming step for confirming the angle so that the angle is f (x) degrees. Further, it is obvious to those skilled in the art that the computer program is stored in a recording medium.

  According to the present invention, the wiring design is designed so that the position of the fan-out wiring drawn from the bonding pad on the substrate surface of the semiconductor package does not cause a clearance error or a wasteful wiring space on a virtual plane corresponding to the substrate surface. Processing can be efficiently executed using an arithmetic processing unit. As described above, since the design can be automatically performed using the arithmetic processing unit, the man-hours in the wiring design can be reduced, the working time of the designer is greatly shortened, and the burden is also reduced. As a result, the manufacturing cost of the semiconductor package can also be reduced.

  FIG. 1 is a flowchart showing an operation flow of an automatic wiring design method according to an embodiment of the present invention. As described above, the substrate of the semiconductor package and the semiconductor chip mounted on the substrate have a quadrangular shape, and the vias aligned in the vicinity of the outline (ie, the periphery) of the semiconductor chip belong to the same region as the aligned vias. Since it is connected to the bonding pad via wiring, the design of fan-out wiring on one side of the four sides of the substrate of the semiconductor package will be described. The same applies to each of the other three sides.

  In step S101, the total number n of fan-out wirings (where n is a positive integer) whose position is to be determined according to the automatic wiring method according to the embodiment of the present invention is set on one side of the substrate surface. As described above, on one side of the substrate surface, the angle between the major axis of the bonding pad shape and the actual wiring becomes larger at the both ends, so that a clearance error is likely to occur. It is necessary to ensure a wider clearance for the fan-out wiring. On the other hand, on one side of the substrate surface, the angle between the long axis of the bonding pad shape and the actual wiring is small near the center, so trying to secure a wide clearance as in the case of both ends, on the contrary A useless space will be generated. Considering the above points, in step S101, the total number n is set in order to select the fan-out wiring whose position is to be determined according to the automatic wiring method according to the embodiment of the present invention. For example, the designer inputs and sets the total number n via an input device of a computer.

  In subsequent step S102, each angle formed by the major axis of the shape of each bonding pad and the corresponding fan-out wiring drawn from each bonding pad is calculated. In this calculation, each angle formed between the major axis of the shape of each bonding pad and the corresponding fan-out wiring drawn from each bonding pad decreases as it goes from the end to the center on one side of the substrate surface. Use a function like

  More specifically, this function is as follows. FIG. 2 is a diagram illustrating angle setting in the automatic wiring design method according to the embodiment of the present invention. An angle formed by the major axis of the shape of the bonding pad BP1 located at the end on one side of the substrate surface and the corresponding fan-out wiring F1 drawn from the bonding pad BP1 is α degrees.

  Also, the fan-out wiring number when the corresponding fan-out wiring drawn from the bonding pad located at the end on one side of the substrate surface is the first is x-th (where x is a positive number from 1 to n) Integer). For example, the fan-out wiring F1 shown in FIG. 2 is a “first” fan-out wiring.

  At this time, an angle f (x) formed by the major axis of the shape of the bonding pad corresponding to the xth fan-out wiring and the xth bonding pad is expressed as function f (x) = α × cos (90 × x / n). ). In this specification, the unit of the angle f (x) is “degree”, but the function f (x) may be expressed using radians.

  In step S102, using this function f (x), the angle formed by the x-th fan-out wiring and the major axis of the bonding pad shape corresponding to the x-th bonding pad is calculated.

  In step S103, the position of the xth fan-out wiring is determined so as to be an angle f (x) degrees with respect to the major axis of the bonding pad shape corresponding to the xth bonding pad. As a result, the clearance between the fan-out wirings is increased by the amount inclined by the angle f (x), so that a clearance error when the fan-out wiring and the actual wiring are connected can be suppressed. For example, since the first fan-out wiring located at the end on one side of the substrate surface is “1 << n”, the angle f (1) ≈α, so the major axis direction of the corresponding bonding pad It is arranged to be inclined by α degrees with respect to. Further, for example, for the nth fan-out wiring located near the center on one side of the substrate surface, since the angle f (n) = 0, the inclination of 0 degrees with respect to the major axis direction of the corresponding bonding pad, That is, it arrange | positions so that it may extend in the major axis direction of a corresponding bonding pad. In this way, each angle formed by the major axis of each bonding pad shape and the corresponding fan-out wiring drawn from each bonding pad is gradually decreased from one end of the substrate surface to the center. Each fan-out wiring is arranged.

  FIG. 3 is a flowchart showing an application example to which the automatic wiring design method according to the embodiment of the present invention is applied.

  In the setting step S201, a virtual circle passing through three points of each bonding pad located at both ends and one bonding pad located in the center on one side of the substrate surface is set.

  Next, in the first arrangement step S202, the fan-out wiring drawn from the vicinity of the center of the substrate surface to the virtual circle is arranged along the major axis direction of the bonding pad shape corresponding to the fan-out wiring.

  Then, in the second placement step S203, the position ahead of the virtual circle of the fan-out wiring arranged in the first wiring step S202 is determined based on the angle f (x) described above. To decide.

  4 and 5 are diagrams for explaining the relationship between the fan-out wiring and the via row. In the figure, an ellipse represents a bonding pad, a thick solid line represents a fan-out wiring, a white solid line represents a real wiring, and a circle represents a via. In addition, the peripheral edge (edge) of the substrate surface is indicated by the reference symbol R.

  When the distance from the bonding pad to the innermost via row on the substrate surface (hereinafter referred to as “first via row”) is short, the fan-out wiring and the via row overlap as shown in FIG. In order to prevent this, as shown in FIG. 5, a line L (a dashed line in FIG. 5) spaced from the bonding pad located on the outermost side of the substrate surface (that is, the side closest to the periphery of the substrate surface) by a predetermined distance. The fan-out wiring is cut at the position of the line L. The fan-out wiring and the actual wiring are connected at the cut position. This avoids a clearance error when connected to the actual wiring near the center.

  FIG. 6 is a diagram illustrating fan-out wiring obtained as a result of executing the automatic wiring design method according to the embodiment of the present invention. In the figure, an ellipse represents a bonding pad, a thick solid line represents a fan-out wiring, a white solid line represents a real wiring, and a circle represents a via. In addition, the peripheral edge (edge) of the substrate surface is indicated by the reference symbol R.

  The automatic wiring design method according to this embodiment described above is realized using a computer. FIG. 7 is a block diagram showing a configuration of an automatic wiring design apparatus that is operated by a computer program according to an embodiment of the present invention stored in a recording medium.

  A program for causing a computer to execute automatic wiring design according to the present invention is stored in a storage medium (external storage medium such as a flexible disk or a CD-ROM) 110 as shown in FIG. It is installed in a computer with a simple configuration and operates as an automatic wiring design apparatus.

  The CPU 111 controls the entire automatic wiring design apparatus. The CPU 111 is connected to a ROM 113, a RAM 114, an HD (hard disk device) 115, an input device 116 such as a mouse and a keyboard, an external storage medium drive device 117, and a display device 118 such as an LCD, CRT, plasma display, and organic EL via a bus 112. Is connected. A control program for the CPU 111 is stored in the ROM 113.

  A program (automatic wiring design processing program) for executing automatic wiring design processing according to the present invention is installed (stored) in the HD 115 from the storage medium 110. Further, the RAM 114 has a work area when the automatic wiring design process is executed by the CPU 111 and an area for storing a part of a program for executing the automatic wiring design process. The HD 115 stores input data, final data, OS (operating system), and the like in advance.

  First, when the computer is turned on, the CPU 111 reads a control program from the ROM 110, reads an OS from the HD 115, and starts the OS. As a result, the computer is ready to install the automatic wiring design processing program from the storage medium 110.

  Next, the storage medium 110 is mounted on the external storage medium drive device 117, a control command is input from the input device 116 to the CPU 111, and the automatic wiring design processing program stored in the storage medium 110 is read and stored in the HD 115 or the like. That is, the automatic wiring design processing program is installed in the computer.

  Thereafter, when the automatic wiring design processing program is started, the computer operates as an automatic wiring design apparatus. The operator can execute the automatic wiring design process described above by operating the input device 116 in accordance with the interactive work content and procedure displayed on the display device 118. The “data relating to the optimal route of wiring” obtained as a result of the processing is stored in the HD 115 so that it can be used later, or is used for visually displaying the processing result on the display device 118. Also good.

  In the computer of FIG. 7, the program stored in the storage medium 110 is installed in the HD 115. However, the present invention is not limited to this, and the program may be installed in the computer via an information transmission medium such as a LAN. It may be installed in advance in the HD 115 built in the computer.

  The present invention can be applied to product design of various semiconductor packages such as CSP, PBGA, EBGA, and HDS.

  According to the present invention, the wiring design process for designing the position of the fan-out wiring drawn from the bonding pad on the substrate surface of the semiconductor package so as not to cause a clearance error or useless wiring space on a virtual plane corresponding to the substrate surface. Can be efficiently executed using an arithmetic processing unit. As described above, since the design can be automatically performed using the arithmetic processing unit, the man-hours in the wiring design can be reduced, the working time of the designer is greatly shortened, and the burden is also reduced. As a result, the manufacturing cost of the semiconductor package can also be reduced.

It is a flowchart which shows the operation | movement flow of the automatic wiring design method by the Example of this invention. It is a figure explaining the setting of an angle in the automatic wiring design method by the Example of this invention. It is a flowchart which shows the application example to which the automatic wiring design method by the Example of this invention is applied. FIG. 5 is a diagram (part 1) for explaining a relationship between fan-out wiring and a via row; FIG. 6 is a second diagram illustrating the relationship between fan-out wiring and via rows. It is the figure which illustrated the fanout wiring obtained as a result of performing the automatic wiring design method by the Example of this invention. It is a block diagram which shows the structure of the automatic wiring design apparatus which operate | moves by the computer program by the Example of this invention stored in the recording medium. It is a figure which illustrates the example of wiring of the fan out wiring designed by the prior art. It is a figure explaining the design method of the fanout wiring by a prior art. It is a figure explaining the clearance error which arises by the design of the fanout wiring by a prior art. It is an enlarged view of FIG. It is a figure explaining the extra space produced by the design of the fan-out wiring by a prior art.

Explanation of symbols

110 Recording medium 111 CPU
112 bus 113 ROM
114 RAM
115 Hard Disk Device 116 Input Device 117 External Storage Medium Drive Device 118 Display Device

Claims (4)

An automatic wiring design method for executing a wiring design process for designing a position of a fan-out wiring drawn from a bonding pad on a virtual plane corresponding to the substrate surface on a substrate surface of a semiconductor package by an arithmetic processing unit,
The function is such that each angle formed by the major axis of each bonding pad shape and the corresponding fan-out wiring drawn from each bonding pad decreases from one end of the substrate surface toward the center. An automatic wiring design method characterized in that the position of each fan-out wiring is determined based on the above. The total number of fan-out wirings whose positions should be determined on one side of the substrate surface is n (where n is a positive integer), the long axis of the shape of the bonding pad located at the end on one side of the substrate surface, and the bonding The number of the fan-out wiring when the angle formed by the corresponding fan-out wiring drawn from the pad is α degrees, and the corresponding fan-out wiring drawn from the bonding pad located at the end on one side of the substrate surface is the first. Is the x number (where x is a positive integer not less than 1 and not more than n),
The angle f (x) degrees formed by the xth fan-out wiring and the major axis of the bonding pad shape corresponding to the xth bonding pad is:
f (x) = α × cos (90 × x / n)
The automatic wiring design method according to claim 1, which is calculated from the function indicated by: A setting step for setting a virtual circle passing through three points of each bonding pad located at both ends and a bonding pad located at the center on one side of the substrate surface;
For the fan-out wiring drawn out from the vicinity of the center of the substrate surface to the virtual circle, a first arrangement step of arranging the fan-out wiring along the major axis direction of the bonding pad shape corresponding to the fan-out wiring;
3. The automatic wiring according to claim 1, wherein the position of each fan-out wiring is determined based on the function for a position ahead of the virtual circle of the fan-out wiring arranged in the first wiring step. Design method. A computer program for causing a computer to execute a wiring design process for designing a position of a fan-out wiring drawn from a bonding pad on a substrate surface of a semiconductor package on a virtual plane corresponding to the substrate surface,
A setting step for setting a total number n (where n is a positive integer) of fan-out wirings whose positions should be determined on one side of the substrate surface;
The angle formed by the long axis of the shape of the bonding pad located at the extreme end on one side of the substrate surface and the corresponding fan-out wiring drawn from the bonding pad is α degrees, and the bonding located at the extreme end on one side of the substrate surface When the number of the fanout wiring when the corresponding fanout wiring drawn from the pad is the first is x (where x is a positive integer from 1 to n), the xth fanout wiring An angle f (x) degree formed by the major axis of the bonding pad shape corresponding to the x-th bonding pad is calculated according to a function represented by f (x) = α × cos (90 × x / n). A calculation step;
a determination step for determining the position of the x-th fan-out wiring with respect to the major axis of the shape of the bonding pad corresponding to the x-th bonding pad so that the angle is f (x) degrees;
A computer program for causing a computer to execute a wiring design process characterized by comprising:

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