JP2009124844A - Switching power supply - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching power supply that is improved in responsiveness and achieved in high efficiency. <P>SOLUTION: An inductance is provided between the outputs of the first output circuit provided between input voltage and grounding potential, and the second output circuit provided between output voltage and the grounding potential. When the input voltage is within the first voltage range larger than a desired output voltage, the first output circuit is operated with a PWM pulse wherein the output voltage is a desired voltage, and the second output circuit has the output side switch turned on and the ground side switch turned off. When the input voltage is within the second voltage range, almost the same as the desired output voltage, the first output circuit is operated with a fixed PWM pulse, and the second output circuit is operated with the PWM pulse wherein the output voltage is the desired voltage. When the input voltage is within the third voltage range smaller than the desired output voltage, the first output circuit has the input voltage side switch turned on and the ground side switch turned off, the second output circuit is operated with the PWM pulse wherein the output voltage is the desired voltage. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a switching power supply device, and more particularly to a technique effective when applied to a buck-boost converter required for a lithium ion battery, for example.

  In Japanese Patent No. 3556652, both ends of a coil (inductance) have switches that are complementarily connected to a power supply and GND, respectively, and one coil end is connected to an input voltage Vin via a complementary switch, In a converter capable of performing a step-up / step-down operation in which the coil end is connected to the output voltage end Vout via another complementary switch, the input side and the output side have a step-up / step-down mode in which PWM control is independently performed. The input side is feedforward controlled so that Vin × Din (input side PWM control duty) = constant voltage is obtained. The output side is feedback controlled so as to obtain a desired constant voltage.

Japanese Patent Laying-Open No. 2005-318862 discloses a method for suppressing output voltage fluctuation in a converter that switches between step-up and step-down. In the configuration of Japanese Patent No. 3556652, the feedforward control side is changed to feedback control, and the second control is performed so that the duty of the feedback means for always controlling the output voltage is constant regardless of the operation mode. Adjust by means. In the step-down mode, feedforward control is performed on the output side, and in step-up, feedforward control is performed on the input side.
Japanese Patent No. 3556652 JP 2005-318862 A

  The technique disclosed in Patent Document 1 can improve the conversion efficiency of a generally known buck-boost converter (switching two complementary input / output switches simultaneously), depending on the input voltage. In order to perform duty control, there is a problem that the fluctuation of the output voltage is relatively large with respect to a high-frequency input voltage fluctuation of about the PWM frequency or a sudden load fluctuation of the output voltage. In addition, since the disclosed technology has only the buck-boost mode, the conversion efficiency when the input voltage is relatively higher than the output voltage is inferior to the step-down converter, and the conversion efficiency when the input voltage is relatively lower than the output voltage is boosted. Since it is inferior to a converter, in order to obtain optimum conversion efficiency according to the difference between the input voltage and the output voltage, generally, a method corresponding to mode switching is often employed. However, there is a problem that a relatively large output voltage fluctuation occurs when the mode is switched.

  Patent Document 2 discloses a technique for suppressing mode fluctuation when switching between the step-up mode and the step-down mode. However, the disclosed technique relates to a voltage feedback system, and influence of load fluctuation response or input voltage fluctuation. Is big. Therefore, the inventor of the present application has studied to adopt a current detection method that is effective for load fluctuation response or input voltage fluctuation in the step-down converter. By adopting this current detection method, since the current control band is wider than the control band of the whole converter, it is expected to suppress output fluctuation at the time of mode switching. However, the peak detection type current feedback method has a problem in that a control offset due to slope compensation for preventing subharmonic oscillation occurs, resulting in a large fluctuation during mode switching.

  An object of the present invention is to provide a switching power supply device that realizes improvement in response to input voltage and load fluctuation and high efficiency. Another object of the present invention is to provide a switching power supply device suitable for a semiconductor integrated circuit. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  One embodiment in the present application is as follows. An inductance is provided between both output terminals of the first output circuit as a complementary switch provided between the input voltage and the ground potential and the second output circuit as a complementary switch provided between the output voltage and the ground potential. Provided. The control circuit forms a first input signal of the first output circuit and a second input signal of the second output circuit. In the first mode of the first voltage range in which the input voltage is larger than the desired output voltage, the first input signal is set to a PWM pulse so that the output voltage becomes the desired voltage, and the second input signal is output from the second output circuit. Turn the output side switch on and the ground side switch off. When the input voltage is smaller than the first voltage range and in the second voltage range that is substantially the same as the desired output voltage, the first input signal is a fixed duty PWM pulse, and the output voltage of the second input signal is the desired voltage. PWM pulses like this. When the input voltage is smaller than the second voltage range and the third voltage range is smaller than the desired output voltage, the first input signal turns on the input voltage side switch of the first output circuit and turns off the ground side switch. The second input signal is a PWM pulse so that the output voltage becomes a desired voltage. The PWM pulse is formed by comparing the output voltage of an error amplifier that receives the divided voltage of the output voltage and a reference voltage with a current feedback signal formed by a current detection signal flowing through the inductance means by a comparator. .

  It is possible to improve responsiveness and increase efficiency with respect to input voltage and load fluctuation.

  FIG. 1 shows a circuit diagram of an embodiment of a step-up / step-down switching power supply device according to the present invention. The circuit elements and circuit blocks shown in the figure are composed of one semiconductor integrated circuit device and external components. The external parts form an inductance (or coil) L connected via an external terminal indicated by a circle in the drawing, resistors Rf1, Rf2 and a capacitor Cf for detecting a current flowing through the inductance L, and an output voltage Vo. Output voltage CL, and voltage dividing resistors R1 and R2 that divide the output voltage Vo. A resistor Rd connected in series to the inductance L represents a parasitic resistance of the inductance L, and a resistor Re connected in series to the output capacitor CL represents a parasitic resistance of the output capacitor CL. Other circuit elements and circuit blocks are formed by one semiconductor integrated circuit.

  The switching power supply of this embodiment is directed to a peak current control type cross converter. The output stage includes a first output circuit composed of output MOSFETs M1 and M2 as complementary switches, and a second output circuit composed of output MOSFETs M3 and M4 as complementary switches. Both ends of the coil L are connected to output terminals of the first and second output circuits. One end side Vd1 of the coil L is supplied with the input voltage Vin via the output MOSFET M1, and is supplied with the circuit ground potential via the output MOSFET M2. The other end Vd2 of the coil L is output as an output voltage Vo through an output MOSFET M3, and a circuit ground potential is supplied through an output MOSFET M4.

  The following circuit is provided as an output control system. The output voltage Vo is divided by the voltage dividing resistors R1 and R2 to be a feedback voltage VFB. The error amplifier EA amplifies the difference potential between the reference voltage Vref and the feedback voltage VFB, and performs error integration in the phase compensators Rc, Cc1, and Cc2 to form a drive current instruction signal Vctl. This drive current instruction signal Vctl is compared with the current detection result formed by the sense amplifier SA by the PWM comparator PWMCP through the slope compensation circuit for suppressing subharmonic oscillation, and determines the PWM control duty.

  The current detection means for forming the input signal of the sense amplifier SA is constituted by a CR network circuit (Rf1, Cf, Rf2) connected in parallel with the coil L. Basically, a voltage proportional to the current IL flowing through the coil L is generated at the voltage across the capacitor (capacitor) Cf of the network circuit. Therefore, the voltage across the capacitor Cf is differentially amplified by the sense amplifier SA to obtain the current. The detection value is used. Since the current feedback loop has a bandwidth of several hundreds KHz or more, the load fluctuation response and the input fluctuation response characteristics are improved.

  The CR network circuit has a common-mode voltage when the output MOSFETs M1 and M2 of the first output circuit on the input side and the output MOSFETs M3 and M4 of the second output circuit on the output side perform the step-up / step-down operation for performing the PWM operation. In this circuit, resistors Rf1 and Rf2 are connected in series at both ends of the capacitor Cf so as to minimize the displacement of the capacitor Cf. The operation of the current sense amplifier SA will be described later with reference to FIG.

  One input terminal of the gate circuits G1 and G2 intersects with the other output to constitute a flip-flop (latch) circuit. The other input of the gate circuit G2 is used as a set terminal, and a PWM frequency signal fpwm formed by the triangular wave generation circuit TWG and the timing controller TC is supplied and set at the PWM cycle. The other input of the gate circuit G1 is used as a reset terminal, and the output signal of the PWM comparator PWMCP is supplied. That is, the drive current instruction signal Vctl passed through the slope compensation circuit and the current detection result are compared by the PWM comparator PWMCP, and when the drive current instruction and the current detection result match, the flip-flop circuits (G1, G2) are reset. As a result, a PWM signal (PWM pulse) Dctl is formed.

  The timing controller TC generates a PWM pulse Dfix having a constant fixed duty. The multiplexer MPX receives the PWM pulses Dctl and Dfix and the detection signals SEL1 and SEL2 formed by the mode switching detection circuit, and supplies the first output circuit and the second output circuit to the input terminals of the first output circuit. An input signal V1 and a second input signal V2 are formed. As for the first input signal V1, an in-phase signal is transmitted to the gate of the output MOSFET M1 through the driver DV1, and a reverse-phase signal is transmitted to the gate of the output MOSFET M2 through the driver DV2. As a result, the output MOSFETs M1 and M2 perform a complementary switching operation corresponding to the input signal V1. As for the second input signal V2, a negative phase signal is transmitted to the gate of the output MOSFET M3 via the driver DV3, and an in-phase signal is transmitted to the gate of the output MOSFET M4 via the driver DV4. As a result, the output MOSFETs M3 and M4 perform a complementary switching operation corresponding to the input signal V2. The output MOSFETs M1 to M4 are not particularly limited, but are constituted by N-channel MOSFETs.

  The mode switching detection circuit includes a voltage comparison circuit VC1 that receives the input voltage Vin and the output voltage Vo, a voltage comparison circuit VC2 that receives the first detection voltage Vthh and the voltage difference between the two voltages formed by the voltage comparison circuit VC1. The voltage comparison circuit VC3 receives the difference voltage between the two voltages formed by the voltage comparison circuit VC1 and the second detection voltage Vthl. The voltage comparison circuit VC2 has a hysteresis characteristic and prevents the detection signal SEL1 from being unstable (oscillated) when the difference voltage and the first detection voltage Vthh are substantially the same. This also applies to the voltage comparison circuit VC3 that forms the detection signal SEL2 by comparing the difference voltage with the second detection voltage Vthl.

  The step-up / step-down switching power supply of this embodiment operates in three modes, that is, a step-down mode, an extended step-up mode, and a step-up mode as shown in the waveform diagram of FIG. In the step-down mode, as in the step-down mode shown in FIG. 2, the second input signal V2 is set to the high level, the output MOSFET M3 is always on, and the output MOSFET M4 is always off, corresponding to the PWM pulse Dctl. The first input signal V1 is changed to turn on / off the output MOSFETs M1 and M2, the output voltage Vd1 is formed, the current IL flowing through the coil L is adjusted, and the step-down operation is performed so that the output voltage Vo becomes a desired voltage. I do.

  In the boost mode, as in the boost mode shown in FIG. 2, the output MOSFET M1 is always on, the output MOSFET M2 is always off, and the output voltage Vd1 is fixed to the high level due to the high level of the first input signal V1. Is done. The second input signal V1 changes in response to the PWM pulse Dctl, the output MOSFETs M3 and M4 are turned on / off, the output voltage Vd2 is formed, the current IL flowing through the coil L is adjusted, and the output voltage Vo becomes the desired voltage. The boosting operation is performed as follows.

  In this embodiment, in addition to the step-down mode and the step-up mode, an extended step-up mode is provided. This extended boost mode has the same basic operation as the boost boost mode shown in FIG. 2 except that the MOSFET M1 and M2 are different from the boost mode in that the PWM pulses Dfix corresponding to the constant duty PWM pulse Dfix. The switch is controlled by one input signal V1. As a result, the input voltage Vin is equivalently stepped down to expand the operating range of the boost mode.

  The multiplexer MPX is a logic circuit that determines each mode based on the first detection signal SEL1 and the second detection signal SEL2, which are the mode command signals, and transmits the PWM pulses Ddctl and Dfix and the fixed level as the first and second input signals. And a signal selection circuit.

  The above three operation modes are the step-down mode when the input voltage Vin is higher than the desired output voltage according to the difference potential between the input voltage Vin and the output voltage Vo, and the input voltage Vin and the output voltage Vo are close to the desired output voltage. Sometimes the extended boost mode is selected, and when the input voltage Vin is lower than the desired output voltage, the boost mode is selected to ensure a wide input voltage range in total.

  In this embodiment, the mode is selected based on the difference potential between the input voltage Vin and the output voltage Vo so that the step-down / step-up switching power supply device of this embodiment is always started in the step-down mode. As a result, it is possible to eliminate the measure against the rush current of the input power supply Vin, which becomes a problem when the booster circuit is started up. The operation range of each mode is expressed by the following equations (1) to (3). The mode switching threshold values (detection voltages) Vthh and Vthl are overlapped with each other in the operation range of each mode. The threshold is set in Further, at the time of mode switching, in order to prevent mode oscillation due to negative feedback applied to the input voltage Vin due to the transition of the power supply current of the input voltage Vin and line impedance due to a change in conversion efficiency, the mode switching comparator VC2, as described above. VC3 has a hysteresis.

Step-down mode Vin (L)> [Vo + Io. (2.Ron + Rd)] / Dmax (1)
Vin (L) represents an operation lower limit voltage of the input voltage Vin.

Extended boost mode Vin (H1) <Vo. (1-Dmin) / Don (2)
Vin (H1) represents the upper limit voltage of the input voltage Vin.

Boost mode Vin (H2) <Vo · (1-Dmin) (3)
Vin (H2) indicates the upper limit voltage of the input voltage Vin.
In the above (1) to (3), Dmax represents the maximum duty of the PWM pulse (Dctl), Dmin represents the minimum duty of the PWM pulse (Dctl), and Don (Dfix) represents the fixed PWM duty.

  FIG. 3 is a waveform diagram for explaining the operation of the sense amplifier SA according to the present invention. The sense amplifier SA of this embodiment is a sense amplifier with reset, and is directed to countermeasures for subharmonic oscillation. FIG. 3 shows a waveform diagram of current control when the reset period is provided in the sense amplifier SA in the extended boost mode.

  When the sense amplifier SA does not have a reset period, a voltage Vs proportional to the coil current appears at the output of the sense amplifier SA as indicated by a dotted line at the bottom of the figure. The output Vs 'of the sense amplifier SA is compared with the output Vctl' of the error amplifier EA after slope compensation by the PWM comparator PWMCP to determine the PWM on period. Further, the PWM OFF period continues until the edge at which the PWM ON signal PWMON changes from low level to high level. However, in actual circuit operation, since the input side coil drive end Vd1 is switched during the PWM off period, the common-mode voltage of the current detection capacitor Cf changes at the timing when the voltage Vd1 changes, and as a result, the current sense amplifier output There is a possibility that the current sense amplifier output potential Vs ′ becomes higher than the error amplifier output potential Vctl ′ after slope compensation at the timing when the PWM on signal PWMON changes from low level to high level. In this case, at the timing when the PWM ON signal PWMON changes from low level to high level, there is a possibility that sub-harmonic oscillation is generated by continuing PWM OFF instead of PWM OFF → PWM ON.

  In this embodiment, between the start of the PWM off period and the end of PWM off + td, the current sense amplifier output voltage Vs is clamped at the constant output voltage V0 as the sense amplifier reset period so that the error amplifier output Vctl is reliably increased. To do. As a result, a current sense amplifier output voltage Vs as shown by the lowermost solid line in FIG. 3 is obtained. By such a reset operation of the sense amplifier SA, the coil current is always reliably detected regardless of fluctuations in the common-mode potential across the capacitor Cf, and subharmonic oscillation is also suppressed.

  FIG. 4 shows a circuit diagram of an embodiment of the sense amplifier with reset in FIG. An input signal supplied from the input terminal IN− is supplied to all the transistors Q1 through a source follower input circuit including a P channel MOSFET M11 and a P channel MOSFET M13 as a current source load provided between the source and the power supply voltage Vdd. Supply to the source. The input signal supplied from the input terminal IN + is supplied to the transistor Q2 via a source follower input circuit comprising a P channel MOSFET M12 and a P channel MOSFET M14 as a current source load provided between the source and the power supply voltage Vdd. Supplied to

  Transistors Q1 and Q2 have a common emitter and a differential configuration. A series circuit of N-channel MOSFETs M25 and M26 for supplying a fixed bias current is provided between the common emitter and the circuit ground potential. N-channel MOSFETs M27 and M28 for supplying a bias current for gain switching control are provided between the common emitter and the circuit ground potential. The gate of the MOSFEM 28 is connected to the gain control terminal GAIN.

  The MOSFET M28 functions as a switch that is turned on / off by a signal at the gain control terminal GAIN, and switches the gain of the amplifier in FIG. The MOSFETs M26 and M22 are elements added to prevent the pair accuracy deviation of the current mirror circuits of the MOSFETs M21, M25 and M27 due to the on-resistance of the MOSFET M28. The MOSFETs M26 and M22 serve as resistance elements when the power supply voltage Vdd is supplied to the gate. It is made to work.

  The differential transistors Q1 and Q2 form a Gm amplifier. That is, the voltage difference between the input terminals IN + and IN− is converted into a current output. The converted collector output current of the differential transistor Q1 is input to a current mirror circuit composed of N-channel MOSFETs M19 and M20 via a current mirror circuit composed of P-channel MOSFETs M15 and M16. Similarly, the collector output current of the differential transistor Q2 is supplied to a current mirror circuit composed of P-channel MOSFETs M17 and M18. The drains of the output side P-channel MOSFET M18 and the N-channel MOSFET M20 of the two current mirror circuits are connected in common, and the difference current Isens between the collector output currents of the differential MOSFETs Q1 and Q2 is converted into a voltage by the load resistor RL and output terminal OUT Is taken out of.

  In this embodiment, a load resistor RL and a diode-connected transistor Q3 are provided as a load between the output terminal OUT and the ground potential of the circuit. A bias current is supplied to the transistor Q3 from the MOSFET M23 and a P-channel MOSFET M24 in the form of a current mirror, and the base-emitter voltage of the transistor Q3 is set to the fixed voltage V0. An N-channel MOSFET M31 is provided between the base and collector of the transistor Q3 and the output terminal OUT. The gate of the MOSFET M31 is connected to the reset terminal RESET. By supplying a high level reset signal to the reset terminal PESET, the MOSFET M31 is turned on, the load resistor RL is short-circuited, and the output terminal OUT is set to a fixed level such as the voltage V0. By supplying a low level reset signal to the reset terminal RESET, the MOSFET M31 is turned off and operates as a normal differential amplifier.

  In this embodiment, MOSFETs M29 and M30 constituting an offset adjustment circuit are provided between the output terminal OUT and the ground potential of the circuit. The MOSFET M29 operates as a resistance element when supplied with the power supply voltage Vdd. The gate of the MOSFET M30 is connected to the offset terminal OFFSET. When the offset terminal OFFSET is set to a high level, the MOSFET M30 is turned on so that the offset current Ioff flows. That is, the output current Isens is decreased by the offset current Ioff.

  FIG. 5 is a waveform diagram for explaining the extended boost mode. This embodiment is directed to a countermeasure for optimizing the driving capability in the extended boost mode. In the embodiment, basically, the input duty (Vd1 duty) in the extended boost mode is controlled as a fixed value. However, the drive current increases as indicated by the arrow in the extended boost mode, and the low level duty on the output side (Vd2) increases as shown in (1) (2) to (3), and the input side is fixed. When the high level period is exceeded, the fixed high level portion on the input side is enlarged as shown by → corresponding to the low level on the output side. Thus, rather than leaving the fixed high level period on the input side as a fixed duty as in (1) and (2), the maximum coil current is increased as in (3). The driving ability can be increased.

  FIG. 6 is a waveform diagram for explaining the mode switching (step-down → extended step-up). Immediately before switching from the step-down mode to the extended step-up mode, the PWM control duty (charging duty) is large to near the operating limit. Conversely, immediately after the mode switching, the PWM control duty (charging duty) is so small that it is close to the operating limit. In the step-up / step-down switching power supply device of this embodiment, as the PWM duty is large, the error amplifier output is reduced by slope compensation as described above. Therefore, as shown in FIG. In addition, the error amplifier output after slope compensation, which is a current instruction, equivalently generates an offset voltage and causes a large output fluctuation.

  In this embodiment, only in the step-down mode, the offset voltage is subtracted from the output of the sense amplifier so that no change occurs in the mode switching. That is, as shown in FIG. 6B, the output of the sense amplifier generates an offset voltage corresponding to Vslope and subtracts it in the step-down mode. In FIG. 1, the MOSFET M7 is turned on by the high level of the detection signal SEL1, the output current of the sense amplifier SA is decreased by the current I3, and the above subtraction is performed. In FIG. 4, in the step-down mode, a high level is supplied to the offset terminal OFFSET, the MOSFET M30 is turned on, and an offset current Ioff flows through the MOSFET M29 serving as resistance means. This current Ioff corresponds to the current I3 in FIG. Therefore, the MOSFET M29 constitutes the current source I3. Similarly, the load resistance RL in FIG. 4 corresponds to R3 in FIG.

  FIG. 7 is a characteristic diagram for explaining switching between the boost mode and the extended boost mode. FIG. 7 shows changes in the input voltage and the overall relative loop gain in the boost mode and the extended boost mode. In the step-up system mode, the loop gain changes according to the duty on the output side (Vd2), so that it becomes as shown in FIG. In this state, the gain difference is 87% -70% = 17% at the switching voltage 2.6 V between the expanded boost and the boost mode, which is a large output variation factor at the time of mode switching. To prevent this, in the extended boost mode, the gain of the current sense amplifier SA is multiplied by 0.8, that is, the loop gain is multiplied by 1 / 0.8, and the loop gain fluctuation during mode switching at the switching voltage of 2.6 V Is suppressed to 87% -70% / 0.8 = -0.5%, and the output fluctuation is minimized.

  The gain control of the sense amplifier can be realized using the gain control terminal GAIN of FIG. When the gain control terminal GAIN is set to the high level, the MOSFET M28 is turned on, a current flows through the MOSFET M27 as the resistance means, and the bias current of the differential amplifier transistors Q1 and Q2 is increased, as shown by the dotted line in FIG. The gain is increased. In FIG. 1, the detection signal SEL2 is used for gain control of the sense amplifier SA. As described above, the gain of the current sense amplifier SA can be set for each mode, and the loop gain between the modes at the time of mode switching is set to be the same, thereby suppressing output fluctuation in each mode switching.

  In FIG. 1, the CR current detection circuit is configured by an external element. When integrating CR current detection on a monolithic semiconductor, consideration must be given to the parasitic capacitance Cp of the capacitance Cf for current detection. FIG. 8 to FIG. 11 show four typical circuit examples that can be taken when a CR current detection circuit is applied to current detection of a switching power supply device and incorporated in a semiconductor integrated circuit.

  In FIG. 8, the output MOSFETs M1 and M2 corresponding to the drive voltage Vd1 side have a resistor Rf, and the parasitic capacitance Cp of the capacitor Cf is seen on the drive voltage Vd2 side where the fixed potential is reached. That is, as shown in FIG. 17, the capacitor Cf uses a MOS capacitor, the gate side G is connected to the resistor Rf, and the N + diffusion layer (source, drain) and the N-type well N-Well side are the driving voltage of the coil L. Connected to Vd2 side. For this reason, a parasitic capacitance Cp exists on the N-type well N-Well side and the substrate P-sun. In FIG. 8, rd is a parasitic resistance of the coil L, rin and ro are wiring resistances and equivalent series resistances such as bleeder resistances used for level adjustment of Vd1 and Vd2. In this case, even if the drive end Vd1 of the coil L is PWM-operated, the common-mode potential at both ends of the capacitor Cf and the potential of the parasitic capacitor Cp are fixed to the drive voltage Vd2, and the output of the sense amplifier SA has almost no current detection error. Does not occur.

  FIG. 9 is a connection in which the PWM side and the fixed potential side are interchanged with those in FIG. 8, the output MOSFETs M1 and M2 corresponding to the drive voltage Vd1 have capacitance Cf, and the parasitic capacitance Cp is visible on the PWM side. In this case, charging / discharging of the parasitic capacitance Cp is performed through the coil drive end voltage Vd1, and thus does not affect the potential across the capacitance Cf, so that no current detection error occurs. However, since the common-mode voltage of the capacitor Cf fluctuates in accordance with PWM switching, a sense amplifier having a large common-mode rejection ratio up to a considerably high frequency is required, which is not suitable for a practical solution.

  As in FIG. 9, the output MOSFET M1 corresponding to the drive voltage Vd1 side has a capacitance Cf on the M2 side, and the N + diffusion layer side as shown in FIG. 17 is connected to the resistor Rf on the resistor Rf side. The connection is such that the capacitance Cp can be seen. In this case, since the parasitic capacitance Cp is charged and discharged through the capacitor Cf in conjunction with the switching accompanying the PWM of the drive voltage Vd1, a considerably larger pulsation appears at the potential across the capacitor Cf than when there is no parasitic capacitor Cp. . In some cases, a pulsation voltage larger than the common-mode voltage across the capacitor Cf is generated, which is not suitable for current detection.

  FIG. 11 shows a connection in which the PWM side and the fixed potential side in FIG. 10 are interchanged. In this case, the pulsation at both ends of Cf tends to decrease due to the influence of the wiring resistance ro, and the entire pulsation waveform tends to be delayed, and the method of performing peak current detection using the potential at both ends of the capacitor Cf deteriorates the S / N. Absent.

  The connection in which the parasitic capacitance Cp of the capacitor Cf can be seen at the connection node between the capacitor Cf and the resistor Rf as in FIGS. 10 and 11 is not suitable for current detection using the potential across the capacitor Cf. In the case of these two circuits, the noise of the substrate P-sub shown in FIG. 17 is injected into the connection node between the capacitor Cf and the resistor Rf via the parasitic capacitor Cp, and it is considered that the current detection is considerably adversely affected. .

  In the step-up / step-down switching power supply device of FIG. 1, Rf is arranged at both ends of the CR current detection capacitor Cf as a countermeasure against the common-mode voltage fluctuation of the sense amplifier SA, but the CR current detection circuit of FIGS. Then, since a parasitic capacitance is always added between one of Cf and Rf, a current detection error similar to that in FIGS. 10 and 11 occurs in the extended boost mode in which both drive voltages Vd1 and Vd2 are switched.

  FIG. 12 is a circuit diagram showing one embodiment of a CR current detection circuit used in the step-up / step-down switching power supply device according to the present invention. In the same figure, an output circuit related to the CR current detection circuit and a sense amplifier SA are also shown. In this embodiment, the coil L is connected via an external terminal indicated by a circle in the drawing. The resistor rd connected in series to the coil L indicates the parasitic resistance as described above.

  Except for the coil L, other circuit elements are built in the semiconductor integrated circuit. In the CR circuit of this embodiment, the capacitance Cf necessary for detecting the current flowing in the coil L is divided into the capacitances Cf1 and Cf2 which are ½. These capacitors Cf1 and Cf2 are connected in parallel with the polarity reversed as shown in FIG. In other words, the diffusion layer side of the capacitor Cf1 is connected to the gate side of the capacitor Cf2 with the circle added to the electrode, and the diffusion layer side of the capacitor Cf2 is connected to the gate side of the capacitor Cf1 with the circle added. Resistors Rf1 and Rf2 divided into resistance values ½ of the resistance Rf are arranged at both ends of these capacitors Cf1 / Cf2, and are connected to the drive voltage Vd1 side and the Vd2 side.

  In the case of this embodiment circuit, both ends of the capacitor Cf are not driven with a low impedance, and the problem of expansion of pulsation at both ends of the capacitor Cf shown in FIG. 10 hardly occurs. Further, the problem of delay shown in FIG. 11 can be improved because the capacitor Cf is divided into ½. Furthermore, since the substrate noise transmitted through the parasitic capacitance Cp is also transmitted as an in-phase component, the voltage across the capacitor Cf necessary for current detection is hardly affected.

  Resistors R11 and R12 and R13 and R14 constitute a level shift circuit, and adapt the detection signal to the input dynamic range of the sense amplifier SA. That is, as described above, since the input voltage Vin varies within a large voltage range, the drive voltages Vd1 and Vd2 also vary correspondingly. Therefore, the resistors R11 and R12 and R13 and R14 are divided to reduce the substantial fluctuation range, and are added to increase the design freedom of the common-mode input voltage range of the sense amplifier SA.

  FIG. 13 is a circuit diagram showing another embodiment of the CR current detection circuit used in the step-up / step-down switching power supply apparatus according to the present invention. In this embodiment, MOSFETs M41 and M42 are provided at both ends of the resistors Rf1 and Rf2. The capacitor Cf has a gate side connected to the drive voltage Vd1 side. A capacitor Cp ′ and a MOSFET M43 are provided in series between the gate side of the capacitor Cf and the ground potential of the circuit. The capacitor Cp ′ corresponds to the parasitic capacitor Cp of the capacitor Cf.

  In the circuit of this embodiment, in the step-down mode, the MOSFET M41 is turned off, the MOSFET M42 is turned on, and the MOSFET M43 is turned off to equivalently suppress the current detection error as shown in FIG. In the boost mode, the MOSFET M41 is turned on, the MOSFET M42 is turned off, and the MOSFET M43 is turned on, so that the state shown in FIG. 11 is equivalently established. In this case, a slight delay occurs in the waveform at both ends of the capacitor Cf. However, in the boost mode, since the control band is generally suppressed by the restriction of the right half plane zero, there is no problem with the delay. In the extended boost mode, the MOSFET M41 is turned on, the MOSFET M42 is turned off, and the MOSFET M43 is turned on, so that switching on the drive voltage Vd2 side is the same as in the boost mode. On the drive voltage Vd1 side, the pulsation expansion at both ends of the capacitor Cf shown in FIG. 11 occurs, but this is connected to the capacitor Cp ′ between the MOSFET M41, the node between the capacitor Cf and the ground potential, and the fluctuation of the common-mode voltage at the same node This circuit is improved by suppressing the above.

  In this way, the switch MOSFETs M41 and M42 are provided in parallel with the resistors Rf1 and Rf2 of the CR current detection circuit, respectively, and the resistor Rf2 on the output side (Vd2) is short-circuited in the step-down mode operation as described above, so Sometimes the input side (Vd1) resistor Rf1 is short-circuited, and a large input resistance is seen on the side where the output MOSFETs M1 to M4 at both ends of the coil L are switched, so that the common-mode voltage of the capacitor Cf of the current detection CR is Avoid fluctuations. Thereby, the current detection error with respect to the common mode noise is suppressed.

  FIG. 14 is a circuit diagram showing another embodiment of the step-up / step-down switching power supply device according to the present invention. In this embodiment, the CR current detection circuit shown in FIG. 13 is used. In the switching power supply of this embodiment, the external elements are the coil L, the output capacitance CL, and the voltage dividing resistors R1 and R2.

  FIG. 15 is a circuit diagram showing still another embodiment of the step-up / step-down switching power supply apparatus according to the present invention. In this embodiment, the CR current detection circuit shown in FIG. 12 is used. In the switching power supply of this embodiment, the external elements are the coil L, the output capacitance CL, and the voltage dividing resistors R1 and R2.

  FIG. 16 is a circuit diagram showing still another embodiment of the step-up / step-down switching power supply device according to the present invention. In this embodiment, a CR current detection circuit similar to that shown in FIG. 15 is used. The step-up / step-down switching power supply device of this embodiment is an average current controlled cross converter. The target of current feedback is a low-frequency component obtained by removing a pulsating component synchronized with PWM from the difference potential between both ends of the capacitor Cf. For this reason, a low-pass filter LPF is arranged at the output of the sense amplifier, and the reset function of the amplifier becomes unnecessary.

  FIG. 18 is a circuit diagram showing one embodiment of the step-down switching power supply device according to the present invention. This embodiment is an example in which the step-up / step-down switching power supply of FIG. 1 is simplified to form a step-down switching power supply apparatus. Like FIG. 1, both ends of the capacitor of the CR current detection circuit connected in parallel with the coil inductor are sensed. It is amplified by an amplifier to constitute a current feedback type power supply device. At that time, the reset function of the amplifier already described in FIG. 3 is used, and the CR current detection circuit is connected to the PWM drive end side of the coil as described in FIG. The diffusion side of the capacitor is connected to the output terminal Vo. The capacitor means is a MOS capacitor. According to the present embodiment, the current sense resistor required for the conventional current feedback type power supply device can be eliminated, so that the conversion efficiency is increased and the CR current detection circuit can be built in the integrated circuit, so that the external cost can be reduced.

  FIG. 19 shows a circuit diagram of an embodiment of the step-up switching power supply device according to the present invention. This embodiment is an example in which the step-up / step-down switching power supply of FIG. 1 is simplified to form a step-up switching power supply apparatus. Like FIG. 1, both ends of a capacitor of a CR current detection circuit connected in parallel with a coil inductor are sensed. It is amplified by an amplifier to constitute a current feedback type power supply device. At that time, the reset function of the amplifier already described in FIG. 3 is used, and the CR current detection circuit is connected to the PWM drive end side of the coil as described in FIG. The diffusion side of the capacitor is connected to the input terminal Vin. The capacitor means is a MOS capacitor. According to the present embodiment, the current sense resistor required for the conventional current feedback type power supply device can be eliminated, so that the conversion efficiency is increased and the CR current detection circuit can be built in the integrated circuit, so that the external cost can be reduced.

  In the step-up / step-down switching power supply as described above, the loss due to the switch operation of these output MOSFETs can be reduced by the above-described switch control of the output MOSFETs in each mode. For example, a lithium ion battery changes greatly like 4.6-1.8V. By using such a battery voltage as the input voltage Vin of the step-up / step-down switching power supply device according to the present invention, an operating voltage of about 3 V is formed, thereby extending the battery life of an electronic device driven by such a lithium ion battery. Can do.

  Although the invention made by the inventor has been specifically described based on the above embodiment, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the scope of the invention. For example, the specific voltage setting in the mode detection circuit for switching the three modes may be any one that sets the three voltage ranges as described above around the target output voltage. The PWM control circuit that forms the PWM pulse may be formed by using the output voltage feedback signal and the output current feedback signal as described above.

  The present invention can be widely used as a DC-DC converter including a step-up / step-down switching power supply device required for a lithium ion battery.

It is a circuit diagram which shows one Example of the step-up / step-down switching power supply device based on this invention. It is an operation | movement waveform diagram in the buck-boost switching power supply device of FIG. It is a waveform diagram for explaining the operation of the sense amplifier according to the present invention. FIG. 2 is a circuit diagram illustrating an embodiment of a sense amplifier with reset in FIG. 1. It is a wave form diagram for demonstrating the expansion boosting mode of the step-up / step-down switching power supply device based on this invention. It is a wave form diagram for demonstrating the operation | movement at the time of mode switching (step-down-> expansion step-up) of the step-up / step-down switching power supply device according to the present invention. FIG. 6 is a characteristic diagram for explaining switching between a boost mode and an extended boost mode in the step-up / step-down switching power supply device according to the present invention. It is one typical circuit example examined when the CR current detection circuit used in the present invention is built in a semiconductor integrated circuit. It is another typical circuit example examined when the CR current detection circuit used in the present invention is built in a semiconductor integrated circuit. It is another typical circuit example examined when the CR current detection circuit used in the present invention is built in a semiconductor integrated circuit. It is another typical circuit example examined when the CR current detection circuit used in the present invention is built in a semiconductor integrated circuit. It is a circuit diagram of one Example of CR current detection circuit used for the step-up / step-down switching power supply device according to the present invention. It is a circuit diagram of another Example of CR current detection circuit used for the step-up / step-down switching power supply device according to the present invention. It is a circuit diagram of other one Example of the step-up / step-down switching power supply device based on this invention. It is a circuit diagram of further another embodiment of the step-up / step-down switching power supply device according to the present invention. It is a circuit diagram of further another embodiment of the step-up / step-down switching power supply device according to the present invention. It is element structure sectional drawing which shows one Example of the capacity | capacitance used for CR current detection circuit of the switching power supply concerning this invention. 1 is a circuit diagram of an embodiment of a step-down switching power supply device according to the present invention. 1 is a circuit diagram of an embodiment of a step-up switching power supply device according to the present invention. FIG.

Explanation of symbols

  M1-M7, M21-M31, M41-M43 ... MOSFET, Q1-Q3 ... transistor, L ... inductor (coil), R1-R3, Rf1, Rf2, Rc ... resistor, Cf, Cf1, Cf2, CL, Cc1, Cc2 ... Capacitance, VC1 to VC3 ... Voltage comparison circuit, SA ... Sense amplifier, EA ... Error amplifier, PWMCP ... PWM comparator, DV1 to DV4 ... Drive circuit, G1, G2 ... Gate circuit, MPX ... Multiplexer, I1-I3 ... Current source , LPF: low pass filter, G: gate, SD: source, drain.

Claims (13)

A first output circuit having a first output MOSFET and a second output MOSFET that perform a complementary switching operation in response to a first input signal;
A second output circuit having a third output MOSFET and a fourth output MOSFET that perform a complementary switching operation in response to the second input signal;
Inductance means provided between a first output terminal of the first output circuit and a second output terminal of the second output circuit;
A control circuit for forming the first input signal and the second input signal;
An input terminal to which an input voltage is supplied;
An output terminal from which the output voltage is output,
A smoothing capacitor means is connected between the output voltage and the ground potential,
The first output MOSFET transmits the input voltage to the first output terminal,
The second output MOSFET transmits the ground potential of the circuit to the first output terminal,
The third output MOSFET transmits the voltage of the second output terminal to the output voltage terminal,
The fourth output MOSFET transmits the ground potential of the circuit to the second output terminal,
The control circuit is
When the input voltage is in a first voltage range that is larger than the desired output voltage, the first input signal having a PWM pulse so that the output voltage becomes the desired voltage is formed, and the third MOSFET is turned on. Operating in a first mode for forming the second input signal to turn off the fourth MOSFET;
When the input voltage is smaller than the first voltage range and is in a second voltage range that is substantially the same as the desired output voltage, the first input signal that is a fixed duty PWM pulse is formed, and the output voltage is Operate in a second mode that forms the second input signal in a PWM pulse that provides a desired voltage;
When the input voltage is smaller than the second voltage range and in a third voltage range smaller than the desired output voltage, the first input signal for turning the first MOSFET on and the second MOSFET off is formed. And operating in a third mode for forming the second input signal having a PWM pulse so that the output voltage becomes a desired voltage.
The PWM pulse is formed by comparing the output voltage of an error amplifier that receives the divided voltage of the output voltage and a reference voltage with a current feedback signal formed by a current detection signal flowing through the inductance means by a comparator. Buck-boost switching power supply. In claim 1,
The control circuit is
When operating in the second mode, when the duty required for the current supply operation to the inductance for obtaining the desired output voltage becomes larger than the duty of the PWM pulse having the fixed duty, this duty is supported. A switching power supply having a logic function for increasing the duty of the first input signal. In claim 1,
A mode switching detection circuit for setting the first voltage range, the second voltage range, and the third voltage range;
The mode switching detection circuit is
A first voltage comparison circuit that forms a differential voltage between the input voltage and the output voltage;
A second voltage comparison circuit receiving a difference voltage formed by the first voltage comparison circuit and a first reference voltage, and forming a first detection signal in which the difference voltage is greater than the first reference voltage;
A third voltage comparison circuit configured to receive a difference voltage formed by the first voltage comparison circuit and a second reference voltage and to form a second detection signal in which the difference voltage is greater than the second reference voltage; ,
The control circuit is
A switching power supply apparatus that receives the first detection signal and the second detection signal and selectively forms the first input signal and the second input signal corresponding to the first to third modes. In claim 1,
The control circuit is
A voltage dividing circuit for dividing the output voltage;
An error amplifier that receives the divided voltage and a predetermined reference voltage;
A CR circuit for detecting a current provided in parallel with the inductance means;
A sense amplifier for sensing the current detection signal of the CR circuit;
A switching power supply device having a PWM control circuit that forms the PWM pulse based on an output signal of the error amplifier and an output signal of the sense amplifier. In claim 4,
The control circuit further includes an offset adjustment circuit for adding an offset voltage to the output side of the sense amplifier,
A switching power supply apparatus that suppresses an output voltage fluctuation at the time of switching from the first mode to the second mode by the operation of the offset adjustment. In claim 4,
The CR circuit is
First and second resistance means having one end connected to both ends of the inductance and set to an equivalent resistance value;
A capacitor having both electrodes connected to the other ends of the first and second resistance means,
A switching power supply apparatus that uses a voltage difference between both electrodes of the capacitor as a detection value of the current detection signal. In claim 4,
The sense amplifier is a switching power supply apparatus that is reset except for a period during which a current is supplied to the inductance. In claim 6,
First and second switch MOSFETs are provided at both ends of the first and second resistance means, respectively.
In the first mode, the first and second switch MOSFETs are turned on,
A switching power supply apparatus that turns off the first and second switch MOSFETs in the second and third modes. In claim 6,
The capacitor is
Composed of first and second MOS capacitors connected in parallel,
The gate side of the first MO capacitor is connected to the diffusion layer side of the second MOS capacitor,
The switching power supply apparatus having the CR current detection circuit connected to the gate side of the second MO capacitor and the diffusion layer side of the first MOS capacitor. In claim 6,
The capacitor is
Consists of a first MOS capacitor,
The gate side of the first MOS capacitor is connected to the other end side of the first resistance means corresponding to the first output terminal side;
The diffusion layer side of the first MOS capacitor is connected to the other end side of the second resistance means corresponding to the second output terminal side;
A first switch MOSFET is provided at both ends of the first resistance means,
A second switch MOSFET is provided at both ends of the second resistance means,
Furthermore, a second MOS capacitor is connected to a connection node between the first MOS capacitor and the first resistance means,
A third switch MOSFET is provided on the diffusion layer side of the second MOS capacitor and the ground potential of the circuit;
In the first mode, the first and third switch MOSFETs are turned off, the second switch MOSFET is turned on,
A switching power supply apparatus in which the first and third switch MOSFETs are turned on and the second switch MOSFET is turned off in the second and third modes.
Source equipment. In claim 4,
A gain switching circuit for the sense amplifier;
Switching power supply apparatus that suppresses output voltage fluctuation at the time of switching from the second mode to the third mode by the gain switching operation One of the inductance means is connected to the first output circuit having the first output MOSFET and the second output MOSFET that perform the switching operation complementarily in response to the input signal, and the output terminal of the first output circuit,
A smoothing capacitor means connected between the other of the inductance means and the ground voltage, and a control circuit for forming the first input signal;
An input terminal to which an input voltage is supplied;
An output terminal from which the output voltage is output,
The first output MOSFET transmits the input voltage to an output terminal of the first output circuit,
The second output MOSFET transmits the ground potential of the circuit to the output terminal of the first output circuit, and the control circuit
A voltage dividing circuit for dividing the output voltage;
An error amplifier that receives the divided voltage and a predetermined reference voltage;
A CR circuit for detecting a current provided in parallel with the inductance means;
A sense amplifier for sensing the current detection signal of the CR circuit;
A PWM control circuit that forms the PWM pulse based on the output signal of the error amplifier and the output signal of the sense amplifier;
Forming a first input signal having a PWM pulse so that the output voltage becomes a desired voltage;
The CR circuit is
Resistance means is connected to the output terminal of the first output circuit,
The other side of the resistance means is connected to the gate side of the MOS capacitor,
The diffusion side of the MOS capacitor is connected to the output terminal,
With the voltage difference between the two electrodes of the MOS capacitor as the detection value of the current detection signal,
The sense amplifier is a switching power supply apparatus that is reset except for a period during which a current is supplied to the inductance. One of the inductance means is connected to the first output circuit having the first output MOSFET and the second output MOSFET that perform the switching operation complementarily in response to the input signal, and the output terminal of the first output circuit,
The other of the inductance means is an input terminal to which an input voltage is supplied,
A smoothing capacitor means is connected between the drain terminal of the second output MOSFET and the ground voltage,
A connection node between the capacitance means and the drain terminal of the second output MOSFET is an output terminal from which an output voltage is output,
A control circuit for forming the first input signal;
The first output MOSFET transmits a circuit ground potential to the output terminal of the first output circuit, and the second output MOSFET transmits the output voltage to the output terminal of the first output circuit,
The control circuit is
A voltage dividing circuit for dividing the output voltage;
An error amplifier that receives the divided voltage and a predetermined reference voltage;
A CR circuit for detecting a current provided in parallel with the inductance means;
A sense amplifier for sensing the current detection signal of the CR circuit;
A PWM control circuit that forms the PWM pulse based on the output signal of the error amplifier and the output signal of the sense amplifier;
Forming a first input signal having a PWM pulse so that the output voltage becomes a desired voltage;
The CR circuit is
Resistance means is connected to the output terminal of the first output circuit,
The other side of the resistance means is connected to the gate side of the MOS capacitor,
The diffusion side of the MOS capacitor is connected to the input terminal,
With the voltage difference between the two electrodes of the MOS capacitor as the detection value of the current detection signal,
The sense amplifier is a switching power supply apparatus that is reset except for a period during which a current is supplied to the inductance.

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