JP2009105259A - Printed circuit board - Google Patents

Printed circuit board Download PDF

Info

Publication number
JP2009105259A
JP2009105259A JP2007276293A JP2007276293A JP2009105259A JP 2009105259 A JP2009105259 A JP 2009105259A JP 2007276293 A JP2007276293 A JP 2007276293A JP 2007276293 A JP2007276293 A JP 2007276293A JP 2009105259 A JP2009105259 A JP 2009105259A
Authority
JP
Japan
Prior art keywords
hole
circuit board
printed circuit
land
thermal land
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007276293A
Other languages
Japanese (ja)
Other versions
JP4919932B2 (en
Inventor
Tomomi Nakamura
友美 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP2007276293A priority Critical patent/JP4919932B2/en
Publication of JP2009105259A publication Critical patent/JP2009105259A/en
Application granted granted Critical
Publication of JP4919932B2 publication Critical patent/JP4919932B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solder-mounted printed circuit board capable of improving solder wicking performance by suppressing heat dissipation to a solid pattern. <P>SOLUTION: In the printed circuit board in which a through-hole 2 is formed on the solid pattern 1, and a land 3 is formed at the periphery of the through-hole, a thermal land 4 is formed at a part of the outer circumference of the land 3, at least one through-hole 5 is formed at the outer circumference of the thermal land 4, and resist 6 is applied to the outer circumference of the thermal land including the peripheral edge of the through-hole. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、ベタパターン上にスルーホールを形成し、このスルーホール周縁にランドを設けたプリント基板に関するものである。   The present invention relates to a printed circuit board in which a through hole is formed on a solid pattern and a land is provided on the periphery of the through hole.

従来におけるベタパターン上にスルーホールを形成し、このスルーホール周縁にランドを設けたプリント基板として、図３に示すように、単にスルーホール２の外周にサーマルランド４を設けてあるもの（特許文献１参照）や、図４に示すように、スルーホール２の外側にメッキを施したバイヤホール７を一つ以上形成してあるもの（特許文献２参照）、また、図５に示すように、スルーホール２の外周の一部にサーマルランド４を設け、このサーマルランド４の外側に、且つ、スルーホール２とサーマルランド４のベタ部分との直線上に、銅抜きパッド６を形成してあるもの（特許文献３参照）が発明されている。
特開２００２− ９４４９公報 特開２００３− ６９２０２公報 特開２００５− １２０８８公報 As a conventional printed circuit board in which a through hole is formed on a solid pattern and lands are provided on the periphery of the through hole, as shown in FIG. 3, a thermal land 4 is simply provided on the outer periphery of the through hole 2 (Patent Document) 1), as shown in FIG. 4, one or more via holes 7 plated on the outside of the through hole 2 (see Patent Document 2), and as shown in FIG. A thermal land 4 is provided on a part of the outer periphery of the through hole 2, and a copper pad 6 is formed outside the thermal land 4 and on a straight line between the through hole 2 and the solid portion of the thermal land 4. A thing (refer patent document 3) is invented.
Japanese Patent Laid-Open No. 2002-9449 JP 2003-69202 A JP-A-2005-12088

しかし、図３に示す単にスルーホール２の外周にサーマルランド４を設けてあるものや、図４に示す単にスルーホール２の外側にメッキを施したバイヤホール７を形成してあるものでは、スルーホール２にリード部品をはんだ付け実装する際、はんだ上がり性に問題があり、部品実装後において部品リードのはんだ剥離などによる動作不安定要因を招くおそれがあるという問題がある。   However, in the case where the thermal land 4 is simply provided on the outer periphery of the through hole 2 shown in FIG. 3 or the plated via hole 7 is formed outside the through hole 2 shown in FIG. When soldering and mounting a lead component in the hole 2, there is a problem in solderability, and there is a possibility that an operation instability factor may be caused by solder peeling of the component lead after mounting the component.

また、図４に示すスルーホール２の外側にメッキを施したバイヤホール７を形成してあるものは、フローはんだ付けにおいてはメッキの施されたバイアホール７に、溶融はんだが入り込み、そのメッキを通して、基板上面まで熱を効率的に伝えることが出来るが、鏝を用いたはんだ付けでは、逆にそのメッキを通して熱が逃げてしまい、言い換えれば、メッキが多くある分、そのメッキも暖めてやる必要があり、効率的に熱を伝えることが出来ない。   Further, in the case where the via hole 7 plated is formed on the outside of the through hole 2 shown in FIG. 4, in flow soldering, molten solder enters the plated via hole 7 and passes through the plating. Heat can be transferred efficiently to the top surface of the board, but soldering with a spear conversely causes heat to escape through the plating, in other words, the plating must be warmed up as much as there is more plating. There is, and can not transfer heat efficiently.

また、図５に示すスルーホール２の外周の一部にサーマルランド４を設け、このサーマルランド４の外側に、且つ、スルーホール２とサーマルランド４のベタ部分との直線上に、銅抜きパッド８を形成してあるものの場合においては、はんだ上がり性は改善されるが、熱が熱伝導性のよい銅へ移動するため、パターンの状態によっては、はんだ付けによる熱が利用できず、スルーホール周辺がサーマルランド周辺に比べて温度が低くなるなど、プリント基板全体の温度の均一性を図ることができない問題がある。特に現在ははんだの鉛フリー化したことにより、はんだ上がり性の問題がより顕著である。   Further, a thermal land 4 is provided on a part of the outer periphery of the through hole 2 shown in FIG. 5, and a copper removal pad is provided outside the thermal land 4 and on a straight line between the through hole 2 and the solid portion of the thermal land 4. However, depending on the pattern state, the heat generated by soldering cannot be used depending on the pattern state. There is a problem that the temperature of the entire printed circuit board cannot be made uniform, for example, the temperature at the periphery is lower than that around the thermal land. In particular, the problem of solderability is more noticeable now that the solder is lead-free.

本発明は、上記問題に鑑みてなされたものであり、ベタパターンへの放熱を抑制してはんだ上がり性を向上させるはんだ実装したプリント基板を提供する。    The present invention has been made in view of the above problems, and provides a solder-mounted printed circuit board that suppresses heat radiation to a solid pattern and improves solderability.

上記課題を解決するために、本発明に係るプリント基板は、ベタパターン上にスルーホールを形成し、このスルーホール周縁にランドを設けたプリント基板において、前記ランドの外周の一部にサーマルランドを設け、このサーマルランドの外周に少なくとも一個の貫通孔を形成し、前記貫通孔の周縁を含む前記サーマルランドの外周にレジストを形成してあることを特徴とする。
前記レジストはめっきレジストであることを特徴とする。 In order to solve the above-described problems, a printed circuit board according to the present invention is a printed circuit board in which a through hole is formed on a solid pattern and a land is provided on the periphery of the through hole. And at least one through hole is formed on the outer periphery of the thermal land, and a resist is formed on the outer periphery of the thermal land including the periphery of the through hole.
The resist is a plating resist.

本発明によれば、ランドの外周の一部にサーマルランドを設け、このサーマルランドの外周に少なくとも一個の貫通孔を設け、この貫通孔の周縁を含む前記サーマルランドの外周にレジストを形成してあることにより、サーマルランドの外側からも熱が伝わり、はんだ上がり性を向上させることができる効果がある。   According to the present invention, a thermal land is provided on a part of the outer periphery of the land, at least one through hole is provided on the outer periphery of the thermal land, and a resist is formed on the outer periphery of the thermal land including the periphery of the through hole. As a result, heat is transmitted from the outside of the thermal land, and there is an effect that the solderability can be improved.

また、本発明によれば、貫通孔周縁にレジスト層を設けると貫通孔の中にはんだが入り込まなくなるので、はんだに熱を奪われることなく、効率的に熱を伝えることができる効果がある。   In addition, according to the present invention, when a resist layer is provided on the periphery of the through hole, the solder does not enter the through hole, so that there is an effect that heat can be efficiently transferred without taking heat away from the solder.

以下、添付図面を用いて本発明プリント基板に係る実施例を説明する。図１は本発明に係るプリント基板の正面図の一実施例であり、図２はプリント基板にデバイス１０（本実施例ではコンデンサ）を搭載した状態の図１図示Ａ−Ａ断面図である。   Hereinafter, embodiments of the printed circuit board according to the present invention will be described with reference to the accompanying drawings. FIG. 1 is an example of a front view of a printed circuit board according to the present invention, and FIG. 2 is a cross-sectional view taken along line AA in FIG. 1 in which a device 10 (capacitor in this embodiment) is mounted on the printed circuit board.

本実施例に係るプリント基板は、ベタパターン１上にスルーホール２を形成してあり、このスルーホール２周縁にランド３を設けてある。ランド３の外周の一部にサーマルランド４を設けてある。本実施例においては、スルーホール２から四方等間隔にサーマルランド４のベタ部分を設けてあり、この結果設けられるサーマルランド４とベタパターン１との継ぎ目が四ヶ所設けられる。   In the printed circuit board according to this embodiment, a through hole 2 is formed on a solid pattern 1, and a land 3 is provided on the periphery of the through hole 2. A thermal land 4 is provided on a part of the outer periphery of the land 3. In the present embodiment, solid portions of the thermal lands 4 are provided at equal intervals from the through hole 2 in four directions, and four joints between the thermal lands 4 and the solid pattern 1 provided as a result are provided.

本実施例では、サーマルランド４の外周に１２個の貫通孔５を等間隔に形成してある。なお、本発明においては、貫通孔５は少なくとも一個形成してあればよく、貫通孔５の個数は限定されない。貫通孔５の周縁を含むサーマルランド４の外周にレジスト６を形成してある。なお、このレジスト６はめっきレジストが最適であるが、はんだ付けする際にはんだが貫通孔５への侵入を塞ぐものであれば、どのようなパターンであってもよい。また、貫通孔５に十分にレジスト６を形成し、貫通孔５を塞いであることが理想ではあるが、実際においては、貫通孔５を完全にレジスト６で塞ぐことは不可能であり、隙間が発生してもはんだ（図示しない）は侵入するような影響は受けない。   In this embodiment, twelve through holes 5 are formed at equal intervals on the outer periphery of the thermal land 4. In the present invention, it is sufficient that at least one through hole 5 is formed, and the number of through holes 5 is not limited. A resist 6 is formed on the outer periphery of the thermal land 4 including the periphery of the through hole 5. The resist 6 is optimally a plating resist, but any pattern may be used as long as the solder blocks the penetration into the through hole 5 during soldering. In addition, it is ideal that the resist 6 is sufficiently formed in the through-hole 5 and the through-hole 5 is closed. However, in practice, it is impossible to completely close the through-hole 5 with the resist 6. Even if this occurs, solder (not shown) is not affected.

本実施例に係るプリント基板にコンデンサ１０を搭載する場合の作用について説明する。コンデンサ１０の部品リード１１をスルーホール２内に配設する。部品リード１１を配設したスルーホール２内にはんだ（図示しない）を塗布する。   The operation when the capacitor 10 is mounted on the printed circuit board according to this embodiment will be described. A component lead 11 of the capacitor 10 is disposed in the through hole 2. Solder (not shown) is applied in the through hole 2 in which the component lead 11 is disposed.

はんだをスルーホール２内に塗布する際、先ず予熱を行う。鏝を用いたはんだ付けの場合は貫通穴があることで、熱が周囲へ逃げず、はんだ付け部に効率的に篭り、はんだ付けの際にはんだの回りがよくなる。フローのはんだ付けの際は、予熱後の溶融したはんだ槽にはんだ付け部が接触した際に、はんだ付け部だけではなく、貫通穴へも噴流したはんだが入り込み、その熱がプリント基板全体、特に暖め辛いプリント基板表面に伝達される。これによりスルーホール２の周辺とサーマルランド４の周辺との温度がほぼ均一になる。これにより、プリント基板全体の温度の均一性を図ることができる。   When applying the solder into the through hole 2, first, preheating is performed. In the case of soldering using a scissors, since there is a through-hole, heat does not escape to the surroundings, but the heat is efficiently applied to the soldering portion, and the circumference of the solder is improved during soldering. When soldering the flow, when the soldering part comes into contact with the molten solder bath after preheating, not only the soldering part but also the solder jetted into the through-hole enters, and the heat is transferred to the entire printed circuit board, especially It is transmitted to the warm and hard printed circuit board surface. As a result, the temperatures around the through hole 2 and the thermal land 4 become substantially uniform. Thereby, the uniformity of the temperature of the whole printed circuit board can be aimed at.

はんだの熱により、スルーホール２の周辺とサーマルランド４の周辺との温度がほぼ均一になる一方、サーマルランド４とベタパターン１との継ぎ目に貫通孔５を形成し、サーマルランド４の外周に貫通孔５を形成し、貫通孔５の周縁を含むサーマルランド４の外周にレジストを形成したことにより、サーマルランドの外側からも熱が伝わる。その結果、はんだ上がり性を向上させることができる。本実施例では、はんだの成分を限定していないが、鉛フリーのはんだにおいて、この効果は特に顕著に表れる。   The temperature of the periphery of the through hole 2 and the periphery of the thermal land 4 becomes substantially uniform due to the heat of the solder, while a through hole 5 is formed at the joint between the thermal land 4 and the solid pattern 1, and the outer periphery of the thermal land 4 is formed. By forming the through-hole 5 and forming a resist on the outer periphery of the thermal land 4 including the periphery of the through-hole 5, heat is transmitted from the outside of the thermal land. As a result, solderability can be improved. In the present embodiment, the components of the solder are not limited, but this effect is particularly noticeable in lead-free solder.

なお、本実施例においては、両面プリント基板を用いたが、多層プリント基板でも同様に実施することができる。また、デバイスもコンデンサ１０に限定されず、他のデバイスも同様に実施することができる。   In this embodiment, a double-sided printed circuit board is used, but a multilayer printed circuit board can be similarly used. Further, the device is not limited to the capacitor 10, and other devices can be similarly implemented.

本発明によれば、ランドの外周の一部にサーマルランドを設け、このサーマルランドの外周に複数個の貫通孔を設け、前記貫通孔の周縁を含む前記サーマルランドの外周にレジストを形成してあることにより、サーマルランドの外側からも熱が伝わり、はんだ上がり性を向上させることができる。また、貫通孔周縁にレジスト層を設けると貫通孔の中にはんだが入り込まなくなるので、はんだに熱を奪われることなく、効率的に熱を伝えることができ、産業上利用可能である。   According to the present invention, a thermal land is provided on a part of the outer periphery of the land, a plurality of through holes are provided on the outer periphery of the thermal land, and a resist is formed on the outer periphery of the thermal land including the periphery of the through hole. As a result, heat is transmitted from the outside of the thermal land, and the solderability can be improved. Further, when a resist layer is provided on the periphery of the through-hole, the solder does not enter the through-hole, so that the heat can be efficiently transferred without being deprived of heat by the solder, which is industrially applicable.

本発明に係るプリント基板の一実施例の要部を示した平面図である。It is the top view which showed the principal part of one Example of the printed circuit board which concerns on this invention. 図１図示プリント基板にデバイスを搭載した状態の図１図示Ａ−Ａ断面図である。FIG. 2 is a cross-sectional view taken along the line AA in FIG. 従来のプリント基板の要部を示した平面図である。It is the top view which showed the principal part of the conventional printed circuit board. 同じく従来のプリント基板の要部を示した平面図である。It is the top view which showed the principal part of the conventional printed circuit board similarly. 同じく従来のプリント基板の要部を示した平面図である。It is the top view which showed the principal part of the conventional printed circuit board similarly.

符号の説明Explanation of symbols

１ ベタパターン
２ スルーホール
３ ランド
４ サーマルランド
５ 貫通孔
６ レジスト
７ バイヤホール
８ 銅抜きパッド
１０ デバイス
１１ 部品リード DESCRIPTION OF SYMBOLS 1 Solid pattern 2 Through hole 3 Land 4 Thermal land 5 Through-hole 6 Resist 7 Bayer hole 8 Copper extraction pad 10 Device 11 Component lead

Claims (2)

ベタパターン上にスルーホールを形成し、このスルーホール周縁にランドを設けたプリント基板において、前記ランドの外周の一部にサーマルランドを設け、このサーマルランドの外周に少なくとも一個の貫通孔を形成し、前記貫通孔の周縁を含む前記サーマルランドの外周にレジストを形成してあることを特徴とするプリント基板。 In a printed circuit board in which a through hole is formed on a solid pattern and a land is provided on the periphery of the through hole, a thermal land is provided on a part of the outer periphery of the land, and at least one through hole is formed on the outer periphery of the thermal land. A printed circuit board, wherein a resist is formed on the outer periphery of the thermal land including the periphery of the through hole. 前記レジストはめっきレジストであることを特徴とする請求項１記載のプリント基板。 The printed circuit board according to claim 1, wherein the resist is a plating resist.
JP2007276293A 2007-10-24 2007-10-24 Printed board Active JP4919932B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007276293A JP4919932B2 (en) 2007-10-24 2007-10-24 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007276293A JP4919932B2 (en) 2007-10-24 2007-10-24 Printed board

Publications (2)

Publication Number Publication Date
JP2009105259A true JP2009105259A (en) 2009-05-14
JP4919932B2 JP4919932B2 (en) 2012-04-18

Family

ID=40706654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007276293A Active JP4919932B2 (en) 2007-10-24 2007-10-24 Printed board

Country Status (1)

Country Link
JP (1) JP4919932B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114245612A (en) * 2021-11-30 2022-03-25 浪潮(山东)计算机科技有限公司 PCB design method for reducing copper separation of metallized hole

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0391781U (en) * 1989-12-26 1991-09-18
JPH09162516A (en) * 1995-12-04 1997-06-20 Furukawa Electric Co Ltd:The Printed wiring board
JP2000208911A (en) * 1999-01-18 2000-07-28 Nec Toyama Ltd Manufacture of mounting substrate with solder resist layer formed with bump on electrode pad
JP2001094236A (en) * 1999-09-20 2001-04-06 Matsushita Electric Ind Co Ltd Method for manufacturing of high voltage and large current circuit board
JP2006351845A (en) * 2005-06-16 2006-12-28 Nissan Motor Co Ltd Substrate for mounting electronic part, and mounting method and device
JP2007042995A (en) * 2005-08-05 2007-02-15 Panasonic Ev Energy Co Ltd Printed wiring board, and soldering method and apparatus thereof
JP2007266510A (en) * 2006-03-29 2007-10-11 Sanyo Electric Co Ltd Printed wiring board and electric apparatus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0391781U (en) * 1989-12-26 1991-09-18
JPH09162516A (en) * 1995-12-04 1997-06-20 Furukawa Electric Co Ltd:The Printed wiring board
JP2000208911A (en) * 1999-01-18 2000-07-28 Nec Toyama Ltd Manufacture of mounting substrate with solder resist layer formed with bump on electrode pad
JP2001094236A (en) * 1999-09-20 2001-04-06 Matsushita Electric Ind Co Ltd Method for manufacturing of high voltage and large current circuit board
JP2006351845A (en) * 2005-06-16 2006-12-28 Nissan Motor Co Ltd Substrate for mounting electronic part, and mounting method and device
JP2007042995A (en) * 2005-08-05 2007-02-15 Panasonic Ev Energy Co Ltd Printed wiring board, and soldering method and apparatus thereof
JP2007266510A (en) * 2006-03-29 2007-10-11 Sanyo Electric Co Ltd Printed wiring board and electric apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114245612A (en) * 2021-11-30 2022-03-25 浪潮(山东)计算机科技有限公司 PCB design method for reducing copper separation of metallized hole

Also Published As

Publication number Publication date
JP4919932B2 (en) 2012-04-18

Similar Documents

Publication Publication Date Title
JP2005093973A (en) Cooling structure of electronic element
JP5546778B2 (en) Printed circuit board and printed circuit board manufacturing method
JP5213074B2 (en) Printed wiring board and pad design method used therefor
JP4863851B2 (en) Printed board
JP4919932B2 (en) Printed board
JP2006339545A (en) Metal core circuit board
JP2010182792A (en) Electronic circuit device
JP4821710B2 (en) Printed wiring board
JP2006319145A (en) Metal core circuit board
JP2008172094A (en) Circuit board and electronic apparatus
JP2007184455A (en) Electronic circuit board
JP2009099779A (en) Printed wiring board
JP2006114678A (en) Printed board
JP2006024858A (en) Printed-wiring board and method for manufacturing the same
JP2008112771A (en) Multilayer printed circuit board
JP2007207897A (en) Printed circuit board including end surface through-hole
JP2007266510A (en) Printed wiring board and electric apparatus
JP2007088148A (en) Printed wiring board
JP2009026927A (en) Component-mounting structure for wiring substrate
JP2004014721A (en) Surface mounting electronic component and printed circuit board
JP2004228261A (en) Printed circuit board
JP2009176915A (en) Circuit board, and electronic apparatus using same
JP6488669B2 (en) substrate
KR101020726B1 (en) Assembly for printed circuit board and lug of heat sink
JP2003264363A (en) Printed wiring board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100519

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111122

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20111124

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111214

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120131

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120131

R150 Certificate of patent or registration of utility model

Ref document number: 4919932

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150210

Year of fee payment: 3