JP2009099650A - Electronic device and repairing method for electronic device - Google Patents

Electronic device and repairing method for electronic device Download PDF

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JP2009099650A
JP2009099650A JP2007267585A JP2007267585A JP2009099650A JP 2009099650 A JP2009099650 A JP 2009099650A JP 2007267585 A JP2007267585 A JP 2007267585A JP 2007267585 A JP2007267585 A JP 2007267585A JP 2009099650 A JP2009099650 A JP 2009099650A
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semiconductor device
mounting substrate
hole
adhesive
electronic device
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Yasuo Yokota
康夫 横田
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Panasonic Corp
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Panasonic Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]

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Abstract

<P>PROBLEM TO BE SOLVED: To enhance fall shock resistance of an electronic device which is used for mobile equipment required to have shock resistance and comprises a mounting substrate and a semiconductor device, and to provide the electronic device which has good repair properties. <P>SOLUTION: A side surface of the semiconductor device 2 and the mounting substrate 1 are tightly bonded and fixed together because of providing the mounting substrate 1 having a semiconductor device mounting region where the semiconductor device 2 having a plurality of projection electrodes 5, a plurality of lands 6 corresponding to the projection electrodes 5, and a through-hole 4 disposed at part of an outer periphery of the semiconductor device mounting region, and an adhesive 3 for connecting and bonding portions of a pair of mutually opposite side surfaces of the semiconductor device 2 and an inner peripheral portion of the through-hole 4. Consequently, even when a shock is applied, strain of the mounting substrate 1 is suppressed to deter the semiconductor device 2 from peeling off from the mounting substrate 1, thereby enhancing the shock resistance. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、電子機器、特に、パソコン等の耐衝撃性を要求されるモバイル機器に使用される実装基板と半導体装置で構成される電子装置に関し、特に、落下耐衝撃性を高めるとともにリペア性のよい電子装置に関する。   The present invention relates to an electronic device composed of a mounting substrate and a semiconductor device used for electronic devices, particularly mobile devices that require impact resistance such as personal computers, and in particular, it has improved drop impact resistance and has repairability. Good electronic device.

図16は、従来のボール・グリッド・アレイ(以下、「BGA」と記す)タイプの半導体装置2を実装基板61に接続した電子装置51を示す概略断面図であり、半導体装置2の一方の面には、突起電極5が形成されている。   FIG. 16 is a schematic cross-sectional view showing an electronic device 51 in which a conventional ball grid array (hereinafter referred to as “BGA”) type semiconductor device 2 is connected to a mounting substrate 61, and one surface of the semiconductor device 2. A protruding electrode 5 is formed on the substrate.

図17は、この電子装置51が落下等の衝撃力を受け実装基板61が反った状態を示す概略断面図である。このような衝撃力による実装基板61の反りは、電子装置51を、例えばノートパソコン等の携帯電子機器に組み込み、落下等させた場合、実装基板61に応力がかかることで頻発する。さらに最近の機器の小型化に伴い、機器に搭載する半導体装置2も小型化を要求されるため突起電極5が微細化する傾向にある。   FIG. 17 is a schematic cross-sectional view showing a state where the electronic device 51 is subjected to an impact force such as a drop and the mounting substrate 61 is warped. Such warpage of the mounting substrate 61 due to the impact force frequently occurs when the electronic device 51 is incorporated into a portable electronic device such as a notebook personal computer and dropped to cause stress on the mounting substrate 61. Furthermore, with recent miniaturization of equipment, the semiconductor device 2 mounted on the equipment is also required to be miniaturized, so that the protruding electrode 5 tends to be miniaturized.

こうした機器を落下させた場合、衝撃により実装基板61に撓みや振動が生じ、図17のように、突起電極5と実装基板61との間に剥離力が働き、突起電極5と実装基板61のランド(図示せず)との界面でクラックや剥離が発生する危険性が高まる。   When such a device is dropped, the mounting substrate 61 is deflected or vibrated by an impact, and a peeling force acts between the protruding electrode 5 and the mounting substrate 61 as shown in FIG. There is an increased risk of cracking and peeling at the interface with the land (not shown).

これらの対策のために、従来は、図18のように実装基板61と半導体装置2との隙間に熱硬化性樹脂のアンダーフィル62を流入して硬化させ、実装基板61と半導体装置2とを固定していた。また図19のように半導体装置2の周囲に熱硬化性樹脂の接着剤3を塗布、硬化して実装基板61に半導体装置2を接着固定していた。   For these measures, conventionally, as shown in FIG. 18, a thermosetting resin underfill 62 is caused to flow into the gap between the mounting substrate 61 and the semiconductor device 2 to cure the mounting substrate 61 and the semiconductor device 2. It was fixed. Further, as shown in FIG. 19, the thermosetting resin adhesive 3 is applied and cured around the semiconductor device 2, and the semiconductor device 2 is bonded and fixed to the mounting substrate 61.

これらの構造では半導体装置2に不具合が生じ、リペアをする場合、一旦硬化したアンダーフィル62や接着剤3を削り取ることが必要となり、多くの工数を要していた。これに対して、アンダーフィル62として有機溶剤を内包した有機系熱膨張性粒子と熱硬化性接着剤樹脂とを混合した樹脂組成物を用いる実装構造体が開示されている(例えば、特許文献1参照)。   In these structures, a problem occurs in the semiconductor device 2, and when repairing, it is necessary to scrape the once-cured underfill 62 and the adhesive 3, and many man-hours are required. On the other hand, the mounting structure using the resin composition which mixed the organic-type thermally expansible particle | grains which included the organic solvent as the underfill 62, and the thermosetting adhesive resin is disclosed (for example, patent document 1). reference).

このような構成の実装構造体の場合には、リペア時に過熱することでアンダーフィル62の有機系熱膨張性粒子内の有機溶液が沸騰気化するため、樹脂硬化物が多孔質構造に変化し、容易に半導体装置2を実装基板61から取り外すことができる。
特開2005−332970号公報
In the case of the mounting structure having such a configuration, the organic solution in the organic thermally expandable particles of the underfill 62 is boiled and vaporized by overheating at the time of repair, so that the cured resin changes to a porous structure, The semiconductor device 2 can be easily detached from the mounting substrate 61.
JP 2005-332970 A

しかしながら、特許文献1によれば、数ミクロンのマイクロカプセルからなる発泡剤を低粘度の液状接着剤中に分散させているが、マイクロカプセルの偏在や沈降により均一に接着剤中に分散させることは非常に困難である。   However, according to Patent Document 1, a foaming agent composed of several micron microcapsules is dispersed in a low-viscosity liquid adhesive. However, it is possible to uniformly disperse the microcapsules in the adhesive due to uneven distribution and sedimentation of the microcapsules. It is very difficult.

また電子装置に適用した半導体装置を実装基板から剥離する場合、接着剤中に発泡剤が分散配合されているため、剥離箇所が実装基板と突起電極との界面だけではなく、半導体装置2とアンダーフィル62の界面にも存在し、そこに発泡剤および接着剤が残渣として残る。   When a semiconductor device applied to an electronic device is peeled from a mounting substrate, since the foaming agent is dispersed and mixed in the adhesive, the peeling portion is not only the interface between the mounting substrate and the protruding electrode, but also the semiconductor device 2 and the under device. It is also present at the interface of the fill 62, where the foaming agent and adhesive remain as residues.

この場合、半導体装置2を取り外した後にアンダーフィル62の大部分が実装基板61側に残ることになり、この樹脂残渣を除去するために多くの工数を要するという課題があった。   In this case, most of the underfill 62 remains on the mounting substrate 61 side after the semiconductor device 2 is removed, and there is a problem that it takes a lot of man-hours to remove the resin residue.

本発明は上記課題を解決するためになされたもので、電子装置の落下耐衝撃性を高めるとともに、実装基板から何らかの欠陥がある半導体装置を容易に取り外すことができる電子装置とそのリペア方法を提供する。   The present invention has been made to solve the above-described problems, and provides an electronic device capable of enhancing the drop impact resistance of an electronic device and easily removing a semiconductor device having some defects from a mounting substrate, and a repair method thereof. To do.

上記課題を解決するために、本発明の電子装置は、複数の突起電極を備えた半導体装置と、半導体装置の複数の突起電極に対応する複数のランドと、複数のランドを配置したランド領域の外周の一部に配置した貫通孔とを備えた実装基板と、半導体装置における相対向する一対の側面の一部それぞれと貫通孔の内周部とを繋いで接着する接着剤とを備えたものである。   In order to solve the above problems, an electronic device of the present invention includes a semiconductor device having a plurality of protruding electrodes, a plurality of lands corresponding to the plurality of protruding electrodes of the semiconductor device, and a land region in which the plurality of lands are arranged. A mounting board provided with a through-hole disposed in a part of the outer periphery, and an adhesive for connecting and bonding a part of a pair of side surfaces facing each other and the inner peripheral part of the through-hole in the semiconductor device It is.

実装基板における接着面が、当該実装基板に穿った貫通孔の内周部という従来にはない実装基板内部の面を追加することにより、本発明の電子装置は、半導体装置の側面と実装基板とが強固に接着固定されており、落下時等、実装基板に衝撃が加わっても、実装基板の歪みが抑制されるため、実装基板からの半導体装置の剥離を抑制でき、耐衝撃性を高めることができる。なお、実装基板と接着剤との接着面は、通常、貫通孔の内周部だけでなく、実装した半導体装置に対向する実装基板における貫通孔開口部の外周部にも備えられるため、実装基板と半導体装置との接着強度をさらに高めることができる。   The electronic device according to the present invention includes a side surface of the semiconductor device, a mounting substrate, and a surface inside the mounting substrate, which is an unprecedented surface, which is an inner peripheral portion of a through hole formed in the mounting substrate. Is firmly bonded and fixed, and even when an impact is applied to the mounting board, such as when it is dropped, the mounting board is prevented from being distorted, so that the peeling of the semiconductor device from the mounting board can be suppressed, and the impact resistance is improved. Can do. Note that the mounting surface of the mounting substrate and the adhesive is usually provided not only on the inner peripheral portion of the through hole but also on the outer peripheral portion of the through hole opening in the mounting substrate facing the mounted semiconductor device. The adhesion strength between the semiconductor device and the semiconductor device can be further increased.

また、上述の電子装置における接着剤による半導体装置の接着面は、当該半導体装置における相隣接する側面が交わるコーナー部の二面である構成を採用すると、実装基板から最も剥離しやすい半導体装置のコーナー部の側面を実装基板に接着固定することにより、実装基板からの半導体装置の剥離の抑制効果をより確実にできる。   In addition, when the adhesive surface of the semiconductor device with the adhesive in the electronic device described above is configured to be two surfaces of a corner portion where adjacent side surfaces of the semiconductor device intersect, the corner of the semiconductor device that is most easily peeled off from the mounting substrate. By bonding and fixing the side surface of the part to the mounting substrate, the effect of suppressing the peeling of the semiconductor device from the mounting substrate can be more reliably achieved.

また、上記いずれかの構成を備える電子装置に実装した半導体装置に何らかの欠陥が発生した場合、実装基板の貫通孔より小さい径のドリルで貫通孔の内部の接着剤を掘削して除去することができるので実装基板と接着剤とを分断でき、容易に半導体装置を取り外すことができる。   Further, when a defect occurs in a semiconductor device mounted on an electronic device having any one of the above configurations, the adhesive inside the through hole may be excavated and removed with a drill having a smaller diameter than the through hole of the mounting substrate. Therefore, the mounting substrate and the adhesive can be separated, and the semiconductor device can be easily removed.

また、上記構成において、実装基板上面であって貫通孔の開口部周囲に貫通孔の内周部よりも相対的に接着剤の接着強度が弱い弱接着性の層を形成してもよい。   In the above configuration, a weak adhesive layer having a lower adhesive strength than that of the inner peripheral portion of the through hole may be formed on the upper surface of the mounting substrate and around the opening portion of the through hole.

このような構成とすることにより、上記半導体装置に何らかの欠陥を発見した場合、実装基板の貫通孔より小さい径のドリルで貫通孔の内部の接着剤を掘削して除去することで実装基板と接着剤とを分断できるとともに、貫通孔の周囲に弱接着性の層が形成されているため接着樹脂を実装基板表面から容易に除去することができ、半導体装置を取り外した後に実装基板の上面に樹脂残渣が生じることなく、清浄な表面が得られる。   With this configuration, if any defect is found in the semiconductor device, the adhesive inside the through hole is removed by drilling and removing the adhesive inside the through hole with a drill having a smaller diameter than the through hole of the mounting board. The adhesive resin can be easily removed from the surface of the mounting substrate because a weakly adhesive layer is formed around the through hole, and the resin is removed from the surface of the mounting substrate after removing the semiconductor device. A clean surface is obtained without any residue.

また、本発明の電子装置のリペア方法は、貫通孔径以下の外径のドリルで、貫通孔内部の接着剤を掘削する切削工程を備えたものである。   Moreover, the repair method of the electronic device of this invention is equipped with the cutting process which excavates the adhesive agent inside a through-hole with the drill of the outer diameter below a through-hole diameter.

このような方法とすることで、実装基板の貫通孔に損傷を与えることがなく、且つ接着剤と実装基板面との界面が清浄に維持されながら両者が分断されることで新品と概同様なリペア実装基板が得られる。   By adopting such a method, there is no damage to the through hole of the mounting substrate, and the interface between the adhesive and the mounting substrate surface is maintained clean, so that both of them are separated so that it is almost the same as a new product. A repair mounting board is obtained.

また、上記方法に用いるドリルに、実装基板の厚み以下を規定するストッパーを設けて切削工程を実行するリペア方法としてもよい。このような方法とすることで、掘削する深さを制御することができるのでリペア作業時の実装基板へのダメージを抑制することができる。   Moreover, it is good also as a repair method which provides the stopper which prescribes | regulates the thickness of the mounting substrate or less to the drill used for the said method, and performs a cutting process. By setting it as such a method, since the depth which excavates can be controlled, the damage to the mounting board | substrate at the time of repair work can be suppressed.

また、本発明の実装基板は、複数の突起電極を備えた半導体装置を実装する基板を有する実装基板であって、前記複数の突起基板に対応する複数のランドと、前記複数のランドを配置したランド領域の外周の一部に、前記基板を貫通する貫通孔とを備える構成である。この実装基板の構成により、上述のリペア性に優れた実装基板を実現することができる。   The mounting substrate of the present invention is a mounting substrate having a substrate for mounting a semiconductor device having a plurality of protruding electrodes, and a plurality of lands corresponding to the plurality of protruding substrates and the plurality of lands are arranged. In this configuration, a part of the outer periphery of the land region includes a through hole penetrating the substrate. With the configuration of the mounting substrate, it is possible to realize a mounting substrate having excellent repair properties as described above.

本発明の電子装置および電子装置のリペア方法によれば、機器使用時には、貫通孔と半導体側面が接着剤で固着されているため、接着面積の増加と接着剤のアンカー効果とが相俟って、電子装置が衝撃を受けた際に、剥離しやすい半導体装置の端部に備える突起電極とランドとの接合部におけるはんだ剥離を抑制することが可能となる。   According to the electronic device and the electronic device repair method of the present invention, when the device is used, since the through hole and the semiconductor side surface are fixed with an adhesive, the increase in the adhesive area and the anchor effect of the adhesive are combined. When the electronic device receives an impact, it is possible to suppress the solder peeling at the joint portion between the protruding electrode and the land provided at the end portion of the semiconductor device that is easily peeled off.

一方で、リペア時には、ドリルで貫通孔内部の熱硬化性接着剤を掘削、除去後、電子装置を加熱して半導体装置の突起電極と実装基板のランドとを接続するはんだを溶融し、半導体装置を実装基板から取り外すことができる。本構成とすることで、従来のように、ナイフで接着材を削り取るのに比べ、大幅な工程の短縮を図れる。   On the other hand, at the time of repair, after drilling and removing the thermosetting adhesive inside the through-hole with a drill, the electronic device is heated to melt the solder that connects the protruding electrode of the semiconductor device and the land of the mounting substrate. Can be removed from the mounting substrate. By adopting this configuration, the process can be greatly shortened as compared with the conventional case where the adhesive is scraped off with a knife.

以下、本発明の実施の形態について、図面を参照しながら説明する。なお、これらの図面におけるそれぞれの厚みや長さ等は図面の作成上から実際の形状とは異なる。また、半導体装置上の突起電極の個数も実際とは異なり、図示しやすい個数としている。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, each thickness, length, etc. in these drawings differ from an actual shape on the drawing preparation. Further, unlike the actual case, the number of protruding electrodes on the semiconductor device is set to be easy to show.

(実施の形態1)
図1および図2は、本発明の実装基板における平面図と1A−1Aの破断線での断面矢視図である。同図に示すように、実装する半導体装置(図示せず)が備える複数の突起電極に対応する複数のランド6を配置したランド領域71を備え、このランド領域71の外周に、実装基板1を貫通する貫通孔4を備える。この貫通孔4の内周部と不図示の半導体装置の側面とを、後述するように接着剤で接着することにより、実装基板1に実装した半導体装置は強固に接続することができる。なお、図2には後述するようにメッキ層7を備えているが、メッキ層7は必ずしも必要ではない。
(Embodiment 1)
FIG. 1 and FIG. 2 are a plan view of the mounting substrate of the present invention and a cross-sectional view taken along the broken line 1A-1A. As shown in the figure, a land region 71 in which a plurality of lands 6 corresponding to a plurality of projecting electrodes provided in a semiconductor device (not shown) to be mounted is provided, and the mounting substrate 1 is disposed on the outer periphery of the land region 71. A through hole 4 is provided. The semiconductor device mounted on the mounting substrate 1 can be firmly connected by adhering the inner periphery of the through hole 4 and the side surface of the semiconductor device (not shown) with an adhesive as will be described later. In addition, although FIG. 2 includes the plating layer 7 as described later, the plating layer 7 is not always necessary.

図3および図4は、この実装基板1を用いた実施の形態1にかかる電子装置10の構造を示す図で、図3は平面図、図4は図3の1A−1A断面図である。なお、図3では実装基板1の構造をわかりやすくするために半導体装置2および接着剤3の一部を除去した状態を示している。   3 and 4 are diagrams showing the structure of the electronic device 10 according to the first embodiment using the mounting substrate 1, FIG. 3 is a plan view, and FIG. 4 is a cross-sectional view taken along the line 1A-1A in FIG. FIG. 3 shows a state in which a part of the semiconductor device 2 and the adhesive 3 are removed in order to make the structure of the mounting substrate 1 easy to understand.

本実施の形態の電子装置10は、半導体装置2と、半導体装置2の搭載領域(以下、「半導体装置搭載領域」と呼ぶ)の外周の一部、即ち、図3に示す構成においては、半導体装置2の相対向する短辺70の中央部に対応する位置に配置した貫通孔4を有する実装基板1と、半導体装置2の短辺70を含む側面と、半導体装置2に対向する半導体装置搭載領域の貫通孔4開口部の外周部に位置する実装基板1上面と貫通孔4の内部を繋いで接着する接着剤3とを備えている。さらに、本実施の形態の実装基板1では、貫通孔4の内壁にメッキ層7が形成されている。   The electronic device 10 according to the present embodiment includes a semiconductor device 2 and a part of the outer periphery of the mounting region of the semiconductor device 2 (hereinafter referred to as “semiconductor device mounting region”), that is, in the configuration shown in FIG. A mounting substrate 1 having a through-hole 4 disposed at a position corresponding to the center of opposing short sides 70 of the device 2, a side surface including the short sides 70 of the semiconductor device 2, and a semiconductor device mounting facing the semiconductor device 2. There is provided an adhesive 3 for bonding the upper surface of the mounting substrate 1 located at the outer peripheral portion of the opening portion of the through hole 4 in the region and the inside of the through hole 4. Furthermore, in the mounting substrate 1 of the present embodiment, the plating layer 7 is formed on the inner wall of the through hole 4.

なお、半導体装置搭載領域の外周に配置される貫通孔4の位置は、半導体装置の外周直下ではなく、半導体装置の側面と、この半導体装置の側面に塗布される接着剤との位置関係に基づき、貫通孔4の径により決定される寸法分だけ半導体装置の側面より外方に離隔している。   Note that the positions of the through holes 4 arranged on the outer periphery of the semiconductor device mounting region are not directly below the outer periphery of the semiconductor device, but based on the positional relationship between the side surface of the semiconductor device and the adhesive applied to the side surface of the semiconductor device. The distance from the side surface of the semiconductor device is spaced outward by a dimension determined by the diameter of the through hole 4.

半導体装置2は、BGAタイプの半導体装置であり、一方の面上に格子状に配列した複数の突起電極5を有している。本実施の形態の半導体装置2は、インターポーザーとして、例えば、樹脂基板、セラミック基板またはフレキシブル基板を用いてもよく、CSP(Chip Scale Package)と呼ばれる半導体装置を用いてもよく、半導体素子の電極に直接はんだバンプを形成したフリップチップ型の半導体素子でも構わない。   The semiconductor device 2 is a BGA type semiconductor device, and has a plurality of protruding electrodes 5 arranged in a grid pattern on one surface. In the semiconductor device 2 of the present embodiment, for example, a resin substrate, a ceramic substrate, or a flexible substrate may be used as an interposer, a semiconductor device called CSP (Chip Scale Package) may be used, and an electrode of a semiconductor element Alternatively, a flip chip type semiconductor element in which solder bumps are directly formed may be used.

突起電極5は、はんだボールを搭載するボールセット法で形成しても、また、はんだペーストを印刷方式で供給し、リフローを行って形成しても、さらにメッキ法で形成してもよい。   The protruding electrode 5 may be formed by a ball set method in which solder balls are mounted, or may be formed by supplying a solder paste by a printing method and performing reflow, or by a plating method.

さらに、突起電極5の材質は、例えば、錫・亜鉛系合金、錫・ビスマス系合金、錫・銀系合金および亜鉛・ビスマス系合金等の少なくとも一つであってもよいし、金、銅、ニッケル、金メッキされたニッケルおよび金メッキされた銅等の少なくとも一つであってもよい。   Furthermore, the material of the protruding electrode 5 may be at least one of a tin / zinc alloy, a tin / bismuth alloy, a tin / silver alloy, a zinc / bismuth alloy, gold, copper, It may be at least one of nickel, gold-plated nickel and gold-plated copper.

実装基板1は、基材の一方の面に、実装基板1と半導体装置2を対向させた際に、半導体装置2が備える突起電極5と対応する各位置に配置された導体のランド6と、実装基板1の半導体装置搭載領域の外周において、半導体装置2の相対向する短辺70の中央部に対応する位置に形成した貫通孔4を備えている。   When the mounting substrate 1 and the semiconductor device 2 are opposed to one surface of the base material, the mounting substrate 1 has conductor lands 6 disposed at positions corresponding to the protruding electrodes 5 included in the semiconductor device 2; In the outer periphery of the semiconductor device mounting region of the mounting substrate 1, a through-hole 4 is provided at a position corresponding to the center portion of the opposing short sides 70 of the semiconductor device 2.

また、実装基板1の基材は、ガラス繊維やケプラー等の有機物からなる繊維にエポキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリエステル樹脂、ベンゾオキサザール樹脂、四弗化エチレン(TFE)樹脂等を含浸して硬化させた機材を用いたものやBTレジンを用いたもの等、種々の樹脂基板を用いることができる。   Moreover, the base material of the mounting substrate 1 is made by impregnating an organic resin such as glass fiber or Kepler with an epoxy resin, a polyimide resin, a polyamide resin, a polyester resin, a benzoxazal resin, a tetrafluoroethylene (TFE) resin, or the like. Various resin substrates can be used, such as those using hardened equipment and those using BT resin.

なお、本実施の形態においては、貫通孔4の設置位置を、半導体装置2の短辺70により決定される半導体装置搭載領域の中央部に対応する実装基板1上の位置としているが、半導体装置2の他の辺上、または全辺上の位置に対応する実装基板1上の位置でもよく、また、各辺の中央部以外の位置に対応して、或いは、さらに、各辺上の複数箇所に対応して、所定数の貫通孔4を実装基板1上に設けてもよい。   In the present embodiment, the installation position of the through hole 4 is the position on the mounting substrate 1 corresponding to the central portion of the semiconductor device mounting region determined by the short side 70 of the semiconductor device 2. 2 may be a position on the mounting substrate 1 corresponding to a position on the other side or all the sides, or may correspond to a position other than the central portion of each side, or further, a plurality of locations on each side. Correspondingly, a predetermined number of through holes 4 may be provided on the mounting substrate 1.

ランド6の導体の材質は銅箔とするが、銅箔上に金属層を形成してもよい。また貫通孔4の内壁のメッキ層7は無電解銅メッキおよび電解銅メッキにより形成し、さらにメッキ層7の面上に金属層を形成してもよい。金属層としては、例えば、はんだ、金、銀、ニッケルおよびパラジウム等から選択された少なくとも一つを含んでいてもよい。   The conductor of the land 6 is made of copper foil, but a metal layer may be formed on the copper foil. The plated layer 7 on the inner wall of the through hole 4 may be formed by electroless copper plating and electrolytic copper plating, and a metal layer may be formed on the surface of the plated layer 7. For example, the metal layer may include at least one selected from solder, gold, silver, nickel, palladium, and the like.

接着剤3としては、例えば、エポキシ樹脂、シリコーン樹脂およびシアネートエステルから選択された少なくとも一つを含んでいてもよい。またエポキシ樹脂としては、例えば、ビスフェノールA型、ビスフェノールF型、ビフェニル型、ナフタレン型等から選択された少なくとも一つを含んでいてもよい。   As the adhesive agent 3, for example, at least one selected from an epoxy resin, a silicone resin, and a cyanate ester may be included. The epoxy resin may include at least one selected from, for example, bisphenol A type, bisphenol F type, biphenyl type, naphthalene type and the like.

また接着剤3の成分には樹脂成分以外にフィラー、難燃剤、顔料、硬化剤および硬化促進剤等から選択された少なくとも一つを含んでいてもよい。上記組成に加えて光開始剤を添加してもよい。   In addition to the resin component, the component of the adhesive 3 may include at least one selected from a filler, a flame retardant, a pigment, a curing agent, a curing accelerator, and the like. In addition to the above composition, a photoinitiator may be added.

以下、本実施の形態の電子装置10の製造方法を図3および図4を用いて簡単に説明する。図3に示す実装基板1のランド6の上に、例えば、メタルマスクとスキージを用いてはんだペーストを印刷方式で供給する。続いて半導体装置2を実装基板1のランド6上に配置し、リフローにより半導体装置2の突起電極5とランド6とをはんだ接続する。これにより実装基板1上に半導体装置2を実装することができる。   Hereinafter, a method of manufacturing the electronic device 10 according to the present embodiment will be briefly described with reference to FIGS. On the land 6 of the mounting substrate 1 shown in FIG. 3, for example, a solder paste is supplied by a printing method using a metal mask and a squeegee. Subsequently, the semiconductor device 2 is disposed on the land 6 of the mounting substrate 1, and the protruding electrode 5 and the land 6 of the semiconductor device 2 are soldered by reflow. As a result, the semiconductor device 2 can be mounted on the mounting substrate 1.

次に、図4に示す半導体装置2の各辺を構成する側面と、半導体装置搭載領域における貫通孔4の開口部外周を構成する実装基板1の上面と貫通孔4の内部に、例えば、ディスペンサーを用いて接着剤3を塗布する。   Next, for example, a dispenser is provided on the side surface constituting each side of the semiconductor device 2 shown in FIG. 4, the upper surface of the mounting substrate 1 constituting the outer periphery of the opening of the through hole 4 in the semiconductor device mounting region, and the inside of the through hole 4. The adhesive 3 is applied using

最後に、接着剤3の硬化温度で所定の時間まで加熱硬化することで半導体装置2を実装基板1に接着固定する。   Finally, the semiconductor device 2 is bonded and fixed to the mounting substrate 1 by heating and curing up to a predetermined time at the curing temperature of the adhesive 3.

このような製造方法とすることで、本実施の形態の電子装置10は、半導体装置2の各辺の側面が接着剤3で実装基板1および貫通孔4に接着固定されていることで、実装基板1に実装された半導体装置2は、落下等の衝撃に対して実装基板1における歪みが抑制され、実装基板1と半導体装置2の突起電極との接合部のはんだの耐衝撃強度を向上させることができる。   By adopting such a manufacturing method, the electronic device 10 according to the present embodiment is mounted on the side surface of each side of the semiconductor device 2 by being bonded and fixed to the mounting substrate 1 and the through hole 4 with the adhesive 3. The semiconductor device 2 mounted on the substrate 1 suppresses the distortion in the mounting substrate 1 against an impact such as dropping, and improves the impact strength of the solder at the joint between the mounting substrate 1 and the protruding electrode of the semiconductor device 2. be able to.

以下、本実施の形態の電子装置10のリペア方法について図5を用いて説明する。図5(a)〜(d)は本発明の実施の形態1にかかる電子装置10のリペア作業における半導体装置2を除去する工程を説明する工程断面図である。   Hereinafter, the repair method of the electronic apparatus 10 according to the present embodiment will be described with reference to FIG. 5A to 5D are process cross-sectional views illustrating a process of removing the semiconductor device 2 in the repair work of the electronic device 10 according to the first embodiment of the present invention.

図5(a)は故障した半導体装置2が実装基板1に接合された電子装置10と、掘削用のドリル11を対向して設置した状態を示す。掘削用のドリル11の外径は、実装基板1の貫通孔4の内径よりも小さく、ドリル11には、貫通孔4の内径より大きな外径を有するストッパー12を備えている。   FIG. 5A shows a state in which an electronic device 10 in which a failed semiconductor device 2 is bonded to the mounting substrate 1 and a drill 11 for excavation are installed facing each other. The outer diameter of the drill 11 for excavation is smaller than the inner diameter of the through hole 4 of the mounting substrate 1, and the drill 11 is provided with a stopper 12 having an outer diameter larger than the inner diameter of the through hole 4.

図5(b)は実装基板1の裏面から表面に向けて、貫通孔4内部の接着剤3をドリル11のストッパー12が実装基板1の裏面に接触する深さまで掘削した断面図である。   FIG. 5B is a cross-sectional view in which the adhesive 3 in the through hole 4 is excavated to the depth at which the stopper 12 of the drill 11 contacts the back surface of the mounting substrate 1 from the back surface to the front surface of the mounting substrate 1.

このように、ストッパー12が実装基板1に接触することにより、ドリル11の掘削可能長さが実装基板1の断面長さを超えないようになっているため、半導体装置2等の部品の損傷を防止することが可能な構成となっている。   As described above, since the stopper 12 comes into contact with the mounting substrate 1, the drillable length of the drill 11 does not exceed the cross-sectional length of the mounting substrate 1. The configuration can be prevented.

図5(c)は貫通孔4の内部の接着剤3を掘削除去した後、実装基板1のランド6と半導体装置2の突起電極5を接合するはんだが溶融する温度に加熱して、実装基板1から故障した半導体装置2を取り外した状態を示す断面図である。   FIG. 5C shows the mounting substrate after the adhesive 3 inside the through-hole 4 is excavated and removed, and then heated to a temperature at which the solder joining the land 6 of the mounting substrate 1 and the protruding electrode 5 of the semiconductor device 2 is melted. 1 is a cross-sectional view showing a state where a failed semiconductor device 2 is removed from 1. FIG.

図5(d)は半導体装置2を取り外した後の実装基板1の断面図である。   FIG. 5D is a cross-sectional view of the mounting substrate 1 after the semiconductor device 2 is removed.

このようなリペア方法とすることで、本実施の形態の実装基板1とBGAタイプの半導体装置2からなる電子装置10は、実装後の電気的検査で半導体装置2が故障と判定された場合でも、実装基板1と接着剤3との接続部は分断されており、実装基板1から容易且つ清浄に故障した半導体装置2を取り外すことができる。   By adopting such a repair method, the electronic device 10 composed of the mounting substrate 1 and the BGA type semiconductor device 2 of the present embodiment can be used even when the semiconductor device 2 is determined to be defective in the electrical inspection after mounting. The connecting portion between the mounting substrate 1 and the adhesive 3 is divided, and the semiconductor device 2 that has failed can be easily and cleanly removed from the mounting substrate 1.

それにより、実装基板1を廃棄することなく簡単なリペア作業により、新しい半導体装置がリペアされた実装基板に接合された電子装置10として再生することで多大なコスト削減が可能になる。   As a result, a new semiconductor device can be regenerated as the electronic device 10 bonded to the repaired mounting substrate by a simple repair operation without discarding the mounting substrate 1, thereby greatly reducing the cost.

なお、前述のように、半導体装置2の一つの辺において、対応する複数の貫通孔4と複数の接着部を構成した場合、半導体装置2と実装基板1との接着力が向上する反面、実装基板1における配線の自由度が低下するとともに、リペア時の接着剤掘削除去作業の手間が増大することとなる。   As described above, when a plurality of corresponding through holes 4 and a plurality of bonding portions are formed on one side of the semiconductor device 2, the bonding force between the semiconductor device 2 and the mounting substrate 1 is improved. While the freedom degree of the wiring in the board | substrate 1 falls, the effort of the adhesive excavation removal work at the time of repair will increase.

(実施の形態2)
図6および図7は、本発明の実施の形態2にかかる電子装置10aの構造を示す図で、図6は平面図、図7は図6の2A−2A断面図である。なお、図6では実装基板1の構造をわかりやすくするために半導体装置2および接着剤3の一部を除去した状態を示している。
(Embodiment 2)
6 and 7 are views showing the structure of the electronic device 10a according to the second embodiment of the present invention. FIG. 6 is a plan view, and FIG. 7 is a cross-sectional view taken along the line 2A-2A in FIG. FIG. 6 shows a state in which a part of the semiconductor device 2 and the adhesive 3 are removed in order to make the structure of the mounting substrate 1 easy to understand.

本実施の形態の電子装置10aは、半導体装置2と、半導体装置搭載領域のコーナー部に配置した貫通孔4を有する実装基板1と、半導体装置2のコーナー部の側面と、半導体装置2に対向する半導体装置搭載領域のコーナー部の貫通孔4開口部の外周部に位置する実装基板1上面と貫通孔4の内部とを繋いで接着する接着剤3を備えている。さらに、本実施の形態の実装基板1では、貫通孔4の内壁にメッキ層7が形成されている。   The electronic device 10a according to the present embodiment is opposed to the semiconductor device 2, the mounting substrate 1 having the through holes 4 arranged in the corner portion of the semiconductor device mounting region, the side surface of the corner portion of the semiconductor device 2, and the semiconductor device 2. An adhesive 3 is provided for connecting and bonding the upper surface of the mounting substrate 1 located at the outer periphery of the opening of the through hole 4 at the corner of the semiconductor device mounting region and the inside of the through hole 4. Furthermore, in the mounting substrate 1 of the present embodiment, the plating layer 7 is formed on the inner wall of the through hole 4.

半導体装置2は、BGAタイプの半導体装置であり、一方の面上に格子状に配列した複数の突起電極5を有している。本実施の形態の半導体装置2は、インターポーザーとして、例えば、樹脂基板、セラミック基板またはフレキシブル基板を用いてもよく、CSP(Chip Scale Package)と呼ばれる半導体装置を用いてもよく、半導体素子の電極に直接はんだバンプを形成したフリップチップ型の半導体素子でも構わない。   The semiconductor device 2 is a BGA type semiconductor device, and has a plurality of protruding electrodes 5 arranged in a grid pattern on one surface. In the semiconductor device 2 of the present embodiment, for example, a resin substrate, a ceramic substrate, or a flexible substrate may be used as an interposer, a semiconductor device called CSP (Chip Scale Package) may be used, and an electrode of a semiconductor element Alternatively, a flip chip type semiconductor element in which solder bumps are directly formed may be used.

突起電極5は、はんだボールを搭載するボールセット法で形成しても、また、はんだペーストを印刷方式で供給し、リフローを行って形成しても、さらにメッキ法で形成してもよい。   The protruding electrode 5 may be formed by a ball set method in which solder balls are mounted, or may be formed by supplying a solder paste by a printing method and performing reflow, or by a plating method.

さらに、突起電極5の材質は、例えば、錫・亜鉛系合金、錫・ビスマス系合金、錫・銀系合金および亜鉛・ビスマス系合金等の少なくとも一つであってもよいし、金、銅、ニッケル、金メッキされたニッケルおよび金メッキされた銅等の少なくとも一つであってもよい。   Furthermore, the material of the protruding electrode 5 may be at least one of a tin / zinc alloy, a tin / bismuth alloy, a tin / silver alloy, a zinc / bismuth alloy, gold, copper, It may be at least one of nickel, gold-plated nickel and gold-plated copper.

実装基板1は、基材の一方の面に、実装基板1と半導体装置2を対向させた際に、半導体装置2が備える突起電極5と対応する各位置に配置された導体のランド6と、実装基板1の半導体装置搭載領域のコーナー部に形成した貫通孔4を備えている。   When the mounting substrate 1 and the semiconductor device 2 are opposed to one surface of the base material, the mounting substrate 1 has conductor lands 6 disposed at positions corresponding to the protruding electrodes 5 included in the semiconductor device 2; A through-hole 4 is provided at a corner portion of the mounting area of the mounting substrate 1 on the semiconductor device.

また、実装基板1の基材は、ガラス繊維やケプラー等の有機物からなる繊維にエポキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリエステル樹脂、ベンゾオキサザール樹脂、四弗化エチレン(TFE)樹脂等を含浸して硬化させた機材を用いたものやBTレジンを用いたもの等、種々の樹脂基板を用いることができる。   In addition, the base material of the mounting substrate 1 is made by impregnating an organic resin such as glass fiber or Kepler with an epoxy resin, a polyimide resin, a polyamide resin, a polyester resin, a benzoxazal resin, a tetrafluoroethylene (TFE) resin or the like. Various resin substrates can be used, such as those using hardened equipment and those using BT resin.

ランド6の導体の材質は銅箔とするが、銅箔上に金属層を形成してもよい。また貫通孔4の内壁のメッキ層7は無電解銅メッキおよび電解銅メッキにより形成し、さらにメッキ層7の面上に金属層を形成してもよい。金属層としては、例えば、はんだ、金、銀、ニッケルおよびパラジウム等から選択された少なくとも一つを含んでいてもよい。   The conductor of the land 6 is made of copper foil, but a metal layer may be formed on the copper foil. The plated layer 7 on the inner wall of the through hole 4 may be formed by electroless copper plating and electrolytic copper plating, and a metal layer may be formed on the surface of the plated layer 7. For example, the metal layer may include at least one selected from solder, gold, silver, nickel, palladium, and the like.

接着剤3としては、例えば、エポキシ樹脂、シリコーン樹脂およびシアネートエステルから選択された少なくとも一つを含んでいてもよい。またエポキシ樹脂としては、例えば、ビスフェノールA型、ビスフェノールF型、ビフェニル型、ナフタレン型等から選択された少なくとも一つを含んでいてもよい。   As the adhesive agent 3, for example, at least one selected from an epoxy resin, a silicone resin, and a cyanate ester may be included. The epoxy resin may include at least one selected from, for example, bisphenol A type, bisphenol F type, biphenyl type, naphthalene type and the like.

また接着剤3の成分には樹脂成分以外にフィラー、難燃剤、顔料、硬化剤および硬化促進剤等から選択された少なくとも一つを含んでいてもよい。上記組成に加えて光開始剤を添加してもよい。   In addition to the resin component, the component of the adhesive 3 may include at least one selected from a filler, a flame retardant, a pigment, a curing agent, a curing accelerator, and the like. In addition to the above composition, a photoinitiator may be added.

以下、本実施の形態の電子装置10aの製造方法を図6および図7を用いて簡単に説明する。図6に示す実装基板1のランド6の上に、例えば、メタルマスクとスキージを用いてはんだペーストを印刷方式で供給する。続いて半導体装置2を実装基板1のランド6上に配置し、リフローにより半導体装置2の突起電極5とランド6とをはんだ接続する。これにより実装基板1上に半導体装置2を実装することができる。   Hereinafter, a method of manufacturing the electronic device 10a according to the present embodiment will be briefly described with reference to FIGS. On the land 6 of the mounting substrate 1 shown in FIG. 6, for example, a solder paste is supplied by a printing method using a metal mask and a squeegee. Subsequently, the semiconductor device 2 is disposed on the land 6 of the mounting substrate 1, and the protruding electrode 5 and the land 6 of the semiconductor device 2 are soldered by reflow. As a result, the semiconductor device 2 can be mounted on the mounting substrate 1.

次に、図7に示す半導体装置2のコーナー部の側面と半導体装置搭載領域のコーナー部の実装基板1の上面と貫通孔4の内部に、例えば、ディスペンサーを用いて接着剤3を塗布する。   Next, the adhesive 3 is applied to the side surface of the corner portion of the semiconductor device 2 shown in FIG. 7, the upper surface of the mounting substrate 1 in the corner portion of the semiconductor device mounting region, and the inside of the through hole 4 using a dispenser, for example.

最後に、接着剤3の硬化温度で所定の時間まで加熱硬化することで半導体装置2を実装基板1に接着固定する。   Finally, the semiconductor device 2 is bonded and fixed to the mounting substrate 1 by heating and curing up to a predetermined time at the curing temperature of the adhesive 3.

このような製造方法とすることで、本実施の形態の電子装置10aは、実装基板から最も剥離しやすい半導体装置2の各コーナー部において、相隣接する二側面が接着剤3で実装基板1および貫通孔4に接着固定されていることで、実装基板1に実装された半導体装置2は、落下等の衝撃に対してコーナー部の実装基板1における歪みが抑制され、実装基板1と半導体装置2の突起電極との接合部のはんだの耐衝撃強度を向上させることができる。   By adopting such a manufacturing method, the electronic device 10a of the present embodiment has the adhesive substrate 3 at the two corners adjacent to each other in the corner portion of the semiconductor device 2 that is most easily peeled from the mounting substrate, and the mounting substrate 1 and Since the semiconductor device 2 mounted on the mounting substrate 1 is bonded and fixed to the through-hole 4, distortion in the mounting substrate 1 at the corner portion against an impact such as dropping is suppressed, and the mounting substrate 1 and the semiconductor device 2 are suppressed. It is possible to improve the impact strength of the solder at the joint with the protruding electrode.

以下、本実施の形態の電子装置10aのリペア方法について図8を用いて説明する。図8(a)〜(d)は本発明の実施の形態2にかかる電子装置10aのリペア作業における半導体装置2を除去する工程を説明する工程断面図である。   Hereinafter, the repair method of the electronic device 10a of the present embodiment will be described with reference to FIG. 8A to 8D are process cross-sectional views illustrating a process of removing the semiconductor device 2 in the repair work of the electronic device 10a according to the second embodiment of the present invention.

図8(a)は故障した半導体装置2が、そのコーナー部の側面に塗布された接着剤3により実装基板1に接合された電子装置10aと、掘削用のドリル11を対向して設置した状態を示す。掘削用のドリル11の外径は、実装基板1の貫通孔4の内径よりも小さく、ドリル11には、貫通孔4の内径より大きな外径を有するストッパー12を備えている。   FIG. 8A shows a state in which the failed semiconductor device 2 has an electronic device 10a bonded to the mounting substrate 1 with an adhesive 3 applied to the side surface of the corner portion and a drill 11 for excavation facing each other. Indicates. The outer diameter of the drill 11 for excavation is smaller than the inner diameter of the through hole 4 of the mounting substrate 1, and the drill 11 is provided with a stopper 12 having an outer diameter larger than the inner diameter of the through hole 4.

図8(b)は実装基板1の裏面から表面に向けて、貫通孔4内部の接着剤3をドリル11のストッパー12が実装基板1の裏面に接触する深さまで掘削した断面図である。   FIG. 8B is a cross-sectional view in which the adhesive 3 in the through hole 4 is excavated from the back surface to the front surface of the mounting substrate 1 to a depth at which the stopper 12 of the drill 11 contacts the back surface of the mounting substrate 1.

このように、ストッパー12が実装基板1に接触することにより、ドリル11の掘削可能長さが実装基板1の断面長さを超えないようになっているため、半導体装置2等の部品の損傷を防止することが可能な構成となっている。   As described above, since the stopper 12 comes into contact with the mounting substrate 1, the drillable length of the drill 11 does not exceed the cross-sectional length of the mounting substrate 1. The configuration can be prevented.

図8(c)は貫通孔4の内部の接着剤3を掘削除去した後、実装基板1のランド6と半導体装置2の突起電極5を接合するはんだが溶融する温度に加熱して、実装基板1から故障した半導体装置2を取り外した状態を示す断面図である。   In FIG. 8C, after the adhesive 3 inside the through hole 4 is excavated and removed, the solder is bonded to the land 6 of the mounting substrate 1 and the protruding electrode 5 of the semiconductor device 2 and heated to a temperature at which the solder is melted. 1 is a cross-sectional view showing a state where a failed semiconductor device 2 is removed from 1. FIG.

図8(d)は半導体装置2を取り外した後の実装基板1の断面図である。   FIG. 8D is a cross-sectional view of the mounting substrate 1 after the semiconductor device 2 is removed.

このようなリペア方法とすることで、本実施の形態の実装基板1とBGAタイプの半導体装置2からなる電子装置10aは、実装後の電気的検査で半導体装置2が故障と判定された場合でも、実装基板1と接着剤3との接続部は分断されており、実装基板1から容易且つ清浄に故障した半導体装置2を取り外すことができる。   By adopting such a repair method, the electronic device 10a composed of the mounting substrate 1 and the BGA type semiconductor device 2 according to the present embodiment can be used even when the semiconductor device 2 is determined to be faulty by electrical inspection after mounting. The connecting portion between the mounting substrate 1 and the adhesive 3 is divided, and the semiconductor device 2 that has failed can be easily and cleanly removed from the mounting substrate 1.

それにより、実装基板1を廃棄することなく簡単なリペア作業により、新しい半導体装置がリペアされた実装基板に接合された電子装置10aとして再生することで多大なコスト削減が可能になる。   As a result, a new semiconductor device can be regenerated as the electronic device 10a bonded to the repaired mounting substrate by a simple repairing operation without discarding the mounting substrate 1, thereby greatly reducing the cost.

なお、本実施の形態のように、半導体装置2の各コーナー部の相隣接する二面で実装基板1と接着する場合、接着箇所の数が増加するため、半導体装置2と実装基板1との接着力が向上する反面、実装基板1における配線の自由度が低下することとなる。   Note that, when the semiconductor substrate 2 is bonded to the mounting substrate 1 on two adjacent surfaces of each corner portion as in the present embodiment, the number of bonding locations increases, so the semiconductor device 2 and the mounting substrate 1 While the adhesive force is improved, the degree of freedom of wiring on the mounting substrate 1 is reduced.

(実施の形態3)
図9から図11は、本発明の実施の形態3にかかる電子装置20の構造を示す図で、図9は平面図、図10は図9の3B部における、実施の形態1、2とは異なる他の構造例の拡大平面図で、図11は図9の3A−3A断面図である。なお、図9では実装基板1の構造をわかりやすくするために半導体装置2および接着剤3の一部を除去した状態を示している。
(Embodiment 3)
9 to 11 are diagrams showing the structure of the electronic device 20 according to the third embodiment of the present invention. FIG. 9 is a plan view, and FIG. 10 is the third and third embodiments in FIG. FIG. 11 is an enlarged plan view of another different structural example, and FIG. 11 is a cross-sectional view taken along 3A-3A in FIG. FIG. 9 shows a state in which a part of the semiconductor device 2 and the adhesive 3 is removed for easy understanding of the structure of the mounting substrate 1.

本実施の形態の電子装置20は、半導体装置2と、半導体装置搭載領域のコーナー部に配置した貫通孔4を有する実装基板1と、半導体装置2のコーナー部の側面と、半導体装置2に対向する半導体装置搭載領域のコーナー部の貫通孔4開口部の外周部に位置する実装基板1の上面と貫通孔4の内部とを繋いで接着する接着剤3を備えている。   The electronic device 20 according to the present embodiment is opposed to the semiconductor device 2, the mounting substrate 1 having the through holes 4 arranged in the corner portion of the semiconductor device mounting region, the side surface of the corner portion of the semiconductor device 2, and the semiconductor device 2. An adhesive 3 is provided for connecting and bonding the upper surface of the mounting substrate 1 located in the outer peripheral portion of the opening of the through hole 4 at the corner of the semiconductor device mounting region to the inside of the through hole 4.

半導体装置2は、BGAタイプの半導体装置であり、一方の面上に格子状に配列した複数の突起電極5を有している。本実施の形態の半導体装置2は、インターポーザーとして、例えば、樹脂基板、セラミック基板またはフレキシブル基板を用いてもよく、CSP(Chip Scale Package)と呼ばれる半導体装置を用いてもよく、半導体素子の電極に直接はんだバンプを形成したフリップチップ型の半導体素子でも構わない。   The semiconductor device 2 is a BGA type semiconductor device, and has a plurality of protruding electrodes 5 arranged in a grid pattern on one surface. In the semiconductor device 2 of the present embodiment, for example, a resin substrate, a ceramic substrate, or a flexible substrate may be used as an interposer, a semiconductor device called CSP (Chip Scale Package) may be used, and an electrode of a semiconductor element Alternatively, a flip chip type semiconductor element in which solder bumps are directly formed may be used.

突起電極5は、はんだボールを搭載するボールセット法で形成しても、また、はんだペーストを印刷方式で供給し、リフローを行って形成しても、さらにメッキ法で形成してもよい。さらに、突起電極5の材質は、例えば、錫・亜鉛系合金、錫・ビスマス系合金、錫・銀系合金および亜鉛・ビスマス系合金等の少なくとも一つであってもよいし、金、銅、ニッケル、金メッキされたニッケルおよび金メッキされた銅等の少なくとも一つであってもよい。   The protruding electrode 5 may be formed by a ball set method in which solder balls are mounted, or may be formed by supplying a solder paste by a printing method and performing reflow, or by a plating method. Furthermore, the material of the protruding electrode 5 may be at least one of a tin / zinc alloy, a tin / bismuth alloy, a tin / silver alloy, a zinc / bismuth alloy, gold, copper, It may be at least one of nickel, gold-plated nickel and gold-plated copper.

実装基板1は、基材の一方の面に、実装基板1と半導体装置2を対向させた際に、半導体装置2が備える突起電極5と対応する各位置に配置された導体のランド6と、実装基板1の半導体装置搭載領域のコーナー部に形成した貫通孔4を備えている。   When the mounting substrate 1 and the semiconductor device 2 are opposed to one surface of the base material, the mounting substrate 1 has conductor lands 6 disposed at positions corresponding to the protruding electrodes 5 included in the semiconductor device 2; A through-hole 4 is provided at a corner portion of the mounting area of the mounting substrate 1 on the semiconductor device.

また、本実施の形態における実装基板1の基材は、ガラス繊維やケプラー等の有機物からなる繊維にエポキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリエステル樹脂、ベンゾオキサザール樹脂、四弗化エチレン(TFE)樹脂等を含浸して硬化させた機材を用いたものやBTレジンを用いたもの等、種々の樹脂基板を用いることができる。   Further, the substrate of the mounting substrate 1 in the present embodiment is made of an epoxy resin, a polyimide resin, a polyamide resin, a polyester resin, a benzoxazal resin, ethylene tetrafluoride (TFE), or a fiber made of an organic substance such as glass fiber or Kepler. Various resin substrates such as those using a material impregnated with resin and cured and those using BT resin can be used.

導体の材質は銅箔とするが、銅箔上に金属層を形成してもよい。金属層としては、例えば、はんだ、金、銀、ニッケルおよびパラジウム等から選択された少なくとも一つを含んでいてもよい。   The conductor is made of copper foil, but a metal layer may be formed on the copper foil. For example, the metal layer may include at least one selected from solder, gold, silver, nickel, palladium, and the like.

半導体装置2の実装面側の各コーナーに配置された貫通孔4は、周囲が接着剤に対して弱接着性の被膜で構成される剥離パッド31が配置されている。例えば被膜としては導体箔面上に金メッキやアルミニウムメッキが施された被膜であってもよく、例えば四弗化エチレン(TFE)樹脂被膜やシリコーン樹脂被膜であってもよい。   In the through holes 4 arranged at the respective corners on the mounting surface side of the semiconductor device 2, peeling pads 31 each having a weakly adhesive film with respect to the adhesive are arranged. For example, the film may be a film in which gold plating or aluminum plating is applied on the conductor foil surface, and may be, for example, a tetrafluoroethylene (TFE) resin film or a silicone resin film.

実装面の反対側の貫通孔4は、貫通孔4下部とその周囲を覆って、中央部に液状の接着剤が漏れ出さない大きさの空気孔14を有する導体箔の樹脂止めパッド13を備えている。なお、樹脂止めパッド13の中央部の空気孔14は、貫通孔4に接着剤3を注入したときに接着剤3の下の空気が空気孔14を通って外部に排出されることで貫通孔4の底まで接着剤3を注入できるようにするための孔である。   The through hole 4 on the opposite side of the mounting surface is provided with a resin stopper pad 13 made of a conductive foil that covers the lower part of the through hole 4 and its periphery, and has an air hole 14 of a size that prevents liquid adhesive from leaking out at the center. ing. Note that the air hole 14 in the center of the resin stopper pad 13 is formed by the air under the adhesive 3 being discharged to the outside through the air hole 14 when the adhesive 3 is injected into the through hole 4. 4 is a hole for allowing the adhesive 3 to be poured up to the bottom of 4.

また、実装基板1の実装領域のコーナー部に配置される剥離パッド31の形状は円形が好ましいが、電子装置20の平面図である図12およびその4A部における拡大平面図である図13に示すようなL字形、または十字形、楕円形または多角形のうちのいずれかであってもよい。   Moreover, although the shape of the peeling pad 31 arrange | positioned at the corner part of the mounting area | region of the mounting board | substrate 1 is preferable circular, FIG. 12 which is a top view of the electronic device 20 and FIG. Such an L shape, or a cross shape, an ellipse shape or a polygon shape may be used.

さらに、半導体装置2を接着固定するための実装基板1の貫通孔4は実装領域の各コーナー部に設けられるだけでなく、実装領域の中心点もしくは中心線を対称にして半導体装置2の各辺に所定の数だけ設けてもよい。   Further, the through holes 4 of the mounting substrate 1 for bonding and fixing the semiconductor device 2 are not only provided at each corner portion of the mounting region, but also each side of the semiconductor device 2 with the center point or center line of the mounting region symmetrical. A predetermined number may be provided.

また、半導体装置搭載領域の外周に配置される貫通孔4の位置は、半導体装置の外周直下ではなく、半導体装置の側面と、この半導体装置の側面に塗布される接着剤との位置関係に基づき、貫通孔4の径、或いは剥離パッド31の寸法により決定される寸法分だけ半導体装置の側面より外方に離隔している。   In addition, the position of the through hole 4 disposed on the outer periphery of the semiconductor device mounting region is not based on the position directly below the outer periphery of the semiconductor device, but based on the positional relationship between the side surface of the semiconductor device and the adhesive applied to the side surface of the semiconductor device. Further, the semiconductor device is spaced outward from the side surface of the semiconductor device by a dimension determined by the diameter of the through hole 4 or the dimension of the peeling pad 31.

なお、実装基板1の基材は、ガラスエポキシ樹脂とするが、例えばBTレジン、ポリイミド樹脂、ポリアミド樹脂、ポリエステル樹脂、ベンゾオキサザール樹脂、テフロン(登録商標)樹脂または紙エポキシ樹脂のうちのいずれかの単層もしくは積層、或いは複数の基材を積層したものであってもよく、酸化アルミニウム、窒化アルミニウム、ガラスまたは石英のうちのいずれかの単層もしくは積層であってもよい。   In addition, although the base material of the mounting substrate 1 is made of glass epoxy resin, for example, any of BT resin, polyimide resin, polyamide resin, polyester resin, benzoxazal resin, Teflon (registered trademark) resin, or paper epoxy resin is used. These may be a single layer or a laminate of these, or a laminate of a plurality of base materials, and may be a single layer or a laminate of any of aluminum oxide, aluminum nitride, glass, and quartz.

導体は銅箔とするが、例えば銅箔上にはんだ、金、銀またはパラジウムうちのいずれか一つで積層されたものであってもよく、ニッケル膜上に銅、はんだ、金、銀またはパラジウムうちのいずれかで積層されたものであってもよい。またガラスまたは石英のような透明基材には塩化錫等の透明膜を使用してもよい。   The conductor is copper foil, but it may be laminated with any one of solder, gold, silver or palladium on the copper foil, for example, copper, solder, gold, silver or palladium on the nickel film One of them may be laminated. A transparent film such as tin chloride may be used for a transparent substrate such as glass or quartz.

接着剤3は、外力に対して実装基板上の半導体装置を安定に固定するために使用され、半導体装置2の各コーナー部側面と、実装基板1の貫通孔4とを繋いで塗布され、加熱硬化されて両者を接着固定する部材である。   The adhesive 3 is used to stably fix the semiconductor device on the mounting substrate against external force, and is applied by connecting each corner portion side surface of the semiconductor device 2 and the through hole 4 of the mounting substrate 1, and heating. It is a member that is cured to bond and fix both.

組成は主剤、フィラー、難燃剤、顔料、硬化剤および硬化促進剤等で構成された熱硬化性の液状樹脂とするが、例えば、前記組成に加えて光開始剤を添加した光硬化性の液状樹脂または光熱硬性の液状樹脂のいずれかであってもよい。   The composition is a thermosetting liquid resin composed of a main agent, a filler, a flame retardant, a pigment, a curing agent, a curing accelerator, and the like. For example, in addition to the above composition, a photo-curable liquid with a photoinitiator added Either a resin or a photothermographic liquid resin may be used.

また、接着剤3の主剤樹脂の材質はエポキシ系樹脂とするが、例えばアクリル系樹脂、ポリイミド系樹脂またはシリコーン系樹脂のうちのいずれか一つもしくは複数を合成した樹脂であってもよい。   The material of the main resin of the adhesive 3 is an epoxy resin, but may be a resin obtained by synthesizing any one or a plurality of acrylic resins, polyimide resins, or silicone resins.

このような構成とすることで、通常の機器を使用する温度下では、半導体装置2の各コーナー部側面が熱硬化した接着剤3で実装基板1の対応する貫通孔4に接着固定されていることで、実装基板1の上の半導体装置2は落下等の衝撃に対してコーナー部の実装基板1における歪みが抑制され、実装基板1と半導体装置2との接合部のはんだの耐衝撃強度を向上させることができる。   With such a configuration, under the temperature at which normal equipment is used, the side surfaces of the corner portions of the semiconductor device 2 are bonded and fixed to the corresponding through-holes 4 of the mounting substrate 1 with the thermosetting adhesive 3. Thus, the semiconductor device 2 on the mounting substrate 1 is prevented from being distorted at the corner of the mounting substrate 1 against an impact such as dropping, and the impact strength of the solder at the joint between the mounting substrate 1 and the semiconductor device 2 is reduced. Can be improved.

さらに、通常、電子装置では半導体装置の側面と実装基板の貫通孔とに液状樹脂の接着剤を塗布し、熱硬化して両者を接着固定する場合、接着剤は実装基板の表面が平面であることと、両者の親和性が良好であることにより実装基板の貫通孔から溢れ出た接着剤が表面で広がり、リペア時に実装基板の表面に接着剤が付着したまま残る。   Further, in general, in an electronic device, when a liquid resin adhesive is applied to the side surface of the semiconductor device and the through hole of the mounting substrate, and the both are bonded by heat curing, the surface of the mounting substrate is flat. In addition, due to the good compatibility between them, the adhesive overflowing from the through hole of the mounting substrate spreads on the surface, and the adhesive remains attached to the surface of the mounting substrate during repair.

しかしながら、本実施の形態の電子装置20では、実装基板1が半導体装置2を接着固定するための貫通孔4を有しており、この貫通孔4は周囲に、例えば銅箔の表面に金メッキされた弱接着性の剥離パッド31を備えている。このように金薄膜と接着剤3を接触させた場合、金は酸化しないために接着剤3との結合手を持たない。そのために両者は、物理的結合(アンカー効果等)は得られても化学的結合は得られず、両者が接触している領域は弱い接着となる。   However, in the electronic device 20 of the present embodiment, the mounting substrate 1 has a through hole 4 for bonding and fixing the semiconductor device 2, and the through hole 4 is gold-plated around, for example, the surface of a copper foil. A weakly adhesive peeling pad 31 is provided. In this way, when the gold thin film and the adhesive 3 are brought into contact with each other, gold does not oxidize and therefore has no bonding hand with the adhesive 3. Therefore, even if a physical bond (anchor effect or the like) is obtained for both, a chemical bond cannot be obtained, and a region where both are in contact is weakly bonded.

また、弱接着性の剥離パッド31の例として上記では銅箔の表面に金メッキされた構造で説明したが、四弗化エチレン(TFE)系樹脂やシリコーン系樹脂の被膜で形成されたものであってもよい。   In addition, as an example of the weakly adhesive release pad 31, the above description has been made with a structure in which the surface of the copper foil is gold-plated, but it is formed of a film of tetrafluoroethylene (TFE) resin or silicone resin. May be.

さらに、半導体装置2のコーナー部と実装基板1の貫通孔4を接着剤3で接着固定する場合、剥離パッド31の表面を金、四弗化エチレン(TFE)またはシリコーン等の弱接着性材料で構成することで、液状樹脂の接着剤3と剥離パッド31との親和性が低いために接着剤3の表面張力と、剥離パッド31の外周エッヂが実装基板1の基材面に対して段差となる形状効果とで剥離パッド31外への広がりを防止できる。   Further, when the corner portion of the semiconductor device 2 and the through hole 4 of the mounting substrate 1 are bonded and fixed with the adhesive 3, the surface of the peeling pad 31 is made of a weak adhesive material such as gold, ethylene tetrafluoride (TFE), or silicone. By configuring, since the affinity between the liquid resin adhesive 3 and the peeling pad 31 is low, the surface tension of the adhesive 3 and the outer peripheral edge of the peeling pad 31 are stepped with respect to the base material surface of the mounting substrate 1. Due to the shape effect, the spread to the outside of the peeling pad 31 can be prevented.

そして、半導体装置2と実装基板1とは、半導体装置2の側面の一部と実装基板1の貫通孔4壁面とが半導体装置2のコーナー部を含む複数箇所で接着剤3で接着固定されるため、次に述べる方法と組み合わせて実施することでリペア可能な実装基板1とそれを用いた電子装置20が得られる。   Then, the semiconductor device 2 and the mounting substrate 1 are bonded and fixed with an adhesive 3 at a plurality of locations including a corner portion of the semiconductor device 2 with a part of the side surface of the semiconductor device 2 and the wall surface of the through hole 4 of the mounting substrate 1. Therefore, the repairable mounting substrate 1 and the electronic device 20 using the same can be obtained by combining with the method described below.

ここで、図14を用いて本実施の形態における電子装置20のリペア工程を説明する。   Here, the repair process of the electronic device 20 in this Embodiment is demonstrated using FIG.

図14(a)から図14(d)は本実施の形態の電子装置20におけるリペア工程を説明するための工程断面図である。   FIG. 14A to FIG. 14D are process cross-sectional views for explaining the repair process in the electronic device 20 of the present embodiment.

図14(a)は半導体装置2に突起電極5を設けたBGAタイプの半導体装置2が実装基板1に接合された電子装置20において、実装基板1裏面の貫通孔4を覆って形成された樹脂止めパッド13の中心と、実装基板1の貫通孔4と同径もしくはそれ以下の太さでストッパー16を備えた掘削用のドリル15の中心が対向して一致する位置に両者を配置した断面図である。   FIG. 14A shows a resin formed so as to cover the through hole 4 on the back surface of the mounting substrate 1 in the electronic device 20 in which the BGA type semiconductor device 2 in which the protruding electrodes 5 are provided on the semiconductor device 2 is bonded to the mounting substrate 1. Sectional drawing which arranged both in the position where the center of the stop pad 13 and the center of the drill 15 for excavation provided with the stopper 16 with the same diameter as the through-hole 4 of the mounting board | substrate 1, and the stopper 16 oppose and correspond. It is.

図14(b)は実装基板1の裏面の樹脂止めパッド13側から表面の剥離パッド31の表面に向けて、貫通孔4内部の接着剤3をドリル15のストッパー16が樹脂止めパッド13面に接触する深さまで掘削した断面図である。   FIG. 14B shows the adhesive 3 in the through-hole 4 from the resin stop pad 13 side on the back surface of the mounting substrate 1 to the surface of the resin stop pad 13 by the stopper 16 of the drill 15. It is sectional drawing excavated to the depth which contacts.

図14(c)は貫通孔4の内部の接着剤3を掘削除去した後、実装基板1のランド6と半導体装置2の突起電極5を接合するはんだが溶融する温度に加熱して、実装基板1から故障した半導体装置2を取り外した断面図である。   In FIG. 14C, after the adhesive 3 inside the through hole 4 is excavated and removed, the solder is bonded to the land 6 of the mounting substrate 1 and the protruding electrode 5 of the semiconductor device 2 and heated to a temperature at which the solder melts. 1 is a cross-sectional view of a failed semiconductor device 2 removed from 1. FIG.

図14(d)は半導体装置2を取り外した後の実装基板1の断面図である。   FIG. 14D is a cross-sectional view of the mounting substrate 1 after the semiconductor device 2 is removed.

このようなリペア方法とすることで、本実施の形態の実装基板1とBGAタイプの半導体装置2からなる電子装置20は、実装後の電気的検査で半導体装置2が故障と判定された場合でも、実装基板1と接着剤3との接続部は分断されており、さらに剥離パッド31と接着剤3との線膨張係数の違いからはんだ接合部を高温にさらすときに両者の界面が完全に剥離するため実装基板1から容易且つ清浄に故障した半導体装置2を取り外すことができる。   By adopting such a repair method, the electronic device 20 including the mounting substrate 1 and the BGA type semiconductor device 2 according to the present embodiment can be used even when the semiconductor device 2 is determined to be faulty by an electrical inspection after mounting. The connecting part between the mounting substrate 1 and the adhesive 3 is divided, and the interface between the two is completely peeled off when the solder joint is exposed to high temperature due to the difference in the linear expansion coefficient between the peeling pad 31 and the adhesive 3. Therefore, the failed semiconductor device 2 can be removed from the mounting substrate 1 easily and cleanly.

それにより、実装基板1と半導体装置2を廃棄することなく簡単なリペア作業により新しい半導体装置がリペアされた実装基板に接合された電子装置20として再生することで多大なコスト削減が可能になる。   Thereby, without discarding the mounting substrate 1 and the semiconductor device 2, a new semiconductor device can be regenerated as the electronic device 20 bonded to the repaired mounting substrate by a simple repair operation, so that a great cost reduction can be achieved.

なお、前述のように、ストッパー16が樹脂止めパッド13面に接触することにより、ドリル11の掘削可能長さが実装基板1の断面長さを超えないようになっているため、半導体装置2等の部品の損傷を防止することが可能となっている。   As described above, the stopper 16 comes into contact with the surface of the resin stop pad 13 so that the drillable length of the drill 11 does not exceed the cross-sectional length of the mounting substrate 1. It is possible to prevent damage to the parts.

また、本実施の形態の電子装置20のリペア作業(図示せず)は、上述の半導体装置2の突起電極5と実装基板1のランド6とを接合するはんだを溶融させながら故障した半導体装置2を取り外す作業に続いて、実装基板1のランド6上にペースト状のはんだ膜を印刷塗布する。   Further, in the repair work (not shown) of the electronic device 20 of the present embodiment, the failed semiconductor device 2 while melting the solder that joins the protruding electrode 5 of the semiconductor device 2 and the land 6 of the mounting substrate 1. Subsequent to the removal operation, a paste-like solder film is printed on the lands 6 of the mounting substrate 1.

そして、新しい半導体装置2の突起電極5と実装基板1のランド6の位置合わせを行い、リフローで突起電極5とランド6を接合する。最後に、半導体装置2のコーナー部側面と実装基板1の貫通孔4を繋いで接着剤3を塗布して加熱硬化することでリペアが完了する。   Then, the bump electrode 5 of the new semiconductor device 2 and the land 6 of the mounting substrate 1 are aligned, and the bump electrode 5 and the land 6 are joined by reflow. Finally, the repair is completed by connecting the corner side surface of the semiconductor device 2 and the through hole 4 of the mounting substrate 1 and applying the adhesive 3 and curing it.

なお、実装基板1から接着剤3を除去するために実装基板1の裏面の樹脂止めパッド13がドリル15で破壊されており、リペアのための実装基板1として使用するためには裏側の貫通孔4上に耐熱性テープを接着したり、印刷法で樹脂被膜による蓋を形成したりする。   In order to remove the adhesive 3 from the mounting substrate 1, the resin stop pad 13 on the back surface of the mounting substrate 1 is broken with a drill 15, and the through-hole on the back side is used for use as the mounting substrate 1 for repair. A heat-resistant tape is bonded onto 4 or a lid made of a resin film is formed by a printing method.

これにより従来のように、接着剤3をナイフ等で削り落とす工程がなくなり、大幅な工数削減と基板廃棄ロス削減が可能となる。   As a result, there is no step of scraping off the adhesive 3 with a knife or the like as in the prior art, and it is possible to significantly reduce man-hours and substrate disposal loss.

また、上記の実施例では実装基板1に形成された貫通孔4の両面に剥離パッド31と樹脂止めパッド13が設けられていたが、高粘度の接着剤3を使用することで剥離パッド31と樹脂止めパッド13のない実装基板1を用いてもよい。   In the above embodiment, the peeling pad 31 and the resin stopper pad 13 are provided on both surfaces of the through hole 4 formed in the mounting substrate 1. However, by using the high-viscosity adhesive 3, The mounting substrate 1 without the resin stop pad 13 may be used.

これにより、上記電子装置20のよりさらに安価な電子装置の実現が可能となる。   This makes it possible to realize an electronic device that is even cheaper than the electronic device 20.

(実施の形態4)
図15は、本発明の実施の形態4にかかる実装基板32の両面にBGAタイプの第1の半導体装置18と第2の半導体装置19が実装された電子装置21において、実装基板32の一方の面に接合されて故障した第1の半導体装置18のリペア工程を説明するための工程断面図である。
(Embodiment 4)
15 shows one of the mounting substrates 32 in the electronic device 21 in which the BGA type first semiconductor device 18 and the second semiconductor device 19 are mounted on both surfaces of the mounting substrate 32 according to the fourth embodiment of the present invention. FIG. 10 is a process cross-sectional view for explaining a repair process of the first semiconductor device 18 that is bonded to the surface and has failed.

以下、図15(a)から図15(e)までを参照しながら本実施の形態の実装基板32と、実装基板32の両面に実装された2種類のBGAタイプの第1の半導体装置18と第2の半導体装置19からなる電子装置21におけるリペア工程を説明する。   Hereinafter, with reference to FIG. 15A to FIG. 15E, the mounting substrate 32 of the present embodiment, the two types of BGA type first semiconductor devices 18 mounted on both surfaces of the mounting substrate 32, and A repair process in the electronic device 21 composed of the second semiconductor device 19 will be described.

図15(a)は実装基板32にBGAタイプの第1の半導体装置18と第2の半導体装置19が両面実装された電子装置21において、第1の半導体装置18が故障している電子装置21と、故障している第1の半導体装置18側に貫通孔4と同径もしくはそれ以下の太さの接着剤3を掘削するためのドリル15を実装基板32の面に接近する高さで、実装基板32の剥離パッド41の外側に配置した断面図である。   FIG. 15A shows an electronic device 21 in which the BGA type first semiconductor device 18 and the second semiconductor device 19 are both-side mounted on the mounting substrate 32, and the electronic device 21 in which the first semiconductor device 18 has failed. And the height of the drill 15 for drilling the adhesive 3 having the same diameter as or smaller than that of the through hole 4 on the side of the first semiconductor device 18 that is in failure, at a height that approaches the surface of the mounting substrate 32, 5 is a cross-sectional view arranged outside the peeling pad 41 of the mounting substrate 32. FIG.

図15(b)は故障した第1の半導体装置18の剥離パッド41の外側からドリル15を剥離パッド41の中心部に形成されている貫通孔4に向かって水平移動をさせながら貫通孔4の中心位置と同じ位置になるまで接着剤3を切削した断面図である。   FIG. 15B shows the through hole 4 while horizontally moving the drill 15 from the outside of the peeling pad 41 of the failed first semiconductor device 18 toward the through hole 4 formed at the center of the peeling pad 41. It is sectional drawing which cut the adhesive agent 3 until it became the same position as a center position.

図15(c)は水平移動して剥離パッド41の貫通孔4上に到達したドリル15を、貫通孔4にそって垂直下降させながら貫通孔4内の接着剤3を所定の深さまで掘削した断面図である。   In FIG. 15C, the adhesive 3 in the through hole 4 is excavated to a predetermined depth while the drill 15 that has moved horizontally and reached the through hole 4 of the peeling pad 41 is vertically lowered along the through hole 4. It is sectional drawing.

なお、掘削深さは樹脂止めパッド13の手前で底部に少し硬化した接着剤3の層が残るようにする。これは、リペアの際の半導体装置18側面と剥離パッド41の中央部の貫通孔4との接着に使用する接着剤3の実装基板32裏面への流れ出しを防止するための操作である。なお、ドリル15と貫通孔4の位置合わせと掘削深さの制御はドリル15を備えた樹脂掘削装置にNC制御、レーザー高さ制御機能を備えることで実施する。   The excavation depth is such that a slightly hardened layer of adhesive 3 remains on the bottom before the resin stop pad 13. This is an operation for preventing the adhesive 3 used for bonding the side surface of the semiconductor device 18 and the through-hole 4 at the center of the peeling pad 41 from flowing out to the back surface of the mounting substrate 32 during repair. The alignment of the drill 15 and the through hole 4 and the control of the drilling depth are performed by providing the resin drilling device provided with the drill 15 with NC control and laser height control functions.

図15(d)は実装基板32の貫通孔4の内部の接着剤3が掘削除去された電子装置21のランド17と突起電極5を接合するはんだが溶融する温度に加熱して、故障した第1の半導体装置18を実装基板32から除去した断面図である。   FIG. 15 (d) shows that the solder 3 joining the land 17 of the electronic device 21 from which the adhesive 3 inside the through-hole 4 of the mounting substrate 32 has been excavated and removed is heated to a temperature at which the solder melts, and a failure occurs. 2 is a cross-sectional view of the semiconductor device 18 of FIG.

図15(e)は正常な第2の半導体装置19を残して故障した第1の半導体装置18が除去された後の実装基板32の断面図である。   FIG. 15E is a cross-sectional view of the mounting substrate 32 after the failed first semiconductor device 18 is removed leaving the normal second semiconductor device 19.

このようなリペア方法とすることで、両面実装型の電子装置21の故障した第1の半導体装置18と実装基板32の接続部を分断できる。   By using such a repair method, the connection portion between the first semiconductor device 18 and the mounting substrate 32 in the double-sided mounting type electronic device 21 can be divided.

なお、実装基板32の両面に半導体装置が貫通孔4と接着剤3で実装されている電子装置21において、第1の半導体装置18と第2の半導体装置19の両者が故障している場合は、小さな半導体装置の実装面側からドリル15で各貫通孔4内部の接着剤3を掘削除去することで、第1の半導体装置18および第2の半導体装置19と実装基板32の接続部を分断できる。   In the electronic device 21 in which the semiconductor device is mounted on both surfaces of the mounting substrate 32 with the through hole 4 and the adhesive 3, when both the first semiconductor device 18 and the second semiconductor device 19 are out of order. Then, the connecting portion between the first semiconductor device 18 and the second semiconductor device 19 and the mounting substrate 32 is divided by excavating and removing the adhesive 3 inside each through-hole 4 with a drill 15 from the mounting surface side of the small semiconductor device. it can.

これにより、清浄なリペアされた実装基板32を実現できるとともに、接着剤3をナイフ等で削り落とす工程がなくなり、大幅な工数削減と基板廃棄ロス削減が可能となる。   As a result, a clean and repaired mounting board 32 can be realized, and the process of scraping off the adhesive 3 with a knife or the like can be eliminated, thereby greatly reducing man-hours and board loss.

また、本実施の形態の電子装置21のリペア作業(図示せず)は、上述の半導体装置18の突起電極5と実装基板32のランド17とを接合するはんだを溶融させながら故障した半導体装置18を取り外し、ランド17にはんだペーストを塗布する。   Further, in the repair work (not shown) of the electronic device 21 of the present embodiment, the failed semiconductor device 18 while melting the solder that joins the protruding electrode 5 of the semiconductor device 18 and the land 17 of the mounting substrate 32 described above. And solder paste is applied to the lands 17.

そして、新しい半導体装置とリペアされた実装基板32を位置合わせして、はんだのリフローを行い、新しい半導体装置と実装基板32を接着固定する。最後に、各剥離パッド41が配置された場所の半導体装置18側面と貫通孔4内部とに接着剤3を塗布して加熱硬化を行い、両者を接着固定する。   Then, the repaired mounting board 32 and the new semiconductor device are aligned, solder reflow is performed, and the new semiconductor device and the mounting board 32 are bonded and fixed. Finally, the adhesive 3 is applied to the side surface of the semiconductor device 18 where the respective peeling pads 41 are arranged and the inside of the through hole 4 and heat-cured to bond and fix both.

このようなリペア方法とすることで、本実施の形態の実装基板32とBGAタイプの半導体装置からなる両面実装型の電子装置21は、実装後の電気的検査で一方の半導体装置が故障と判定された場合でも、実装基板32と故障のない第2の半導体装置19を廃棄せずに、故障した第1の半導体装置18だけに簡単なリペア作業を行うことで新しい両面実装型の電子装置21として再生することができ、多大なコスト削減を実現できる。   By adopting such a repair method, the double-sided mounting type electronic device 21 composed of the mounting substrate 32 and the BGA type semiconductor device of the present embodiment determines that one of the semiconductor devices is defective in the electrical inspection after mounting. In this case, a new double-sided mounting type electronic device 21 can be obtained by performing a simple repair operation only on the failed first semiconductor device 18 without discarding the mounting substrate 32 and the second semiconductor device 19 without any failure. As a result, a great cost reduction can be realized.

本発明にかかる電子装置および電子装置のリペア方法は、電子装置の通常の機器使用状態において、半導体装置の端部が熱硬化した接着剤で実装基板の貫通孔に接着固定していることで、実装基板上に実装された半導体装置は落下等の衝撃に対して端部の実装基板における歪みが抑制され、はんだの耐衝撃強度を向上させることができる。   The electronic device and the method for repairing the electronic device according to the present invention are such that, in the normal device usage state of the electronic device, the end of the semiconductor device is adhesively fixed to the through hole of the mounting substrate with an adhesive that is thermally cured. In the semiconductor device mounted on the mounting substrate, distortion in the mounting substrate at the end portion against an impact such as dropping is suppressed, and the impact resistance strength of the solder can be improved.

また、リペア時には、接着剤を掘削するドリルで貫通孔の内部の接着剤を掘削除去し、はんだを溶融温度に加熱することで実装基板から半導体装置を容易に取り外すことができるため、効率のよいリペア技術に適用できる。   Also, when repairing, the adhesive inside the through-hole is excavated and removed with a drill for excavating the adhesive, and the semiconductor device can be easily removed from the mounting board by heating the solder to the melting temperature, which is efficient. Applicable to repair technology.

本発明の実装基板の平面図Plan view of the mounting board of the present invention 同実装基板の図1における1A−1A断面図1A-1A sectional view of the mounting board in FIG. 本発明の実施の形態1にかかる電子装置の平面図1 is a plan view of an electronic device according to a first embodiment of the present invention. 同実施の形態の図3における1A−1A断面図1A-1A sectional view in FIG. 3 of the same embodiment 同実施の形態のリペア方法を示す工程断面図Process sectional drawing which shows the repair method of the embodiment 本発明の実施の形態2にかかる電子装置の平面図FIG. 3 is a plan view of an electronic device according to a second embodiment of the present invention. 同実施の形態の図6における2A−2A断面図2A-2A sectional view in FIG. 6 of the same embodiment 同実施の形態のリペア方法を示す工程断面図Process sectional drawing which shows the repair method of the embodiment 本発明の実施の形態3にかかる電子装置の平面図Plan view of an electronic apparatus according to a third embodiment of the present invention. 同図9の3B部における拡大平面図9 is an enlarged plan view of part 3B of FIG. 同実施の形態の図9における3A−3A断面図3A-3A sectional view in FIG. 9 of the same embodiment 本発明の実施の形態3にかかる電子装置の平面図Plan view of an electronic apparatus according to a third embodiment of the present invention. 同実施の形態の図12の4A部における拡大平面図The enlarged plan view in the 4A part of Drawing 12 of the embodiment 同電子装置のリペア方法を示す工程断面図Cross-sectional process diagram showing repair method for the same electronic device 本発明の実施の形態4のリペア方法を示す工程断面図Process sectional drawing which shows the repair method of Embodiment 4 of this invention 従来の電子装置の概略断面図Schematic sectional view of a conventional electronic device 同電子装置の実装基板が反った状態を示す概略断面図Schematic sectional view showing a state where the mounting board of the electronic device is warped 従来の他の電子装置の概略断面図Schematic sectional view of another conventional electronic device 従来の他の電子装置の概略断面図Schematic sectional view of another conventional electronic device

符号の説明Explanation of symbols

1,32 実装基板
2 半導体装置
3 接着剤
4 貫通孔
5 突起電極
6,17 ランド
7 メッキ層
10,10a,20,21 電子装置
11,15 ドリル
12,16 ストッパー
13 樹脂止めパッド
14 空気孔
18,19 半導体装置
31,41 剥離パッド
DESCRIPTION OF SYMBOLS 1,32 Mounting board 2 Semiconductor device 3 Adhesive 4 Through-hole 5 Protruding electrode 6, 17 Land 7 Plating layer 10, 10a, 20, 21 Electronic device 11, 15 Drill 12, 16 Stopper 13 Resin stop pad 14 Air hole 18, 19 Semiconductor device 31, 41 Peel pad

Claims (6)

複数の突起電極を備えた半導体装置と、
前記半導体装置の前記複数の突起電極に対応する複数のランド、および前記複数のランドを配置したランド領域の外周の一部に配置した貫通孔を備えた実装基板と、
前記半導体装置における相対向する一対の側面の一部それぞれと前記貫通孔の内周部とを繋いで接着する接着剤と、
を備えたことを特徴とする電子装置。
A semiconductor device comprising a plurality of protruding electrodes;
A mounting substrate having a plurality of lands corresponding to the plurality of protruding electrodes of the semiconductor device, and a through hole disposed in a part of an outer periphery of a land region in which the plurality of lands are disposed;
An adhesive for connecting and bonding a part of each of a pair of side surfaces facing each other in the semiconductor device and an inner peripheral portion of the through hole;
An electronic device comprising:
前記接着剤による前記半導体装置の接着面は、相隣接する前記側面が交わる当該半導体装置のコーナー部における二面であることを特徴とする請求項1に記載の電子装置。 The electronic device according to claim 1, wherein the bonding surface of the semiconductor device by the adhesive is two surfaces at a corner portion of the semiconductor device where the side surfaces adjacent to each other intersect. 前記複数の突起電極が前記複数のランドに実装される前記実装基板の面における前記貫通孔の開口部周囲に、前記接着剤の接着強度が前記貫通孔内周部よりも相対的に弱い弱接着性層が形成されていることを特徴とする請求項1または2に記載の電子装置。 Around the opening of the through hole on the surface of the mounting substrate on which the plurality of protruding electrodes are mounted on the plurality of lands, the adhesive is weakly bonded to the inner periphery of the through hole. The electronic device according to claim 1, wherein a conductive layer is formed. 請求項1〜3のいずれか1項に記載の電子装置のリペア方法であって、
前記貫通孔の径以下の外径のドリルで、前記貫通孔内部の前記接着剤を掘削する切削工程を有することを特徴とする電子装置のリペア方法。
It is a repair method of the electronic device of any one of Claims 1-3,
An electronic device repairing method comprising a cutting step of excavating the adhesive inside the through hole with a drill having an outer diameter equal to or smaller than the diameter of the through hole.
前記ドリルに、前記実装基板の厚み以下を規定するストッパーを備えることを特徴とする請求項4に記載の電子装置のリペア方法。 The method for repairing an electronic device according to claim 4, wherein the drill includes a stopper that defines a thickness equal to or less than a thickness of the mounting substrate. 複数の突起電極を備えた半導体装置を実装する基板を有する実装基板であって、
前記複数の突起基板に対応する複数のランドと、
前記複数のランドを配置したランド領域の外周の一部に、前記基板を貫通する貫通孔とを備えたことを特徴とする実装基板。
A mounting substrate having a substrate for mounting a semiconductor device having a plurality of protruding electrodes,
A plurality of lands corresponding to the plurality of protruding substrates;
A mounting substrate comprising a through hole penetrating the substrate in a part of an outer periphery of a land region in which the plurality of lands are arranged.
JP2007267585A 2007-10-15 2007-10-15 Electronic device and repairing method for electronic device Pending JP2009099650A (en)

Priority Applications (1)

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Publication Number Publication Date
JP2009099650A true JP2009099650A (en) 2009-05-07

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Country Status (1)

Country Link
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