JP2009094420A - Method of manufacturing organic semiconductor apparatus and organic semiconductor apparatus - Google Patents
Method of manufacturing organic semiconductor apparatus and organic semiconductor apparatus Download PDFInfo
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Description
本発明は、有機半導体装置の作製方法及び有機半導体装置に関する。 The present invention relates to a method for manufacturing an organic semiconductor device and an organic semiconductor device.
有機半導体薄膜電界効果トラジスタを含む有機半導体装置は、近年研究開発が大きく進展し、その構成要素となる有機半導体材料として、分子量1000以下の種々の低分子系有機材料が提案されている。これらの低分子系有機材料の特徴として、昇華性、溶媒への易溶性などが挙げられ、このような特徴を利用した真空蒸着法や溶媒を用いたキャスト法、インクジェット法などを用いた有機半導体装置の開発・研究が広く行われている。有機半導体からなる電子装置は、シリコン半導体装置の安価な代替品として注目されている。特に、著しく製造コストのかかる工程が必要なシリコン半導体装置と比べ有機半導体装置は、安価に製造することが可能であり、経済性が優先される場合には有用である。 Research and development of organic semiconductor devices including organic semiconductor thin film field effect transistors have greatly advanced in recent years, and various low molecular weight organic materials having a molecular weight of 1000 or less have been proposed as organic semiconductor materials that are constituent elements. The characteristics of these low molecular weight organic materials include sublimation and easy solubility in solvents. Organic semiconductors using vacuum deposition methods, casting methods using solvents, ink jet methods, etc. Development and research of devices are widely performed. Electronic devices made of organic semiconductors are attracting attention as inexpensive alternatives to silicon semiconductor devices. In particular, an organic semiconductor device can be manufactured at a lower cost than a silicon semiconductor device that requires a process that requires a significant manufacturing cost, and is useful when economy is a priority.
また有機半導体装置のその他の利点として、大面積の電子装置を作ることが容易であること、製造工程に高温プロセスを必要としないことからプラスチック基板上への形成が可能であること、また機械的な折り曲げに対し素子特性を劣化させないなどの特性を持つため、シリコン半導体装置では不可能な、大面積で機械的にフレキシブルな電子装置を製造することが可能である点が挙げられる。 Other advantages of the organic semiconductor device include that it is easy to make a large-area electronic device, that a high-temperature process is not required in the manufacturing process, and that it can be formed on a plastic substrate. Since it has characteristics such as not deteriorating element characteristics against simple bending, it is possible to manufacture a mechanically flexible electronic device having a large area, which is impossible with a silicon semiconductor device.
しかし有機物の昇華性を利用した薄膜形成法を用いた場合、大型の真空排気装置等の設備や、また溶液を用いたキャスト法においても分子性結晶の結晶成長方位の制御の為の基板の表面処理、結晶粒成長の為の基板温度の制御などが必要となる。この為これらの設備費用や工程を除くことが可能になれば、有機半導体装置がより安価で作製可能となる。 However, when the thin film formation method using the sublimation property of organic substances is used, the surface of the substrate for controlling the crystal growth orientation of molecular crystals can be obtained even in equipment such as a large vacuum evacuation device or in the casting method using a solution. It is necessary to control the substrate temperature for processing and crystal grain growth. For this reason, if it becomes possible to eliminate these equipment costs and processes, the organic semiconductor device can be manufactured at a lower cost.
上記の従来の問題点に鑑み、本発明は、真空や溶媒を介することなく安価に有機半導体層及び有機半導体装置を作製する方法を提供することを課題とする。 In view of the above-described conventional problems, an object of the present invention is to provide a method for manufacturing an organic semiconductor layer and an organic semiconductor device at low cost without using a vacuum or a solvent.
上記課題は次のような手段により解決される。
(1)有機半導体粉末を用意しフィルムに吸着させる工程、基板上に該フィルムを有機半導体粉末が吸着した面を下側にして重ね合わせる工程及び該フィルム表面より基板を加圧して、有機半導体粉末層を押し固めることにより有機半導体層とする工程を含む有機半導体装置の作製方法。
(2)上記有機半導体粉末はペンタセン又はルブレン粉末であり、上記フィルムに静電吸着させることによりパターニングされていることを特徴とする上記(1)に記載の有機半導体装置の作製方法。
(3)表面にソース及びドレイン電極のパターンが形成された基板を用意する工程、有機半導体粉末を用意しゲート絶縁層となる第1のフィルムに吸着させる工程、該基板上に該第1のフィルムを有機半導体粉末が吸着した面を下側にして重ね合わせる工程及び該第1のフィルム表面より加圧して有機半導体粉末層を押し固めることにより有機半導体層とする工程を含む有機半導体装置の作製方法。
(4)表面にゲート電極のパターンが形成された基板を用意する工程、有機半導体粉末を用意しゲート絶縁層となる第1のフィルムに吸着させる工程、該基板上に該第1のフィルムを有機半導体粉末が吸着した面を上側にして重ね合わせる工程、その上にソース及びドレイン電極のパターンが形成された第2のフィルムを重ね合わせる工程及び該第2のフィルム表面より加圧して有機半導体粉末層を押し固めることにより有機半導体層とする工程を含む有機半導体装置の作製方法。
(5)上記有機半導体粉末はペンタセン又はルブレン粉末であり、上記第1のフィルムに静電吸着させることによりパターニングされていることを特徴とする上記(3)又は(4)に記載の有機半導体装置の作製方法。
(6)上記(1)ないし(5)のいずれかに記載の作製方法により作製された有機半導体装置。
The above problem is solved by the following means.
(1) A step of preparing an organic semiconductor powder and adsorbing it on the film, a step of superposing the film on the substrate with the surface on which the organic semiconductor powder is adsorbed facing down, and pressurizing the substrate from the film surface, The manufacturing method of the organic-semiconductor device including the process made into an organic-semiconductor layer by compacting a layer.
(2) The method for manufacturing an organic semiconductor device according to (1), wherein the organic semiconductor powder is pentacene or rubrene powder, and is patterned by electrostatic adsorption to the film.
(3) A step of preparing a substrate having a source and drain electrode pattern formed on the surface, a step of preparing an organic semiconductor powder and adsorbing it to a first film to be a gate insulating layer, the first film on the substrate The method for producing an organic semiconductor device, comprising: a step of superposing the organic semiconductor powder with the surface adsorbed on the lower side; and a step of pressing from the first film surface and pressing the organic semiconductor powder layer to form an organic semiconductor layer .
(4) A step of preparing a substrate having a gate electrode pattern formed on the surface, a step of preparing an organic semiconductor powder and adsorbing it to a first film to be a gate insulating layer, and organically arranging the first film on the substrate A step of superposing the semiconductor powder adsorbed side upward, a step of superposing a second film on which the pattern of the source and drain electrodes is formed, and an organic semiconductor powder layer by pressing from the surface of the second film The manufacturing method of the organic-semiconductor device including the process made into an organic-semiconductor layer by pressing and solidifying.
(5) The organic semiconductor device according to (3) or (4), wherein the organic semiconductor powder is pentacene or rubrene powder, and is patterned by electrostatic adsorption to the first film. Manufacturing method.
(6) An organic semiconductor device manufactured by the manufacturing method according to any one of (1) to (5) above.
本発明によれば、昇華法あるいはキャスト法等に伴う真空や溶媒を介することなく安価に有機半導体層・有機半導体装置を作製することができる。 According to the present invention, an organic semiconductor layer / organic semiconductor device can be produced at low cost without using a vacuum or a solvent associated with a sublimation method or a casting method.
本発明の実施形態について説明する。
従来、有機半導体装置の有機半導体層は、真空蒸着法又は溶媒を用いたキャスト法等で形成されているが、本発明に係る有機半導体層は、例えば有機半導体をメノウ乳鉢等によりナノ又はサブミクロンサイズの結晶粒からなる有機半導体粉末とし、プラスチック基板又は絶縁体薄膜上に吸着によって選択的に散布したものを押し固めることで形成される。
An embodiment of the present invention will be described.
Conventionally, an organic semiconductor layer of an organic semiconductor device has been formed by a vacuum deposition method or a cast method using a solvent. The organic semiconductor powder is made of crystal grains of a size, and is formed by pressing and compacting a powder that is selectively dispersed by adsorption onto a plastic substrate or insulator thin film.
本発明の有機半導体装置に含まれる有機半導体トラジスタを例示してその作製方法について図1に基づいて説明する。
図1(e)は、完成した有機半導体トラジスタの断面模式図である。基板10の上に本発明に係る有機半導体層30が形成されている。ソース・ドレイン電極20は有機半導体層30に接して間隔を置いて設けられている。有機半導体層30上には、ゲート絶縁層40を介してゲート電極50が形成されている。
An example of an organic semiconductor transistor included in the organic semiconductor device of the present invention will be described with reference to FIG.
FIG. 1E is a schematic cross-sectional view of a completed organic semiconductor transistor. An organic semiconductor layer 30 according to the present invention is formed on a substrate 10. The source / drain electrodes 20 are provided in contact with the organic semiconductor layer 30 at intervals. A gate electrode 50 is formed on the organic semiconductor layer 30 via a gate insulating layer 40.
次に図1に基づき作製工程を説明する。
(a)基板表面にソース及びドレイン電極のパターンを形成する。
電極パターンは、プラスチック等の基板上に金属電極を被着して形成する。また電極パターンは、プラスチック等の基板上に金属あるいはTTF−TCNQ等の有機導電体の粉末を散布しこれを押し固めたものでもよい。
(b)ゲート絶縁層となるフィルム40上にペンタセン、ルブレンといった有機半導体の粉末を静電吸着等により吸着させて有機半導体粉末層30’を形成する。
(c)基板表面上にフィルム40を、有機半導体粉末が吸着した面を下側にして重ね合わせる。
(d)フィルム40の表面より加圧して有機半導体粉末層30’を押し固めることにより有機半導体層30とする。
(e)ゲート絶縁層となるフィルム40上にゲート電極50を形成し有機半導体トラジスタが完成する。
Next, a manufacturing process will be described with reference to FIG.
(A) Form source and drain electrode patterns on the substrate surface.
The electrode pattern is formed by depositing a metal electrode on a substrate such as plastic. The electrode pattern may be obtained by spraying metal or a powder of an organic conductor such as TTF-TCNQ on a plastic substrate or the like and pressing the powder.
(B) An organic semiconductor powder layer 30 ′ is formed by adsorbing organic semiconductor powder such as pentacene or rubrene on the film 40 to be a gate insulating layer by electrostatic adsorption or the like.
(C) The film 40 is overlaid on the substrate surface with the surface on which the organic semiconductor powder is adsorbed facing down.
(D) The organic semiconductor layer 30 is formed by pressing from the surface of the film 40 and pressing the organic semiconductor powder layer 30 ′.
(E) The gate electrode 50 is formed on the film 40 to be the gate insulating layer, and the organic semiconductor transistor is completed.
これまではトップゲート型の有機半導体トラジスタを例示して本発明の作製方法を説明したが、本発明はボトムゲート型の有機半導体トラジスタにも当然適用できることは当業者には容易に理解される。
ボトムゲート型の有機半導体トラジスタの作製方法を纏めると次のような工程になる。
(a)表面にゲート電極のパターンが形成された基板を用意する工程
(b)有機半導体粉末を用意しゲート絶縁層となる第1のフィルムに吸着させる工程
(c)基板上に該第1のフィルムを有機半導体粉末が吸着した面を上側にして重ね合わせる工程
(d)その上にソース及びドレイン電極のパターンが形成された第2のフィルムを重ね合わせる工程
(e)該第2のフィルム表面より加圧して有機半導体粉末層を押し固めることにより有機半導体層とする工程
Until now, the manufacturing method of the present invention has been described by exemplifying a top gate type organic semiconductor transistor, but it is easily understood by those skilled in the art that the present invention can be applied to a bottom gate type organic semiconductor transistor.
The manufacturing process of the bottom gate type organic semiconductor transistor is summarized as follows.
(A) A step of preparing a substrate having a gate electrode pattern formed on the surface thereof (b) A step of preparing an organic semiconductor powder and adsorbing it on a first film to be a gate insulating layer (c) The first step on the substrate A step (d) of superimposing the film with the surface adsorbed with the organic semiconductor powder on the upper side (d) a step of superimposing a second film on which the pattern of the source and drain electrodes is formed (e) The process of forming an organic semiconductor layer by pressing and solidifying the organic semiconductor powder layer
(実施例)
次に本発明に係る有機半導体層の電気的特性を評価するため、有機半導体粉末を圧縮することで有機半導体層が形成された有機半導体トランジスタの作製方法を例示する。
はじめにソース・ドレイン電極となる膜厚2.5μmのAu箔を2枚平行に設置し、その上からポリビニルアルコール粉末とともに錠剤形成器で押し固めソース・ドレインが埋め込まれた基板を作製した。錠剤形成器での押し固めは、100〜300kgf/cm2の圧力範囲で行った。
(Example)
Next, in order to evaluate the electrical characteristics of the organic semiconductor layer according to the present invention, a method for manufacturing an organic semiconductor transistor in which the organic semiconductor layer is formed by compressing the organic semiconductor powder is illustrated.
First, two 2.5 μm-thick Au foils serving as source / drain electrodes were placed in parallel, and pressed together with polyvinyl alcohol powder by a tablet former to produce a substrate embedded with the source / drain. The compaction by the tablet forming machine was performed in a pressure range of 100 to 300 kgf / cm 2 .
次にゲート絶縁層として、1.2μmの厚みを持つポリエチレンナフタレート箔(PEN)を1mm×1mmの大きさに切り取った。この物質の比誘電率は2.9である。
メノウ乳鉢を用いて有機半導体粉末となるルブレンをよく磨り潰し直径10nm〜1μmとした後、帯電させた該PENフィルムに吸着させた。これを上記のソース・ドレイン電極が付着した基板上に乗せ、同様に錠剤形成器にて押し固め有機半導体トランジスタを構築した。錠剤形成器での押し固めは、10〜100kgf/cm2の圧力範囲で行った。
Next, a polyethylene naphthalate foil (PEN) having a thickness of 1.2 μm was cut to a size of 1 mm × 1 mm as a gate insulating layer. This material has a relative dielectric constant of 2.9.
Lubrene, which is an organic semiconductor powder, was thoroughly ground using an agate mortar to a diameter of 10 nm to 1 μm and then adsorbed on the charged PEN film. This was placed on the substrate on which the source / drain electrodes were attached, and similarly pressed with a tablet forming device to construct an organic semiconductor transistor. The compaction with the tablet former was performed in a pressure range of 10 to 100 kgf / cm 2 .
次にアジレントテクノロジー社製半導体評価解析装置E5270を用いて、作製したトランジスタの特性を評価した。評価したトランジスタのチャネル幅、チャネル長はそれぞれ1mm、0.2mmであった。なおトランジスタの作製から評価までのすべての工程を大気中にて実施した。 Next, the characteristics of the fabricated transistors were evaluated using a semiconductor evaluation analyzer E5270 manufactured by Agilent Technologies. The channel width and channel length of the evaluated transistors were 1 mm and 0.2 mm, respectively. Note that all steps from fabrication to evaluation of the transistor were performed in the air.
ルブレン粉末を押し固めることにより有機半導体層を形成した有機半導体トランジスタについて、ドレイン電圧を−30Vに固定しゲート電圧依存性を測定した結果を図3に示す。上記トランジスタは負のゲート電圧によってドレイン電流が増大するP型の電界効果トランジスタの動作特性を示した。 FIG. 3 shows the result of measuring the gate voltage dependency with the drain voltage fixed at −30 V for the organic semiconductor transistor in which the organic semiconductor layer is formed by pressing and solidifying the rubrene powder. The transistor showed the operating characteristics of a P-type field effect transistor whose drain current increases with a negative gate voltage.
標準的な電界効果トランジスタの移動度の評価式:μ=(dID/dVG)[L/(WCiVD)]を用いて線形領域で移動度を評価したところ、ルブレン粉末を押し固めることにより半導体層を形成した有機半導体トランジスタの正孔移動度は0.0001 cm2/Vsであった。但し、Ci はゲート絶縁層の絶縁容量、LとWはそれぞれチャネル長とチャネル幅、VG はゲート電圧、VD はドレイン電圧、IDはソース−ドレイン電流、μは移動度である。またこのトランジスタのオン/オフ比は、〜100であった。
図4は、様々なゲート電圧を印加した際の有機半導体トランジスタの電流−電圧特性である。図3にあるように本デバイスの伝達特性は、ゲート電圧が負の領域において、0Vからドレイン電流の上昇が見られ、低電圧駆動のデバイスであった。また、図3、図4にあるように、ゲート電圧が正である領域においては、非常に緩やかにドレイン電流が減少する振る舞いがみられている。これは、半導体層の厚みによるものと考えられ、更に半導体層を薄く形成する事で、オン/オフ比の上昇と共に観察されなくなるものと考えている。
Evaluation of mobility in a linear region using standard field effect transistor mobility evaluation formula: μ = (dI D / dV G ) [L / (WC i V D )], and compacts rubrene powder Thus, the hole mobility of the organic semiconductor transistor in which the semiconductor layer was formed was 0.0001 cm 2 / Vs. Where C i is the insulating capacity of the gate insulating layer, L and W are the channel length and channel width, V G is the gate voltage, V D is the drain voltage, I D is the source-drain current, and μ is the mobility. The on / off ratio of this transistor was -100.
FIG. 4 shows current-voltage characteristics of the organic semiconductor transistor when various gate voltages are applied. As shown in FIG. 3, the transfer characteristic of this device was a device driven at a low voltage because the drain current increased from 0 V in the negative gate voltage region. In addition, as shown in FIGS. 3 and 4, in the region where the gate voltage is positive, the drain current decreases very slowly. This is considered to be due to the thickness of the semiconductor layer, and it is considered that the semiconductor layer is not observed as the on / off ratio is increased by forming the semiconductor layer thinner.
上記の結果は、従来の真空蒸着法又は溶媒を用いたキャスト法等で形成された有機半導体層を有する有機半導体トランジスタと同様に、有機半導体粉末層を圧縮することによっても有機半導体層が形成され、これにもとづくトランジスタ動作が得られることを示している。したがって、本手法を用いる事で、真空機器及び溶媒を用いることなく有機半導体トランジスタを構築することが可能であることが分かる。 The above results indicate that the organic semiconductor layer is also formed by compressing the organic semiconductor powder layer, as in the case of an organic semiconductor transistor having an organic semiconductor layer formed by a conventional vacuum deposition method or a cast method using a solvent. This shows that transistor operation based on this can be obtained. Therefore, it can be seen that by using this method, an organic semiconductor transistor can be constructed without using vacuum equipment and a solvent.
これまで説明した実施例は、あくまでも本発明の理解を容易にするためのものであり、この実施例に限定されるものではない。すなわち、本発明の技術思想に基づく変形、他の態様は、当然本発明に包含されるものである。 The embodiment described so far is only for the purpose of facilitating the understanding of the present invention, and is not limited to this embodiment. That is, modifications and other aspects based on the technical idea of the present invention are naturally included in the present invention.
基板10としては、プラスチック等の基板に限定されず、ガラス等の基板あるいは表面に絶縁膜が形成された導電性基板であってもよい。また可撓性を有する基板であってもよい。
誘電体層30には、周知の材料である例えばポリエチレンナフタレート、二酸化珪素、窒化珪素、ポリイミド、ポリエチレン、ポリパラキシリレン(パリレン)などが使用される。
The substrate 10 is not limited to a substrate such as plastic, but may be a substrate such as glass or a conductive substrate having an insulating film formed on the surface thereof. Further, a flexible substrate may be used.
For the dielectric layer 30, known materials such as polyethylene naphthalate, silicon dioxide, silicon nitride, polyimide, polyethylene, polyparaxylylene (parylene), and the like are used.
なお一般的に有機半導体装置のソース・ドレイン電極40としては、金、銀、アルミニウム等の遷移金属材料や、電子供与性分子材料と電子受容性分子材料の分子化合物である導電性の高い電荷移動錯体薄膜が用いられる。特に高い電気伝導度を有する電荷移動錯体を用いる場合には、電極の形成工程においても本発明に係る有機半導体層と同様に、圧縮し形成することが可能である。 In general, the source / drain electrodes 40 of the organic semiconductor device include a transition metal material such as gold, silver, and aluminum, or a highly conductive charge transfer that is a molecular compound of an electron-donating molecular material and an electron-accepting molecular material. A complex thin film is used. In particular, when a charge transfer complex having high electrical conductivity is used, it can be compressed and formed in the electrode forming step as well as the organic semiconductor layer according to the present invention.
本発明による有機半導体膜あるいは有機半導体装置は、安価な有機半導体トランジスタとして利用できる。特に、エレクトロニクス分野における小型・大型画面表示(ディスプレー)装置のためのスイッチングデバイス、あるいはその駆動回路に用いられる相補型論理演算回路用の有機半導体トランジスタを製造する上で極めて有用である。 The organic semiconductor film or organic semiconductor device according to the present invention can be used as an inexpensive organic semiconductor transistor. In particular, it is extremely useful in manufacturing a switching device for a small and large screen display (display) device in the electronics field, or an organic semiconductor transistor for a complementary logic operation circuit used in its drive circuit.
10 基板
20 ソース・ドレイン電極
30’ 有機半導体粉末層
30 有機半導体層
40 ゲート絶縁層となるフィルム
50 ゲート電極
DESCRIPTION OF SYMBOLS 10 Board | substrate 20 Source / drain electrode 30 'Organic-semiconductor powder layer 30 Organic-semiconductor layer 40 Film 50 used as a gate insulating layer Gate electrode
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WO2017038771A1 (en) * | 2015-08-28 | 2017-03-09 | 国立大学法人千葉大学 | Manufacturing method for organic semiconductor device, and powder |
CN110707216A (en) * | 2019-10-24 | 2020-01-17 | 宁波石墨烯创新中心有限公司 | Graphene thin film transistor, preparation method thereof and display device |
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WO2019123893A1 (en) | 2017-12-20 | 2019-06-27 | Shiodaライフサイエンス株式会社 | Method for producing antioxidant or hair growth stimulant, and antioxidant or hair growth stimulant produced thereby |
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