JP2009086638A - Lcd control circuit of console panel, console panel and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an LCD control circuit of a console panel, a console panel and an image forming apparatus, preventing abnormal display when a backlight is turned on before completely eliminating residual electric charges of an LCD module. <P>SOLUTION: This control signal generation circuit 801 generates and outputs a DISP signal, and further acquires a CFL_ON1. A count setting part 802 sets a period from when the CFL_ON1 turns on to when the backlight is turned on as a delay time while securing the time determined for each LCD module 105 and required for eliminating residual electric charges according to a DISP signal. A control signal generation circuit 801 outputs a CFL_ON 2 for turning on the backlight the delay time after the CFL_ON1 turns on. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an LCD control circuit for an operation panel, an operation panel, and an image forming apparatus.

  Conventionally, operation panels of image forming apparatuses and the like have improved user convenience by maintaining common operability among models and series machines, and LCD modules used require a long product life. . Conventionally, the LCD (Liquid Crystal Display) used in such devices has been mainly the STN (Super Twisted Nematic) method, so we have developed custom LCDs and prepared for long-term procurement. A TFT (thin film transistor) type LCD module has a high development cost and it is difficult to generate a custom product, so that a general-purpose product is being used.

  TFT-type LCDs have a high development speed due to continuous cost reduction within manufacturers, and model changes and production lines have been changed in a relatively short period of time. As a result, the product life required by the image forming apparatus does not match, and it is necessary for a plurality of LCD manufacturers and the same manufacturer to adopt different models simultaneously or at different times. However, if the model differs between manufacturers or the same manufacturer changes, the internal driver circuit is changed due to cost reduction and the like, and the I / F signal and request timing must be changed.

  Specifically, as the I / F signal that changes due to the change of the driver circuit, the timing signal when boosting the LCD drive voltage from the logic voltage or the like, or the display data is cleared when the power is turned off. There is a display control signal for removing charges. There are two methods, that is, the case of being generated inside the driver circuit and the case of external supply. However, in the case of external supply, the LCD will deteriorate over time unless it is controlled at the normal timing.

  Conventionally, as a liquid crystal display device, a technique for preventing deterioration of liquid crystal by using a data latch pulse of an LCD or the like and generating a DISP signal by a switching Tr and a CR circuit only during a period when the control signal is active is disclosed ( For example, see Patent Document 1).

JP-A-8-248911

  However, in the prior art as described above, in recent years, LCD modules that process residual charges using a long period of several frames have come out, and the above-described invention cannot cope with them. ing. These signals can be controlled by a CPU (Central Processing Unit) even when the power is turned off, for example, if it is a personal computer, etc. In an image forming apparatus, etc., that is separated and has the display and its control unit shut off to minimize power consumption during standby, the display off control is controlled during preheating and power shutoff. There is no difference and it is difficult to control software. Therefore, in the past, we responded by changing the hardware according to the LCD specifications, but changing the hardware in a relatively short period of time is very efficient, and in some cases, new modules are on the market. There were problems such as being unable to mount on a machine.

  The present invention has been made in view of the above, and occurs when the backlight is turned on without waiting for the time to remove the residual charge of the LCD module even if the LCD module to be controlled changes. It is an object of the present invention to provide an LCD control circuit, an operation panel, and an image forming apparatus that can avoid abnormal display and can mount a new LCD module on an old model without changing the control circuit. To do.

  In order to solve the above-described problems and achieve the object, the invention according to claim 1 is a first output means for outputting a control signal for removing residual charges in the LCD module, and a backlight for the LCD module. Acquisition means for acquiring a reference signal serving as a reference when turning on, and determined for each of the LCD modules, and securing the time required for removing residual charges by the control signal, and after the reference signal is turned on, Setting means for setting a delay time for delaying the time until the backlight is turned on, and second output means for outputting a lighting signal for turning on the backlight with a delay of the delay time after the reference signal is turned on And.

  The invention according to claim 2 is the invention according to claim 1, wherein the second output means outputs the lighting signal that is turned off in synchronization with the reference signal.

  The invention according to claim 3 is the invention according to claim 1 or 2, characterized in that the order of the signals assigned to the connector connected to the LCD module and the number of signals are the same among the LCD modules. .

  According to a fourth aspect of the present invention, in the invention according to any one of the first to third aspects, the LCD control circuit can be connected to a pull-up resistor and a pull-down resistor, and the setting means includes the pull-up resistor. The delay time is set according to a connection state of a resistor and the pull-down resistor.

  The invention according to claim 5 is the invention according to any one of claims 1 to 3, wherein the LCD control circuit is connected to a resistor that can be switched on / off by a jumper switch, and the setting means includes: The delay time is set according to on / off of the resistor by the jumper switch.

  The invention according to claim 6 is the invention according to any one of claims 1 to 3, wherein the setting means sets the delay time input via the operation unit.

  The invention according to claim 7 is the invention according to any one of claims 1 to 3, further comprising detection means for detecting a determination signal for determining the type of the LCD module, wherein the setting means is detected. The delay time corresponding to the LCD module indicated by the determination signal is set.

  Further, in the invention according to claim 8, in the invention according to claim 7, when the LCD module indicated by the detected discrimination signal is a module that does not require the control signal, an output signal is determined from the lighting signal. The apparatus further comprises switching means for switching to the reference signal.

  The invention according to claim 9 is the invention according to any one of claims 1 to 8, wherein the frame rate of the LCD module is changed between a period during which the control signal is on and a period during which the control signal is off. It further comprises a changing means.

  The invention according to claim 10 is the invention according to claim 9, wherein the changing means sets a frame rate during a period in which the control signal is off to a frame rate during a period in which the control signal is on. It is also characterized by making it faster.

  The invention according to claim 11 is characterized in that, in the invention according to claim 10, the frame rate during the period when the control signal is OFF is the maximum value in the specification of the LCD module.

  The invention according to claim 12 is the invention according to any one of claims 9 to 11, wherein the changing means is such that the lighting signal is on at a frame rate during which the lighting signal is off. It is characterized by being faster than the frame rate of the period.

  The invention according to claim 13 is the invention according to any one of claims 9 to 12, wherein the changing means is such that the lighting signal is turned on from a frame rate during a period in which the control signal is on. When changing to the frame rate of the period, the frame rate is gradually reduced.

  According to a fourteenth aspect of the present invention, there is provided an LCD controlled by the LCD control circuit according to any one of the first to thirteenth aspects.

  According to a fifteenth aspect of the present invention, there is provided an operation panel having an LCD controlled by the LCD control circuit according to the fourteenth aspect.

  According to the present invention, the timing for turning on the backlight can be changed according to the time taken to remove the residual charge of the LCD module to be controlled. Therefore, even if the LCD module to be controlled changes, the residual charge of the LCD module can be changed. An abnormal display that occurs when the backlight is turned on without waiting for the removal of the battery can be avoided, and a new LCD module can be installed in the old model without changing the control circuit. There is an effect that can be.

  With reference to the accompanying drawings, an LCD control circuit for an operation panel according to the present invention, a digital multifunction peripheral (MFP) including the operation panel, an image forming apparatus such as a facsimile, a scanner, a copier, and a printer, The best embodiment of the operation panel will be described in detail.

(First embodiment)
FIG. 1 is an explanatory diagram illustrating an example of an operation panel of an image forming apparatus such as a copying machine. An LCD panel 105 and a touch panel 106 are mounted on the operation panel, and complicated function setting can be easily performed by touching a soft key on the screen. The digital multi-function peripheral may have a facsimile function and a printer function in addition to a copy function, and has an application switching key 111 for switching those applications. In addition, as a common key for each application, a start key 101 for starting copy and FAX transmission, a numeric key 103 for designating the number of copies and a destination to be transmitted, a clear / stop for clearing a numeric value and a copy operation, etc. A stop key 102, an interrupt key 107 for performing interrupt copying, a preheating key 108 for shifting / returning to the preheating mode, a program key 109 for holding / calling a predetermined copy mode, etc., and a standby mode with the lowest power Hard keys such as a power key 104 for transferring / returning are installed. Further, there is an alert display unit 110 that illuminates various alert displays such as toner end with an LED (Light Emitting Diode).

  FIG. 2 is a block diagram illustrating a configuration of a control system of the image forming apparatus including the operation panel illustrated in FIG. The image forming apparatus includes a system controller 200 that performs various image processing, an engine controller 201 that controls operation of the image forming apparatus, and an operation panel 100 that displays operation mode settings and operation status. The system controller 200 is further connected to an external storage device 208 such as a hard disk drive (HDD: Hard Disk Drive) for temporarily storing image data and the like, and a FAX controller 202 for controlling FAX applications. In the example of the system controller 200, the printer application can be expanded by adding an internal program ROM (Read Only Memory), and a server or a PC (personal computer) is connected by a NIC (Network Interface Card) or IEEE 1284 I / F. Connected to a computer) and output by a printer is possible.

  The engine controller 201 includes a fixing control unit 207 for controlling the lighting of a fixing heater for fixing the toner image on the sheet by heat and the temperature control of the fixing roller, and an electrostatic latent image on the photosensitive member in synchronization with sheet conveyance. The writing control unit 206 for forming and the reading control unit 213 for controlling reading of the original are connected to each other. Furthermore, an I / O controller 203 that performs drive control of motors, clutches, and the like 204 in the machine and processing of input signals from various sensors 204 is connected.

  On the operation panel 100, display control on the display device 211 such as the LCD module 105 and LEDs in the operation panel 100, and input from various key inputs 212 such as the touch panel 106 and the hard key switches 101 to 104, 107 to 109, 111, etc. There is an operation unit controller 210 (LCD control circuit) for processing information.

  In addition, there is a power supply unit (PSU) 209 for supplying necessary power to the entire device, and commercial power is rectified, smoothed and stepped down, and various DC power sources used in the device and a fixing heater are turned on. A heater power source for generating the power is generated.

  FIG. 3 is a block diagram showing an example of the internal configuration of the operation panel in FIG. The control of the operation panel 100 includes a CPU 300 constituted by a one-chip microcomputer, and is connected to the system controller 200 by a built-in communication function. The CPU bus controls a ROM 302 for storing control programs and data, a work RAM (Random Access Memory) 303 for temporarily storing and processing processing data, display control of the LCD module 105, and driving of the touch panel 106. An LCD controller 301 is connected. The LCD controller 301 is connected to a VRAM (Video RAM) 305 for storing display data of the LCD module 105, and the display data is sequentially read from the VRAM 305 and sent to the LCD module 105 together with a clock and a synchronization signal. In addition, a signal for controlling the backlight of the LCD module 105 is output to a CFL (Cathode Fluorescent Lamp) inverter (INV) 306, and a high-voltage output from the CFL inverter 306 is supplied to a CFL lamp as a backlight in the LCD module 105. Has been. The touch panel 106 often uses an analog type, and bias control of the touch panel 106 is performed via the driver 304 based on port data of the LCD controller 301, and pressed coordinate data is detected by an analog port of the CPU 300.

  The LED 307 and the key SW 308 are connected to a general-purpose port of the CPU 300, and the CPU 300 performs lighting control of the LED 307 and processing of input data from the key SW 308. The logic voltage detection circuit 309 monitors the power supply voltage of the logic circuit, and generates and supplies a reset signal for initialization to the CPU 300 and the LCD controller 301. + 24V and + 5V are supplied from the PSU 209 as the power source. When a power supply that requires a voltage accuracy of 3V or lower is required inside, it is generated in the control board by the regulator 310.

  Next, based on the configuration shown in FIGS. 1 to 3, the detailed configuration and operation of the operation panel 100 according to the present embodiment will be described. Here, specific examples of the I / F signal of the LCD module 105 will be described with reference to FIGS. 4 and 5 are tables showing examples of I / F signals of a conventional LCD module. 6 and 7 are tables showing examples of I / F signals of the LCD module provided in the operation panel according to the present embodiment.

  The LCD module 105 is often different in the order of I / F signals and the number of required signals as shown in FIGS. In this example, the DISP signal is not included in the I / F signal shown in FIG. 4, whereas the DISP signal is included in the I / F signal shown in FIG. The DISP signal is a timing signal for removing charges remaining in the TFT inside the LCD module 105. On the other hand, in the LCD module to which the I / F signal shown in FIG. 5 is input, a timing signal for performing processing for removing charges remaining in the TFT inside the LCD driver of the LCD module or a unique residual charge removal circuit is included. Therefore, it is no longer necessary to supply from the outside. Note that RGB display data, a power source, and a GND signal are assigned to the omitted portion.

  By the way, according to the operation unit controller 210 according to the present embodiment, the same control can be performed by the LCD module that requires the DISP signal and the unnecessary LCD module, but as shown in FIGS. 4 and 5, If the I / F signal assigned to the connector connected to the LCD module is significantly different, another control board will be prepared. Therefore, in this embodiment, as shown in FIGS. 6 and 7, the order and the number of signals assigned to the connectors connected to the LCD module 105 are the same between the LCD modules 105. The LCD module 105 that does not require a signal is reserved and not connected (NC). As a result, when assigning a signal to a connector connected to the LCD module 105, for example, when the LCD module 105 that does not require a DISP signal is connected, the terminal of the connector to which the DISP signal is assigned is set as a reserve terminal. By assigning other signals to the same terminal as the LCD module 105 that requires the DISP signal, it is possible to correspond to a plurality of LCD modules 105 with the same I / F. In addition, by preparing a large number of reserved (NC) in advance, a new circuit control board can be used when using the LCD module 105 that requires a different signal or when maintaining the old model. can do.

  FIG. 8 is a block diagram showing the main configuration, CFL_INV, and LCD module of the operation unit controller according to the present embodiment. As illustrated in FIG. 8, the operation unit controller 210 according to the present embodiment includes a control signal generation circuit 801 between the LCD controller 301 and the LCD module 105. The control signal generation circuit 801 is a signal that is necessary for a plurality of LCD modules, and is a reference signal (CFL_ON1) that is a reference when the backlight of the LCD module 105 is turned on, a vertical synchronization signal (VSYNC), A DISP signal is generated from the horizontal synchronization signal (HSYNC) and output. In the present embodiment, the control signal generation circuit 801 acquires CFL_ON1, CLK, HSYNC, VSYNC, DATA, ENAB, and the like from the LCD controller 301. Here, DATA is display data to be displayed on the LCD module 105. ENAB is a signal that enables the operation unit controller 210 to be used. CLK is a periodic signal that measures timing when the operation unit controller 210 operates.

  Further, since the normal display timing of the LCD module 105 is changed by the DISP signal generated here, the control signal generation circuit 801 sets the count setting described later after CFL_ON1 is turned on in order to turn on the backlight at an appropriate timing. A lighting signal (CFL_ON2) for turning on the backlight with a delay time set by the unit 802 is generated and output.

  The count setting unit 802 sets a delay time that is determined for each LCD module and delays the time from when CFL_ON1 is turned on to when the backlight is turned on while securing the time required to remove the residual charge by the DISP signal. Is. In the present embodiment, the count setting unit 802 sets, in the control signal generation circuit 801, the number of VSYNCs that can be counted within the time required to remove the residual charge by the DISP signal (hereinafter referred to as a count value) as a delay time. . Note that the CFL inverter 306 supplies a high-voltage output to the CFL lamp in the LCD module 105 according to ON / OFF of the generated CFL_ON2, and turns on the CFL lamp.

  FIG. 9 is a diagram illustrating an example of timing specifications required for the DISP signal. As shown in FIG. 9, the operation unit controller 210 performs an internal operation of the LCD module 105 after the DISP signal is turned off (“L”) → on (“H”) or on (“H”) → off (“L”). A white mask process for turning off the backlight is performed to remove residual charges in the LCD module 105. After the DISP signal is turned off ("L") → turned on ("H"), if the backlight is turned on before the normal display period, the display becomes abnormal. Conversely, the DISP signal is turned on ("H") → If the power supply of the LCD module 105 is cut off without waiting for a necessary frame period after being turned off ("L"), the LCD module 105 is deteriorated with time due to application of a DC bias. Therefore, the operation unit controller 210 executes the white mask process after the DISP signal is turned off (“L”) → on (“H”) or turned on (“H”) → off (“L”). As described above, the DISP signal is an important signal, but conventionally, in a system in which both devices having different I / F signals required for the operation unit controller 210 of the LCD module 105 are selected and used, a control circuit and It was necessary to combine with an LCD, which was not efficient. Therefore, in the present embodiment, the common operation unit controller 210 can be used for the modules that do not require the DISP signal and the necessary modules.

  Next, a detailed configuration example and operation of the control signal generation circuit 801 will be described in detail with reference to FIGS. FIG. 10 is a block diagram showing a detailed configuration of the control signal generation circuit according to the present embodiment. FIG. 11 is a timing chart of signals output from the control signal generation circuit according to this embodiment.

  First, an operation when the image forming apparatus is turned on will be described. When the reset (RST) is canceled after the image forming apparatus is turned on, DFF1 latches H level at the rise of the first horizontal synchronization signal (HSYNC), and JK1 is in a state that is not different from the reset state. Since the output of DFF1 is transmitted as it is, the DISP signal is turned on ("H") at the rise of the second HSYNC. When CFL_ON1 becomes “H” (backlight lighting), first, the AND output of the previous stage of JK1 becomes “H”, and the output of JK1 is inverted at the next rise of HSYNC, but CFL_ON1 becomes “H”. The state of the DISP signal does not change. When CFL_ON1 becomes “H”, the load state of the LV161 counter and the reset state of JK2 are canceled, and the LV161 subtracts the count value set by the count setting unit 802 from FFH to the vertical synchronization signal (FFH). VSYNC) is counted. When the count value of LV161 becomes FFH, a carry is output to JK2, CFL_ON2 is turned on ("H") at the next rise of VSYNC, and the backlight is turned on.

  Accordingly, after the image forming apparatus is powered on, the time from when the DISP signal is turned on (“H”) to when CFL_ON1 is turned on (“H”) is the number of frames (10 frames) shown in FIG. In consideration of the case where it is not satisfied, a count value is set by the count setting unit 802 to delay the timing at which the number of frames CFL_ON2 satisfying the specifications of the LCD module 105 is turned on ("H").

  Next, an operation when the backlight is turned off to shift to the preheating mode or the energy saving mode will be described. When CFL_ON1 is turned off ("H" → "L"), JK2 is reset. Therefore, CFL_ON2 becomes "L" in synchronization with CFL_ON1, and the backlight is turned off instantaneously. Further, since the output of SEL1 also becomes "L", the DISP signal also becomes "L" at the next rise of HSYNC. Thereby, the white mask process is started in the LCD module 105. Therefore, even if the mode is shifted to the energy saving mode and the operation panel 100 is turned off, the white mask period is ensured to satisfy the required specifications, so that the deterioration of the LCD module 105 can be prevented. Conversely, in the preheat mode, the backlight may then be turned on again ("H"). In this case, when CFL_ON1 becomes “H” again, the DISP signal becomes “H” at the next rise of HSYNC, and the display operation starts. Until this time, since the LV 161 is in the load state and JK2 is in the reset state, the CFL_ON2 does not display an abnormality because the prescribed number of frames is delayed in the same manner as when the power is turned on.

  Next, a count value setting method for setting a count value in the control signal generation circuit 801 of this embodiment will be described. In general, it is obvious that the count value using a program counter such as LV161 is represented by adding 1 to the reciprocal of the binary number of the necessary count number. For example, when the carry signal is latched and output after 10 counts, 0110H obtained by adding 1H to the reciprocal 0101H of 1010H may be set. In the count setting unit 802 of the present embodiment, the count value is similarly set when generating CFL_ON2 from CFL_ON1 in accordance with the required specifications of the LCD module 105.

  In this embodiment, the count setting unit 802 uses several types of setting methods in accordance with the manufacturing method and the maintenance method. This makes it possible to select an optimum method for the type of the system and the LCD module from among a plurality of count value setting methods, and the most effective control method can be configured. First, FIG. 12 is a diagram illustrating a method for setting a set value by a pull-up resistor and a pull-down resistor. The LCD control circuit 800 can connect a pull-up resistor and a pull-down resistor. The count setting unit 802 sets a count value (delay time) according to the connection state of the pull-up resistor and the pull-down resistor to the LCD control circuit 400. For example, as described above, when 0110H is set, it can be set by disabling RAH and RDH and RBL and RCL. In the LV 161, A is the lowest and D is the highest. This setting method can be used at low cost when one or more LCD modules 105 that do not require a DISP signal and one LCD module 105 that requires a DISP signal among a plurality of LCD modules 105 that are used. It becomes possible.

  FIG. 13 is a diagram illustrating a method for setting a set value using a jumper switch such as a DIP-SW. The LCD control circuit 400 is connected to a resistor that can be switched on / off by a jumper switch such as a DIP-SW. The count setting unit 802 sets a count value (delay time) in accordance with the on / off of the resistance by the jumper switch. When the count setting unit 802 wants to set to “0”, the jumper switch is turned on and set to “1”. You just need to turn off the jumper switch. This method is effective when one or more LCD modules 105 that require a DISP signal among a plurality of used LCD modules 105 are used. With this method, the count value can be changed in accordance with the LCD module 105 on the production line, so that any LCD module 105 can be accommodated. Further, there is an advantage that the LCD module 105 does not have to be limited when replacing the LCD in the market.

  There is also a setting method for outputting the count value from a port of the CPU 300 or an empty port of the LCD controller 301. As in FIG. 13, this setting method is most costly when one or more LCD modules 105 that do not require a DISP signal are required and one LCD module 105 is required among a plurality of LCD modules 105 that are used. Is cheaper, but only if the port has enough space.

  FIG. 14 is an explanatory diagram showing a setting method for setting the count value from the CPU or the LCD controller. When the count value is output and set from the CPU 300 port or the empty port of the LCD controller 301, as shown in FIG. 14, by providing a determination signal (SEL0, 1) for determining the type of the LCD module 105, software Automatic discrimination is possible. FIG. 15 is an explanatory diagram illustrating an example of changing the pull-down process for each LCD module. SEL0,1 are normally pulled up as shown in FIG. 15, the pull-down process is changed for each module on the LCD module 105 side, and the CPU 300 detects and reads the value of SEL0,1 via the LCD controller 301. Thus, the LCD module 105 can be identified. In FIG. 14, SEL0 and SEL1 are connected to the general-purpose port of the LCD controller 301, and the CPU 300 (not shown) reads the value of this port for determination.

  The CPU 300 gives a count value suitable for the LCD module 105 determined from the detected values of SEL0, 1 to the count setting unit 802 from the general-purpose port of the CPU 300 or the LCD controller 301, thereby controlling the timing suitable for the LCD module 105. Can be done. The count setting unit 802 sets a count value (delay time) given from the CPU 300 or the LCD controller 301. As a result, the control can be changed to the optimal control for the LCD module 105 by software control. In this example, the discrimination signal is 2 bits and 4 values of SEL0, 1, but if the number of LCD modules 105 is larger, the number of bits may be increased. The default signal processing may be a pull-down.

  It is also possible to set the count value input via the key SW 308 provided on the operation panel 100. When the CPU 300 gives the count value (delay time) input via the key SW 308 to the count setting unit 802, the count setting unit 802 sets the count value. For example, this is an effective setting method when a service person of the image forming apparatus directly inputs a count value. In this case, the service person needs to check a count value suitable for the LCD module 105 in advance. Alternatively, an appropriate count value can be selected and set while changing the count value set by the count setting unit 802.

(Second Embodiment)
The image forming apparatus according to the present embodiment selects a signal for controlling the lighting of the backlight according to the mounted LCD module, so that the LCD module that does not require a DISP signal is backed up at a regular timing. Since the light can be turned on, a delay in the display timing of the LCD module 105 can be prevented. Note that the configuration of the image forming apparatus is substantially the same as that of the first embodiment, and therefore only the processing of parts different from the first embodiment will be described.

  FIG. 16 is a block diagram showing the main configuration, CFL_INV, and LCD module of the operation unit controller according to the present embodiment. Among the LCD modules 105, there is also an LCD module 105 that does not require a DISP signal as described above. In this embodiment, when the discrimination signal of the LCD module 105 indicates a module that does not require the DISP signal, the operation unit controller 210 outputs the signal to the CFL_INV 306 by the signal selector 1601 as shown in FIG. By switching the signal from CFL_ON2 to CFL_ON1, the backlight lighting control is returned to the original timing.

  When the CPU 300 reads the value of the determination signal (SEL0, 1) and determines that the LCD module 105 does not require the DISP signal, the CPU 300 instructs the selection of CFL_ON1 output from the general-purpose port of the LCD controller 301 (CPU300). By inputting a signal to the signal selector 1601, switching is performed in a direction in which CFL_ON1 is selected. As a result, the signal input to the CF_INV 306 becomes CFL_ON1, and the backlight can be turned on / off at the original timing. When the LCD module 105 does not require the DISP signal, it is not necessary to delay the backlight control, and therefore the response can be improved by controlling at the original timing.

(Third embodiment)
The image forming apparatus according to the present embodiment is compatible with various LCD modules by changing the frame rate of the LCD module between a period when the backlight of the LCD module is lit and a period when the backlight is not lit. It is possible to minimize the delay time by controlling the timing of turning on the backlight. Note that the configuration of the image forming apparatus is substantially the same as that of the first embodiment, and therefore only the processing of parts different from the first embodiment will be described.

  The frame rate of the LCD module 105 usually has a width such as 40 to 80 Hz. The higher the frame rate, the higher the data processing speed required. Therefore, around 60 Hz is normally used, but in many cases it is variable, for example, by suppressing the flicker caused by interference with the lamp. By the way, as shown in FIG. 5, the processing time required to remove the residual charges inside the LCD module 105 is defined by the number of frames. Therefore, if the frame rate is increased, the processing time can be shortened. Even if an unexpected power failure occurs manually during the time, the influence of deterioration of the liquid crystal can be reduced. For this reason, in the present embodiment, the LCD controller 301 performs processing for making the frame rate during the DISP signal off ("L") faster than the frame rate during the DISP signal on ("H"). ing. FIG. 17 is a timing chart for explaining a period during which the frame rate is changed. The LCD controller 301 performs processing for making the frame rate for the period shown in B shown in FIG. 17 faster than the frame rate for the period when the DISP signal rises.

  Since the backlight is also off during the period when the DISP signal is off ("L"), there is no problem in appearance even if the frame rate is increased. In order to increase the frame rate, it is only necessary to increase the clock used by the LCD controller 301 for data processing. Recently, since the clock generator can be adjusted by the PLL method, the divider ratio in the PLL circuit can be increased. It can be easily done by fine-tuning.

  Further, as described above, if the frame rate is increased, a higher processing speed is required. Normally, since the control circuit is configured so that the range of the optimal frame rate of the LCD can be controlled, the LCD controller 301 sets the frame rate during the period when the DISP signal is off (“L”) to the specification of the LCD module 105. It is realistic to use the maximum value above.

  On the other hand, when the DISP signal changes from off (“L”) to on (“H”), in this embodiment, the LCD controller 301 delays lighting of the backlight as a result. Reducing the delay time is also an effective means for improving the user I / F. Therefore, in this embodiment, the LCD controller 301 makes the frame rate during the period when CFL_ON2 is off faster than the frame rate during the period when CFL_ON2 is on. As a result, even when the DISP signal is turned off (“L”) from on (“H”), the frame rate is increased and the delay time is shortened during the backlight off period. The period is the period shown in B and C shown in FIG. In order to return the frame rate to the normal timing, after the CFL_ON1 is turned on (“H”), the PLL set value is set at a timing at which the VSYNC output number of the LCD controller 301 becomes equal to the count value set in the count setting unit 802. This can be realized by VSYNC interrupt count processing in the LCD controller 301.

  When the response time of the backlight is fast, there may be a problem such as flickering on the display of the LCD module 105 in a minute period after the PLL set value is returned to the regular value and before the frame rate is returned. . In such a case, in this embodiment, the LCD controller 301 reduces the frame rate from the period in which the DISP signal is on ("H") to the period in which CFL_ON2 is on ("H"). It is also possible to perform control (so that the frame rate is gradually reduced). This is because when the CFL_ON1 is turned on soft ("H"), the DISP signal is turned on ("H") in synchronization with the next VSYNC, so the CPU 300 turns on the CFLON_1 ("H") and then VSYNC. If the set value of the PLL is changed so that the clock speed is slowed every time an interrupt is received, and the count value of the count setting unit 802 is reached, the PLL set value is adjusted to a normal value. Good.

  Therefore, according to the embodiment described above, the timing for turning on the backlight can be changed according to the time taken to remove the residual charge of the LCD module 105 to be controlled. Even if it changes, it is possible to avoid the abnormal display that occurs when the backlight is turned on without waiting for the time to remove the residual charge of the LCD module 105, and the old model without changing the control circuit A new LCD module can also be installed.

  In addition, when assigning a signal to an I / F connector connected to the LCD module 105 and the LCD module 105 that does not require a DISP signal for processing residual charges is connected, the connector to which the DISP signal is assigned. These terminals are reserved and other signals are the same as those of the LCD module 105 that requires the DISP signal, so that the same I / F can be used.

  In addition, a method most suitable for the type of the system and the LCD module 105 can be selected from a plurality of count value setting methods, and the most effective control method can be configured. Further, the CPU 300 detects a discrimination signal for discriminating the type of the LCD module, and sets a count value suitable for the LCD module 105 discriminated from the detected discrimination signal, so that the control is changed to the optimum control for the LCD module 105 by software control. It becomes possible.

  In addition, by providing a signal selector 1601 for selecting CFL_ON1 or CFL_ON2, which is a signal for controlling the lighting of the backlight, the normal backlight lighting control timing can be set for the LCD module 105 that does not require the DISP signal. Therefore, a delay in display timing can be prevented.

  Further, by increasing the frame rate during the period when the DISP signal is off (“L”) and the period when the backlight is off, the delay time caused by controlling the timing of turning on the backlight while supporting various LCD modules 105 is reduced. Can be minimized. Further, when the DISP signal is turned off ("H"), the change from the fast frame rate during the period when the DISP signal is off ("L") to the normal frame rate during the period when CFL_ON2 is turned on ("H"). In this manner, the display is flickered while the backlight is turned on, thereby preventing display flickering while minimizing the delay time.

  As described above, the LCD control circuit for the operation panel and the display control method for the operation panel according to this embodiment are useful for an operation panel using an LCD in an image forming apparatus such as a copying machine, a printer, or a facsimile machine. Particularly, it is suitable for a system in which hardware changes are reduced and a new LCD module is mounted on an old model.

FIG. 3 is an explanatory diagram illustrating an example of an operation panel of an image forming apparatus such as a copying machine. FIG. 2 is a block diagram illustrating a configuration of a control system of an image forming apparatus including the operation panel illustrated in FIG. 1. It is a block diagram which shows an example of an internal structure of the operation panel in FIG. It is a chart which shows the example of the I / F signal of the conventional LCD module. It is a chart which shows the example of the I / F signal of the conventional LCD module. It is a chart which shows the example of the I / F signal of the LCD module with which the operation panel concerning this embodiment is provided. It is a chart which shows the example of the I / F signal of the LCD module with which the operation panel concerning this embodiment is provided. It is a block diagram which shows the principal part structure of the operation part controller concerning this Embodiment, CFL_INV, and an LCD module. It is a figure which shows the example of the timing specification requested | required of a DISP signal. It is a block diagram which shows the detailed structure of the control signal generation circuit concerning this Embodiment. It is a timing chart of the signal output from the control signal generation circuit concerning this Embodiment. It is a figure which shows the method of setting a setting value with a pull-up resistor and a pull-down resistor. It is a figure which shows the method of setting a setting value with jumper switches, such as DIP-SW. It is explanatory drawing which shows the setting method which sets a count value from CPU or LCD controller. It is explanatory drawing which shows the example which changes a pull-down process for every LCD module. It is a block diagram which shows the principal part structure of the operation part controller concerning this Embodiment, CFL_INV, and an LCD module. It is a timing chart for demonstrating the period which changes a frame rate.

Explanation of symbols

100 Operation Panel 101 Start Key 102 Clear / Stop Key 103 Replace Key 104 Power Key 105 LCD Module 106 Touch Panel 107 Interrupt Key 108 Preheat Key 109 Program Key 110 Alert Display Unit 111 Application Switch Key 200 System Controller 201 Engine Controller 202 Fax Controller 203 I / O controller 204 Motor, clutch, sensor, etc. 206 Write control unit 207 Fixing control unit 208 HDD
209 PSU
210 Operation Unit Controller 211 Display Device 212 Various Key Inputs 213 Reading Control Unit 300 CPU
301 LCD controller 302 ROM
303 RAM
304 driver 305 VRAM
306 CFL_INV
307 LED
308 Key SW
309 Logic voltage detection circuit 310 Regulator 801 Control signal generation circuit 802 Count setting unit 1601 Signal selector

Claims (15)

First output means for outputting a control signal for removing residual charges in the LCD module;
An acquisition means for acquiring a reference signal which becomes a reference when the backlight of the LCD module is turned on;
A setting that is determined for each LCD module and sets a delay time that delays the time from when the reference signal is turned on until the backlight is turned on while securing the time required to remove residual charges by the control signal Means,
Second output means for outputting a lighting signal for turning on the backlight with a delay of the delay time after the reference signal is turned on;
An LCD control circuit comprising:   The LCD control circuit according to claim 1, wherein the second output unit outputs the lighting signal that is turned off in synchronization with the reference signal.   3. The LCD control circuit according to claim 1, wherein the order and the number of signals assigned to the connector connected to the LCD module are the same between the LCD modules. 4. The LCD control circuit can be connected to a pull-up resistor and a pull-down resistor,
The LCD control circuit according to claim 1, wherein the setting unit sets the delay time according to a connection state of the pull-up resistor and the pull-down resistor. The LCD control circuit is connected to a resistor that can be switched on / off by a jumper switch,
4. The LCD control circuit according to claim 1, wherein the setting unit sets the delay time according to on / off of the resistor by the jumper switch.   4. The LCD control circuit according to claim 1, wherein the setting unit sets the delay time input via an operation unit. A detection means for detecting a determination signal for determining the type of the LCD module;
4. The LCD control circuit according to claim 1, wherein the setting unit sets the delay time corresponding to the LCD module indicated by the detected determination signal.   The switching device for switching the output signal from the lighting signal to the reference signal when the LCD module indicated by the detected discrimination signal is a module that does not require the control signal. 8. The LCD control circuit according to 7.   9. The LCD according to claim 1, further comprising changing means for changing a frame rate of the LCD module between a period in which the control signal is on and a period in which the control signal is off. Control circuit.   10. The LCD control circuit according to claim 9, wherein the changing unit makes a frame rate in a period during which the control signal is off faster than a frame rate in a period during which the control signal is on.   11. The LCD control circuit according to claim 10, wherein a frame rate during a period in which the control signal is off is a maximum value in the specification of the LCD module.   The said change means makes the frame rate of the period when the said lighting signal is OFF faster than the frame rate of the period when the said lighting signal is ON, The Claim 1 characterized by the above-mentioned. LCD control circuit.   The change means, when changing from a frame rate during a period when the control signal is on to a frame rate during a period when the lighting signal is on, gradually reduces the frame rate. The LCD control circuit according to any one of 9 to 12.   An operation panel comprising an LCD controlled by the LCD control circuit according to claim 1. An image forming apparatus comprising an operation panel having an LCD controlled by the LCD control circuit according to claim 14.

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