JP2009086295A - Active matrix display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an active matrix display device which has color reproducibility improved while grouping video signal lines to keep pitch spacings. <P>SOLUTION: The active matrix display device includes a plurality of source bus lines corresponding to primary colors of image display, a gradation voltage generation part 20 which generates gradation voltages to be applied to the plurality of source bus lines respectively, and a second memory wherein gradation correction signals corresponding to a video signal are stored per primary color of image display. The source bus lines are divided into a plurality of groups, and a terminal of an output generated by the gradation voltage generation part 20 is shared for each group, and the gradation voltage generation part 20 generates gradation voltages per primary color of image display on the basis of the video signal and gradation voltage correction signals stored in the second memory and selectively applies the gradation voltages to the source bus lines. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an active matrix display device, and more particularly to a display device according to a time division drive system.

  In recent years, progress toward higher-definition display images in display devices has progressed, and demands from the market for higher-definition display devices have increased. For this reason, in a display device such as an active matrix display device that needs to increase the number of signal lines with higher definition, the length (width) of the display device with a limited number of signal lines is limited. The number of signal lines per unit length in the column direction and row direction is enormous. Since the pitch of the connection portion between the output terminal of the video signal line driving circuit (source driver) and the signal line of the display panel is an extremely short interval, it causes a connection failure between the source driver and the display panel.

  In order to solve such a problem, a configuration in which a plurality of video signal lines (source bus lines) are grouped together to group source lines, and an output terminal of a source driver is provided for each grouped source bus line Has been proposed (see Patent Document 1). For example, Patent Document 1 discloses a video signal line time division (SSD) drive type liquid crystal display device.

  This liquid crystal display device includes a liquid crystal panel 60 and a liquid crystal driving circuit 61 as shown in FIG. The operation of the liquid crystal drive circuit 2 will be described. The host device 66 transmits a video signal to the memory 67 and transmits a timing signal to the controller 5. The memory 4 stores, for example, video data for one frame from the video signal.

  Then, the controller 68 transmits a timing signal to the source driver 64, the gate driver 65, and the gradation voltage generation unit 70 in the liquid crystal panel 60. In addition, the controller 68 reads out the video signal from the memory 67 and transmits the video signal to the gradation voltage generation unit 70 in accordance with the timing of the timing signal received from the host device 66.

  After receiving the timing signal, the gate driver 8 applies a voltage to the gate bus lines G <b> 1 to GM (FIG. 5) formed in the display unit 63 at the timing based on the timing signal. That is, the gate driver 65 sequentially applies a voltage to each of the plurality of gate bus lines G1 to GM. The gradation voltage generator 70 generates a gradation voltage corresponding to the video signal, and applies the gradation voltage to the source driver 64 according to the timing of the timing signal.

  Further, as shown in FIG. 5, the liquid crystal panel 60 includes an active matrix display unit 63, a source driver 64 for driving 3M source bus lines S1 to S3M, and N gate bus lines G1 to GN. And a gate driver 65 to be driven.

  The display unit 63 includes source bus lines S1 to S3M, gate bus lines G1 to GM arranged substantially perpendicular to the direction in which the source bus lines S1 to S3M extend, gate bus lines G1 to GM, and source bus line S1. To pixels (not shown) formed at the intersections with S3M.

  The source driver 64 receives the gradation voltage from the gradation voltage generator 70 and selectively applies the gradation voltage to the source bus lines S1 to S3M in accordance with the timing of the timing signal.

  FIG. 6 is a conceptual diagram relating to the source bus lines S1 to S3M and their drive circuits (gate driver 65 and source driver 64) of an active matrix display device using a video signal line time division drive system.

  As shown in FIG. 6, the source bus lines are grouped as a set of three source bus lines, and the source bus lines constituting each set are switching elements provided at the end portions of the source bus lines. The output terminals OP1 to OPM of the source driver 64 are connected through 12SW1 to SW3M. That is, M output terminals 13OP1 to OPM are provided in the same number as the number of sets of source bus lines.

These switching elements 12SW1 to SW3M are controlled by signals transmitted from the controller 68, and can selectively switch the outputs from the output terminals OP1 to OPM to the source bus lines S1 to S3M. Therefore, for example, as shown in the timing chart of the video signal line division method in FIG. 6, video signal line time-division driving is possible by selectively switching the source bus lines SW1 to SW3M for transferring the video signal during one horizontal period. It becomes.
JP 2003-58119 A (published February 28, 2003)

  By the way, in a display device using the video signal line time-division driving method, pixels formed for each of the source bus lines SW1 to SW3M are generally formed in the same color.

  However, the liquid crystal display device displays different characteristics according to the voltage applied to each color (R, G, B, etc.). For this reason, the display by the source driver 4 in which the voltage applied to the source bus lines SW1 to SW3M is set to a single setting causes a reduction in display quality due to a decrease in color reproducibility.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide an active matrix display device in which video signal lines are grouped to maintain a pitch interval and prevent deterioration in color reproducibility. It is intended to provide.

  In order to solve the above problems, an active matrix display device according to the present invention is an active matrix display device that displays a color image composed of a plurality of different primary colors, and includes a plurality of video signal lines, A gradation voltage generation unit that generates a gradation voltage to be applied to each of the plurality of video signal lines; and a storage unit that stores a gradation correction signal corresponding to the video signal for each of the primary colors. The video signal lines are connected to a plurality of pixels that display any one of the plurality of primary colors, and the plurality of video signal lines are a plurality of groups each having a predetermined number of units. Each of the groups is connected to one input line, and the gradation voltage generation unit determines the gradation corresponding to the characteristics of the primary color for each primary color based on the gradation voltage correction signal. Voltage Generated, the gray scale voltage thus generated, to the video signal line in accordance with the primary colors of the grouped plurality of video signal lines, and wherein the selectively applied through the input lines.

  According to the above configuration, the active matrix display device (present display device) of the present invention is a device that displays a color image composed of a plurality of different primary colors. The primary colors here are, for example, the three primary colors (red, blue, green), but are not particularly limited thereto.

  The display device includes, for each primary color, a plurality of video signal lines, a gradation voltage generation unit that generates a gradation voltage to be applied to each of the plurality of video signal lines, and a gradation correction signal corresponding to the video signal. And a storage unit for storage. The video signal line here is a so-called source bus line. Furthermore, in this display device, each video signal line is connected to a plurality of pixels that display any one of the plurality of primary colors. That is, each pixel connected to a certain video signal line is connected to a pixel group that displays a certain primary color. That is, each video signal line plays a role of giving a video signal for displaying a specific primary color to each pixel. The plurality of video signal lines are divided into a plurality of groups each having a predetermined number (for example, three) as a unit, and one input line is connected to each group. With this configuration, the number of input lines can be significantly reduced as compared with the main lines of a plurality of video signal lines.

  In the present display device, the gradation voltage generation unit drives a plurality of video signal lines by a so-called video signal line time division driving method. Specifically, a gradation voltage corresponding to the characteristics of the primary color is generated for each primary color based on the gradation voltage correction signal in the storage unit. For example, a red gradation voltage corresponding to the red characteristic (or red pixel characteristic) is generated for red, while a blue gradation voltage corresponding to the red characteristic (or red pixel characteristic) is generated for blue. Is generated. The generated gradation voltage is selectively applied to the video signal line corresponding to the primary color among the grouped video signal lines through the input line. At this time, the input line and the grouped video signal lines are connected to each other via a switching element, and the video signal line to be driven is switched by driving the element.

  In this way, the display device drives each primary color pixel by a video signal corresponding to the characteristics of the primary color. Therefore, for each primary color, it is possible to prevent the display reproducibility deterioration due to the primary color pixels, and as a result, it is possible to prevent the color reproducibility of the entire display image from decreasing.

  As described above, the present display device has an effect of achieving both the grouping of the video signal lines to maintain the pitch interval and the prevention of the deterioration of the color reproducibility in the display image.

  In the active matrix display device according to the present invention, the gradation voltage generation unit includes a ladder resistor in which a plurality of resistors are connected in series, a voltage supply unit provided on a high voltage side of the dollar resistor, A voltage supply unit provided on the low voltage side of the ladder resistor, and at least one of the voltage supply units includes a plurality of power supply units provided for each color of the image display, and It is preferable to include a switching unit that switches the output.

  According to the above configuration, by providing the power supply unit provided for each color in at least one of the voltage supply unit on the high voltage side of the ladder resistor and the voltage supply unit on the low voltage side, gradation is provided for each color by a simple method. A voltage can be generated.

  In the active matrix display device according to the present invention, the storage unit is preferably a lookup table.

  As described above, the active matrix display device according to the present invention includes a plurality of video signal lines corresponding to primary colors for image display and a gray scale voltage for generating a gray scale voltage applied to each of the plurality of video signal lines. A generation unit, and a storage unit in which a gradation correction signal corresponding to a video signal is stored for each primary color of image display, and the video signal lines are divided into a plurality of groups, and a gradation voltage is generated for each group. The gradation voltage generation unit generates a gradation voltage for each primary color of the image display based on the video signal and the gradation voltage correction signal stored in the storage unit. The gradation voltage is selectively applied to the video signal line.

  Therefore, it is possible to prevent the color reproducibility from being lowered while grouping the video signal lines to keep the pitch interval.

  An embodiment of the present invention will be described with reference to the drawings.

  The liquid crystal display device according to the present embodiment includes a liquid crystal panel 1 and a liquid crystal driving circuit 2 as shown in FIG. The liquid crystal panel 1 includes a display unit 3, a source driver 4, and a gate driver 5. The liquid crystal drive circuit 2 includes a host device 6, a first memory 7, a controller 8, a gradation voltage control unit (control unit) 9, And a second memory (storage unit) 10.

[Liquid crystal drive circuit]
The host device 6 transmits a video signal (video data) to the first memory 7 and transmits a timing signal to the controller 8. The first memory 7 stores a video signal for one frame. The controller 8 transmits a timing signal to the source driver 4 and the gate driver 5. Further, the controller 8 reads out the video signal from the first memory 7 and sends it to the gradation voltage control unit 9. The second memory 10 stores setting values (gradation correction values) for correcting the gradation corresponding to the video signal for each primary color of the image display. That is, the second memory 10 stores an appropriate gradation correction value that matches the characteristics of each primary color of image display.

  The gradation voltage control unit 9 receives a video signal from the first memory 7 via the controller 8. Further, the gradation voltage control unit 9 reads the setting value corresponding to the received video signal from the second memory 10 and sends it to the source driver 4 together with the video signal as a gradation correction signal. Note that a lookup table may be used as the second memory 10 and a constant gradation correction signal may be transmitted to the source driver 4 in accordance with the video signal input to the gradation voltage control unit 9.

[LCD panel]
FIG. 3 is a schematic diagram showing a plane of the liquid crystal panel 1.

  As shown in FIG. 3, the liquid crystal panel 1 includes 3M (M is a positive integer) source bus lines (video signal lines) S1 to S3M extending from the source driver 4 and N (N is a line extending from the gate driver 5). A positive integer) gate bus lines G1 to GN are formed. Further, a pixel 25 is formed at each intersection of the source bus lines S1 to S3M and the gate bus lines G1 to GN. More specifically, R (red), G (green), and B (blue) pixels 25 are arranged in a matrix. For example, the R pixel 25 is provided at the intersection of the source bus lines S1, S4, S7 and the gate bus lines G1 to GN, and the G pixel is at the intersection of the S2, S5, S8 and the gate bus lines G1 to GN. B pixels are provided at the intersections of S3, S6, and S9 and the gate bus lines G1 to GN.

  The gate driver 5 supplies a voltage to the gate bus lines G1 to GN at a timing based on a timing signal from the controller 8.

  The source driver 4 is provided with M output terminals (terminals) OP1 to OPM that can be connected to the source bus lines S1 to S3M. Each of the source bus lines S1 to S3M includes switching elements SS1 to SS3M at the end on the source driver 4 side. More specifically, one output terminal OP1 is assigned to the three source bus lines S1 to S3, and an output from the output terminal OP1 (a level generated by a gradation voltage generation unit 20 described later). The regulated voltage) is selectively transferred to the source bus lines S1 to S3.

  Further, the source driver 4 includes a gradation voltage generation unit 20. The gradation voltage generation unit 20 generates a gradation voltage from the video signal and the gradation correction signal received from the gradation voltage control unit 9 and matches the source bus lines S1 to S3M in accordance with the timing based on the timing signal from the controller 8. A gradation voltage is selectively applied to That is, the source bus lines S1 to S3M are selectively transferred based on the timing signal from the controller 8 and are driven in line sequence. That is, the gradation voltage transmitted from the gradation voltage generator 20 is selectively transferred to the source bus lines S1 to S3M based on the timing signal. In other words, the output from the source driver 4 is transferred to the source bus lines S1 to S3M by the switching elements SS1 to SSM that have received the timing signal from the controller 8.

[About the gradation voltage generator]
The gradation voltage generator 20 includes a set of ladder resistors 30 composed of a plurality of resistance components (resistors) 34, a high voltage supply unit (voltage supply unit) 31 on the high voltage side that supplies a reference potential to the ladder resistors 30, and The voltage value between the low voltage supply unit (voltage supply unit) 32 on the low voltage side and the high voltage supply unit 31 and the low voltage supply unit 32 can be selectively output to each source bus line S1 to S3M by resistance division. And a first switching unit 33 including a plurality of switches 35.

  The high voltage supply unit 31 includes a high voltage power supply unit (power supply unit) 36R that is a power supply for R pixels, a high voltage power supply unit 36G that is a power supply for G pixels, and a high voltage power supply unit 36B that is a power supply unit for B pixels. And a second switching unit 37 that switches and outputs these power sources. Further, these power supply units 36R, 36G, and 36B generate and output VHR, VHG, and VHB as high-voltage side reference voltages, respectively.

  For example, when the source bus lines S1, S4, S7 are connected to the R pixel 25, the VHR of the power supply unit 36R with respect to the ladder resistor 30 is selected as the reference voltage by the first switching unit 33, and the source bus lines S2, S5 , S8 is connected to the G pixel 25, the VHG of the power supply unit 36G for the ladder resistor is selected as the reference voltage by the first switching unit 33, and the source bus lines S3, S6, S9 are connected to the B pixel 25. In this case, the gradation voltage control unit 9 converts the gradation correction signal stored in the second memory 10 into a step so that VGH of the power supply unit 36B with respect to the ladder resistor is selected by the first switching unit 33 as a reference voltage. Transmit to the regulated voltage generation unit 20.

  Similarly, the low voltage supply unit 32 includes a low voltage power supply unit (power supply unit) 38R that is an R pixel power supply, a low voltage power supply unit 38G that is a G pixel power supply, and a low voltage power supply that is a B pixel power supply unit. Unit 38B and a second switching unit 39 that switches and outputs these power sources. Further, these power supply units 38R, 38G, and 38B output VLR, VLG, and VLB as low-voltage side reference voltages, respectively. That is, the low voltage supply unit 32 transmits the reference voltages VLR, VLG, and VLB on the low voltage side of the ladder resistor 30 from the low voltage power supply units 38R, 38G, and 38B.

  Outputs from these power supply units to the ladder resistor 30 can be switched between the high voltage power supply unit and the low voltage power supply unit in synchronization with the timing signal from the controller 8.

  Specifically, based on the gradation correction value received from the second memory 10 via the gradation voltage control unit 9, the gradation voltage generation unit 20 includes the power supply units 36R, 36G, 36B, 38R, 38G, The optimum gradation voltage is generated for each of R, G, and B by switching the magnitude of the voltage of 38B and the switch of the first switching unit 33, and the output shown in FIG. Output to the source bus lines S1 to S3M corresponding to each color. Note that switching between R, G, and B in the gradation voltage generation unit 20 can be performed by the second switching unit 37 and the third switching unit 39.

  As described above, in the active matrix display device of this embodiment, the source bus lines are grouped into a plurality of groups, and the output terminals generated by the grayscale voltage generation unit for each group (that is, the output of the source driver) Terminal). Therefore, the pitch of the connection part between the source bus line and the source driver can be increased.

  Furthermore, in particular, in the present embodiment, a storage unit (second memory) is provided in which a gradation correction signal corresponding to a video signal is stored for each primary color of image display, and for each color based on this storage unit. A gradation voltage is generated and applied selectively to the source bus line.

  In the above description, the reference voltage for each color is one, but a configuration in which a plurality of reference voltages can be output for each color may be adopted. For example, another switching unit and a plurality of low voltage power supply units 36RL, 36RM, 36RH are provided inside the high voltage power supply unit 36R, and the output VHR of the high voltage supply unit 31 can be adjusted to three of VHRL, VHRM, VHRH. By using VHRL in the R shadow part, VHRM is used in the R halftone area (midtone part), and VHRH is used in the R highlight area (highlight part). The output voltage can be adjusted. Similarly, a plurality of reference voltages may be output to the high-voltage power supply unit 36G and the high-voltage power supply unit 36B, or the low-voltage power supply units 38R, 38G, and 38B provided in the low-voltage supply unit 32 may be output. On the other hand, a plurality of reference voltages may be output. Further, the power supply unit may output a plurality of reference voltages for both the high voltage supply unit 31 and the low voltage supply unit 32.

  Further, as described above, when each color is divided into, for example, a shadow portion, a midtone portion, and a highlight portion and the reference voltage of each color is used, VHRL, VHRM, and VHRH are prepared for R as described above. Similarly, VHGL, VHGM, and VHGH may be prepared for G and VHBL, VHBM, and VHBH may be prepared for B. However, if these multiple values are relatively close, share the power supply unit. Also good. This also applies to the voltage control on the low voltage side.

  Furthermore, at least one of the voltage levels of each of the power supply units may be set to the GND level, and may be determined as appropriate depending on the characteristics of the liquid crystal panel and necessary voltage characteristics, and is not particularly limited.

  Further, in the above description, the 3SSD system for controlling the three source bus lines S1 to S3M using the output from one source driver 4 is described as an example. However, the present invention should not be limited to this. 6 SSD system for controlling the six source bus lines S1 to S3M using the output from one source driver 4, and nine source bus lines S1 to S3M using the output from one source driver 4. It can be used for 9 SSD system, 12 SSD system, etc.

  Since the gradation voltage generation unit 20 that can change the reference voltage for each color of R, G, and B is provided, there is an effect that delicate voltage adjustment is possible for each color. In addition, since the gradation voltage generation unit 20 of the present application is provided for each group in which the source bus lines S1 to S3M are grouped, when the same color source bus line is formed in the group, the gradation voltage generation unit 20 is greatly increased. Reduction is possible. For this reason, power consumption can be reduced and unnecessary radiation applied to the driver circuit of the display device can be reduced, so that display quality can be improved. That is, the grouping of the source bus lines is not limited to the above method, and the same group may have the same color.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims. That is, embodiments obtained by combining technical means appropriately modified within the scope of the claims are also included in the technical scope of the present invention.

  The present invention can be used for an active matrix display device that performs a time-division drive display device.

1, showing an embodiment of the present invention, is a block diagram illustrating a configuration of a gradation voltage generation unit. FIG. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram illustrating a configuration of a display device according to an embodiment of the present invention. It is a schematic diagram which shows the plane of the display panel in the display apparatus shown in FIG. It is a block diagram which shows a prior art and shows the structure of a display apparatus. It is a schematic diagram which shows the plane of the display panel in the display apparatus shown in FIG. It is a timing chart of various signals, such as a vertical synchronization signal, showing the prior art.

Explanation of symbols

10 Second memory (storage unit)
20 gradation voltage generation unit 30 ladder resistor 31 high voltage supply unit (voltage supply unit)
32 Low voltage supply unit (voltage supply unit)
34 Resistance component (resistance)
36R, 36G, 36B High voltage power supply (power supply)
38R, 38G, 38B Low voltage power supply (power supply)
37 Second switching unit (switching unit)
39 Second switching unit (switching unit)
S1 to S3M Source bus line (video signal line)
OP1-OPM Output terminal (terminal)

Claims (3)

An active matrix display device that displays a color image composed of a plurality of different primary colors,
Multiple video signal lines;
A gradation voltage generator for generating a gradation voltage to be applied to each of the plurality of video signal lines;
A storage unit storing a gradation correction signal corresponding to a video signal for each primary color,
Each of the video signal lines is connected to a plurality of pixels that display any one of the plurality of primary colors.
The plurality of video signal lines are divided into a plurality of groups each having a predetermined number of units, and one input line is connected to each group,
The gradation voltage generation unit generates the gradation voltage corresponding to the characteristics of the primary color for each primary color based on the gradation voltage correction signal, and the generated gradation voltages are grouped into a plurality of groups. An active matrix display device, wherein the video signal line is selectively applied to the video signal line corresponding to the primary color through the input line. The gradation voltage generation unit includes a ladder resistor in which a plurality of resistors are connected in series, a voltage supply unit provided on a high voltage side of the ladder resistor, and a voltage supply unit provided on a low voltage side of the ladder resistor And
At least one of the voltage supply units is
The active matrix display device according to claim 1, further comprising: a plurality of power supply units provided for each color of the image display, and a switching unit that switches an output from the power supply units.   The active matrix display device according to claim 2, wherein the storage unit is a lookup table.

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