JP2009064972A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device which can be improved in the breakdown voltage by suppressing the current-collapse phenomenon. <P>SOLUTION: The semiconductor device 1 is equipped with a conductive substrate 2; a compound semiconductor portion 3, formed on one principal surface 2a of the substrate 2 and including a two-dimensional electron gas layer 12a, a source electrode 4, a drain electrode 5 and a gate electrode 6 formed at a first portion 51A on a surface 3a of the compound semiconductor portion 3; an auxiliary electrode 7 formed at a second portion 51B on the surface 3a of the compound semiconductor portion 3; and a connection conductor 8, electrically connecting the source electrode 4 and auxiliary electrode 7 to each other. The compound semiconductor portion 3 has a cutting groove 21, formed in a region between the source electrode 4 and auxiliary electrode 7 that cuts the two-dimensional gas layer 12a to divide the compound semiconductor portion 3 into a first portion 51A and a second portion 51B. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device such as a HEMT (high electron mobility transistor) in which a compound semiconductor portion having a two-dimensional charge gas layer or an electron transit layer is formed on a conductive substrate.

  Conventionally, a semiconductor device is known in which a compound semiconductor portion made of a GaN-based semiconductor material or the like is formed on a conductive substrate made of silicon or the like (see Patent Document 1). For example, a compound semiconductor unit including a conductive substrate, an electron transit layer formed of a GaN semiconductor layer and an electron supply layer formed of an AlGaN semiconductor layer formed on the substrate, and three electrodes formed on the surface of the compound semiconductor unit That is, a semiconductor device (HEMT) including an input / output electrode (source electrode and drain electrode) and a control electrode (gate electrode) is known. In general, the source electrode and the drain electrode are in ohmic (low resistance) connection with the compound semiconductor portion, and the gate electrode has a MIS structure formed with the compound semiconductor portion through a Schottky junction or an insulating film.

  In the semiconductor device described above, a two-dimensional electron gas layer (2DEG layer) is generated near the interface between the electron transit layer and the electron supply layer. When a voltage is applied between the source electrode and the drain electrode, electrons of the two-dimensional electron gas move at high speed between the source electrode and the drain electrode, and a main current corresponding to the voltage applied to the gate electrode flows.

  In the case of such a semiconductor device, a so-called current collapse phenomenon in which the current decreases when switching from off to on (or from reverse bias to forward bias) during high power operation becomes a problem. Incidentally, the current collapse phenomenon is said to occur when electrons trapped on the surface or inside of the compound semiconductor portion reduce the charge stored in the two-dimensional electron gas layer or the compound semiconductor portion. For this reason, a technique is known in which the current collapse phenomenon is suppressed by electrically connecting the substrate and any of the three electrodes and stabilizing the connected electrode and the substrate at the same potential.

However, when the electrode and the substrate are connected in this way, not only the withstand voltage between the three electrodes but also the withstand voltage between the electrode and the substrate occurs as a new problem. Here, in order to increase the withstand voltage between the electrode and the substrate, it is conceivable to increase the resistance value between the electrode and the substrate. In this case, it is conceivable to increase the resistance value between the electrode and the substrate by increasing the thickness of the compound semiconductor portion formed on the substrate.
JP 2000-286428 A

  However, nitride-based semiconductor materials are generally formed on heterogeneous substrates such as Si substrates and SiC substrates because it is difficult to obtain inexpensive and high-quality substrates. Also, in order to form a nitride-based semiconductor material, the temperature must be as high as about 1000 ° C. Due to the difference in thermal expansion coefficient between the substrate and the compound semiconductor portion, forming a thick compound semiconductor portion is a deformation of the substrate. Or cracks, so there is a limit. For this reason, as described above, there is a limit to increase the resistance value between the substrate and the electrode by the thickness of the compound semiconductor portion to improve the withstand voltage (for example, 1000 V or more).

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a semiconductor device capable of improving the breakdown voltage while suppressing the current collapse phenomenon.

  In order to achieve the above object, the invention according to claim 1 is a substrate, a compound semiconductor portion of a nitride-based compound semiconductor formed on the substrate and including an electron transit layer, and the compound semiconductor portion. The electron transit layer is formed so as to be separated from the upper surface of the substrate, and is formed on the first portion of the compound semiconductor portion, and a cutting groove that forms a first portion and a second portion in the compound semiconductor portion. An input / output or control electrode; an auxiliary electrode formed on the second portion of the compound semiconductor portion; and a connection conductor for electrically connecting one of the electrodes and the auxiliary electrode; A semiconductor device comprising:

  The invention according to claim 2 is a substrate, a compound semiconductor portion of a nitride-based compound semiconductor formed on the substrate and including a two-dimensional electron gas layer, and the two-dimensional from the top surface of the compound semiconductor portion A cutting groove formed so as to divide the electron gas layer and forming a first portion and a second portion in the compound semiconductor portion, and an input / output device formed on the first portion of the compound semiconductor portion Or a control electrode, an auxiliary electrode formed on the second portion of the compound semiconductor part, and a connection conductor that electrically connects one of the electrodes and the auxiliary electrode. This is a featured semiconductor device.

  According to a third aspect of the present invention, there is provided a compound semiconductor portion of a nitride-based compound semiconductor including a two-dimensional electron gas layer, and the compound semiconductor portion formed so as to divide the two-dimensional electron gas layer from an upper surface of the compound semiconductor portion. A cutting groove for forming a first portion and a second portion in the semiconductor portion, and a lower surface of the second portion of the compound semiconductor portion is dug to a position higher than the cutting groove, and the first portion of the compound semiconductor portion is An extension groove for forming a third part and a fourth part in part 2, an input / output or control electrode formed on the first part of the compound semiconductor part, and the extension groove An auxiliary electrode formed on the lower surface of the substrate or the compound semiconductor portion opposite to the cutting groove, and a connection conductor that electrically connects one of the electrodes and the auxiliary electrode. This is a semiconductor device.

  The invention described in claim 4 satisfies any one of claims 1 to 3, wherein the electrode connected to the auxiliary electrode is ohmic-connected to the compound semiconductor portion. It is a semiconductor device.

  According to a fifth aspect of the present invention, there is provided a conductive first substrate, a first compound semiconductor portion formed on one main surface of the first substrate and including a two-dimensional charge gas layer, An input / output electrode ohmically connected to the surface of the first compound semiconductor portion, a conductive second substrate, and a second compound semiconductor portion formed on one main surface of the second substrate; And an auxiliary electrode formed on the surface of the second compound semiconductor portion, a connection conductor for electrically connecting the electrode and the auxiliary electrode, and the other main surface of the first substrate and the first The semiconductor device is characterized in that the other main surface of the second substrate is bonded.

  According to the present invention, a cutting groove for cutting the two-dimensional charge gas or the electron transit layer, or between any of the input / output or control electrodes and the auxiliary electrode with respect to the substrate by bonding the substrates. Therefore, the breakdown voltage can be improved without forming a thick compound semiconductor portion while suppressing the current collapse phenomenon.

(First embodiment)
Next, a semiconductor device according to a first embodiment in which the present invention is applied to a HEMT will be described with reference to the drawings. FIG. 1 is a cross-sectional view of the semiconductor device according to the first embodiment. FIG. 2 is a plan view of the semiconductor device according to the first embodiment.

  As shown in FIG. 1, the semiconductor device 1 includes a substrate 2, a compound semiconductor unit 3, a source electrode 4, a drain electrode 5, a gate electrode 6, an auxiliary electrode 7, and a connection conductor 8. .

The substrate 2 is for epitaxially growing and supporting the compound semiconductor portion 3 on one main surface 2a. The substrate 2 is doped with boron, which is a p-type impurity at a concentration of about 1 × 10 ¹² cm ⁻³ to about 1 × 10 ¹⁹ cm ⁻³ , and has a resistance of about 0.01 Ωcm to about 1000 Ωcm. Type silicon single crystal. The substrate 2 has a thickness of about 100 μm to about 150 μm. The substrate 2 may be n-type silicon or an undoped or high resistance silicon substrate.

  The compound semiconductor unit 3 includes a buffer layer 11, an electron transit layer 12, and an electron supply layer 13 that are sequentially stacked on one main surface (upper surface) 2 a of the substrate 2.

  The buffer layer 11 is formed on the main surface (upper surface) 2 a of the substrate 2. The buffer layer 11 has a multilayer structure in which AlN layers and GaN layers are alternately and periodically stacked.

The electron transit layer 12 is a layer for causing electrons supplied from the electron supply layer 13 to move along the surface direction. The electron transit layer 12 is formed on the buffer layer 11 and has an Al _X In _Y Ga _1- XYN thickness of about 0.3 μm to about 10 μm (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y ≦ 1) is made of, for example, an undoped GaN layer.

The electron supply layer 13 is for supplying electrons to the electron transit layer 12. The electron supply layer 13 is formed on the electron transit layer 12 and has an Al _X In _Y Ga _1- XYN thickness of about 5 nm to about 50 nm (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ X + Y). ≦ 1), for example, consists of an undoped Al _X Ga _1-X N layer. The electron supply layer 13 is undoped but has the same characteristics as the n-type semiconductor. _X which is the ratio of Al to Ga in the Al _X Ga _1-X N layer is
0.2 <X <0.4, preferably X = 0.3
It is comprised so that.

Here, Al _X Ga _1-X N constituting the electron supply layer 13 has a wider band gap than GaN constituting the electron transit layer 12. As a result, a two-dimensional electron gas layer 12 a is formed in the region near the interface with the electron supply layer 13 in the electron transit layer 12.

  In the compound semiconductor portion 3, a cutting groove 21 is formed in a region between the source electrode 4 and the auxiliary electrode 7. The cutting groove 21 divides the compound semiconductor portion 3 into a first portion 51A and a second portion 51B. The cutting groove 21 is formed from the surface 3a of the compound semiconductor part 3 to a position deeper than the two-dimensional electron gas layer 12a, and is formed so as to reach the main surface (upper surface) 2a of the substrate 2 in FIG. Yes. Thereby, the cutting groove 21 cuts the two-dimensional electron gas layer 12 a and lengthens the leakage current path L between the drain electrode 5 and the auxiliary electrode 7.

  The source electrode 4 and the drain electrode 5 are for inputting / outputting electric signals, and are formed on the surface 3 a of the first portion 51 </ b> A of the compound semiconductor portion 3 at a predetermined interval. The source electrode 4 and the drain electrode 5 have a structure in which a Ti layer and an Al layer are sequentially stacked. The source electrode 4 and the drain electrode 5 are connected to the compound semiconductor portion 3 with a low resistance (ohmic).

  The gate electrode 6 is formed on the surface 3 a of the first portion 51 </ b> A of the compound semiconductor unit 3. The gate electrode 6 is disposed between the source electrode 4 and the drain electrode 5. The gate electrode 6 has a structure in which a Ni layer, an Au layer, and a Ti layer are sequentially stacked. The gate electrode 6 is in Schottky junction with the compound semiconductor portion 3.

  The auxiliary electrode 7 is formed on the surface 3 a of the second portion 51 </ b> B of the compound semiconductor portion 3 on the side opposite to the source electrode 4 across the cutting groove 21. The auxiliary electrode 7 has a structure in which a Ni layer, an Au layer, and a Ti layer are sequentially stacked. The auxiliary electrode 7 is in Schottky junction with the compound semiconductor portion 3.

  The connection conductor 8 is for electrically connecting the source electrode 4 and the auxiliary electrode 7. The connection conductor 8 is made of a wire such as a thin gold wire.

  Next, the operation of the semiconductor device 1 described above will be described.

  The semiconductor device 1 has a normally-on structure. Therefore, in the semiconductor device 1, when the potential of the source electrode 4 is higher than the potential of the drain electrode 5 and no voltage is applied to the gate electrode 6, the source electrode 4, the electron supply layer 13, and the two-dimensional electron gas. Electrons flow in the order of the layer 12a, the electron supply layer 13, and the drain electrode 5 (see the dotted line in FIG. 1).

  On the other hand, when an off control voltage is applied between the gate electrode 6 and the source electrode 4, a reverse bias voltage is applied to the Schottky junction between the gate electrode 6 and the compound semiconductor portion 3. For this reason, a depletion layer is formed in the compound semiconductor part 3, and the two-dimensional electron gas layer 12a is cut off by this depletion layer, and it will be in an OFF state.

  Here, in the semiconductor device 1, since the source electrode 4 and the auxiliary electrode 7 are electrically connected by the connection conductor 8, the potential of the substrate 2 on the current path between the source electrode 4 and the auxiliary electrode 7 is Stabilize. This stabilizes the electrical characteristics of the semiconductor device 1 during operation. In addition, current collapse caused by electrons trapped in the vicinity of the gate electrode 6 on the surface 3a of the compound semiconductor portion 3 is suppressed. The current collapse is suppressed by the connection between the source electrode 4 and the auxiliary electrode 7 because the electron trapped on the surface 3 a of the compound semiconductor portion 3 is provided by providing an electron open path in addition to the inside of the substrate 2. It is thought that it becomes easy to be discharged.

  Next, a method for manufacturing the semiconductor device 1 described above will be described.

  First, the compound semiconductor portion 3 is formed by sequentially stacking the buffer layer 11, the electron transit layer 12, and the electron supply layer 13 on one main surface 2 a of the substrate 2 by MOVPE (metal organic chemical vapor deposition).

  Next, after forming a resist film in a desired pattern, a Ti layer and an Al layer are sequentially stacked on the surface 3a of the compound semiconductor portion 3 by sputtering. Thereafter, the Ti layer and the Al layer on the resist film are removed together with the resist film, and the source electrode 4 and the drain electrode 5 are formed. Then, the source electrode 4 and the drain electrode 5 and the compound semiconductor part 3 are ohmically connected by heat treatment.

  Next, after forming a resist film, a Ni layer, an Au layer, and a Ti layer are sequentially stacked on the surface 3a of the compound semiconductor portion 3 by sputtering. Thereafter, together with the resist film, the Ni layer, Au layer, and Ti layer on the resist film are removed to form the gate electrode 6 and the auxiliary electrode 7 that are Schottky-bonded to the compound semiconductor portion 3. Next, after forming a resist film, a cutting groove 21 reaching a position deeper than the two-dimensional electron gas layer 12a from the surface 3a side of the compound semiconductor portion 3, for example, the main surface 2a of the substrate 2 in FIG. . Next, after dividing into element units, the source electrode 4 and the auxiliary electrode 7 are connected by the connection conductor 8 to complete the semiconductor device 1.

  As described above, in the semiconductor device 1 according to the first embodiment of the present invention, the cutting groove 21 is formed between the auxiliary electrode 7 and the source electrode 4. As a result, the first embodiment of the present invention has no cutting groove as compared to the leakage current path between one of the three electrodes, for example, the drain electrode and the substrate in the semiconductor device in which the source electrode and the substrate are electrically connected. Since the leakage current path L between the drain electrode 5 and the auxiliary electrode 7 in one embodiment becomes long, the resistance value can be doubled. As a result, the breakdown voltage between the drain electrode 5 and the auxiliary electrode 7 can be improved while stabilizing the electric potential of the substrate 2 and realizing stable electrical characteristics and suppression of the current collapse phenomenon.

  Further, by forming the drain electrode 5 on the opposite side of the auxiliary electrode 7 with the gate electrode 6 interposed therebetween, the leakage current path L between the auxiliary electrode 7 and the drain electrode 5 can be reduced even if the width of the cutting groove 21 is reduced. Can be long enough. Thereby, even if the width of the cutting groove 21 is narrowed, a sufficient breakdown voltage between the drain electrode 5 and the auxiliary electrode 7 can be secured.

(Second Embodiment)
Next, a semiconductor device according to a second embodiment obtained by changing a part of the first embodiment described above will be described with reference to the drawings. FIG. 3 is a cross-sectional view of the semiconductor device according to the second embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to 1st Embodiment, and description is abbreviate | omitted.

  As shown in FIG. 3, an extension groove 22 is formed between the auxiliary electrode 7A and the cutting groove 21 to lengthen the leakage current path L between the drain electrode 5 and the auxiliary electrode 7A. The extension groove 22 divides the substrate 2 into a first part 52A on which the first part 51A of the compound semiconductor part 3 is provided and a second part 52B. The extension groove 22 and the semiconductor device 1A In, it is dug from the opposite side. That is, the extension groove 22 is formed from the back surface 2b of the substrate 2 to the inside of the semiconductor device 1A. The extension groove 22 is formed to divide the second portion 51B of the compound semiconductor portion 3 into a third portion 51C and a fourth portion 51D. The bottom surface 22 a of the extension groove 22 is formed on the surface 3 a side (higher position) of the compound semiconductor portion 3 than the bottom surface 21 a of the cutting groove 21.

  The auxiliary electrode 7A is formed on the other main surface (lower surface) 2b of the second portion 52B of the substrate 2 that is in contact with the fourth portion 51D of the compound semiconductor portion 3. Further, two grooves (cutting groove 21 and extension groove 22) are dug from different surfaces. As a result, the leakage current path L between the drain electrode 5 and the auxiliary electrode 7A can be made longer and the resistance value can be increased. As a result, the breakdown voltage between the drain electrode 5 and the auxiliary electrode 7A can be improved about three times as compared with the case where the cutting groove 21 and the extension groove 22 are not provided. Further, as in the first embodiment, the potential of the substrate 2 is stabilized to improve the withstand voltage between the drain electrode 5 and the auxiliary electrode 7A while stabilizing the electrical characteristics and suppressing the current collapse phenomenon. Can do.

(Third embodiment)
Next, a semiconductor device according to a third embodiment in which a part of the first embodiment described above is changed will be described with reference to the drawings. FIG. 4 is a cross-sectional view of the semiconductor device according to the third embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to 1st Embodiment, and description is abbreviate | omitted.

  As shown in FIG. 4, in the semiconductor device 1B according to the third embodiment, the arrangement of the source electrode 4 and the drain electrode 5 is switched, and the auxiliary electrode 7 is electrically connected to the drain electrode 5, This is the same as the semiconductor device 1 according to the first embodiment. Therefore, the semiconductor device 1B according to the third embodiment can achieve substantially the same effect as that of the first embodiment. The auxiliary electrode 7 may be electrically connected to the gate electrode 6 instead of the drain electrode 5.

(Fourth embodiment)
Next, the semiconductor device of 4th Embodiment is demonstrated with reference to drawings. FIG. 5 is a cross-sectional view of the semiconductor device according to the fourth embodiment. In addition, the same code | symbol is attached | subjected to the structure similar to 1st Embodiment, and description is abbreviate | omitted.

  As shown in FIG. 5, a semiconductor device 1C according to the fourth embodiment includes a substrate (corresponding to a second substrate in claims) 2A having the same configuration as a substrate (corresponding to a first substrate in claims) 2 and , A compound semiconductor portion including a buffer layer 11A, an electron transit layer 12A, and an electron supply layer 13A having the same configuration as that of the compound semiconductor portion 3 (corresponding to the first compound semiconductor portion of the claims) (the second compound semiconductor of the claims) 3A). An auxiliary electrode 7A that is electrically connected to the source electrode 4 through the connection conductor 8 is formed on the surface 3Aa of the compound semiconductor portion 3A. Here, the back surface 2b of the substrate 2 and the back surface 2Ab of the substrate 2A are bonded together by a known substrate bonding technique.

  By configuring in this way, the leakage current path L between the drain electrode 5 and the auxiliary electrode 7A can be lengthened, so that the same effect as the semiconductor device 1 of the first embodiment can be obtained. In addition, you may comprise the board | substrate 2 and the board | substrate 2A by a different board | substrate. Furthermore, the compound semiconductor part 3 and the compound semiconductor part 3A may be made of different semiconductor materials.

  As mentioned above, although this invention was demonstrated in detail using embodiment, this invention is not limited to embodiment described in this specification. The scope of the present invention is determined by the description of the claims and the scope equivalent to the description of the claims. Hereinafter, modified embodiments in which the above-described embodiment is partially modified will be described.

  For example, in the first to third embodiments described above, the cutting groove is formed so as to reach the main surface of the substrate, but the depth of the cutting groove is not particularly limited. Specifically, the cutting groove may be configured to cut the two-dimensional electron gas layer. Therefore, the cut groove only needs to reach the lower surface of the two-dimensional electron gas layer, and the cut groove may reach the inside of the substrate.

  Further, the auxiliary electrode, the compound semiconductor portion, and the substrate are not limited to the Schottky junction, and may be ohmic-connected.

  Moreover, the material which comprises each semiconductor layer, an electrode, etc. can be changed suitably. For example, the substrate may be made of a conductive material such as SiC other than silicon.

  In each of the above-described embodiments, an example in which the present invention is applied to the HEMT has been described. However, the auxiliary electrode is electrically replaced with another semiconductor device, for example, an electrode constituting a MESFET or a Schottky diode. You may apply this invention so that it may connect.

  In the above-described embodiment, the semiconductor device having a two-dimensional electron gas layer has been described. However, the present invention may be applied to a semiconductor device having a two-dimensional hole gas layer.

  Further, the gate electrode 6 may have a MIS structure instead of the Schottky electrode, and the source electrode 4 and the drain electrode 5 may be formed in a comb shape.

  In each of the above-described embodiments, an example adapted to a normally-on type HEMT has been shown. May be adapted.

1 is a cross-sectional view of a semiconductor device according to a first embodiment. 1 is a plan view of a semiconductor device according to a first embodiment. It is sectional drawing of the semiconductor device by 2nd Embodiment. It is sectional drawing of the semiconductor device by 3rd Embodiment. It is sectional drawing of the semiconductor device by 4th Embodiment.

Explanation of symbols

1, 1A, 1B, 1C Semiconductor device 2, 2A Substrate 2a Main surface 2b Back surface 3, 3A Compound semiconductor part 3a, 3Aa Front surface 4 Source electrode 5 Drain electrode 6 Gate electrode 7 Auxiliary electrode 8 Connection conductor 11, 11A Buffer layer 12, 12A Electron travel layer 12a Two-dimensional electron gas layer 13, 13A Electron supply layer 21 Cutting groove 21a Bottom surface 22 Extension groove 22a Bottom surface L Leakage current path

Claims (5)

A substrate,
A compound semiconductor portion of a nitride-based compound semiconductor formed on the substrate and including an electron transit layer;
A cutting groove formed to divide the electron transit layer from an upper surface of the compound semiconductor portion, and forming a first portion and a second portion in the compound semiconductor portion;
An input / output or control electrode formed on the first portion of the compound semiconductor portion;
An auxiliary electrode formed on the second portion of the compound semiconductor portion;
A semiconductor device comprising: a connection conductor that electrically connects one of the electrodes to the auxiliary electrode. A substrate,
A compound semiconductor portion of a nitride compound semiconductor formed on the substrate and including a two-dimensional electron gas layer;
A cutting groove formed to divide the two-dimensional electron gas layer from an upper surface of the compound semiconductor portion, and forming a first portion and a second portion in the compound semiconductor portion;
An input / output or control electrode formed on the first portion of the compound semiconductor portion;
An auxiliary electrode formed on the second portion of the compound semiconductor portion;
A semiconductor device comprising: a connection conductor that electrically connects one of the electrodes to the auxiliary electrode. A compound semiconductor portion of a nitride-based compound semiconductor including a two-dimensional electron gas layer;
A cutting groove formed to divide the two-dimensional electron gas layer from an upper surface of the compound semiconductor portion, and forming a first portion and a second portion in the compound semiconductor portion;
An extension groove that is dug from the lower surface of the second portion of the compound semiconductor portion to a position higher than the cutting groove, and forms a third portion and a fourth portion in the second portion of the compound semiconductor portion; ,
An input / output or control electrode formed on the first portion of the compound semiconductor portion;
An auxiliary electrode formed on the lower surface of the substrate or the compound semiconductor portion on the opposite side of the cutting groove across the extension groove;
A semiconductor device comprising: a connection conductor that electrically connects one of the electrodes to the auxiliary electrode.   The semiconductor device satisfying any one of claims 1 to 3, wherein the electrode connected to the auxiliary electrode is ohmically connected to the compound semiconductor portion. A conductive first substrate;
A first compound semiconductor portion formed on one main surface of the first substrate and including a two-dimensional charge gas layer;
An input / output electrode ohmically connected to the surface of the first compound semiconductor portion;
A conductive second substrate;
A second compound semiconductor portion formed on one main surface of the second substrate;
An auxiliary electrode formed on the surface of the second compound semiconductor portion;
A connection conductor for electrically connecting the electrode and the auxiliary electrode;
A semiconductor device, wherein the other main surface of the first substrate and the other main surface of the second substrate are bonded together.

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