JP2009060262A - Differential driving circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a differential driving circuit improved in transmission speed and reduced in EMI by reducing the parasitic capacitance of a transistor connected to a differential transmission line. <P>SOLUTION: The differential driving circuit comprises a driving circuit 10 equipped with a current source which uses a current mirror for driving a differential transmission line and a switch for transmitting a current from a current source to the differential transmission line, and a bias circuit 200 which applies a bias voltage to the current source using the current mirror. A current value which drives the differential transmission line is controlled in the bias circuit 200, and the bias voltage is generated without connecting many transistors to the differential transmission line. The generated bias voltage is changed to control the current value of the current source using the current mirror. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a differential drive circuit for transmitting a low voltage differential signal at high speed.

  In recent years, low-voltage differential signal technology has been used in differential transmission lines in order to realize high-speed signal transmission of several hundred megabits / second or more. Low-voltage differential signal technology uses two wires to reduce the signal amplitude and transmit electrical signals to increase transmission speed, increase external noise resistance, and reduce EMI. And differential transmission for transmitting electrical signals having different polarities. In the differential transmission driving method for transmitting electrical signals of different polarities, the direction of the current flowing from the current source to the transmission path in the differential driving circuit is controlled by a switch, and the signal is sent by flowing the differential current through the transmission path. In the receiving circuit, a current is converted into a voltage by a terminating resistor and a signal is received.

  By the way, in the high-speed transmission by the above driving method, even the parasitic capacitance added to the pins of the package becomes a problem, and high-speed transmission may not be ensured. Therefore, a technique for ensuring the signal transmission speed and realizing the differential amplitude is required. For example, this technique is disclosed in Patent Document 1 below.

  FIG. 6 is a block diagram of a conventional differential drive circuit described in Patent Document 1 below.

  In this circuit, the current value of a current source composed of a current mirror is controlled by a transistor serving as a switch, so that driving capability is enhanced during signal transmission and high-speed transmission is ensured. In addition, when the signal is not transmitted, the driving capability is reduced to realize low power consumption.

  However, in the differential drive circuit as shown in FIG. 6, when transmitting a signal, the amount of current is always increased in order to increase the drive capability, so that the power consumption increases. In addition, the common voltage also fluctuates due to power fluctuations and the like, causing EMI. For this reason, for example, Patent Document 2 below discloses a pre-emphasis technique for improving the signal transmission speed while suppressing an increase in power consumption, and a potential variable technique for reducing EMI.

  FIG. 7 shows a conventional differential drive circuit using this pre-emphasis technique.

According to the differential drive circuit shown in FIG. 7, the pre-emphasis circuits 21 and 22 detect the rising edge and the falling edge of the input signal, and a current larger than the steady current is transmitted for a certain time at the edge portion. 17 and 18 suppresses edge rounding and improves transmission speed with a small increase in power consumption. In addition, by detecting and correcting variations in the common voltage, the common voltage is kept constant and EMI is reduced.
Japanese Patent Laid-Open No. 9-214314 JP 2002-368600 A

  However, in the case of the technique described in Patent Document 1, when a plurality of switches for increasing the resolution of current value control are provided as shown in FIG. The capacitances of many transistors are parasitic on the nodes connected to the transistors 17 and 18. As a result, noise propagates from the power supply or the substrate through the parasitic capacitance of the transistor, leading to a decrease in transmission speed and generation of EMI.

  Also, in the case of the differential drive circuit described in Patent Document 2, the circuit that provides the pre-emphasis function is connected to the transmission line via a switch to increase the parasitic capacitance of the transmission line. As with the differential drive circuit disclosed in Patent Document 1, there are problems that the transmission speed is reduced and EMI is generated.

  Also in differential transmission, there is a problem that the fluctuation of the common-mode voltage in the transmission line causes EMI.

  Therefore, in order to solve such a problem, the present invention controls the current value without connecting a large number of transistors to the transmission line and reduces the parasitic capacitance of the transistors connected to the transmission line. It is an object of the present invention to provide a differential drive circuit that improves speed and reduces EMI.

  In order to solve the above problems, the differential drive circuit according to the present invention has the following configuration and characteristics.

  A differential drive circuit according to the present invention includes a current source using a current mirror for driving a pair of differential transmission lines and a switch for transmitting a current from the current source to the differential transmission line. And a bias circuit for applying a bias voltage to a current source using the current mirror, and the bias circuit generates and generates the bias voltage to be supplied to the current source using the current mirror. The bias voltage is changed to control a current value of a current source using the current mirror.

  Further, in the differential drive circuit according to the present invention, the bias circuit includes a current-voltage conversion unit that generates the bias voltage, a current source using a current mirror, and mirrors the current, and the current-voltage conversion unit One or more current sources to be supplied, the on / off switching control of each current source supplied to the current-voltage conversion means is performed, and the bias voltage corresponding to the control is generated It is characterized by.

  In the differential drive circuit according to the present invention, the bias circuit further includes a termination resistor dummy circuit connected in series to the current-voltage converter, and a current flowing through the termination resistor dummy circuit and a current of the drive circuit It is characterized in that matching of current values with a current source using a mirror is enhanced.

  Further, in the differential drive circuit according to the present invention, the termination resistor dummy circuit includes a first resistor and a second resistor each having a resistance value that is half the resistance value of the termination resistor of the differential transmission line. The bias circuit compares a potential of a node connecting the first resistor and the second resistor with a predetermined constant voltage, and controls a current flowing through the termination resistor dummy circuit. Thus, the potential of the node is controlled to be a desired voltage value.

  In the differential drive circuit according to the present invention, the bias circuit includes a detection circuit that detects a logic switching edge of an input signal, and the detection circuit detects the edge and then supplies the current / voltage conversion unit with the detection circuit. A control signal for performing on / off switching control of a current source to be supplied is generated, and current from a current source for driving the differential transmission line is pre-emphasized.

  Further, in the differential drive circuit according to the present invention, the detection circuit includes a first delay circuit that adjusts a delay time from the switching of the logic of the input signal to the detection of the edge, and the differential transmission line. And a second delay circuit for setting a signal width of the control signal for pre-emphasis current from a current source for driving to a desired value.

  The differential drive circuit according to the present invention having the above configuration can provide the following effects.

  According to the differential drive circuit of the present invention, the transmission speed can be improved by controlling the current value without connecting many transistors to the transmission line and reducing the parasitic capacitance of the transistors connected to the transmission line. In addition, EMI can be reduced by having a current control structure in the bias circuit.

  Further, according to the differential drive circuit of the present invention, it is possible to suppress the rounding of the edge portion of the drive current signal of the drive circuit, to further improve the transmission speed and to prevent the generation of EMI due to the fluctuation of the common mode voltage. is there.

  Embodiments of the present invention will be described below with reference to the drawings.

  1 to 5 show an example of an embodiment of a differential drive circuit according to the present invention. In the drawings, the same reference numerals denote the same components.

<Description of First Embodiment>
FIG. 1 is a block diagram of a drive circuit in the differential drive circuit according to the first embodiment of the present invention.

  The differential drive circuit according to the present invention includes a drive circuit 10 and a bias circuit 200 described later. First, the basic operation of the drive circuit will be described based on the block diagram shown in FIG.

  A bias voltage is input from the input terminal 12, the current of the bias circuit 200 is mirrored, and a supply current from the current source transistor 11 that operates as a current source flows to the termination resistor 19 through the two transmission lines 17 and 18. .

  On the other hand, switch drive signals which are signals of opposite phases for driving the switches of the drive circuit from the DATA signal to be transmitted by the pre-buffer 20 (not shown) arranged in front of the input terminals IN + and IN−. Is generated.

  This switch drive signal is input to the input terminals IN + and IN−, controls the transistors 13, 14, 15, and 16 that function as switches, and alternately switches the transistors 13 and 16 and the transistors 14 and 15 that function as switches. Set to ON. As a result, the direction of the supply current is switched, and a voltage corresponding to the direction of the flowing current is generated at both ends of the terminating resistor 19 and is received by a differential receiving circuit (not shown).

  As described above, since the drive circuit 10 has the same direction and currents flowing in the transmission lines 17 and 18 in the opposite directions, the magnetic field for the negative phase component is canceled and the negative phase noise component can be reduced. .

  Next, the configuration and operation of the bias circuit, which is a feature of the present invention, will be described.

  FIG. 2 is a circuit diagram of a bias circuit for supplying a bias voltage to the drive circuit.

  The bias circuit 200 includes a current source 213, a transistor 212 that generates a voltage for mirroring the current, transistors 210 and 211 that receive the voltage from the transistor 212 and mirror the current, and a transistor that serves as a dummy for a switch in the driving circuit. 206, 209, a transistor 215 that serves as a switch dummy and also serves as a switch according to a control signal from the input 214, resistors 207 and 208 serving as dummy for the termination resistor 19, an amplifier 202 that controls a common voltage, A voltage source 201 for setting the common voltage to a desired value, a transistor 204 (current / voltage converting means) for generating a voltage for mirroring the current in the drive circuit 10, and a bias for mirroring the current in the drive circuit 10 And an output terminal 205 for outputting a voltage. It is.

  Note that the resistance values of the dummy resistors 207 and 208 are set to RT / 2, where RT is the resistance value of the termination resistor 19.

  In the bias circuit 200 configured as described above, a current mirror path is provided between the dummy resistor 208 and the transistor 209 and connected to the ground via the transistors 211 and 215. By using the transistor 215 as a switch and turning the current flowing through this path “ON / OFF” by a signal from the input terminal 214, the current flowing through the transistor 204 (hereinafter referred to as a bias circuit current) can be made variable. it can.

  That is, when the input signal from the input terminal 214 is at the ground level, the transistor 215 is “OFF”, and the bias circuit current is equal to the current of the current source 213.

  On the other hand, when the input signal from the input terminal 214 is at the power supply voltage level, since there are two current mirror paths from the transistor 212, the bias circuit current is twice the current of the current source 213. Therefore, the current flowing through the drive circuit 10 is doubled, and the drive capability can be improved without adding a transistor to the drive circuit 10.

  By the way, the voltage output from the output terminal 205 is one for mirroring the same current as the current flowing through the transistor 204 in the driving circuit, and the other is the voltage of the voltage source 201 and the dummy resistors 207 and 208. The intermediate node 203 (common voltage) is controlled to be a value that satisfies both of the two conditions that it is a voltage for the voltage value of the voltage source 201. This control operation will be described below.

  The voltage source 201 and the node 203 are connected to the input terminal of the amplifier 202. When the voltage of the node 203 becomes higher than the voltage of the voltage source 201, the amplifier 202 increases the output voltage, and the drain of the transistor 204 When the voltage of the node 203 becomes lower than the voltage of the voltage source 201, the output voltage is lowered and the drain voltage of the transistor 204 is raised. Thus, the common voltage is controlled so as to remain at the voltage value of the voltage source 201, and the fluctuation of the common voltage is suppressed. Thus, even if the current flowing through the transistor 204 changes, it is effective and EMI can be reduced.

  FIG. 3 is a circuit diagram showing an example of a bias circuit in which a plurality of current mirror paths are arranged.

  As shown in FIG. 3, the bias circuit 300 includes a plurality of current mirror paths that are connected to the ground from between the dummy resistor 208 and the transistor 209, and controls the switches (transistors 316 and 318) separately to thereby control the bias circuit 300. The current value of the circuit current can be set in a plurality of stages, and an appropriate bias voltage can be supplied to the drive circuit 10.

<Description of Second Embodiment>
FIG. 4 is a block diagram of a differential drive circuit according to the second embodiment of the present invention.

  As shown in FIG. 4, the differential drive circuit according to the present embodiment is obtained by adding a bias control circuit 401 to the differential drive circuit of the first embodiment.

  The bias control circuit 401 is a detection circuit that detects a logic switching edge of the input signal (DATA_IN) input to the prebuffer 20, detects a rising edge and a falling edge of the input signal, and outputs a detection signal. The detection signal to be output can set the time from when the logic of the input signal is switched to when it is output and the time when the detection signal is output.

  This detection signal is input to the input terminals of the bias circuit 200 or 300 (the input terminal 214 in FIG. 2 and the input terminals 315 and 317 in FIG. 3) to control the bias circuit current.

  Specifically, when the edge of the input signal is detected, the bias control circuit 401 outputs a HIGH level detection signal for a certain period, and outputs a LOW level detection signal in a time domain where there is no logic switching.

  This detection signal is input to, for example, the input terminal 214 of the bias circuit 200. During the HIGH level period, the transistor 215 is controlled to be “ON”, and the bias circuit current is increased. Thereby, the rise time or fall time of the drive signal output to the transmission line can be shortened (pre-emphasis function). Therefore, the transmission speed of the drive signal can be increased.

  The bias control circuit 401 can be realized by a circuit as shown in FIG.

  The bias control circuit 401 includes an input terminal 51, a delay circuit 53 that delays an input signal, a delay circuit 55 that further delays an output signal 58 of the delay circuit 53, and an output signal 57 and an output signal 58 of the delay circuit 55. An exclusive OR operation circuit (EXOR circuit) 59 and an output terminal 52 are included.

  The input signal is input from the input terminal 51, and the detection signal described above is output from the output terminal 52.

  The delay circuit 53 is a circuit that adjusts the delay time from when the logic of the input signal is switched to when the edge is detected. By switching the control switch 54 in the delay circuit 53, the number of inverter circuits through which the signal passes is adjusted. Adjust the delay time by changing.

  When a path that does not pass through all inverters is selected, the delay time is almost zero. It should be noted that the adjustment range can be expanded by increasing the number of stages of inverter circuits.

  The delay circuit 55 is a circuit that adjusts the output period of the detection signal, and the output period of the detection signal output to the bias circuit 200 can be adjusted by switching the control switch 56 in the delay circuit. Similarly to the delay circuit 53, the adjustment range can be expanded by increasing the number of inverter circuits.

  When a path that does not pass through all inverters is selected, the values of the input terminals 57 and 58 of the EXOR circuit 59 are always equal, and the output of the EXOR circuit 59 is always LOW. Accordingly, in this case, pre-emphasis is not performed.

  As described above in the first and second embodiments, the differential drive circuit according to the present invention has the mechanism for controlling the current amount of the drive circuit all provided in the bias circuit, thereby reducing the parasitic capacitance of the drive circuit. Decrease the signal transmission rate and reduce the generation of EMI, suppress the edge of the drive current signal of the drive circuit, and further improve the transmission rate and prevent the occurrence of EMI due to the fluctuation of the common-mode voltage It is possible.

  Note that the differential drive circuit of the present invention is not limited to the above-described embodiment, and it is needless to say that various changes can be made without departing from the scope of the present invention.

1 is a block diagram of a drive circuit in a differential drive circuit according to a first embodiment of the present invention. FIG. 3 is a circuit diagram of a bias circuit that supplies a bias voltage to a drive circuit. It is a circuit diagram showing an example of a bias circuit in which a plurality of current mirror paths are arranged. It is a block diagram of the differential drive circuit which concerns on the 2nd Embodiment of this invention. It is a circuit diagram which shows the example of a bias control circuit. It is a circuit diagram of the conventional differential drive circuit. It is a circuit diagram of the conventional differential drive circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Drive circuit 11,13-16,204,206,209-212,215 Transistor 12,214,311,312,315-318,51 Input terminal 17,18 Transmission line 19 Termination resistor 20 Prebuffer 21,22 Preemphasis Circuit 200, 300 Bias circuit 201 Voltage source 202 Operational amplifier 203, 57, 58 Node 205, 52 Output terminal 207, 208 Resistor 213 Current source 401 Bias control circuit 53, 55 Delay circuit 54, 56 Switch

Claims (6)

A drive circuit comprising a current source using a current mirror for driving a pair of differential transmission lines, and a switch for transmitting a current from the current source to the differential transmission line;
A bias circuit for applying a bias voltage to a current source using the current mirror,
The bias circuit generates the bias voltage to be supplied to a current source using the current mirror, and controls the current value of the current source using the current mirror by changing the generated bias voltage. A differential drive circuit. The bias circuit includes current-voltage conversion means for generating the bias voltage, a current source using a current mirror, and one or more current sources that mirror the current and supply the current-voltage conversion means.
2. The differential drive according to claim 1, wherein on / off switching control of each current source supplied to the current-voltage conversion means is performed, and the bias voltage corresponding to the control is generated. circuit. The bias circuit further includes a termination resistor dummy circuit connected in series to the current-voltage converter.
3. The differential drive circuit according to claim 2, wherein matching between a current value of a current flowing through the termination resistor dummy circuit and a current value of a current source using a current mirror of the drive circuit is enhanced. The termination resistor dummy circuit includes a first resistor and a second resistor, each having a resistance value that is half the resistance value of the termination resistor of the differential transmission line,
The bias circuit compares a potential of a node connecting the first resistor and the second resistor with a predetermined constant voltage, and controls a current flowing through the termination resistor dummy circuit, thereby controlling the node The differential drive circuit according to claim 3, wherein the potential is controlled to have a desired voltage value. The bias circuit includes a detection circuit that detects a logic switching edge of an input signal;
The detection circuit generates a control signal for performing on / off switching control of a current source supplied to the current-voltage conversion unit after detecting the edge, and drives a current for driving the differential transmission line The differential drive circuit according to claim 2, wherein a current from the source is pre-emphasized.   The detection circuit pre-emphasizes a current from a first delay circuit that adjusts a delay time from when the logic of the input signal is switched to when the edge is detected, and a current source for driving the differential transmission line. The differential drive circuit according to claim 5, further comprising: a second delay circuit that sets a signal width of the control signal to be a desired value.

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