JP2009052910A - Semiconductor inspection jig, and apparatus and method for inspecting semiconductor with the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor inspection jig capable of reducing production costs, shortening production periods, achieving compactness, and being changed over so as to adapt to a semiconductor devices, and to provide a semiconductor inspection apparatus and method with the same. <P>SOLUTION: The semiconductor inspection jig 1 has a conversion substrate 12; a pogo-pin interposer 11; a connecting substrate 6; and a base substrate 2. The conversion substrate includes a socket 15 capable of mounting a semiconductor substrate 22. The surface of the pogo-pin interposer is provided with pogo pins 13 for electrically connecting to the conversion substrate, and the conversion substrate can be mounted on the surface. The surface of the connecting substrate is provided at locations corresponding to the locations of pogo-pin installation with signal lands 7 for transmitting signals to semiconductor devices, and the pogo-pin interposer is mounted on the surface. The base substrate is electrically connected to the connecting substrate, and the connecting substrate is mounted to it. The base substrate; the connecting substrate; and the pogo-pin interposer are each common regardless of attributes of semiconductor devices, and the conversion substrate can be attached to and removed from the pogo-pin interposer. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a semiconductor inspection jig for inspecting a semiconductor device, a semiconductor inspection apparatus including the same, and a semiconductor inspection method.

  Conventionally, evaluation of electrical characteristics of a semiconductor device has been performed by electrically connecting a tester terminal and a semiconductor device terminal via a semiconductor inspection jig and inputting and outputting signals. In the related semiconductor inspection jig, the signal input / output terminal of the tester is connected to the signal input / output terminal of the semiconductor device, and the VDD terminal and the GND terminal of the tester are connected to the VDD terminal and the VSS terminal of the semiconductor device, respectively. is set up. In such a semiconductor inspection jig, when the terminal layout and package size of the semiconductor device are different, it is necessary to switch the wiring in accordance with the terminal layout and package size. Therefore, when the type of the semiconductor device is changed, it is necessary to change the semiconductor inspection jig (see Patent Document 1).

  On the other hand, in the inspection and development of a product group having various terminal layouts and package sizes such as MCP (Multi Chip Package) products, it is necessary to change the semiconductor inspection jig when the type of semiconductor device is changed. For this reason, the cost for producing a semiconductor inspection jig is increasing. In addition, the period required to inspect and develop various products is also affected by the manufacturing period of the semiconductor inspection jig.

  Accordingly, there has been a demand for a reduction in inspection and development costs including a cost and a period for manufacturing a semiconductor inspection jig and a reduction in inspection and development TAT (Turn Around Time).

A semiconductor inspection apparatus having a semiconductor inspection jig for the purpose of reducing the manufacturing period and manufacturing cost is disclosed in, for example, Patent Document 2 (see FIG. 8). The semiconductor inspection apparatus includes a tester 3 that inspects the semiconductor device 4, a semiconductor inspection jig 1, and a conversion board 2 that is unique to each type of semiconductor device 4. The semiconductor inspection jig 1 includes a wiring line 31 and a power supply line 34. The wiring line 31 connects each of the plurality of signal terminals of the tester 3 to each of the plurality of signal terminals or the power supply terminal of the semiconductor device 4. The power supply line 34 connects the power supply terminal of the tester 3 to the wiring line 31 connected to a predetermined power supply terminal of the semiconductor device 4 via the conversion board 2.
JP-A-10-123208 JP 2006-275991 A

  However, the semiconductor inspection apparatus disclosed in Patent Document 2 is configured to newly mount the conversion substrate in an area different from the mounting area of the semiconductor device (here, the peripheral area of the mounting area). For this reason, there is a limit to downsizing the semiconductor inspection jig. Further, due to the limit of miniaturization of the semiconductor inspection jig, it is difficult for the semiconductor inspection apparatus to increase the number of semiconductor devices that can be inspected at the same time. Further, this semiconductor inspection apparatus is configured to provide a conversion substrate around the mounting area of the semiconductor device. Therefore, the semiconductor inspection apparatus described above can be applied to semiconductor devices having different external shapes, types, and numbers of external terminals, or semiconductor devices in which a plurality of semiconductor chips are mounted in one package such as MCP or SiP (System in Package). It was difficult.

  The present invention has been made in view of the above circumstances, a semiconductor inspection jig capable of suppressing manufacturing cost and manufacturing period, miniaturization, and switching corresponding to a semiconductor device, and a semiconductor inspection apparatus and a semiconductor inspection including the semiconductor inspection jig It aims to provide a method.

  A semiconductor inspection jig according to one embodiment of the present invention includes a conversion substrate provided with a mounting unit on which a semiconductor device can be mounted, and an electrical connection unit that is electrically connected to the conversion substrate. An interposer substrate that can be placed on this surface and a signal transmission means for transmitting signals to the semiconductor device are provided on the surface corresponding to the installation position of the electrical connection means, and the interposer substrate is placed on this surface. And a base substrate that is electrically connected to the connection substrate and on which the connection substrate is placed. Each of the base substrate, the connection substrate, and the interposition substrate is common regardless of the attributes of the semiconductor device. In addition, the conversion board is detachable from the interposition board.

  A semiconductor inspection method according to one embodiment of the present invention is a semiconductor inspection jig having a conversion substrate, an interposition substrate, a connection substrate, and a base substrate, and the conversion substrate is mounted on the interposition substrate, and the semiconductor device is mounted on the conversion substrate. Mounting, further mounting a semiconductor inspection jig on the inspection means, performing a predetermined inspection of the semiconductor device by the inspection means, removing the semiconductor inspection jig from the inspection means, selecting the semiconductor device, Each of the base substrate, the connection substrate, and the interposer substrate regardless of the attributes of the semiconductor device. In addition to being common, the conversion board is detachable from the interposition board.

  According to the present invention, when the semiconductor inspection jig is manufactured, only the design of the conversion substrate that is detachable from the intervening substrate is required. This makes it possible to reduce the manufacturing cost and period of the semiconductor inspection jig. In addition, since the semiconductor device is mounted on the mounting means on the conversion substrate and the conversion substrate is placed on the interposer substrate, the semiconductor inspection jig can be miniaturized. Further, for semiconductor devices having different attributes during inspection, only the conversion substrate is changed to be detachable from the interposer substrate, so that the semiconductor device is inspected, so that switching corresponding to the semiconductor device is possible. Therefore, it is possible to provide a semiconductor inspection jig capable of suppressing manufacturing cost and manufacturing period, downsizing, and switching corresponding to a semiconductor device, a semiconductor inspection apparatus and a semiconductor inspection method including the semiconductor inspection jig.

The best mode for carrying out the present invention will be described in detail with reference to the drawings.
(First embodiment)
FIG. 1 is a perspective view showing a semiconductor inspection jig according to the first embodiment of the present invention.

  A semiconductor inspection jig 1 according to the first embodiment of the present invention includes a base substrate 2, a product mounting portion 3, and a connector 4. The base substrate 2 has a substantially rectangular shape and is made of, for example, glass epoxy. A plurality of product mounting portions 3 are provided on one surface of the base substrate 2. The connector 4 is provided at one end of the base substrate 2.

  The plurality of product mounting portions 3 are electrically connected to the connector 4 by wiring 5 provided on the base substrate 2. By connecting the connector 4 to a tester (not shown), it is possible to test a semiconductor device (not shown) that is an object to be processed mounted on the product mounting portion 3 of the semiconductor inspection jig 1.

  Next, FIG. 2 shows the product mounting portion 3 of the semiconductor inspection jig 1 in detail. The product mounting unit 3 includes a base substrate 2, a connection substrate 6, a pogo pin interposer 11 that is an intervening substrate, and a conversion substrate 12.

  A substantially square connection substrate 6 is placed on the base substrate 2, and the base substrate 2 is electrically connected to the connection substrate 6. The base substrate 2 is a common component regardless of the external shape, type, and number of external terminals that are attributes of the semiconductor device to be inspected.

  The connection board 6 is a board for connecting the signal terminal of the tester to the pogo pin interposer 11. On the upper surface of the connection substrate 6, signal lands 7 as signal transmission means for transmitting signals to the semiconductor device are provided, and the plurality of signal lands 7 are arranged on the connection substrate 6 in a grid pattern at predetermined intervals. Yes. Support columns 8 are provided at the four corners of the lower surface of the connection substrate 6. The signal land 7 of the connection substrate 6 and the wiring 5 of the base substrate 2 are electrically connected by a wiring cord or the like. Thus, by providing the signal land 7 on the connection board 6 different from the base board 2, the space of the base board 2 can be saved. Thereby, the number of sockets mounted on the base substrate 2 can be increased. Although the case where the signal lands 7 are provided on the connection substrate 6, which is a substrate different from the base substrate 2, has been described, the base substrate 2 may be configured to be provided with a plurality of signal lands 7. By providing a signal land on the base substrate, it is not necessary to provide a connection substrate, so that the inspection cost can be reduced.

  Further, positioning pins 10 are disposed at positions near the four corners of the upper surface of the connection substrate 6. The positioning pin 10 is configured to position and mount the conversion substrate 12 with respect to the pogo pin interposer 11. The positioning pins 10 position the pogo pin interposer 11 and the conversion board 12 with respect to the connection board 6. Further, the signal land 7 of the connection board 6 and the signal land of the conversion board 12 can be held and fixed in a state where they are electrically connected via the pogo pin interposer 11. These signal lands can be detachably held and fixed by fastening means such as bolts and nuts. The connection substrate 6 is a common component regardless of the outer shape, type, and number of external terminals that are attributes of the semiconductor device to be inspected.

  A substantially square pogo pin interposer 11 is placed on the upper surface of the connection substrate 6. The pogo pin interposer 11 is provided with an assembly of pogo pins 13 as electrical connection means on the upper surface in order to connect the signal terminals of the tester to the conversion board 12. The pogo pin 13 is electrically connected to the conversion board 12. The pogo pin interposer 11 is a common component regardless of the external shape, type, and number of external terminals that are attributes of the semiconductor device to be inspected.

  In the pogo pin interposer 11, a plurality of pogo pins 13 are arranged in a grid at predetermined intervals. Each of the plurality of pogo pins 13 is provided at a portion corresponding to the position of the signal land 7 of the connection board 6. The pogo pin 13 includes a plunger part, a barrel part, and a spring of an elastic member that mechanically connects the plunger part and the barrel part. Thus, by providing a spring between the plunger portion and the barrel portion, the plunger portion and the barrel portion are elastically biased by the spring. A substantially central portion of the pogo pin 13 is held and fixed to the pogo pin interposer 11, and the tip of the pogo pin 13 protrudes from the upper surface and the lower surface of the pogo pin interposer 11. Further, through holes 14 are formed at the four corners of the pogo pin interposer 11. The through hole 14 is disposed in the pogo pin interposer 11 so that the positioning pin 10 can be positioned by inserting the positioning pin 10 of the connection substrate 6 into the through hole 14.

  The pogo pin interposer 11 can place a substantially rectangular conversion substrate 12 on the upper surface. The conversion substrate 12 is detachable from the pogo pin interposer 11 and can be changed in accordance with the external shape, type, and number of external terminals that are attributes of the semiconductor device. In particular, the conversion substrate 12 is configured to be customized for each type of semiconductor device. The contact points between the lower surface of the conversion substrate 12 and the upper surface of the pogo pin interposer 11 are arranged in common regardless of the type of the semiconductor device. On the other hand, the upper surface of the conversion board 12 is configured to be changeable according to various sockets 15. Therefore, the wiring pattern in the layer of the conversion substrate 12 is configured to be compatible with each semiconductor device.

  The conversion board 12 is provided with a socket 15 which is a mounting means capable of mounting the semiconductor device 22 at a substantially central portion. The socket 15 is a component for connecting the semiconductor device 22 and signal wiring from the tester. In the present embodiment, the socket 15 is composed of a single member. The socket 15 is provided with a concave accommodating portion 16 that accommodates the semiconductor device 22 on the upper surface and opens upward. The accommodating portion 16 is configured according to the outer shape and type of attributes of the semiconductor device 22 and the number of external terminals. In the accommodating portion 16, a plurality of contacts 17 are disposed corresponding to the arrangement of the external terminals of the accommodated semiconductor device 22. The contact 17 of the socket 15 may be selected in accordance with the external terminal shape of the semiconductor device 22 or the like, and the contact 17 having any configuration may be used. Here, since a BGA (Ball Grid Array) type semiconductor device is mounted, pogo pins are used as the contacts 17. The socket 15 is provided with a pressing means (not shown) for pressing the semiconductor device 22 mounted in the housing portion 16 against the contact 17. The accommodating portion 16 is formed in a tapered shape having a larger opening area on the side closer to the semiconductor device 22 than on the side farther from the semiconductor device 22. Therefore, the accommodated semiconductor device 22 can be positioned by this shape of the accommodating portion 16.

  In addition, the conversion substrate 12 has a plurality of signal lands 18 arranged in a lattice pattern at a predetermined interval on the lower surface. Each of the plurality of signal lands 18 of the conversion board 12 is provided at a portion corresponding to the arrangement of the pogo pins 13 of the pogo pin interposer 11. Through holes 19 are formed at four corners of the conversion substrate 12. The through hole 19 is disposed in the conversion substrate 12 so that the positioning pin 10 can be positioned by inserting the positioning pin 10 of the connection substrate 6 into the through hole 19.

  Further, in order to hold and fix the pogo pin interposer 11 and the conversion board 12 in a state where the pogo pin interposer 11 and the conversion board 12 are placed on the connection board 6, a detachable locking means 20 is provided on the positioning pin 10. Provided (see FIG. 3). By means of the locking means 20 and the pogo pins 13 of the pogo pin interposer 11, the signal land 7 of the connection board 6 and the signal land 18 of the conversion board 12 can be reliably electrically connected.

  FIG. 4 is a conceptual diagram showing an electrical connection state between the semiconductor inspection apparatus having the semiconductor inspection jig according to the first embodiment of the present invention and the semiconductor apparatus. The semiconductor inspection device 21 includes a semiconductor inspection jig 1 and a tester 23 that is an inspection unit for inspecting the semiconductor device 22. The semiconductor inspection jig 1 is configured such that the base substrate 2, the connection substrate 6, and the pogo pin interposer 11 are common regardless of the attributes of the semiconductor device 22. Further, the semiconductor inspection jig 1 is configured such that the conversion substrate 12 can be attached to and detached from the pogo pin interposer 11 and can be changed in accordance with the attribute of the semiconductor device 22. For this reason, the input terminal of the tester of the semiconductor device 22 is electrically connected to the input terminal of the conversion board 12 by the wiring on the conversion board 12. The input / output terminals of the tester of the semiconductor device 22 are electrically connected to the input / output terminals of the conversion board 12. Further, the output terminal of the tester of the semiconductor device 22 is electrically connected to the output terminal of the conversion substrate 12.

  FIG. 5 is a cross-sectional view and a plan view showing a modified example of the first embodiment, which is a semiconductor inspection jig having a conversion substrate when the external shape, type, and number of external terminals of the semiconductor device are different from the above-described embodiments. is there. Each of the base substrate 2, the connection substrate 6, and the pogo pin interposer 11 is a common component. Since the signal land 18 disposed on the lower surface of the conversion substrate 12 is disposed corresponding to the pogo pin 13 of the pogo pin interposer 11, the arrangement is the same as that in FIG. The socket 15 disposed on the upper surface of the conversion substrate 12 can be changed according to the outer shape of the semiconductor device and the number of external terminals. In particular, the socket 15 is configured for a product corresponding to a semiconductor device having a large external shape and a different number of external terminals. The external terminal of the semiconductor device housed in the socket 15 is configured to be electrically connected to a predetermined signal land on the conversion board 12 by wiring provided on the conversion board 12. In this modification, the socket 15 that is the mounting means is formed of a single member.

  As described above, the semiconductor inspection jig 1 is configured so that the base substrate 2, the connection substrate 6, and the pogo pin interposer 11 are common regardless of the external shape, type, and number of external terminals that are attributes of the semiconductor device 22. Yes. Furthermore, the semiconductor inspection jig 1 is configured such that the conversion substrate 12 can be attached to and detached from the pogo pin interposer 11 and can be changed according to the external shape, type, and number of external terminals that are attributes of the semiconductor device 22. . When manufacturing a semiconductor inspection jig, only the design of a conversion substrate that can be detached from the pogo pin interposer and can be changed in accordance with the above-described attributes of the semiconductor device is required. Therefore, the design period of the semiconductor inspection jig can be shortened, so that the manufacturing cost and the period of the semiconductor inspection jig can be suppressed. In addition, the semiconductor device is mounted on the socket on the conversion substrate, and the conversion substrate is mounted on the pogo pin interposer. For this reason, it is possible to reduce the size of the semiconductor inspection jig and increase the number of product mounting portions mounted on the semiconductor inspection jig. Furthermore, for semiconductor devices having different attributes at the time of inspection, the semiconductor device is inspected by changing only the conversion substrate. Therefore, the semiconductor inspection jig can be switched corresponding to the semiconductor device. Therefore, it is easy to switch the semiconductor inspection jig to a product having a different external shape, type, and number of external terminals. Moreover, since only the changed substrate is changed, it is possible to contribute to a reduction in the inspection cost of the semiconductor device.

In addition, since the semiconductor inspection jig of this embodiment can mount a plurality of semiconductor chips such as MCP and SiP, it is easy to cope with packages having different external terminal arrangements.
(Second Embodiment)
FIG. 6 is a sectional view and a plan view showing a semiconductor inspection jig according to the second embodiment of the present invention. Also in FIG. 6, as in the first embodiment, the base substrate 2, the connection substrate 6, and the pogo pin interposer 11 are common components. Since the signal land 18 disposed on the lower surface of the conversion substrate 12 is disposed corresponding to the pogo pin 13 of the pogo pin interposer 11, the arrangement is the same as that of the first embodiment. In the present embodiment, two sockets 15 are arranged on the upper surface of the conversion substrate 12. The external terminals of the semiconductor devices housed in the two sockets 15 are configured to be electrically connected to predetermined signal lands on the conversion board 12 by wiring provided on the conversion board 12.

In this way, by configuring one product mounting portion 3 so that a plurality of sockets 15 are provided on the conversion substrate 12, the number of semiconductor devices that can be inspected with one semiconductor inspection jig can be increased. As a result, the inspection efficiency can be improved and the inspection cost can be reduced.
(Semiconductor device inspection method)
Next, a semiconductor device inspection method to which the semiconductor inspection jig according to the first embodiment of the present invention is applied will be described. FIG. 7 is a flowchart of this inspection method. A state in which the base substrate 2, the connection substrate 6, and the pogo pin interposer 11 are stacked is referred to as a test board.

  In step S 1, the conversion board 12 corresponding to the outer shape, type and number of external terminals of the semiconductor device to be inspected is mounted on the pogo pin interposer 11 of the test board, and held and fixed by the locking means 20. Thereby, the socket 15 of the conversion board 12 and the signal land 7 of the connection board 6 are electrically connected.

  In step S <b> 2, the semiconductor device is mounted on all the sockets 15 of the conversion board 12 mounted on the semiconductor inspection jig 1. The socket 15 is provided with pressing means (not shown). By pressing the semiconductor device by the pressing means, the semiconductor device is reliably electrically connected to the conversion substrate 12.

  In step S3, the semiconductor inspection jig 1 is mounted on the tester. Thereby, the connector 4 provided in the semiconductor inspection jig 1 and the tester are electrically connected.

  Thereafter, in step S4, a predetermined inspection of the semiconductor device is performed by a tester.

  After completion of the inspection of the semiconductor device, the semiconductor inspection jig 1 is removed from the tester in step S5.

  Then, in step S6, the semiconductor device is selected according to the inspection result. The sorted semiconductor devices are classified into non-defective products and defective products, for example.

  In step S7, the semiconductor device is picked up from the socket 15 of the semiconductor inspection jig 1, and the non-defective semiconductor device is selected and stored in the non-defective product tray and the defective semiconductor device is stored in the defective product tray.

  As mentioned above, although preferred embodiment of this invention was described in detail, it cannot be overemphasized that this invention can be variously changed in the range which is not limited to the said embodiment and does not deviate from the summary.

  For example, in the embodiment of the present invention, the case where a BGA type semiconductor device is used has been described. However, the semiconductor inspection jig of the present invention can be applied to any kind of semiconductor device such as TSOP (Thin Small Outline Package) type and SOJ (Small Outline J-leaded) type if the socket on which the semiconductor device is mounted is changed. is there.

  Furthermore, in the embodiment of the present invention, a case where one or two sockets are mounted on one conversion board has been described, but three or more sockets may be mounted.

  As an application example of the present invention, in the development of an inspection process for manufacturing a semiconductor device, there is a semiconductor inspection device used in the inspection development of MCP products and logic LSI (Large Scale Integration) products having various terminal layouts.

1 is a perspective view showing a semiconductor inspection jig according to a first embodiment of the present invention. It is a perspective view showing in detail the product mounting part of the semiconductor inspection jig concerning a 1st embodiment of the present invention. It is sectional drawing and the top view which show the semiconductor test jig | tool which concerns on the 1st Embodiment of this invention. It is a conceptual diagram which shows the electrical connection state of the semiconductor inspection apparatus which has the semiconductor inspection jig concerning the 1st Embodiment of this invention, and a semiconductor device. It is sectional drawing and the top view which show the modification of the 1st Embodiment of this invention. It is sectional drawing and the top view which show the semiconductor inspection jig concerning the 2nd Embodiment of this invention. It is a flowchart of the inspection method of the semiconductor device to which the semiconductor inspection jig concerning the 1st embodiment of the present invention is applied. It is the schematic which shows the electrical connection state of the semiconductor inspection apparatus which has the conventional semiconductor inspection jig | tool, and a semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor inspection jig 2 Base board 6 Connection board 7 Signal land 11 Pogo pin interposer 12 Conversion board 13 Pogo pin 15 Socket 21 Semiconductor inspection apparatus 22 Semiconductor device

Claims (8)

A conversion board having mounting means capable of mounting a semiconductor device;
An electrical connection means for electrically connecting to the conversion substrate is provided on the surface, and an interposer substrate capable of placing the conversion substrate on the surface;
A signal transmission means for transmitting a signal to the semiconductor device is provided on a surface corresponding to an installation position of the electrical connection means, and the interposer substrate is mounted on the surface; and
Electrically connected to the connection board, and a base board on which the connection board is placed;
Have
Each of the base substrate, the connection substrate and the interposition substrate is common regardless of the attribute of the semiconductor device, and the conversion substrate is detachable from the interposition substrate.
Semiconductor inspection jig.   The semiconductor inspection jig according to claim 1, wherein the conversion substrate can be changed in accordance with the attribute of the semiconductor device.   3. The semiconductor inspection jig according to claim 1, wherein the conversion substrate can be changed according to the outer shape, type, and number of external terminals of the semiconductor device. The mounting means is provided with an open accommodating portion for accommodating the semiconductor device,
The accommodating portion has a tapered shape in which a side closer to the semiconductor device has a wider opening area than a side far from the semiconductor device.
The semiconductor inspection jig according to claim 1.   5. The semiconductor inspection jig according to claim 1, wherein the mounting means is formed of a single member and can be changed according to the outer shape of the semiconductor device and the number of external terminals. .   The semiconductor inspection jig according to claim 1, wherein a plurality of mounting means are provided on the conversion substrate. A semiconductor inspection jig according to any one of claims 1 to 6,
Inspection means for inspecting the semiconductor device;
A semiconductor inspection apparatus. In a semiconductor inspection jig having a conversion substrate, an intermediate substrate, a connection substrate, and a base substrate, the conversion substrate is mounted on the intermediate substrate, a semiconductor device is mounted on the conversion substrate, and the semiconductor inspection jig is further mounted. Attaching the tool to the inspection means;
Inspecting the semiconductor device by the inspection means;
Removing the semiconductor inspection jig from the inspection means;
Sorting the semiconductor device, sorting the non-defective semiconductor device into a non-defective tray, and storing the defective semiconductor device in a non-defective tray;
Have
Each of the base substrate, the connection substrate and the interposition substrate is common regardless of the attribute of the semiconductor device, and the conversion substrate is detachable from the interposition substrate.
Semiconductor inspection method.

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