JP2009049242A - Substrate with built-in electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate with a built-in electronic component that can reduce floating inductance and thereby has improved filter characteristics. <P>SOLUTION: The substrate 10 with the built-in electronic component has a base having a laminate of a plurality of insulating layers, the electronic component 1 built in the base, and a filter circuit portion 2 connected to a signal terminal 11a of the electronic component. The filter circuit portion 2 is constituted by connecting one-end sides of two capacitors C1 and C2 to both ends of an inductor L1. A ground terminal 11b of the electronic component 1 is connected to a first ground layer 31, and the other end of the capacitor C2 is connected to a second ground layer 32 formed as a body different from the first ground layer 31. Thus, the substrate 10 with the built-in electronic component 10 has the first ground layer 31 and second ground layer 32 sectioned from each other. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an electronic component built-in substrate that incorporates an electronic component and a filter circuit section.

In recent years, as the demand for downsizing of electronic devices used for mobile phones and mobile communications has been increasing, not only the downsizing of electronic components mounted on these devices, but also downsizing of the mounting substrate itself has been desired. Under such circumstances, a wiring board intended to reduce the number of parts by constructing a filter with an inductor or capacitor formed by a conductor pattern inside the mounting board, thereby realizing miniaturization and high-density mounting. Has been proposed (see Patent Document 1). In addition, a technique for incorporating an active component such as a semiconductor device in a substrate (see Patent Document 2), a technique for forming an inductor in the semiconductor device (Patent Document 3), and the like have been proposed.
JP 2004-254257 A JP 2001-024333 A JP 2002-141473 A

  For example, when a π-type filter including one inductor and two capacitors is formed using such a technique, generally, one end of each of the two capacitors is connected to one end and the other end of the inductor, and the other end of both capacitors is connected. Is connected to a common ground layer, and one end of the inductor is connected to a signal electrode of an electronic component such as a semiconductor IC.

  However, in such a structure, even if the other ends of the two capacitors are connected to a common ground layer, a thin wiring is inevitably generated due to the limitation of the wiring space. The other ends of the two capacitors do not have the same potential in terms of high frequency, and stray inductance occurs between them. This stray inductance appears in parallel with the inductor that constitutes the original filter, and as a result, there is a problem that the filter characteristics deteriorate. In particular, when a semiconductor device or an inductor is built in a substrate, wiring is inevitably easily generated, and this problem occurs remarkably. In addition, it may be possible to predict this stray inductance in advance and reflect it in the design. However, in practice, there will be variations that cannot be ignored in product manufacturing, and this stray inductance itself will vary and be dealt with by design. It is difficult.

  Therefore, the present invention has been made in view of the above circumstances, and an object of the present invention is to reduce the stray inductance, thereby improving the characteristics of the filter, and the electronic component built-in substrate in which the electronic component is built. Is to provide.

  In order to solve the above problems, an electronic component built-in substrate according to the present invention has a base having a laminate including a plurality of insulating layers, an electronic component built in the base, and one end connected to a signal terminal of the electronic component. A filter circuit unit, a first ground layer connected to the ground terminal of the electronic component, and a second ground layer formed separately from the first ground layer. The filter circuit unit includes the electronic component. One end of which is connected to the signal terminal, and an inductor formed by at least one or more vias penetrating the insulating layer containing the electronic component among the plurality of insulating layers, and the ground terminal of the electronic component A first electrode and a second electrode connected to the other end of the inductor and disposed opposite to the second ground layer through at least one insulating layer among the plurality of insulating layers.

  In the above configuration, the first ground layer and the second ground layer are provided separately. In other words, the ground (means) provided on the electronic component built-in substrate functions as a ground for the electronic component. A first ground layer is divided into a second ground layer which is a ground for the substrate, and a first electrode is connected to the first ground layer through a ground terminal of an electronic component. This first electrode is connected to a capacitor, for example, or constitutes a capacitor electrode that itself forms a capacitance between a signal pattern of an electronic component and a conductor pattern that connects one end of a filter circuit unit. . Thus, since the first electrode, the ground terminal of the electronic component, and the first ground layer are connected without interposing the elongated conductor pattern, the first electrode, the ground terminal of the electronic component, and the first ground layer are connected. One ground layer is held at a constant potential, thereby suppressing the occurrence of stray inductance. In addition, since the inductor of the filter circuit portion is formed by a via penetrating the insulating layer in which the electronic component is accommodated, for example, another inductor capable of generating a magnetic flux in the dielectric stacking direction is incorporated in the electronic component. However, since the magnetic flux directions are different from each other, the occurrence of magnetic coupling between the two is suppressed, and the deterioration of the filter characteristics and the deterioration of the operation characteristics of the electronic component can be suppressed. Furthermore, the insulating layer in which the electronic component is accommodated is usually thicker than the other insulating layers, and by forming an inductor with vias penetrating such a relatively thick insulating layer, the other insulating layers are formed. The via length can be made relatively long as compared to the case of forming a via that penetrates through, and thereby a relatively large inductance can be obtained. Although it is conceivable to form vias so as to penetrate a plurality of relatively thin insulating layers to increase the via length, in that case, via connection via caps cause capacitive coupling between them. However, the filter characteristics may be deteriorated, and more man-hours are required for forming via-on-via, which is not preferable from the viewpoint of productivity. Uses a thick insulating layer in which electronic components are accommodated, and can prevent such a problem from occurring.

  Specifically, it is formed so as to connect the signal terminal of the electronic component and one end of the filter circuit unit, and faces the second electrode through an insulating layer in which the electronic component is accommodated among the plurality of insulating layers. When the conductive pattern is provided, a parallel resonant circuit including an inductor and a capacitor connected in parallel to the inductor is configured. In this case, the first electrode, the ground terminal of the electronic component, and the first ground layer are held at a constant potential, and in addition to suppressing the generation of stray inductance, the capacitor is additionally provided, thereby specifying the parallel resonant circuit. It is possible to obtain a greater attenuation at a frequency of.

  The inductor includes a plurality of vias penetrating an insulating layer in which an electronic component is accommodated among the plurality of insulating layers, and a connection conductor connecting the plurality of vias, and the plurality of insulating layers It is more preferable to have a spiral pattern (spiral structure) whose axis is the direction intersecting the stacking direction because sufficient inductance can be obtained. In such a configuration, when a current flows through the inductor, a magnetic flux is generated in a direction crossing the stacking direction of the insulating layers. At this time, for example, even if an inductor capable of generating magnetic flux in the dielectric stacking direction is incorporated in the electronic component, the magnetic flux directions are different from each other. And the deterioration of the operating characteristics of the electronic components can be suppressed.

  According to the present invention, in the filter circuit portion, the first electrode, the ground terminal of the electronic component, and the first ground layer are connected without interposing a long and narrow conductor pattern, and generation of stray inductance can be suppressed / reduced. It is possible to provide an electronic component built-in substrate in which an electronic component and a filter having excellent characteristics are built in the substrate.

  Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted. Further, positional relationships such as up, down, left and right are based on the positional relationships shown in the drawings unless otherwise specified. Furthermore, the dimensional ratios in the drawings are not limited to the illustrated ratios. Further, the following embodiments are exemplifications for explaining the present invention, and are not intended to limit the present invention only to the embodiments. Further, the present invention can be variously modified without departing from the gist thereof.

<First Embodiment>
FIG. 1 is an equivalent circuit diagram showing a configuration of a first embodiment of an electronic component built-in substrate according to the present invention.

  The electronic component built-in substrate 10 includes the electronic component 1 and the filter circuit unit 2 connected to the signal terminal 11 a of the electronic component 1. The filter circuit unit 2 has one end of each of two capacitors C1 and C2 connected to both ends of the inductor L1, and further includes a capacitor C3 connected in parallel to the inductor L1. Thus, the filter circuit unit 2 is an example of a π-type low-pass filter including the inductor L1, the capacitor C1, and the capacitor C2. By adjusting the capacitances of the capacitors C1 and C2 and the inductance of the inductor L1, a desired value can be obtained. A low-pass filter having low-pass characteristics is obtained. In FIG. 1, Ls1, Ls2, Lg1, and Lg2 indicate stray inductances that can be generated in the respective parts due to the wiring.

  The signal terminal 11a of the electronic component 1 is connected to one end of the inductor L1. On the other hand, the ground terminal 11 b of the electronic component 1 is connected to the other end of the capacitor C 1 and further connected to the first ground layer 31.

  Further, another circuit unit 4 different from the filter circuit unit 2 may be connected to the other end of the inductor L1. The circuit unit 4 may be an electronic component built in the electronic component built-in substrate 10 or an external circuit (component). In the figure, the circuit unit 4 is not built in the electronic component built-in substrate 10 but is in a form of being externally connected to the external terminal 40 c of the electronic component built-in substrate 10.

  Further, the other end of the capacitor C <b> 2 is connected to a second ground layer 32 for a substrate formed separately from the first ground layer 31. As described above, in the electronic component built-in substrate 10, the first ground layer 31 and the second ground layer 32 are separated from each other.

  2 to 8 are plan views showing patterns of respective layers of the electronic component built-in substrate 10 constituting the equivalent circuit shown in FIG. 1. FIG. 2 shows the pattern of the uppermost layer, and FIG. The lower layer pattern is shown. That is, the layer patterns shown in FIGS. 2 to 8 are stacked in order from the upper layer.

  The electronic component built-in substrate according to the present embodiment includes a base body having a laminated body of a plurality of insulating layers, and the electronic component 1 and the filter circuit unit 2 shown in FIG. 1 are built in the base body. Basically, the patterns shown in the layers shown in FIGS. 2 to 8 are formed on the insulating layer.

  As shown in FIG. 5, for example, a plurality of terminals 11 connected to a memory, a peripheral circuit, or the like built in the electronic component 1 are formed on the outer edge of the electronic component 1 such as a semiconductor IC. The terminal 11 includes a signal terminal 11a and ground terminals 11b and 11b. In this example, the ground terminals 11b and 11b are disposed on both sides of the signal terminal 11a.

  Further, when the electronic component 1 includes an RF circuit, an inductor 12 used for an oscillation circuit and a matching circuit is formed on the electronic component 1. In this case, the inductor 12 has a spiral coil pattern centered on an axis perpendicular to the terminal surface of the electronic component 1, and is in a direction perpendicular to the terminal surface of the electronic component 1, that is, each of the components shown in FIGS. Magnetic flux is generated in the layer stacking direction.

  A first electrode 21 is connected to the ground terminals 11 b and 11 b of the electronic component 1 through an electrode pattern 24. The electrode pattern 24 is connected to the lower first ground layer 31 through the via V1. The first ground layer 31 is connected to the external terminal 40a. Further, as described above, the second ground layer 32 for the substrate is formed separately from the first ground layer 31, and the second ground layer 32 is connected to the external terminal 40b.

  The inductor L1 includes connection conductors 25a, 25b, and 25c and vias V2 to V5. The via V2 constitutes one end of the inductor, and the via V5 constitutes the other end of the inductor. The other end of the inductor is connected to the external terminal 40c through the via V5. The inductor L1 forms a spiral coil pattern centering on an axis A that intersects the layer stacking direction (substantially orthogonal to the layer stacking direction in the drawing), and magnetic flux is applied in the direction of the axis A. appear.

  The signal terminal 11a of the electronic component 1 and one end (via V2) of the inductor L1 are connected by a conductor pattern 23. The conductor pattern 23 has a wide portion constituting the capacitor electrode in the middle thereof. The second electrode 22 is connected to the other end of the inductor through a via V4.

  The first electrode 21 and the underlying conductor pattern 23 are opposed to each other via an insulating layer, and a capacitor C1 is formed from these. Further, the conductor pattern 23 and the second electrode 22 below the conductor pattern 23 are opposed to each other via an insulating layer, and a capacitor C3 is constituted by these. Furthermore, the second electrode 22 and the second ground layer 32 below the second electrode 22 are opposed to each other via an insulating layer, and a capacitor C2 is formed from these.

  A plurality of electronic components 3 such as passive elements are arranged on the uppermost layer (FIG. 2) of the electronic component built-in substrate 10, and a plurality of external terminals 40 are arranged on the lowermost layer (FIG. 8) of the electronic component built-in substrate 10. Is arranged.

  According to the electronic component built-in substrate 10 configured in this way, the first ground layer 31 for electronic components and the second ground layer 32 for substrates are provided separately and separated (separated). One electrode 21 is connected to the first ground layer 31 together with the ground terminals 11 b and 11 b of the electronic component 1. Accordingly, the first electrode 21, the ground terminals 11 b and 11 b of the electronic component 1 and the first ground layer 31 can be connected to each other without using a thin and long conductor pattern, so that the grounding of the first electrode 21 and the electronic component 1 can be performed. The terminals 11b and 11b and the first ground layer 31 can be connected and held at a constant potential. Therefore, in the filter circuit unit 2, the generation of stray inductance can be suppressed, and the deterioration of the filter characteristics can be prevented.

  Here, in order to further facilitate the understanding of the superiority of the effects achieved by the electronic component built-in substrate 10 of the present embodiment, a mode of a comparative example will be described below. 9 to 14 are plan views showing patterns of layers of the electronic component built-in substrate according to the comparative example. 2 to 8, the layers shown in FIGS. 9 to 14 are stacked in order from the upper layer.

  In this electronic component built-in substrate, the first electrode 21 is connected to the second ground layer 32 for the substrate, and the first electrode 21 is connected to the ground terminals 11b and 11b of the electronic component 1 through the via V11. ing. Since there are many vias and conductor patterns around the electronic component 1 in each layer, the vias V12 and V13 and the first electrode 21 that are located away from the electronic component 1 are arranged due to arrangement restrictions. They are connected by a conductor pattern 26 that is elongated. With this configuration, the first electrode 21 is connected to the second ground layer 32 through the conductor pattern 26 and the vias V12 and V13.

  As described above, since the elongated conductor pattern 26 is interposed between the first electrode 21 and the second ground layer 32, the generation amount of the floating inductance Ls3 shown in the equivalent circuit diagram of FIG. 1 is further increased. I will invite you.

  FIG. 15 is a graph showing the frequency characteristic D1 of the low-pass filter in the electronic component built-in substrate 10 according to the first embodiment and the frequency characteristic D2 of the low-pass filter in the electronic component built-in substrate according to the comparative example.

  In FIG. 15, the horizontal axis indicates the frequency (unit: GHz), and the vertical axis indicates the signal passing amount (unit: dB). From the results shown in FIG. 15, according to the electronic component built-in substrate 10 according to the present embodiment, the electronic component built-in substrate according to the comparative example is located on the high frequency side (particularly in the region of 11 GHz or higher) from the passband of the low-pass filter. It has been found that a sufficiently large attenuation can be obtained.

Second Embodiment
Another embodiment of the present invention will be described below using a pattern example different from that of the first embodiment and referring to a perspective view and a sectional view.

  FIG. 16 is a perspective view of an essential part of the electronic component built-in substrate 10 according to the second embodiment. FIG. 17 is a cross-sectional view of an essential part of the electronic component built-in substrate 10 according to the second embodiment. 18 to 21 are plan views showing patterns of each layer of the electronic component built-in substrate 10 according to the second embodiment. 16 to 21, for easy understanding, only the patterns constituting the capacitors C1, C2, C3 and the inductor L1 are illustrated, and other conductor patterns are not shown.

  More specifically, FIGS. 18 to 21 are cross-sectional views taken along lines EE, FF, GG, and HH in FIG. 17, respectively.

  The base 5 of the electronic component built-in substrate 10 is constituted by a laminated body of a plurality of insulating layers 6, and the electronic component 1 is built in the base 5. As shown in FIG. 17, the first electrode 21, the conductor pattern 23, the second electrode 22, and the second ground layer 32 are arranged in order from the upper layer. The pattern including the first electrode 21, the conductor pattern 23, the second electrode 22, and the second ground layer 32 is formed on the insulating layer 6, and the patterns are connected by vias penetrating the insulating layer 6. Has been.

  As shown in FIG. 17, the first electrode 21 connected to the ground terminals 11b and 11b of the electronic component 1 and the conductor pattern 23 connecting the signal terminal 11a of the electronic component 1 and one end of the inductor L1 are one layer. The capacitor C1 is constituted by these.

  Furthermore, the electronic component 1 is accommodated (embedded) in the insulating layer 6a. The conductor pattern 23 and the second electrode 22 connected to the other end of the inductor L1 are disposed to face each other via the insulating layer 6a, and a capacitor C3 is configured from these. Furthermore, the second electrode 22 and the second ground layer 32 are arranged to face each other with a single insulating layer 6 therebetween, and a capacitor C2 is formed from these. The other end of the inductor L1 is connected to the second ground layer 32.

  The inductor L1 includes connection conductors 25d to 25f and vias V2a to V5a. The via V2a constitutes one end of the inductor, and the via V5a constitutes the other end of the inductor. The other end of the inductor is connected to the external terminal 40c through a via V5a. The inductor L1 has a spiral coil pattern centered on an axis A orthogonal to the layer stacking direction, and generates a magnetic flux in the direction of the axis A.

  A method for manufacturing the electronic component built-in substrate 10 having such a configuration is not particularly limited. For example, if the insulating layer 6 is made of ceramic, a dielectric ceramic green in which cavities and via holes are formed. After firing a paste by applying a conductive paste to a sheet to form electrodes, conductor patterns, and vias, electronic parts are mounted in the cavities, and the electrodes, conductor patterns, and vias are formed and fired in a separate process The substrates can be manufactured by pasting them so as to cover the cavities and finally mounting other electronic components on the substrate surface. Alternatively, if the insulating layer 6 is made of a resin such as a fluororesin, a glass epoxy resin, or a polyimide resin, a resin substrate is used and the copper foil deposited on the surface is etched to form each electrode pattern. Alternatively, the via conductor may be formed and laminated and pressed.

  The insulating layer 6 is made of ceramic materials such as alumina ceramics and mullite ceramics, inorganic materials such as glass ceramics, or tetrafluoroethylene resin (polytetrafluoroethylene: PTFE) or tetrafluoroethylene-ethylene copolymer resin. (Tetrafluoroethylene-ethylene copolymer resin: ETFE), fluoropolymers such as tetrafluoroethylene-perfluoroalkoxyethylene copolymer resin (tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer resin: PFA), glass epoxy resins, polyimides Resin-based materials such as are used.

In addition, the conductor pattern and electrode material include, for example, a Cu layer, a Mo-Mn metallization layer coated with a Ni plating layer and an Au plating layer, and a W metallization layer with a Ni plating layer and an Au plating layer. , Cr—Cu alloy layer, Cr—Cu alloy layer with Ni plating layer and Au plating layer deposited thereon, Ta ₂ N layer with Ni—Cr alloy layer and Au plating layer A thick film is used such as a deposited film, a deposited Pt layer and an Au plated layer on a Ti layer, or a deposited Pt layer and an Au plated layer on a Ni—Cr alloy layer. It is formed by a printing method or various thin film forming methods or plating methods.

  According to the electronic component built-in substrate 10 according to the present embodiment, the conductor pattern 23 that connects the signal terminal 11a of the electronic component 1 and one end of the inductor L1 and the second electrode 22 are the insulating layer in which the electronic component 1 is accommodated. Since they are arranged opposite to each other via 6a, a parallel resonance circuit including the inductor L1 and the capacitor C3 connected in parallel to the inductor L1 is configured. Since the capacitor C3 is additionally provided as described above, the attenuation amount at a specific frequency of the parallel resonance circuit can be further increased.

  Further, in the present embodiment, the inductor L1 having a spiral pattern centered on the axis A intersecting the stacking direction of the plurality of insulating layers 6 is formed by the plurality of vias V2a to V5a and the connection conductors 25d to 25f. Yes. Thereby, when a current flows through the inductor L1, a magnetic flux is generated in a direction crossing the stacking direction of the insulating layer 6. Therefore, for example, even when the inductor 12 capable of generating magnetic flux in the dielectric stacking direction is built in the electronic component 1, the magnetic coupling between the inductor 12 in the electronic component 1 and the inductor L1 is suppressed. it can.

  Furthermore, since the insulating layer 6a in which the electronic component 1 is accommodated is thicker than the other insulating layers 6, the radius of the spiral is increased by using a plurality of vias V2a to V5a penetrating the insulating layer 6a. Therefore, it is possible to form the inductor L1 having a larger inductance.

  In addition, as above-mentioned, this invention is not limited to said each embodiment, A various deformation | transformation is possible in the limit which does not change the summary. For example, in the present embodiment described above, an example of a π-type low-pass filter has been described as the filter circuit unit 2, but a low-pass filter other than the π-type, a high-pass filter, and a band-pass filter may be employed. Moreover, instead of the example which comprises the capacitor C1, when the 1st electrode 21 opposes the conductor pattern 23 through the insulating layer 6, you may provide another capacitor connected to the 1st electrode 21. FIG.

  Furthermore, there is no restriction | limiting also in the kind of the electronic component 3 provided in the upper layer of the electronic component built-in board | substrate 10, and the electronic component 1, For example, the inductor 12 does not need to be provided. Furthermore, the electronic component built-in substrate 10 may incorporate other electronic components and circuits in addition to the electronic component 1. Further, the thickness of the insulating layer 6 may be changed, a high dielectric constant material may be used for these, or a magnetic material may be mixed.

  As described above, according to the electronic component built-in substrate of the present invention, the stray inductance can be reduced, and thereby the filter characteristics can be improved. Therefore, the electronic component built-in substrate incorporating the electronic component and the filter circuit unit. It can be used widely and effectively for mobile phones including them, electronic devices, apparatuses, systems, and various devices used for mobile communications, especially those that require miniaturization and high performance.

1 is an equivalent circuit diagram showing a configuration of a first embodiment of an electronic component built-in substrate according to the present invention. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. FIG. 3 is a plan view showing a pattern of each layer of the electronic component built-in substrate 10. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate which concerns on the form of a comparative example. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate which concerns on the form of a comparative example. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate which concerns on the form of a comparative example. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate which concerns on the form of a comparative example. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate which concerns on the form of a comparative example. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate which concerns on the form of a comparative example. It is a graph which shows the frequency characteristic of the low pass filter in the electronic component built-in board | substrate concerning 1st Embodiment, and the electronic component built-in board | substrate concerning the form of a comparative example. It is a principal part perspective view of the electronic component built-in board | substrate 10 which concerns on 2nd Embodiment. It is principal part sectional drawing of the electronic component built-in board | substrate 10 which concerns on 2nd Embodiment. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate 10 which concerns on 2nd Embodiment. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate 10 which concerns on 2nd Embodiment. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate 10 which concerns on 2nd Embodiment. It is a top view which shows the pattern of each layer of the electronic component built-in board | substrate 10 which concerns on 2nd Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Electronic component, 2 ... Filter circuit part, 3 ... Electronic component, 4 ... Circuit part, 5 ... Base | substrate, 6 ... Insulating layer, 6a ... Insulating layer, 10 ... Electronic component built-in board, 11 ... Terminal, 11a ... Signal terminal 11b: ground terminal, 12: inductor, 21 ... first electrode, 22 ... second electrode, 23 ... conductor pattern, 24 ... electrode pattern, 25a, 25b, 25c, 25d, 25e, 25f ... connection conductor, 26 ... conductor Pattern, 30 ... ground layer, 31 ... first ground layer, 32 ... second ground layer, 40, 40a, 40b, 40c ... external terminal, A ... axis, C1 ... capacitor, C2 ... capacitor, C3 ... capacitor, L1 ... Inductors, Ls1, Ls2, Ls3, Lg1, Lg2 ... stray inductances, V1, V2, V2a, V3, V3a, V4, V4a, V5, V5a, V11, V12, V13 ... vias.

Claims (3)

A substrate having a laminate including a plurality of insulating layers;
An electronic component built in the substrate;
A filter circuit unit having one end connected to a signal terminal of the electronic component;
A first ground layer connected to a ground terminal of the electronic component;
A second ground layer formed separately from the first ground layer;
With
The filter circuit unit is
An inductor having one end connected to a signal terminal of the electronic component and formed by at least one or more vias penetrating an insulating layer in which the electronic component is accommodated among the plurality of insulating layers;
A first electrode connected to a ground terminal of the electronic component;
A second electrode connected to the other end of the inductor and disposed opposite to the second ground layer via at least one insulating layer of the plurality of insulating layers;
Having
Electronic component built-in substrate. It is formed so as to connect the signal terminal of the electronic component and one end of the filter circuit unit, and faces the second electrode through an insulating layer containing the electronic component among the plurality of insulating layers. With disposed conductor patterns,
The electronic component built-in substrate according to claim 1. The inductor includes a plurality of vias that pass through an insulating layer in which the electronic component is accommodated among the plurality of insulating layers, and a connection conductor that connects the plurality of vias, and the plurality of insulating layers Having a spiral pattern with the direction intersecting the stacking direction of
The electronic component built-in substrate according to claim 1.

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