JP2009038284A - Thin film transistor - Google Patents

Thin film transistor Download PDF

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JP2009038284A
JP2009038284A JP2007202878A JP2007202878A JP2009038284A JP 2009038284 A JP2009038284 A JP 2009038284A JP 2007202878 A JP2007202878 A JP 2007202878A JP 2007202878 A JP2007202878 A JP 2007202878A JP 2009038284 A JP2009038284 A JP 2009038284A
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film
oxygen
containing copper
electrode film
amorphous
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Akira Mori
暁 森
Shuhin Cho
守斌 張
Terushi Mishima
昭史 三島
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Mitsubishi Materials Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin film transistor having excellent performances inexpensively with extremely little defective article generation. <P>SOLUTION: The thin film transistor is composed by forming a gate electrode film 2 on a glass substrate 1, forming a silicon nitride film 3 on the glass substrate 1 and the gate electrode film 2, forming an amorphous Si film 4 on the silicon nitride film 3, forming a drain electrode film 5 and a source electrode film 6 both composed of pure copper having the base layer of an oxygen-containing copper film 15 through a barrier film on the amorphous Si layer 4, and forming a silicon nitride film 3' on the amorphous Si film 4, the drain electrode film 5 and the source electrode film 6. In the thin film transistor, the barrier film is constituted of an oxygen-containing copper alloy film 19 consisting of copper, silicon and oxygen. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

この発明は、アモルファスシリコン膜とドレイン電極膜との間にバリア膜が形成されており、さらにアモルファスシリコン膜とソース電極の間にバリア膜が形成される薄膜トランジスターであって、前記バリア膜は、銅、シリコンおよび酸素からなる酸素含有銅合金膜からなる薄膜トランジスターに関するものである。   The present invention is a thin film transistor in which a barrier film is formed between an amorphous silicon film and a drain electrode film, and further a barrier film is formed between an amorphous silicon film and a source electrode. The present invention relates to a thin film transistor made of an oxygen-containing copper alloy film made of copper, silicon and oxygen.

アクティブマトリックス方式で駆動する薄膜トランジスターを用いたフラットパネルディスプレイとして、液晶ディスプレイ、プラズマディスプレイ、有機ELディスプレイ、無機ELディスプレイなどが知られている。これら薄膜トランジスターを用いたフラットパネルディスプレイにはガラス基板表面に格子状に金属膜からなる配線が密着形成されており、この金属膜からなる格子状配線の交差点に薄膜トランジスターが設けられている。
この薄膜トランジスターは、図7の断面概略説明図に示されるように、ガラス基板1の表面に金属膜からなるゲート電極膜2が形成されており、このゲート電極膜2およびガラス基板1の上に窒化珪素(SiNx)膜3が形成されており、さらに窒化珪素(SiNx)膜3の上にアモルファスSi膜4が形成されており、このアモルファスSi膜4の上にいずれもバリア膜7を介して純銅からなるドレイン電極膜5およびソース電極膜6が形成されており、さらに前記アモルファスSi膜4、ドレイン電極膜5およびソース電極膜6の全面を覆うように窒化珪素(SiNx)膜3´が形成された積層膜構造を有している。
かかる積層膜構造を有する薄膜トランジスターを作製するには、まず、図8の断面図に示されるような、ガラス基板1の表面に純銅からなるゲート電極膜2を形成し、このゲート電極膜2およびガラス基板1の上に窒化珪素(SiNx)膜3を形成し、さらに窒化珪素(SiNx)膜3の上にアモルファスSi膜4を形成し、このアモルファスSi膜4の上にバリア膜7を形成し、前記窒化珪素(SiNx)膜3およびバリア膜7の全面を被覆するように純銅膜8を形成して積層体9を作製する。
次いで前記積層体9のバリア膜7および純銅膜8を写真製版(フォトリソ)により湿式エッチングすることによってバリア膜7および純銅膜8に覆われていたアモルファスSi膜4の一部を露出させ、バリア膜7、ドレイン電極膜5およびソース電極膜6を形成することにより図9の断面図に示される従来の薄膜トランジスター中間体10を作製し、その後、従来の薄膜トランジスター中間体10の全面に窒化珪素(SiNx)膜3´を300℃前後で化学蒸着することにより図7の断面図に示される従来の薄膜トランジスターを作製する。図7〜9に図示されてはいないが、ドレイン電極膜5およびソース電極膜6の密着性を高めるためにドレイン電極膜5およびソース電極膜6の下地層として酸素を含む銅膜(酸素含有銅膜)を形成することも知られている。
前記窒化珪素(SiNx)膜3´は一般に300℃前後で化学蒸着することにより成膜されるので、窒化珪素(SiNx)膜3´の成膜時に前記アモルファスSi膜4のSiが純銅からなるドレイン電極膜5およびソース電極膜6に拡散し、そのためにドレイン電極膜5およびソース電極膜6の比抵抗が大きく上昇する。
この窒化珪素(SiNx)膜3´の化学蒸着時にアモルファスSi膜4のSiがドレイン電極膜5およびソース電極膜6に拡散してドレイン電極膜5およびソース電極膜6の比抵抗が上昇するのを阻止するために、アモルファスSi膜4とドレイン電極膜5の間およびアモルファスSi膜4とソース電極膜6の間にバリア膜7を形成する。このバリア膜7として通常MoもしくはMo合金膜またはTiもしくはTi合金膜が使用されており、このバリア膜7はその後薄膜トランジスターが加熱されるようなことがあってもアモルファスSi膜4のSiがドレイン電極膜5およびソース電極膜6に拡散してドレイン電極膜5およびソース電極膜6の比抵抗が上昇するのを阻止する作用も果たす(特許文献1参照)。
特開2004−163901号公報
As a flat panel display using a thin film transistor driven by an active matrix system, a liquid crystal display, a plasma display, an organic EL display, an inorganic EL display, and the like are known. In these flat panel displays using thin film transistors, wiring made of a metal film is formed in close contact with the surface of the glass substrate, and thin film transistors are provided at the intersections of the grid wiring made of the metal film.
In this thin film transistor, a gate electrode film 2 made of a metal film is formed on the surface of a glass substrate 1 as shown in the schematic sectional view of FIG. 7, and the gate electrode film 2 and the glass substrate 1 are formed on the gate electrode film 2. A silicon nitride (SiNx) film 3 is formed, and further an amorphous Si film 4 is formed on the silicon nitride (SiNx) film 3, both of which are formed on the amorphous Si film 4 via a barrier film 7. A drain electrode film 5 and a source electrode film 6 made of pure copper are formed, and a silicon nitride (SiNx) film 3 ′ is formed so as to cover the entire surface of the amorphous Si film 4, the drain electrode film 5 and the source electrode film 6. It has a laminated film structure.
In order to manufacture a thin film transistor having such a laminated film structure, first, a gate electrode film 2 made of pure copper is formed on the surface of a glass substrate 1 as shown in the sectional view of FIG. A silicon nitride (SiNx) film 3 is formed on the glass substrate 1, an amorphous Si film 4 is formed on the silicon nitride (SiNx) film 3, and a barrier film 7 is formed on the amorphous Si film 4. Then, a pure copper film 8 is formed so as to cover the entire surface of the silicon nitride (SiNx) film 3 and the barrier film 7 to produce a laminate 9.
Next, the barrier film 7 and the pure copper film 8 of the laminated body 9 are wet-etched by photolithography (photolithography) to expose a part of the amorphous Si film 4 covered with the barrier film 7 and the pure copper film 8, and the barrier film. 7. The conventional thin film transistor intermediate 10 shown in the cross-sectional view of FIG. 9 is formed by forming the drain electrode film 5 and the source electrode film 6, and then silicon nitride ( A conventional thin film transistor shown in the cross-sectional view of FIG. 7 is fabricated by chemical vapor deposition of a (SiNx) film 3 ′ at around 300 ° C. Although not illustrated in FIGS. 7 to 9, a copper film containing oxygen (oxygen-containing copper) is used as a base layer for the drain electrode film 5 and the source electrode film 6 in order to improve the adhesion between the drain electrode film 5 and the source electrode film 6. It is also known to form a film.
Since the silicon nitride (SiNx) film 3 ′ is generally formed by chemical vapor deposition at about 300 ° C., when the silicon nitride (SiNx) film 3 ′ is formed, the Si of the amorphous Si film 4 is a drain made of pure copper. Diffusion into the electrode film 5 and the source electrode film 6 causes the specific resistance of the drain electrode film 5 and the source electrode film 6 to increase greatly.
During the chemical vapor deposition of the silicon nitride (SiNx) film 3 ′, Si in the amorphous Si film 4 diffuses into the drain electrode film 5 and the source electrode film 6 to increase the specific resistance of the drain electrode film 5 and the source electrode film 6. In order to prevent this, a barrier film 7 is formed between the amorphous Si film 4 and the drain electrode film 5 and between the amorphous Si film 4 and the source electrode film 6. As this barrier film 7, a Mo or Mo alloy film or a Ti or Ti alloy film is usually used. Even if the thin film transistor is heated after that, the Si of the amorphous Si film 4 is drained. It also acts to prevent the specific resistance of the drain electrode film 5 and the source electrode film 6 from increasing by diffusing into the electrode film 5 and the source electrode film 6 (see Patent Document 1).
JP 2004-163901 A

しかし、バリア膜7としてMo膜もしくはMo合金膜またはTiもしくはTi合金膜を使用すると、Mo、Tiまたはこれらの合金膜からなるバリア膜7と純銅膜8とは異なる金属で構成されており、かかる異なる金属が接触している複合金属膜を湿式エッチングすると湿式エッチングする際に局部電池が形成され、バリア膜7とドレイン電極膜5の接触端部およびバリア膜とソース電極膜6の接触端部が優先的にエッチングされ、図9の一部拡大図である図10に示されるように、バリア膜7とドレイン電極膜5の接触端部およびバリア膜7とソース電極膜6の接触端部に深い凹部11が生成し、この凹部11はバリア膜7とドレイン電極膜5の境界およびバリア膜7とソース電極膜6の境界に沿って奥深く形成されるので、湿式エッチング中に凹部11に湿式エッチング液が浸透し、湿式エッチング中に凹部11に浸透した湿式エッチング液は洗浄し乾燥しても排出されず、湿式エッチング液が凹部11から排出されない状態で窒化珪素(SiNx)膜3´を300℃前後で化学蒸着すると、化学蒸着中に湿式エッチング液が蒸発し、窒化珪素(SiNx)膜3´に膨らみが生じて窒化珪素(SiNx)膜3´の一部の密着性が低下したりするために薄膜トランジスター不良の原因となる。   However, when a Mo film, a Mo alloy film, or a Ti or Ti alloy film is used as the barrier film 7, the barrier film 7 made of Mo, Ti, or an alloy film thereof and the pure copper film 8 are made of different metals, and thus When wet etching is performed on a composite metal film in contact with different metals, a local battery is formed when wet etching is performed, and a contact end portion between the barrier film 7 and the drain electrode film 5 and a contact end portion between the barrier film and the source electrode film 6 are formed. As shown in FIG. 10, which is a partially enlarged view of FIG. 9, the etching is performed preferentially, and the contact end portion between the barrier film 7 and the drain electrode film 5 and the contact end portion between the barrier film 7 and the source electrode film 6 are deep. A recess 11 is formed, and the recess 11 is formed deep along the boundary between the barrier film 7 and the drain electrode film 5 and the boundary between the barrier film 7 and the source electrode film 6. The wet etching solution penetrates into the recess 11, and the wet etching solution penetrated into the recess 11 during the wet etching is not discharged even if it is washed and dried, and silicon nitride (SiNx is not discharged from the recess 11. ) When the film 3 ′ is chemically vapor deposited at around 300 ° C., the wet etching solution is evaporated during the chemical vapor deposition, and the silicon nitride (SiNx) film 3 ′ is swollen to partially adhere to the silicon nitride (SiNx) film 3 ′. This may cause the thin film transistor to be defective.

そこで、本発明者等は、前記湿式エッチング中の凹部の生成を防止して薄膜トランジスターを作製すべく研究を行った。その結果、
(イ)酸化シリコン膜および酸素を含有する銅膜(以下、酸素含有銅膜という)からなる二層複合膜は、バリア膜として従来から知られているMo膜もしくはMo合金膜またはTiもしくはTi合金膜と同等の効果を有し、この二層複合膜における酸素含有銅膜の上に純銅膜を被覆した積層体を作製し、この積層体を湿式エッチングして得られた薄膜トランジスター中間体には図10に示されるような凹部が生成することがない、
(ロ)また、前記酸化シリコン膜および酸素含有銅膜からなる二層複合膜における酸素含有銅膜上に純銅膜を形成したのち湿式エッチングして得られた薄膜トランジスター中間体の上に窒化珪素(SiNx)膜3´を300℃前後で化学蒸着すると、化学蒸着中に前記アモルファスSi膜と酸素含有銅膜の間にCu、Siおよび酸素からなる酸素含有銅合金膜(以下、酸素含有銅合金膜という)が生成し、化学蒸着中にアモルファスSi膜のSiがドレイン電極膜およびソース電極膜にまで拡散し到達してドレイン電極膜およびソース電極膜の比抵抗を増加させることはない、
(ハ)前記化学蒸着中にアモルファスシリコン膜と酸素含有銅膜の間に生成したCu、Siおよび酸素からなる酸素含有銅合金膜は、従来のMo膜もしくはMo合金膜またはTiもしくはTi合金膜と同等のバリア性を有し、その後に薄膜トランジスターが加熱されるようなことがあってもアモルファスSi膜のSiがドレイン電極膜およびソース電極膜に拡散してドレイン電極膜およびソース電極膜の比抵抗を増加させることはない、
(ニ)前記バリア膜として作用する銅、シリコンおよび酸素からなる酸素含有銅合金膜は、酸素:20原子%以上であり、その厚さは1〜15nmの範囲内にあることが好ましい、などの研究結果が得られたのである。
Therefore, the present inventors have studied to produce a thin film transistor by preventing the formation of recesses during the wet etching. as a result,
(A) A two-layer composite film composed of a silicon oxide film and an oxygen-containing copper film (hereinafter referred to as oxygen-containing copper film) is a Mo film or Mo alloy film or Ti or Ti alloy conventionally known as a barrier film. In the thin film transistor intermediate body, which has the same effect as the film, a laminated body in which a pure copper film is coated on the oxygen-containing copper film in the two-layer composite film, and this laminated body is wet-etched. A recess as shown in FIG. 10 is not generated.
(B) In addition, a silicon nitride film (SiN) is formed on a thin film transistor intermediate obtained by wet etching after forming a pure copper film on the oxygen-containing copper film in the two-layer composite film composed of the silicon oxide film and the oxygen-containing copper film. When the chemical vapor deposition of the SiNx) film 3 ′ is performed at around 300 ° C., an oxygen-containing copper alloy film (hereinafter referred to as an oxygen-containing copper alloy film) made of Cu, Si and oxygen is formed between the amorphous Si film and the oxygen-containing copper film during the chemical vapor deposition. And the Si of the amorphous Si film diffuses and reaches the drain electrode film and the source electrode film during chemical vapor deposition and does not increase the specific resistance of the drain electrode film and the source electrode film.
(C) The oxygen-containing copper alloy film made of Cu, Si and oxygen formed between the amorphous silicon film and the oxygen-containing copper film during the chemical vapor deposition is a conventional Mo film or Mo alloy film or Ti or Ti alloy film. Even if the thin film transistor has the same barrier property, the Si of the amorphous Si film diffuses into the drain electrode film and the source electrode film and the specific resistance of the drain electrode film and the source electrode film Will not increase,
(D) The oxygen-containing copper alloy film composed of copper, silicon and oxygen acting as the barrier film is oxygen: 20 atomic% or more, and the thickness is preferably in the range of 1 to 15 nm. The research results were obtained.

この発明は、上記の研究結果に基づいてなされたものであって、
(1)ガラス基板の上にゲート電極膜を形成し、前記ガラス基板およびゲート電極膜の上に窒化珪素膜を形成し、前記窒化珪素膜の上にアモルファスSi膜を形成し、前記アモルファスSi膜の上にバリア膜を介していずれも酸素含有銅膜の下地層を有する純銅からなるドレイン電極膜およびソース電極膜を形成し、前記アモルファスSi膜、ドレイン電極膜およびソース電極膜の上に窒化珪素膜を被覆形成してなる薄膜トランジスターにおいて、
前記バリア膜は、銅、シリコンおよび酸素からなる酸素含有銅合金膜で構成された薄膜トランジスター、
(2)前記銅、シリコンおよび酸素からなる酸素含有銅合金膜は、酸素:20原子%以上を含む前記(1)記載の薄膜トランジスター、
(3)前記銅、シリコンおよび酸素からなる酸素含有銅合金膜は、厚さ:1〜15nmの範囲内にある前記(2)記載の薄膜トランジスター、
(4)ガラス基板の上にゲート電極膜を形成し、前記ガラス基板およびゲート電極膜の上に窒化珪素膜を形成し、前記窒化珪素膜の上にアモルファスシリコン膜を形成し、前記アモルファスシリコン膜の上に酸化シリコン膜を形成し、この酸化シリコン膜の上に酸素含有銅膜を形成し、この酸素含有銅膜の上にドレイン電極膜およびソース電極膜を形成してなる薄膜トランジスター中間体、に特徴を有するものである。
This invention was made based on the above research results,
(1) A gate electrode film is formed on a glass substrate, a silicon nitride film is formed on the glass substrate and the gate electrode film, an amorphous Si film is formed on the silicon nitride film, and the amorphous Si film A drain electrode film and a source electrode film made of pure copper each having an underlayer of an oxygen-containing copper film are formed on a silicon nitride film on the amorphous Si film, the drain electrode film, and the source electrode film. In a thin film transistor formed by coating a film,
The barrier film is a thin film transistor composed of an oxygen-containing copper alloy film made of copper, silicon and oxygen,
(2) The thin film transistor according to (1), wherein the oxygen-containing copper alloy film made of copper, silicon, and oxygen contains oxygen: 20 atomic% or more,
(3) The thin film transistor according to (2), wherein the oxygen-containing copper alloy film made of copper, silicon, and oxygen has a thickness of 1 to 15 nm.
(4) A gate electrode film is formed on the glass substrate, a silicon nitride film is formed on the glass substrate and the gate electrode film, an amorphous silicon film is formed on the silicon nitride film, and the amorphous silicon film A thin film transistor intermediate formed by forming a silicon oxide film on the silicon oxide film, forming an oxygen-containing copper film on the silicon oxide film, and forming a drain electrode film and a source electrode film on the oxygen-containing copper film; It has the characteristics.

この発明の薄膜トランジスターは、下記の如き方法により作製することができる。まず、図1の断面図に示されるように、ガラス基板1の表面に純銅からなるゲート電極膜2を形成し、このゲート電極膜2およびガラス基板1の上に窒化珪素(SiNx)膜3を形成し、さらに窒化珪素(SiNx)膜3の上にアモルファスSi膜4を形成して第1積層体13を作製する。
次に、この第1積層体13のアモルファスSi膜4の上に、図2の断面図に示されるように、酸化シリコン膜12を形成して第2積層体14を作製する。この酸化シリコン膜12は図1の第1積層体13を基板としスパッタ装置内に載置し、スパッタ装置内の雰囲気を酸素を含む不活性ガス雰囲気となるように保持しながら空スパッタすることにより形成することができる。
次に、第2積層体14の上に、図3の断面図に示されるように、酸素を含む酸素含有銅膜15を成膜して第3積層体16を作製する。この酸素含有銅膜15は純銅製のターゲットを用い、図2の第2積層体13を基板としスパッタ装置内に載置し、雰囲気を酸素を含む不活性ガス雰囲気となるように保持しながらスパッタすることにより形成することができる。
さらに、図4に示されるように、第3積層体16の上に純銅膜8を形成して第4積層体17を作製する。この純銅膜8は純銅製のターゲットを用い、図3の第3積層体16を基板としてスパッタ装置内に載置し、不活性ガス雰囲気中においてスパッタすることにより形成することができる。
このようにして得られた第4積層体17の酸素含有銅膜15および純銅膜8に覆われていたアモルファスSi膜4上の酸化シリコン膜12の一部を露出させ、ドレイン電極膜5およびソース電極膜6を形成することにより図5の断面図に示される薄膜トランジスター中間体18を作製する。酸化シリコン膜12の一部を露出させて前記ドレイン電極膜5およびソース電極膜6を形成するには酸素含有銅膜15および純銅膜8を写真製版(フォトリソ)により湿式エッチングすることによって作製することができる。この薄膜トランジスター中間体18の上にさらに窒化珪素(SiNx)膜3´を成膜することによりこの発明の薄膜トランジスターを作製することができる。この窒化珪素(SiNx)膜3´の成膜は、従来と同様にして窒化珪素(SiNx)膜3´を300℃前後で化学蒸着することにより達成される。前記窒化珪素(SiNx)膜3´の化学蒸着中に、アモルファスSi膜4と酸素含有銅膜15の境界にCu、Siおよび酸素からなる酸素含有銅合金膜19が生成し、窒化珪素(SiNx)膜3´の化学蒸着中にアモルファスSi膜のSiがドレイン電極膜5およびソース電極膜6にまで拡散してドレイン電極膜5およびソース電極膜6の比抵抗を増大させることはない。また、前記窒化珪素(SiNx)膜3´の化学蒸着中に生成したCu、Siおよび酸素からなる酸素含有銅合金膜19は、その後、薄膜トランジスターが加熱されるようなことがあっても優れたバリア性を発揮してアモルファスSi膜4のSiがドレイン電極膜5およびソース電極膜6に拡散するのを阻止し、ドレイン電極膜5およびソース電極膜6の比抵抗を増大させることはない。
The thin film transistor of the present invention can be produced by the following method. First, as shown in the sectional view of FIG. 1, a gate electrode film 2 made of pure copper is formed on the surface of a glass substrate 1, and a silicon nitride (SiNx) film 3 is formed on the gate electrode film 2 and the glass substrate 1. Then, an amorphous Si film 4 is formed on the silicon nitride (SiNx) film 3 to produce a first stacked body 13.
Next, as shown in the cross-sectional view of FIG. 2, a silicon oxide film 12 is formed on the amorphous Si film 4 of the first stacked body 13 to produce a second stacked body 14. This silicon oxide film 12 is placed in a sputtering apparatus using the first laminate 13 of FIG. 1 as a substrate, and is sputtered while holding the atmosphere in the sputtering apparatus to be an inert gas atmosphere containing oxygen. Can be formed.
Next, as shown in the cross-sectional view of FIG. 3, an oxygen-containing copper film 15 containing oxygen is formed on the second stacked body 14 to produce a third stacked body 16. This oxygen-containing copper film 15 uses a pure copper target, is placed in a sputtering apparatus using the second laminated body 13 of FIG. 2 as a substrate, and is sputtered while holding the atmosphere in an inert gas atmosphere containing oxygen. Can be formed.
Further, as shown in FIG. 4, a pure copper film 8 is formed on the third stacked body 16 to produce a fourth stacked body 17. The pure copper film 8 can be formed by using a pure copper target, placing the third laminated body 16 of FIG. 3 as a substrate in a sputtering apparatus, and performing sputtering in an inert gas atmosphere.
A part of the silicon oxide film 12 on the amorphous Si film 4 covered with the oxygen-containing copper film 15 and the pure copper film 8 of the fourth laminated body 17 thus obtained is exposed, and the drain electrode film 5 and the source are exposed. By forming the electrode film 6, the thin film transistor intermediate body 18 shown in the cross-sectional view of FIG. In order to form the drain electrode film 5 and the source electrode film 6 by exposing a part of the silicon oxide film 12, the oxygen-containing copper film 15 and the pure copper film 8 are prepared by wet etching using photolithography. Can do. A thin film transistor of the present invention can be manufactured by forming a silicon nitride (SiNx) film 3 ′ on the thin film transistor intermediate 18. The formation of the silicon nitride (SiNx) film 3 ′ is achieved by chemical vapor deposition of the silicon nitride (SiNx) film 3 ′ at around 300 ° C. in the same manner as in the prior art. During the chemical vapor deposition of the silicon nitride (SiNx) film 3 ′, an oxygen-containing copper alloy film 19 made of Cu, Si and oxygen is formed at the boundary between the amorphous Si film 4 and the oxygen-containing copper film 15, and silicon nitride (SiNx) During the chemical vapor deposition of the film 3 ′, Si of the amorphous Si film does not diffuse into the drain electrode film 5 and the source electrode film 6 to increase the specific resistance of the drain electrode film 5 and the source electrode film 6. In addition, the oxygen-containing copper alloy film 19 made of Cu, Si and oxygen formed during the chemical vapor deposition of the silicon nitride (SiNx) film 3 ′ is excellent even if the thin film transistor is heated thereafter. The barrier property is exhibited and Si of the amorphous Si film 4 is prevented from diffusing into the drain electrode film 5 and the source electrode film 6, and the specific resistance of the drain electrode film 5 and the source electrode film 6 is not increased.

この発明の薄膜トランジスターのバリア膜として作用するCu、Siおよび酸素からなる酸素含有銅合金膜に含まれる酸素および膜厚を前述のごとく限定した理由を説明する。   The reason why the oxygen and the film thickness contained in the oxygen-containing copper alloy film composed of Cu, Si and oxygen that act as a barrier film of the thin film transistor of the present invention are limited as described above will be described.

(a)酸素含有銅合金膜の酸素量:
Cu、Siおよび酸素からなる酸素含有銅合金膜に含まれる酸素が20原子%未満含まれていてもSiの拡散を十分に阻止することができないので好ましくない。したがって、この発明の薄膜トランジスターにおいて形成されるCu、Siおよび酸素からなる酸素含有銅合金膜に含まれる酸素は20原子%以上(好ましくは20〜66原子%)に定めた。
(A) Oxygen content of oxygen-containing copper alloy film:
Even if oxygen contained in an oxygen-containing copper alloy film made of Cu, Si and oxygen is contained in an amount of less than 20 atomic%, it is not preferable because diffusion of Si cannot be sufficiently prevented. Therefore, the oxygen contained in the oxygen-containing copper alloy film made of Cu, Si and oxygen formed in the thin film transistor of the present invention is determined to be 20 atomic% or more (preferably 20 to 66 atomic%).

(b)酸素含有銅合金膜の厚さ:
Cu、Siおよび酸素からなる酸素含有銅合金膜の厚さは1nm未満では薄過ぎてアモルファスSi膜のSiがドレイン電極膜およびソース電極膜に拡散することを阻止することができないので好ましくなく、一方、15nmを越えて厚くしても格別の効果が得られない。したがって、Cu、Siおよび酸素からなる酸素含有銅合金膜の厚さを1〜15nmに定めた。
(B) Thickness of oxygen-containing copper alloy film:
If the thickness of the oxygen-containing copper alloy film made of Cu, Si and oxygen is less than 1 nm, it is not preferable because Si of the amorphous Si film cannot be prevented from diffusing into the drain electrode film and the source electrode film. Even if the thickness exceeds 15 nm, no particular effect can be obtained. Therefore, the thickness of the oxygen-containing copper alloy film made of Cu, Si and oxygen is set to 1 to 15 nm.

この発明の薄膜トランジスターは一枚の純銅ターゲットを用い、スパッタリング雰囲気を変えるだけでバリア膜、ドレイン電極膜およびソース電極膜を成膜することができるのでコストがかからないこと、湿式エッチング時にバリア膜とドレイン電極膜およびバリア膜とソース電極膜のそれぞれの接合端部に凹部が形成されることがないことなどから、作製した薄膜トランジスターに不良品発生が極めて少なく、低コストで優れた性能を有するフラットパネルディスプレイを提供することができるなど優れた効果を奏するものである。   The thin film transistor of the present invention uses a single pure copper target and can be formed with a barrier film, a drain electrode film, and a source electrode film only by changing the sputtering atmosphere. A flat panel that has excellent performance at low cost with very few defects in the thin film transistor produced because there is no formation of a recess at each junction end of the electrode film and the barrier film and the source electrode film. It is possible to provide an excellent effect such as providing a display.

実施例
ガラス基板(縦:50mm、横:50mm、厚さ:0.7mmの寸法を有するコーニング社製1737のガラス基板)の上全面にアモルファスSi膜を200nmの厚さに成膜した。このアモルファスSi膜を200nmの厚さに成膜したものを基板としてスパッタ装置に設置し、さらに純度:4Nの無酸素銅からなる直径6インチのターゲットをスパッタ装置に設置し、スパッタ装置の電源として直流方式を採用し、スパッタ装置の真空容器を到達真空度4×10−5Paになるまで真空引きした。次に酸素を表1に示す割合で含んだArガスを真空容器内に流し、スパッタ雰囲気圧力を0.67Paとした後、ターゲットと基板の間に設置したシャッターを閉じたまま出力:600Wで表1に示される時間放電して酸化シリコン膜を成膜した。
次に、雰囲気をそのまま維持した状態でシャッターを開け、スパッタを続けて前記酸化シリコン膜の上に幅:20mm、長さ:40mmの寸法を有する酸素含有銅膜を成膜した。
次に酸素の供給を停止し、Arガスのみで0.67Paの圧力で250nmの厚さになるまで無酸素銅膜を成膜することにより前記酸素含有銅膜の上に幅:20mm、長さ:40mmの寸法を有する無酸素銅膜を形成することにより本発明薄膜トランジスター中間体試験片1〜7および比較薄膜トランジスター中間体試験片1を作製した。
Example An amorphous Si film having a thickness of 200 nm was formed on the entire surface of a glass substrate (Corning 1737 glass substrate having dimensions of 50 mm in length, 50 mm in width, and 0.7 mm in thickness). This amorphous Si film deposited to a thickness of 200 nm is set as a substrate in a sputtering apparatus, and a 6-inch diameter target made of oxygen-free copper with a purity of 4N is set in the sputtering apparatus as a power source for the sputtering apparatus. A direct current method was employed, and the vacuum vessel of the sputtering apparatus was evacuated until the ultimate vacuum was 4 × 10 −5 Pa. Next, Ar gas containing oxygen in the ratio shown in Table 1 was flowed into the vacuum vessel to set the sputtering atmosphere pressure to 0.67 Pa, and then the output: 600 W with the shutter installed between the target and the substrate closed. The silicon oxide film was formed by discharging for the time shown in FIG.
Next, the shutter was opened while maintaining the atmosphere, and sputtering was continued to form an oxygen-containing copper film having a width of 20 mm and a length of 40 mm on the silicon oxide film.
Next, the supply of oxygen is stopped, and an oxygen-free copper film is formed with Ar gas alone at a pressure of 0.67 Pa until a thickness of 250 nm is reached, thereby forming a width: 20 mm, length on the oxygen-containing copper film. The present invention thin film transistor intermediate test pieces 1 to 7 and the comparative thin film transistor intermediate test piece 1 were prepared by forming an oxygen-free copper film having a size of 40 mm.

本発明薄膜トランジスター中間体試験片1〜7および比較薄膜トランジスター中間体試験片1を湿式エッチングして本発明薄膜トランジスター中間体試験片1〜7および比較薄膜トランジスター中間体試験片1における酸素含有銅膜および無酸素銅膜に縦:10mm、横:10mmの寸法の窓を開け、湿式エッチングした酸素含有銅膜および無酸素銅膜の界面の断面をTEMで5百万倍に拡大し、接触端部に生成する凹部の有無を観察し、その結果を表1に示した。 Oxygen-containing copper film in the thin film transistor intermediate test pieces 1 to 7 and comparative thin film transistor intermediate test piece 1 of the present invention by wet etching the thin film transistor intermediate test pieces 1 to 7 of the present invention and the comparative thin film transistor intermediate test piece 1 And an oxygen-free copper film with a window of 10 mm in length and 10 mm in width, and the cross section of the interface between the wet-etched oxygen-containing copper film and the oxygen-free copper film is magnified 5 million times with TEM Table 1 shows the results of the observation of the presence or absence of recesses formed on the surface.

次に、この湿式エッチングした本発明薄膜トランジスター中間体試験片1〜7および比較薄膜トランジスター中間体試験片1を温度:300℃に保持しながらプラズマCVDを行い、厚さ:200nmを有するSiNx絶縁膜を成膜し、その後、SiNx絶縁膜をドライエッチングで剥離し、この剥離部分をTEM(透過型電子顕微鏡)により観察した結果、酸化シリコン膜と酸素含有銅膜との境界にCu、Siおよび酸素からなる酸素含有銅合金膜が生成していることがわかった。このCu、Siおよび酸素からなる酸素含有銅合金膜に含まれる最大酸素含有量およびその厚さを測定し、その結果を表1に示した。
なお、Cu、Siおよび酸素からなる酸素含有銅合金膜の最大酸素含有量は日本電子(株)製透過型電子顕微鏡(TEM)に装着された(株)ノーラン社製エネルギー分散型X線分析装置(EDS)Voyagerで測定した。加速電圧は200kVとした。
また、酸素含有量をCu、Siおよび酸素からなる酸素含有銅合金膜の膜厚方向にTEMに装着されたEDSで測定し、酸素含有量が20原子%以上のCu、Siおよび酸素からなる酸素含有銅合金膜の厚さをCu、Siおよび酸素からなる酸素含有銅合金膜の厚さとした。
さらにSiNx絶縁膜を成膜後の無酸素銅膜の比抵抗を4探針法で測定することにより酸化シリコンおよび酸素含有銅膜からなる複合膜のバリア性を評価した。
Next, plasma CVD is performed while maintaining the wet-etched thin film transistor intermediate test pieces 1 to 7 of the present invention and the comparative thin film transistor intermediate test piece 1 at a temperature of 300 ° C., and a SiNx insulating film having a thickness of 200 nm. After that, the SiNx insulating film was peeled off by dry etching, and this peeled portion was observed with a TEM (transmission electron microscope). As a result, Cu, Si, and oxygen were formed at the boundary between the silicon oxide film and the oxygen-containing copper film. It was found that an oxygen-containing copper alloy film made of The maximum oxygen content and thickness of the oxygen-containing copper alloy film made of Cu, Si and oxygen were measured, and the results are shown in Table 1.
The maximum oxygen content of the oxygen-containing copper alloy film made of Cu, Si and oxygen is an energy dispersive X-ray analyzer manufactured by Nolan Co., Ltd., which is mounted on a transmission electron microscope (TEM) manufactured by JEOL Ltd. It was measured with (EDS) Voyager. The acceleration voltage was 200 kV.
Further, the oxygen content is measured by an EDS attached to the TEM in the film thickness direction of the oxygen-containing copper alloy film made of Cu, Si and oxygen, and the oxygen content is made of Cu, Si and oxygen having an oxygen content of 20 atomic% or more. The thickness of the containing copper alloy film was the thickness of the oxygen-containing copper alloy film made of Cu, Si and oxygen.
Further, the barrier property of the composite film made of silicon oxide and oxygen-containing copper film was evaluated by measuring the specific resistance of the oxygen-free copper film after forming the SiNx insulating film by a four-probe method.

従来例
実施例で作製したガラス基板(縦:50mm、横:50mm、厚さ:0.7mmの寸法を有するコーニング社製1737のガラス基板)の上のSi薄膜の上にスパッタにより厚さ:50nmのMo薄膜を成膜し、次いでこのMo薄膜の上に実施例と同じ条件で厚さ:250nmの無酸素銅膜を成膜することによりMo薄膜および無酸素銅膜からなる複合膜を有する従来薄膜トランジスター中間体試験片1を作製した。得られた従来薄膜トランジスター中間体試験片1の複合膜を縦:10mm、横:10mmの寸法の窓を開けるように湿式エッチングし、酸素含有Cu膜および無酸素銅膜の界面の断面をTEMで5百万倍に拡大して観察した結果、複合膜の接触端部に凹部が生成していることがわかり、その結果を表1に示した。
次に、この湿式エッチングした従来薄膜トランジスター中間体試験片1を基板とし、基板を温度:300℃に保持しながらプラズマCVDを行い、厚さ:200nmを有するSiNx絶縁膜を成膜した。
Thickness: 50 nm by sputtering on the Si thin film on the glass substrate (vertical: 50 mm, horizontal: 50 mm, thickness: 0.77 glass substrate having dimensions of 0.7 mm) produced in the conventional example. Conventionally, a composite film composed of a Mo thin film and an oxygen-free copper film is formed by depositing an oxygen-free copper film having a thickness of 250 nm on the Mo thin film under the same conditions as in the embodiment. A thin film transistor intermediate test piece 1 was prepared. The obtained composite film of the conventional thin film transistor intermediate test piece 1 was wet-etched so as to open a window having dimensions of 10 mm in length and 10 mm in width, and the cross section of the interface between the oxygen-containing Cu film and the oxygen-free copper film was measured with TEM. As a result of observing the image by magnifying it 5 times, it was found that a concave portion was formed at the contact end portion of the composite film, and the result is shown in Table 1.
Next, this wet-etched conventional thin film transistor intermediate test piece 1 was used as a substrate, and plasma CVD was performed while maintaining the substrate at a temperature of 300 ° C. to form a SiNx insulating film having a thickness of 200 nm.

Figure 2009038284
Figure 2009038284

表1に示される結果から、本発明薄膜トランジスター中間体試験片1〜7のSiNx絶縁膜の成膜後の無酸素銅膜の比抵抗は、従来薄膜トランジスター中間体試験片1のSiNx絶縁膜の成膜後の無酸素銅膜の比抵抗とほぼ同じであることから、酸化シリコン膜および酸素含有銅膜からなる複合膜が従来薄膜トランジスター中間体試験片1のMo、Tiおよびそれらの合金膜と同等のバリア性を有するが、従来薄膜トランジスター中間体試験片1には湿式エッチングに際して凹部が生成することがわかる。また、この発明の範囲から外れた値の比較薄膜トランジスター中間体試験片1は無酸素銅膜中にSiが拡散して比抵抗が上昇することがわかる。 From the results shown in Table 1, the specific resistance of the oxygen-free copper film after the formation of the SiNx insulating film of the thin film transistor intermediate test pieces 1 to 7 of the present invention is as follows. Since the specific resistance of the oxygen-free copper film after film formation is almost the same, the composite film composed of the silicon oxide film and the oxygen-containing copper film is the same as the Mo, Ti and their alloy films of the conventional thin film transistor intermediate test piece 1. Although it has the same barrier property, it can be seen that the conventional thin film transistor intermediate test piece 1 is formed with a recess during wet etching. Further, it can be seen that the comparative thin film transistor intermediate test piece 1 having a value outside the range of the present invention increases the specific resistance due to the diffusion of Si into the oxygen-free copper film.

第1積層体の断面概略説明図である。It is a section schematic explanatory view of the 1st layered product. 第2積層体の断面概略説明図である。It is a section schematic explanatory view of the 2nd layered product. 第3積層体の断面概略説明図である。It is a cross-sectional schematic explanatory drawing of a 3rd laminated body. 第4積層体の断面概略説明図である。It is a section schematic explanatory view of the 4th layered product. この発明の薄膜トランジスター中間体の断面概略説明図である。It is a cross-sectional schematic explanatory drawing of the thin-film transistor intermediate body of this invention. この発明の薄膜トランジスターの断面概略説明図である。It is a cross-sectional schematic explanatory drawing of the thin-film transistor of this invention. 従来の薄膜トランジスターの要部を説明するための断面概略説明図である。It is a cross-sectional schematic explanatory drawing for demonstrating the principal part of the conventional thin-film transistor. 従来の積層体の要部を説明するための断面概略説明図である。It is a cross-sectional schematic explanatory drawing for demonstrating the principal part of the conventional laminated body. 従来の薄膜トランジスター中間体の断面概略説明図である。It is a cross-sectional schematic explanatory drawing of the conventional thin-film transistor intermediate body. 図9の一部拡大断面概略説明図である。FIG. 10 is a partially enlarged schematic sectional explanatory view of FIG. 9.

符号の説明Explanation of symbols

1:ガラス基板、2:ゲート電極、3:SiNx膜、3´:SiNx膜、4:アモルファスSi膜、5:ドレイン電極、6:ソース電極、7:バリア層、8:純銅膜、9:積層体、10:従来の薄膜トランジスター中間体、11:凹部、12:酸化シリコン膜、13:第1積層体、14:第2積層体、15:酸素含有銅膜、16:第3積層体、17:第4積層体、18:この発明の薄膜トランジスター中間体、19:銅、シリコンおよび酸素からなる酸素含有銅合金膜、20:この発明の薄膜トランジスター 1: glass substrate, 2: gate electrode, 3: SiNx film, 3 ′: SiNx film, 4: amorphous Si film, 5: drain electrode, 6: source electrode, 7: barrier layer, 8: pure copper film, 9: laminated , 10: conventional thin film transistor intermediate, 11: recess, 12: silicon oxide film, 13: first laminate, 14: second laminate, 15: oxygen-containing copper film, 16: third laminate, 17 : 4th laminated body, 18: Thin-film transistor intermediate body of this invention, 19: Oxygen-containing copper alloy film which consists of copper, silicon, and oxygen, 20: Thin-film transistor of this invention

Claims (4)

ガラス基板の上にゲート電極膜を形成し、前記ガラス基板およびゲート電極膜の上に窒化珪素膜を形成し、前記窒化珪素膜の上にアモルファスSi膜を形成し、前記アモルファスSi膜の上にバリア膜を介していずれも酸素含有銅膜の下地層を有する純銅からなるドレイン電極膜およびソース電極膜を形成し、前記アモルファスSi膜、ドレイン電極膜およびソース電極膜の上に窒化珪素膜を被覆形成してなる薄膜トランジスターにおいて、
前記バリア膜は、銅、シリコンおよび酸素からなる酸素含有銅合金膜で構成されていることを特徴とする薄膜トランジスター。
Forming a gate electrode film on the glass substrate; forming a silicon nitride film on the glass substrate and the gate electrode film; forming an amorphous Si film on the silicon nitride film; and A drain electrode film and a source electrode film made of pure copper each having an underlayer of an oxygen-containing copper film are formed through a barrier film, and a silicon nitride film is coated on the amorphous Si film, the drain electrode film, and the source electrode film In the formed thin film transistor,
The thin film transistor according to claim 1, wherein the barrier film is composed of an oxygen-containing copper alloy film made of copper, silicon and oxygen.
前記銅、シリコンおよび酸素からなる酸素含有銅合金膜は、酸素:20原子%以上を含むことを特徴とする請求項1記載の薄膜トランジスター。 2. The thin film transistor according to claim 1, wherein the oxygen-containing copper alloy film made of copper, silicon, and oxygen contains oxygen: 20 atomic% or more. 前記銅、シリコンおよび酸素からなる酸素含有銅合金膜は、厚さ:1〜15nmの範囲内にあることを特徴とする請求項1記載の薄膜トランジスター。 2. The thin film transistor according to claim 1, wherein the oxygen-containing copper alloy film made of copper, silicon and oxygen has a thickness in a range of 1 to 15 nm. ガラス基板の上にゲート電極膜を形成し、前記ガラス基板およびゲート電極膜の上に窒化珪素膜を形成し、前記窒化珪素膜の上にアモルファスシリコン膜を形成し、前記アモルファスシリコン膜の上に酸化シリコン膜を形成し、この酸化シリコン膜の上に酸素含有銅膜を形成し、この酸素含有銅膜の上にドレイン電極膜およびソース電極膜を形成してなることを特徴とする薄膜トランジスター中間体。 Forming a gate electrode film on the glass substrate; forming a silicon nitride film on the glass substrate and the gate electrode film; forming an amorphous silicon film on the silicon nitride film; and A thin film transistor intermediate comprising a silicon oxide film, an oxygen-containing copper film formed on the silicon oxide film, and a drain electrode film and a source electrode film formed on the oxygen-containing copper film body.
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