JP2009031028A - Testing method and device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To shorten the test time, while maintaining the quality of a specimen. <P>SOLUTION: When testing whether a small number of specimens are operated normally by giving a plurality of test conditions thereto, a supply voltage margin for checking the voltage limit, capable of acquiring normal operation, is examined by changing a supply voltage to be supplied to the specimens in each of the plurality of testing conditions; and a test condition that showed poor supply voltage margin is determined, and succeeding tests of the specimens are performed following the determined test condition. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention investigates a power supply voltage margin under a plurality of test conditions for a test product that is a predetermined number (small number) of semiconductor devices such as ICs, and finds the test condition with the worst power supply voltage margin. The present invention relates to a test method and apparatus for testing a test product under the found conditions.

  Conventionally, only a test start signal is transmitted from a handler (automatic machine) to a test machine. And the test method of the conventional test article (IC) was performed as follows.

  First, test article A is tested at a set temperature of 70 ° C. using test program A set by the operator.

  When the test of the test product A is completed, the operator removes the test product A and sets the test product B in the IC tray storage area.

  Test the test product B at a set temperature of 70 ° C. with the test program B set by the operator.

  The operator removes the test product D after the test, and sets the test product E in the IC tray storage area.

  -Test the specimen E with the test program E set by the operator at a set temperature of 70 ° C.

  In addition, when testing a test product, for example, a plurality of tests such as 10 types of function tests are performed. Therefore, the test time increases as the capacity of the memory, which is a test product, increases, and the memory tester An overflow occurred.

  Conventionally, to reduce the number of tests and test time, measure all the specified measurement items for the required number of samples, and in subsequent tests, measure items such as no defects and no quality assurance problems. There has been a semiconductor measurement method and apparatus which are deleted and tested (see Patent Document 1).

Conventionally, every time a test is performed, an error factor for each test item is accumulated and stored from the test result, an error rate for each error factor is obtained, and an error factor with an error rate lower than a predetermined value is executed. There was a test control method for an information processing system in which items are not tested in subsequent tests (see Patent Document 2).
JP 59-228729 A JP-A-3-257538

  The above conventional ones have the following problems.

  Conventionally, when measuring a test item (IC) with a handler (automatic machine), each time the type of test item or test temperature changes, the operator changes the tray in which the test item is stored in the tray storage area. Therefore, a complete continuous test could not be performed.

  On the other hand, the test time of a single memory product takes more than twice as long as the memory capacity doubles as the memory capacity increases. In addition, when a new testing machine such as a memory is introduced, the introduction cost of one testing machine is expensive, so that it is difficult to easily introduce the testing machine.

  In addition, in order to reduce the number of tests and the test time, test items such as measurement items that do not cause defects and have no quality assurance problems, and test items that cause error factors with a lower error rate than a predetermined value are executed. What is not performed is that there are few measurement items and test items that can be deleted, and the number of tests and test time cannot be reduced very much.

  By reading the barcode on the side of the tray, the present invention enables continuous overnight testing even if the test type or temperature changes, maintaining the quality of the post-process of the test product such as a single memory product. However, an object is to shorten the test time and to perform an optimum test.

  FIG. 1 is an explanatory diagram of a test apparatus according to the present invention. In FIG. 1, 1 is a handler (automatic machine), 2 is a test machine, 11 is an IC tray place (untested), 12 is an IC tray place (test completed), 13 is a place where a tray to be tested is placed, and 14 is a control. , 15 is a test section (test head), 16 is a test machine section, 17 is a control section, and 18 is a temperature control section.

  The present invention is configured as follows to solve the above problems.

  (1): When a test is performed on a small number of test products to determine whether the test product operates normally by changing a plurality of test conditions, the power supply voltage supplied to the test product is changed under each of the test conditions. A power supply voltage margin for checking whether the power supply operates normally is investigated, and a test condition in which the power supply voltage margin is bad is determined. Subsequent test of the test product is performed under the determined test condition. Therefore, the test time can be shortened while maintaining the quality of the test product.

  (2): In the test method of (1), the power supply voltage margin is investigated twice at low and high temperatures, and two test conditions of low and high temperatures are determined. For this reason, it is possible to shorten the test time while maintaining the quality of the test product under the two test conditions of low temperature and high temperature.

  The present invention has the following effects.

  (1): The power supply voltage supplied to the test product is changed under each of the plurality of test conditions, the power supply voltage margin for checking to what voltage the normal operation is performed is investigated, and the test condition in which the power supply voltage margin is bad is determined. Since the test of subsequent test products is performed under the determined test conditions, the test time can be shortened while maintaining the quality of the test product.

  (2): The power supply voltage margin is investigated twice at low and high temperatures, and the two test conditions of low and high temperatures are determined. Test time can be shortened.

(1): Description of Test Apparatus FIG. 1 is an explanatory diagram of the test apparatus of the present invention. A testing apparatus that performs testing automatically includes a handler (automatic machine) 1 and a testing machine 2. The handler (automatic machine) 1 is provided with an IC tray place (untested) 11, an IC tray place (test completed) 12, a place 13 for placing a tray to be tested, and a control unit 14. The testing machine 2 is provided with a testing unit (test head) 15, a testing machine unit 16, a control unit 17, and a temperature control unit 18.

  The IC tray place (untested) 11 is a place for an IC tray on which an untested test product (IC) is placed. The IC tray place (test completion) 12 is an IC tray place on which a test product (IC) for which the test has been completed is placed. The place 13 for placing the tray to be tested is a place for placing the IC tray on which the test product (IC) to be tested is placed. The control unit 14 controls the handler (automatic machine). The test unit (test head) 15 is a test unit that tests a test product (IC). The test machine unit 16 is a mechanism unit that actually tests a test product (IC) of the test unit 15. The control unit 17 is a control unit that controls a test in the testing machine 2. The temperature control unit 18 is a temperature control unit that controls the temperature of the test product (IC) of the test unit 15.

  Although not shown, the handler (automatic machine) 1 is provided with a place for placing a defective test product (IC) when the test result is defective. Although not shown, the testing machine 2 is provided with a storage unit (storage means) for storing test conditions, test results, and the like.

  2A and 2B are explanatory views of the IC tray. FIG. 2A is a description of the shape of the IC tray, and FIG. 2B is a description of the side surface of the IC tray. In FIG. 2A, a plurality of test products (IC) 21 are placed on the IC tray 3. In FIG. 2B, a barcode portion 30 is provided on the side surface of the IC tray. The bar code unit 30 is obtained by coding the test program name, test temperature, etc. of the test product (IC) 21.

  FIG. 3 is an explanatory diagram of the IC tray storage area. In FIG. 3, the IC tray place (11 or 12) is provided with a base 32 for placing a tray that moves up and down within a frame 31, and a plurality of IC trays 3 are mounted on the base 32 on which the tray is placed. Yes. A bar code reading unit 33 is provided on the upper side of the right frame 31. The barcode portion 30 of the uppermost IC tray 3 can be read by the barcode reading portion 33 by the upper and lower sides of the tray 32.

  In order to perform the automatic test, the test setting information is read from the barcode unit 30 on the side surface of the tray 3.

(Description of barcode reading order)
(1) Set the test products A to E in the IC tray storage area 11.

  (2) The bar code reading unit 33 reads the bar code unit 30 of the IC tray 3.

  (3) Bar code read result (test program name: 716, test temperature: 70 (° C.)).

  (4) The bar code read result is transmitted to the control units 14, 17 and 18 of the automatic machine and the test machine. The test program name “716” is transmitted from the control unit 14 to the control unit 17 of the testing machine 2. The test temperature “70 (° C.)” is transmitted from the control unit 14 to the temperature control unit 18 of the testing machine 2.

(Explanation of handler test procedure)
(Sequence 1) After the operator places the IC tray 3 on the IC tray storage 11, the test is started.

  (Order 2) After the barcode reading unit 33 reads the barcode of the IC tray 3, the IC tray 3 of the IC tray storage 11 is moved to the place 13 where the tray to be tested is placed.

  (Order 3) One test article (IC) mounted in the place 13 where the tray to be tested is placed is moved to the test unit 15 one by one.

  (Order 4) Referring to the barcode read result, the test program name is transmitted from the handler control unit 14 to the control unit 17, and the test temperature is transmitted to the temperature control unit 18.

  (Sequence 5) When the temperature is applied and the set temperature of the barcode read result is reached, the control unit 17 starts the test of the test program A by the test unit 16.

  (Order 6) Orders 3 to 6 are repeated until all the test products (ICs) mounted on the place 13 where the tray to be tested is placed are completed.

  (Order 7) When all the tests on the IC tray 3 at the place 13 where the tray to be tested is placed are completed, the IC tray 3 is transported to the IC tray place (test completed) 12.

  (Order 8) After reading the bar code of the nth IC tray 3, the barcode is transported to the place 13 where the tray to be tested is placed, and the order 5 to 8 is repeated.

(2): Description of Test Method a) Description of Test Process and Test Result Storage Unit for New Test Process Determination FIG. 4 is an explanatory diagram of the test process and IC tray group. FIG. 4 shows a low temperature test process, a high temperature test process, a new test process, and an IC tray group placed in the IC tray storage area. The low temperature test process, the high temperature test process, and the new test process are stored in the storage unit in the testing machine 2. In the low temperature test process, low temperature test conditions 1 to 10 are provided. In the high temperature test process, high temperature test conditions 1 to 10 are provided. In the new test process, a low temperature test condition 2 and a high temperature test condition 1 are provided. The IC tray group includes IC tray (1) to IC tray (10). In the IC tray (1), ID 1 is provided in the barcode section 30. The IC tray (2) is provided with ID2 in the bar code part 30. In the IC tray (3) to the IC tray (10), ID3 is provided in the barcode unit 30.

  FIG. 5 is an explanatory diagram of the low-temperature test result storage unit. In FIG. 5, the test products (1) to (10) were tested under the low temperature test conditions 1 to 10, and the power supply voltage margin test at that time was performed. The power supply voltage margin test is the lowest power supply voltage that operates under the test conditions with the power supply voltage (usually 3.0V) lowered. The average value at the right end indicates the average value (test products (1) to (10)) under each low-temperature test condition. In this average value, the low temperature test condition 2 is the worst (highest at 2.5 V). That is, the low temperature test condition 2 is a test condition in which the operating power supply voltage range of the test products (1) to (10) is the narrowest.

  FIG. 6 is an explanatory diagram of the high temperature test result storage unit. In FIG. 5, the test products (1) to (10) were tested under the high temperature test conditions 1 to 10, and the power supply voltage margin test was performed at that time. The power supply voltage margin test is the lowest power supply voltage that operates under the test conditions with the power supply voltage (usually 3.0V) lowered. The average value at the right end indicates the average value (test products (1) to (10)) under each high-temperature test condition. In this average value, the high temperature test condition 1 is the worst (highest at 2.4 V).

b) Description of Test Method The IC tray (1) is labeled as ID 1 as the bar code section 30, the IC tray (2) is labeled ID 2, and the IC tray (3) through IC tray (10) is labeled ID 3. ID1 is an ID for performing a power supply voltage margin test in a low temperature state and selecting the worst test condition. ID2 is an ID for performing a power supply voltage margin test in a high temperature state and selecting the worst test condition. ID3 is an ID for selecting test conditions for the new test process.

  Assume that 10 test products are mounted on each of the IC trays (1) to (10). The test will be described below (details are made based on the test flow of FIGS. 7 to 9).

  ・ Explain the test method of IC tray (1).

  Read ID1 of IC tray (1), conduct test under low temperature test condition 1, and investigate the power supply voltage margin of test product (1) mounted on IC tray (1). Then, the power supply voltage margin result of the test product (1) under the low temperature test condition 1 is written in the low temperature test result storage section. Similarly, the power supply voltage margin for the low temperature test conditions 2 to 10 is investigated, and the power supply voltage margin result is written in the low temperature test result storage unit. For the test products (2) to (10) mounted on the IC tray (1), the power supply voltage margin for the low temperature test conditions 1 to 10 is investigated, and the power supply voltage margin result is stored in the low temperature test result storage section. Write. The average value of the power supply voltage margin results of the test products (1) to (10) under the low temperature test condition 1 is calculated and written in the low temperature test result storage section (see FIG. 5). In the example of FIG. 5 of the average value of the low temperature test conditions 1 to 10, the worst low temperature test condition 2 is written into the new test process (see FIG. 4).

  ・ Explain the test method of IC tray (2).

  Read ID2 of IC tray (2), perform high temperature test condition 1 test, and investigate power supply voltage margin of test product (1) mounted on IC tray (2). Write the power supply voltage margin result of high-temperature test condition 1 of the test product (1) to the high-temperature test result storage. Similarly, the power supply voltage margin for the high temperature test conditions 2 to 10 is investigated, and the power supply voltage margin result is written in the high temperature test result storage unit. For the test products (2) to (10) mounted on the IC tray (2), the power supply voltage margin for the high temperature test conditions 1 to 10 is investigated, and the result of the power supply voltage margin is stored in the high temperature test result storage section. Write. The average value of the power supply voltage margin results of the test products (1) to (10) under the high temperature test condition 1 is calculated and written in the high temperature test result storage section (see FIG. 6). In the example of FIG. 6, which is the average value of the high temperature test conditions 1 to 10, the worst high temperature test condition 1 is written into the new test process (see FIG. 4).

  -The test method of IC trays (3) to (10) will be described.

  After reading ID3 of the IC tray (3) and calling a new test process, the test product (1) is tested at the low temperature test condition 2 in a low temperature state. Next, the test under the high temperature test condition 1 is performed in a high temperature state. Similarly, the low temperature test condition 2 and the high temperature test condition 1 are performed on the test products (2) to (10). For the IC trays (4) to (10) to which ID3 is added, a new test process is called to conduct tests under the low temperature test condition 2 and the high temperature test condition 1. In the new test process, since the margin is not investigated, the test is performed at a standard power supply voltage (3 V in this example). In addition, a test product (sample) for determining a new test process can be tested in a predetermined new test process (if the test is performed under a low temperature test condition during a margin survey, only the high temperature may be used in the new test process).

c) Characteristics of the test method-A method of performing a test under the optimum test conditions after performing a power supply voltage margin test at low and high temperatures from the IC tray reader (barcode part) and selecting the worst test conditions It is.

  -The test method can be selected from the reading unit of the IC tray, so that the operator does not need to operate the screen or the like, and work errors can be reduced.

  -Since the test method can be selected from the reading part of the IC tray, it can be fully automated such as automatic operation all night.

(3): Explanation by Test Flow FIG. 7 is a test process flowchart (1), FIG. 8 is a test process flowchart (2), and FIG. 9 is a test process flowchart (3). Hereinafter, description will be made according to the processing S1 to S50 of FIGS.

  S1: The handler 1 reads the barcode part 30 of the IC tray 3 of the IC tray storage 11 by the barcode reading part 33, and proceeds to the process S2.

  S2: The handler 1 determines whether the reading value in the barcode reading unit 33 is ID1 or ID2. If it is ID1, the process proceeds to step S3. If ID2, the process proceeds to step S21 (FIG. 8). If it is not ID1 or ID2, the process proceeds to step S41 (FIG. 9).

  S3: When the reading value in the barcode reading unit 33 is ID1, the testing machine 2 reads the low temperature test process from the storage unit, and proceeds to the process S4.

  S4: The testing machine 2 starts the test of the test product (1), and proceeds to processing S5.

  S5: The tester 2 performs the tests of the low-temperature test conditions 1 to 10 in order in the low-temperature state of the test product (1), investigates the power supply voltage margin, and proceeds to processing S6.

  S5: The tester 2 writes the power supply voltage margin result of the test product (1) to the low temperature test result storage unit (low temperature file), and proceeds to processing S7.

  S7: The testing machine 2 starts the test of the test product (2), and proceeds to processing S8.

  S8: The tester 2 performs the tests of the low-temperature test conditions 1 to 10 in order in the low-temperature state of the test product (2), investigates the power supply voltage margin, and moves to processing S9.

  S9: The tester 2 writes the power supply voltage margin result of the test product (2) in the low temperature test result storage unit, and proceeds to the process S10.

:
S10: The testing machine 2 starts the test of the test product (10), and proceeds to processing S11.

  S11: The tester 2 performs the tests of the low-temperature test conditions 1 to 10 in order in the low-temperature state of the test product (10), investigates the power supply voltage margin, and proceeds to processing S12.

  S12: The tester 2 writes the power supply voltage margin result of the test product (10) in the low temperature test result storage unit, and proceeds to the process S13.

  S13: The tester 2 calculates the average value of the test products (1) to (10) under the low temperature test condition 1 in the low temperature test result storage unit, writes the average value in the low temperature test result storage unit, and proceeds to the process S14. .

  S14: The testing machine 2 calculates the average value of the test products (1) to (10) under the low temperature test condition 2 in the low temperature test result storage unit, writes the average value to the low temperature test result storage unit, and proceeds to processing S15. .

:
S15: The tester 2 calculates the average value of the test products (1) to (10) under the low temperature test condition 10 in the low temperature test result storage unit, writes the average value to the low temperature test result storage unit, and proceeds to processing S16. .

  S16: The tester 2 reads out the test condition whose average value is the worst from the low temperature test result storage unit, writes the low temperature test condition 2 (when the low temperature test condition 2 is the worst) to the new test process, and the first IC Return to reading the barcode portion of the tray (S1).

  S21: When the reading value in the barcode reading unit 33 is ID2, the testing machine 2 reads the high temperature test process from the storage unit, and proceeds to the process S22.

  S22: The testing machine 2 starts the test of the test product (1), and proceeds to processing S23.

  S23: The tester 2 performs the tests of the high-temperature test conditions 1 to 10 in order while the test product (1) is in a high temperature state, investigates the power supply voltage margin, and moves to the process S24.

  S24: The tester 2 writes the power supply voltage margin result of the test product (1) into the high temperature test result storage unit (high temperature file), and proceeds to processing S25.

  S25: The testing machine 2 starts the test of the test product (2), and proceeds to processing S26.

  S26: The tester 2 performs the tests of the high-temperature test conditions 1 to 10 in order while the test product (2) is in a high temperature state, investigates the power supply voltage margin, and moves to the process S27.

  S27: The tester 2 writes the power supply voltage margin result of the test product (2) in the high temperature test result storage unit, and proceeds to the process S28.

:
S28: The testing machine 2 starts the test of the test product (10), and proceeds to processing S29.

  S29: The tester 2 performs the tests of the high-temperature test conditions 1 to 10 in order while the test product (10) is in a high temperature state, investigates the power supply voltage margin, and moves to the processing S30.

  S30: The tester 2 writes the power supply voltage margin result of the test product (10) in the high temperature test result storage unit, and proceeds to processing S31.

  S31: The tester 2 calculates the average value of the test products (1) to (10) under the high temperature test condition 1 in the high temperature test result storage unit, writes the average value to the high temperature test result storage unit, and proceeds to the process S32. .

  S32: The tester 2 calculates the average value of the test products (1) to (10) under the high temperature test condition 2 in the high temperature test result storage unit, writes the average value to the high temperature test result storage unit, and proceeds to the processing S33. .

:
S33: The testing machine 2 calculates the average value of the test products (1) to (10) under the high temperature test condition 10 in the high temperature test result storage unit, writes the average value in the high temperature test result storage unit, and proceeds to processing S34. .

  S34: The tester 2 reads out the test condition whose average value is the worst from the high temperature test result storage, writes the high temperature test condition 1 (when the high temperature test condition 1 is the worst) to the new test process, and the first IC Return to reading the barcode portion of the tray (S1).

  S41: When the reading value in the barcode reading unit 33 is not ID1 or ID2, the testing machine 2 reads the new test process from the storage unit, and proceeds to processing S42.

  S42: The testing machine 2 starts the test of the test product (1), and proceeds to processing S43.

  S43: The testing machine 2 performs the test of the low temperature test condition 2 of the new test process on the test product (1), and proceeds to processing S44.

  S44: The testing machine 2 performs a test of the high-temperature test condition 1 of the new test process on the test product (1), and proceeds to processing S45.

  S45: The testing machine 2 starts the test of the test product (2), and proceeds to processing S46.

  S46: The testing machine 2 performs the test of the low temperature test condition 2 of the new test process on the test product (2), and proceeds to processing S47.

  S47: The testing machine 2 performs the test under the high-temperature test condition 1 of the new test process on the test product (2), and proceeds to processing S48.

:
S48: The testing machine 2 starts the test of the test product (10), and proceeds to the process S49.

  S49: The testing machine 2 performs the test of the low temperature test condition 2 of the new test process on the test product (10), and proceeds to processing S50.

  S50: The tester 2 performs the test under the high temperature test condition 1 of the new test process on the test product (10), and returns to the reading of the barcode part of the first IC tray (S1).

(4): Explanation of operation limit of power supply voltage After checking the operation limit value (margin) of power supply voltage of function test (test condition) 1 for 10 test products at high temperature, 10 limit values Find the average value of. Similarly, after examining the limit value of the power supply voltage of the function tests 2 to 10 for 10 test products, the average value of the operation limit values of each test is obtained. By selecting the function test whose average value is the worst from the function tests 1 to 10 and testing a large number of test products under the function test conditions, the test can be performed in 1/10 test time. . A similar method can be used for tests at low temperatures.

  In other words, an optimum function test (test condition that can detect the most defects) is selected from the worst value of the average distribution of power supply voltage operation limit values, and the test is performed. When the test is performed under the worst test condition (for example, test condition 1), the lower limit value of the power supply voltage operation limit value is lower (the operation limit value is better) than other test conditions (for example, test conditions 2 to 10). Many defective products can be detected. For this reason, it turned out that the test by other test conditions 2-10 can be abbreviate | omitted.

  FIG. 10 is an explanatory diagram of the operation limit of the power supply voltage. In FIG. 10, the operation limit diagram of the power supply voltage for the function test 1 (test product (1)) is circled with PASS (non-defective product) when the test frequency is 10 (ns) and is lowered from the standard voltage 3 (V). Show. This operation limit value is 2.0 (V).

  In the operation limit diagram of the power supply voltage of the function test 1 (test product (2)), PASS (non-defective product) when the test frequency is 10 (ns) is lowered from the standard voltage 3 (V) is indicated by a circle. This operation limit value is 1.8 (V).

  The operation limit value of the power supply voltage operation limit diagram (test product (1)) of function test 2 is 2.2 (V). The operation limit value of the power supply voltage operation limit diagram (test product (2)) of function test 2 is 1.6 (V).

(5): Description of test conditions Test conditions include timing and test patterns. For example, in the memory test, the test is performed by changing the read / write timing value and the write / read pattern (algorithm) to the memory. The following are examples of test conditions.

[Contents of Test Condition 1]
Power supply voltage 3V, input voltage 3.0V, 0.0V, test timing 1, test pattern 1
[Contents of Test Condition 2]
Power supply voltage 3V, input voltage 2.0V, 0.0V, test timing 2, test pattern 2
:
[Contents of Test Condition 10]
Power supply voltage 3V, input voltage 2.4V, 0.8V, test timing 10, test pattern 10
Conventionally, since high-temperature and low-temperature electrical tests were performed under the above test conditions 1 to 10, it took a huge amount of test time. In the present invention, the new test process can reduce the test time while maintaining the quality.

(6): Explanation when there are a plurality of test product names FIG. 11 is an explanatory diagram when there are a plurality of test product names. In FIG. 1-NO. There are 24. Tray NO. 1-Tray NO. 12 are all the same, and the test product name is B. Tray NO. 13-Tray NO. All the test products mounted in 24 are the same, and the test product name is C.

  The test method for the test product name B is the tray No. 1 which is the first tray. 1 (10 test products: the barcode part is ID21) in a low temperature state, the margin of the power supply voltage under the test conditions 1 to 10 is investigated. Next, the tray No. 2 which is the second tray. 2 (10 test products: the barcode part is ID22), the margin of the power supply voltage under the test conditions 1 to 10 is investigated in a high temperature state.

  From the test results of the first and second trays, select the optimal test conditions (new test process), up to 3 to 12 trays (tray NO.3 to NO.12: all barcodes are ID23) The electrical test is conducted (1000 tests).

  Next, the test method of the test product name C is a tray No. 13 which is the 13th tray. 13 (10 test products: the bar code part is ID31) is in a low temperature state and the margin of the power supply voltage under the test conditions 1 to 10 is investigated. Next, the tray No. 14 which is the 14th tray. 14 (10 test products: the bar code part is ID32) and the margin of the power supply voltage under the test conditions 1 to 10 is investigated in a high temperature state.

  From the test results of the 13th and 14th trays, select the optimal test conditions (new test process), up to 15-24 trays (tray NO.15-NO.24: all barcodes are ID33) The electrical test is conducted (1000 tests).

  In this way, even if the name of the test product changes during the process, it is possible to automatically select the optimal test conditions (new test process) and perform a test with reduced test time while maintaining the quality of the test product. it can.

It is explanatory drawing of the test apparatus of this invention. It is explanatory drawing of the IC tray of this invention. It is explanatory drawing of the IC tray storage place of this invention. It is explanatory drawing of the test process and IC tray group of this invention. It is explanatory drawing of the low-temperature test result storage part of this invention. It is explanatory drawing of the high temperature test result storage part of this invention. It is a test processing flowchart (1) of this invention. It is a test processing flowchart (2) of this invention. It is a test process flowchart (3) of this invention. It is explanatory drawing of the operation | movement limit of the power supply voltage of this invention. It is explanatory drawing in case the test article name of this invention is multiple.

Explanation of symbols

1 Handler (automatic machine)
2 Testing machine 11 IC tray place (Untested)
12 IC tray place (test completed)
13 Place to place the test tray 14 Control unit 15 Test unit (Test head)
16 Testing machine part 17 Control part 18 Temperature control part

Claims (3)

When testing whether a small number of test products are operated normally by giving a plurality of test conditions, the power supply voltage supplied to the test product is changed under each of the plurality of test conditions, and up to what voltage is normally operated. Investigate the power supply voltage margin,
A test method in which a test condition in which the power supply voltage margin is bad is determined, and a subsequent test product is tested under the determined test condition.   2. The test method according to claim 1, wherein the investigation of the power supply voltage margin is performed twice at low temperature and high temperature, and two test conditions of low temperature and high temperature are determined. An automatic machine that moves the untested tray storage specimen to the testing machine;
A testing machine for testing the moved test article,
When a small number of test items in the untested tray storage area are moved to the testing machine by the automatic machine, and a test is performed on the small number of test goods by giving a plurality of test conditions. , Changing the power supply voltage supplied to the test product under each of the plurality of test conditions, investigating a power supply voltage margin for examining up to which voltage is normally operated, determining a test condition in which the power supply voltage margin is bad,
After the determination of the test conditions, the test machine in the untested tray storage area is moved to the test machine by the automatic machine, and the test specimen moved by the test machine is tested under the determined test conditions. Characteristic test equipment.

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