JP2008508665A - High resolution cathode structure - Google Patents

Abstract

The present invention includes a first lower metal coating layer (20) forming a cathode, an electrical insulating layer, a second upper metal coating layer (10, 12) forming a take-out grid, and the second metal. An opening (21) formed in the coating layer and the electrical insulating layer, and a line of electron emission means (22) disposed in the opening, the line being parallel to the row direction of the screen The present invention relates to a triode-type cathode structure of FED screens arranged in rows and columns.

Description

  The present invention relates to the field of emission cathodes and their application to screen manufacturing methods, and more particularly to application to screen manufacturing methods based on carbon nanotubes.

  Screen resolution is an important factor affecting the display performance of the screen, and in part affects the types of applications in which the device can be used.

  Furthermore, the ease of manufacturing at a given resolution is an important factor affecting the manufacturing cost.

  FED screens based on carbon nanotubes use a cathode structure that has a fairly large tolerance in geometry, contributing to its low manufacturing cost.

  An FED screen consists of rows and columns, and the intersection of rows and columns defines a pixel. The displayed data is transmitted to the column at the same time. Each row is scanned in turn and the entire screen is addressed.

A triode-type cathode structure 1 described in Patent Document 1 is shown in FIGS. 1A and 1B.
A first metal coating layer 4 forming a cathode arranged in the column direction of the screen (this first layer (lower layer) improves the uniformity of the emission, for example an optional resistive layer 2 made of silicon) Support).
An insulator 6 (eg silica) between the resistance layer and the second metal coating layer 10;
Is provided.

  This metal coating layer 10 (upper layer) corresponds to a screen control grid for extracting electrons. This grid is arranged in the column direction of the screen.

  The grid conductors 12 are arranged at the same level as the grid 10, connect the grids to each other, and connect the grid to the main grid conductors 11 arranged in the row direction of the screen. Similarly, the cathode conductor 13 on the same level as the cathode 4 connects the cathodes (FIG. 1B).

  For example, the emission means such as the carbon nanotube 14 is disposed on the resistance layer in the groove 16. The groove 16 is an opening formed in the grid and the insulating layer 6.

  Typically, as shown in FIG. 1A, the width of the grooves 16 is approximately 15 μm, and the grids are arranged at a pitch on the order of 25 μm.

  As shown in FIG. 1B, the grooves 16 are arranged in the column direction of the screen and are the same as the grid 10 and the cathode 4.

  Due to the divergence of the emitted electron beam, the overlap portion δ for the phosphorus region located on the anode is determined (FIG. 2). The color pitch P that determines the screen resolution is generally a double overlapping portion in the row direction. This is especially the case when colored phosphorus is placed in a strip parallel to the column.

  In the case of the structure shown in FIGS. 1A and 1B, when the distance between the anode and the cathode is 1 mm and the voltage of the anode is 3 kV, this overlapping portion is generally on the order of 240 μm, and the color pixel of 1.4 mm Become.

  Such a resolution can be applied to a large screen, but there is a problem in using it for a high resolution screen (1000 lines) having a diagonal line of 50 cm, for example.

French Patent No. 2836279

  Therefore, it is a problem to find a new screen structure capable of improving the resolution while maintaining the original simplicity of the cathode as shown in FIG. 1A.

  The present invention firstly includes a first lower metal coating layer forming a cathode, an electrically insulating layer, a second upper metal coating layer forming a take-out grid, the second metal coating layer, An FED having an opening formed in an electrical insulating layer and a line of electron emission means disposed in the opening, the lines being arranged or addressed in rows and columns parallel to the row direction of the screen The present invention relates to a triode-type cathode structure for a screen.

  According to the invention, the structure is rotated 90 ° compared to the known structure. In other words, the groove in which the discharge means is arranged is parallel to the direction of the line.

  As a result, the beam overlap is significantly improved.

  Parallel rows or grids contribute to creating a field structure that diverges in a direction perpendicular to the direction of the grid.

  On the other hand, the electric field component parallel to the rows forming the grid is substantially zero.

  Accordingly, the present invention also provides a first lower metal coating layer forming a cathode, an electrically insulating layer, a second upper metal coating layer forming a take-out grid, the second metal coating layer, An opening formed in the electrically insulating layer and a row-direction lead wire, the opening portion being arranged or addressed in a row and column shape arranged in parallel to the lead-out grid and the row-direction lead wire The present invention relates to a triode-type cathode structure of an FED screen.

  The opening may include one or more grooves parallel to the row direction.

  Rows and columns define pixels. The grid may be in the form of a band parallel to the row direction on the screen and may be connected to each other via at least one grid conductor in each pixel.

  The grid may be connected by grid conductors, and adjacent pairs of conductors each separate a pixel in the lateral direction.

  The grids may be connected by grid conductors, each grid conductor being arranged on the axis of symmetry of the pixels in the column direction.

  The grid conductors may be passed between two adjacent electron emitting means on the same line, and this may be the case for any pair of electron emitting means on the same lion.

  The grids may be connected by grid conductors, and a plurality of the grid conductors may be arranged in the respective column directions of the pixels.

  Preferably, in this case, the pixel does not have a lateral grid conductor so that electrical disturbances due to the lateral conductor are eliminated.

  The electron emission means are preferably based on nanotubes or nanofibers made of carbon or silicon.

The present invention further includes
-Forming a cathode in the first lower metal coating layer;
-Forming an electrical insulating layer and a second upper metal coating layer;
-Forming an opening in the second metal coating layer and the electrically insulating layer;
-Forming a line of electron emission means arranged in the opening,
The line is parallel to the row direction of the screen,
The present invention relates to a method for manufacturing a triode-type cathode structure of FED screens arranged in rows and columns.

  The method may include forming a resistance layer on the first metal coating layer.

  The opening can be formed by etching the second metal coating layer and the electrical insulating layer.

  A catalyst pad can be deposited in the opening, and the electron emission means is generated on the pad.

  The electron emission means may include a nanotube or nanofiber made of carbon or silicon formed by using, for example, a CVD method.

  As a modification, the electron emission means can be added to the bottom surface of the opening.

  A first embodiment of a structure according to the present invention is illustrated in FIG. This is a monochromatic pixel and is also referred to as a subpixel of a color pixel (the color pixel comprises three monochromatic pixels, one for red, one for green and one for blue).

  Basic elements of this structure (first metal coating layer, resistance layer, insulator, etc.) are obtained in the same manner as in the structure of FIG. 1A.

That is, the device according to the present invention is also
-A first metal coating layer 4 (lower layer) that forms the cathode of the screen;
A resistive layer 2 supported on the cathode 4 and improving the uniformity of the emission (eg this layer is made of silicon);
An insulator 6 between the second metal coating layer 10 and the resistance layer 2 used to form the control grid 10;
Is provided.

  The assembly forms a triode structure with an anode (not shown in FIG. 1A).

  However, unlike the case of FIG. 1B, the grooves 21 in which the emission means (in this case, nanotubes) are arranged are arranged in parallel to the row direction of the screen, like the grid 10 and the cathode 4.

  The grids 10 are connected to each other via grid conductors 12 (in this case arranged in the column direction) and to the main grid conductors 11 that remain facing the row direction. The cathodes are formed by a lower metal coating layer (layer 4 in FIG. 1A) and are connected to each other by cathode conductors 20 arranged in the column direction.

  The pixel shown in FIG. 3 has three grooves parallel to the main grid wiring 11 and separated by the grid 10.

  More generally, a pixel has n grooves and is separated from each other by wires arranged in the row direction.

  The groove 21 is provided with a pad or island 22 of an electron-emitting device, and is arranged along the row direction of the screen.

  The emitting element is electrically connected to the cathode 4 via the resistance layer 2, but may be connected via a metal layer formed so as to cover the entire surface of the substrate.

  The grid is arranged in the same direction as the grooves and is parallel to the grid conductors.

  By arranging the emitting elements or means in a line parallel to the row direction, the overlap of the beams is significantly improved.

  The grid 10 arranged parallel to the row direction on the screen contributes to forming a field structure that diverges in a direction perpendicular to the direction of the grid (and thus in a direction perpendicular to the row).

  On the other hand, the component of the electric field parallel to the grid (and thus parallel to the line) is substantially zero.

  Assuming the grid 10 is infinitely long, due to symmetry, this component is completely zero.

  However, the emission means arranged at the end of each groove are placed under the influence of the diverging field components because of the grid conductors 12 connected to the grid.

  Such a situation can be improved by using the pixel structure shown in FIGS.

  In these drawings, the side grid conductors 12 are omitted and replaced with one central grid conductor 31 (FIGS. 4A and 4B) and a plurality of central grid wires 41 (FIGS. 5A and 5B). .

  The grid 10 stops at the location occupied by the side grid leads 12 as shown in FIGS. 4A and 5A, or at the position occupied by the side grid leads 12 as shown in FIGS. 4B and 5B. It is extended to the top.

  Thus, the lateral grid conductors 12 can be deleted for each pixel. This also eliminates electrical disturbances caused by the side conductors.

  The divergence phenomenon caused by the central grid wirings 31 and 41 is less disturbed. This is because it has an effect only within a single pixel (unlike the side grid leads 12 which can cause disturbances in adjacent pixels as shown in FIG. 3).

  Further, the cathode conductor 20 is disposed at the end of the pixel at 0 V, and concentrates electrons toward the inside of the pixel. Therefore, the configurations of FIGS. 4A, 4B and 5A, 5B are more preferable than the configuration of FIG.

  The modification of FIGS. 5A and 5B includes a plurality of central grid conductors 41. The overlap provided by the two central conductors 41 allows the problem of cut-off in the central conductor 31 of FIGS. 4A and 4B.

  In these embodiments, the pixel has n parallel grooves separated from each other by a grid arranged in the row direction on the screen. Each line is also separated into two (FIGS. 4A, 4B) or more (FIGS. 5A, 5B) by grid conductors 31, 41 connected to the grid and arranged in the column direction of the screen. . It is also possible for the grid conductors to pass between two adjacent emitter elements pads or islands of the same line or groove, and for each line or groove.

  FIG. 6A shows a sub-pixel structure according to the prior art, with four grid rows and three nanotube lines arranged between the grids. The column direction is indicated by an arrow at the top of the drawing.

  The size of the pad is 5 μm × 10 μm, the width of the groove is 15 μm, and the total width L of the subpixel is 72 μm.

  For this structure, when the distance between the anode and the cathode was 1 mm and the anode voltage was 3 kV, the lateral overlap δ was measured to be 240 μm.

  FIG. 6B shows a part of the structure according to the invention. The nanotube grooves are turned and arranged perpendicular to the column direction of the screen, that is, in the row direction of the screen.

  The subpixel has 12 parallel grooves (all not shown) arranged at a pitch of 24 μm (indicated by pitch P in the drawing). Each groove has three 5 μm × 10 μm nanotube pads. Under this condition, the overlapping portion on the side in the column direction becomes as small as 150 μm as compared with the case where the distance between the anode and the cathode is 1 mm at an anode voltage of 3 kV.

  Regardless of the embodiment used, the device according to the invention can be formed using vacuum deposition or photolithography.

  For example, the cathode conductor can be obtained by evaporating a conductive material such as molybdenum, chromium, niobium or TiW. The material is then etched along the band to form a cathode disposed along the row direction on the screen and a conductive element connecting the cathode.

  Thereafter, vapor deposition of a resistance layer made of, for example, silicon is performed. Also, an insulating layer made of, for example, silica is deposited, and finally a metal layer that forms a grid for taking out electrons is deposited.

  Thereafter, the metal layer and the insulating layer are etched to form trenches or grooves that are arranged along the row direction of the screen in the same manner as the extraction grid.

  A catalyst pad (Ni, Co, Fe, Mo, Pt, or an alloy of these materials to produce nanotubes) adapted for the production of electron emitting material is deposited on the bottom of the groove by a “lift-off” method. The catalyst may be disposed on a barrier layer made of, for example, TiN.

  When carbon nanotubes are used, they can be formed using a thermal CVD method. For example, acetylene is used at a pressure on the order of 150 mTorr.

  As a variant, nanotubes or more general electron-emitting devices are added to the bottom of the groove.

  One of the devices according to the invention relates to a screen, in particular an FED type screen, and has a cathode device or structure as described above according to the invention. The diagonal line of such a screen is 50 cm, for example.

1 shows a cathode structure according to the prior art. 1 shows a cathode structure according to the prior art. 1 shows a cathode structure according to the prior art. 1 shows a cathode structure according to the present invention. 1 shows a cathode structure according to the present invention. 1 shows a cathode structure according to the present invention. 1 shows a cathode structure according to the present invention. 1 shows a cathode structure according to the present invention. 1 shows a structure according to the prior art. 1 shows a structure according to the invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Triode type cathode structure 2 Resistance layer 4 Cathode 6 Insulator 10 Grid 11 Main grid lead 12 Grid lead 13, 20 Cathode lead 14, 22 Emission means 16, 21 Groove 31, 41 Central grid lead

Claims (30)

  A first lower metal coating layer (4, 20) forming a cathode, an electrically insulating layer (6), a second upper metal coating layer (10, 12) forming a take-out grid, and the second An opening (21) formed in the metal coating layer and in the electrical insulating layer, and a line of electron emission means (22) disposed in the opening, the line being parallel to the row direction of the screen A triode-type cathode structure of FED screens arranged in rows and columns.   The cathode structure according to claim 1, wherein the opening (21) includes one or more grooves parallel to a row direction of the screen.   3. The cathode structure according to claim 2, wherein the emitting means is disposed on a pad (22) disposed in each of the grooves.   The resistance layer (2) is inserted between the first metal coating layer (4, 20) and the line of the electron emission means (22), according to any one of claims 1 to 3. Cathode structure.   The rows and the columns define pixels, and the grid (10) is in the form of a band parallel to the row direction on the screen, with at least one grid conductor (12) in each of the pixels. The cathode structure according to claim 1, wherein the cathode structures are connected to each other.   The cathode structure according to claim 5, wherein the grids are connected by grid conductors (11), and each pair of adjacent conductors delimits the pixels in the lateral direction.   6. The cathode structure according to claim 5, wherein the grids are connected by grid conductors, and each grid conductor (31) is arranged on an axis of symmetry of one pixel in the column direction.   6. The cathode structure according to claim 5, wherein the grid is connected by grid conductors, and a plurality of the grid conductors (41) are arranged in the column direction in each of the pixels.   9. A cathode structure according to claim 8, wherein a grid conductor passes between two adjacent electron emission means on the same line.   A grid conductor passes between two adjacent electron emission means on the same line, but for all lines of the emission means, passes between all pairs of adjacent emission means on the same line. The cathode structure according to claim 9.   11. A cathode structure according to any one of claims 7 to 10, wherein at least one of the pixels does not have a lateral grid conductor.   The cathode structure according to any one of claims 1 to 11, wherein the electron emission means is based on a nanotube or nanofiber made of carbon or silicon.   A particularly FED type screen comprising the cathode structure according to any one of claims 1 to 12. -Forming a cathode (4, 20) in the first lower metal coating layer;
-Forming an electrical insulating layer (6) and a second upper metal coating layer;
-Forming openings in the second metal coating layer and the electrically insulating layer to form a grid in the second metal coating layer;
-Forming a line of electron emission means arranged in the opening,
The line is parallel to the row direction of the screen,
A method of manufacturing a triode-type cathode structure of FED screens arranged in rows and columns.   The method according to claim 14, comprising the step of forming a resistive layer (2).   The method according to claim 14 or 15, wherein the second metal coating layer and the electrically insulating layer are etched.   17. A method according to any one of claims 14 to 16, wherein a catalyst pad is deposited in the opening and the electron emission means is produced on the pad.   The method according to any one of claims 14 to 17, wherein the electron emission means comprises a nanotube or nanofiber made of carbon or silicon.   The method according to claim 18, wherein the nanotube or the nanofiber is formed using a CVD method.   The method according to any one of claims 14 to 19, wherein the electron emission means is added to a bottom surface of the opening.   21. A method according to any one of claims 14 to 20, wherein the opening (21) comprises one or more grooves parallel to the row direction of the screen.   The method according to claim 21, wherein the electron emitting means is arranged on a pad (22) arranged for each groove.   The rows and the columns define pixels, and the grid is formed in a band shape parallel to the row direction of the screen and is connected to each other via at least one grid conductor (12) in each of the pixels. The method according to any one of claims 14 to 22.   24. The method of claim 23, wherein the grid is connected by grid conductors (11), and each of the adjacent pairs of conductors delimits pixels in the lateral direction.   24. Method according to claim 23, wherein the grids are connected by grid conductors, each grid conductor (31) being arranged on an axis of symmetry of one pixel in the column direction.   24. The method according to claim 23, wherein the grids are connected by grid conductors, and in each of the pixels, a plurality of the grid conductors (41) are arranged in the column direction.   27. A method according to claim 26, wherein a grid conductor passes between two adjacent electron emission means on the same line.   A grid conductor passes between two adjacent electron emission means on the same line, but for all lines of the emission means, passes between all pairs of adjacent emission means on the same line. 28. A method according to claim 27, adapted to:   29. A method according to any one of claims 25 to 28, wherein at least one of the pixels does not have a lateral grid conductor.   30. A method for manufacturing a particularly FED type screen, comprising the method for manufacturing a cathode structure according to any one of claims 14 to 29.

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